pyadi-jif 0.1.0__py2.py3-none-any.whl

adijif/converters/adrv9009_bf.py

@@ -0,0 +1,43 @@
+import numpy as np
+
+from adijif.converters.converter import converter
+
+
+class adrv9009_bf(converter):
+    """Brute force methods for calculating clocks
+
+    These are currently meant for debug to compare against
+    the solver solutions
+    """
+
+    def device_clock_available(self):
+        """Generate list of possible device clocks"""
+        aicd = sorted(self.available_input_clock_dividers)
+
+        dev_clocks = []
+        for div in aicd:
+            in_clock = self.sample_clock * self.datapath_decimation * div
+            if in_clock <= self.max_input_clock:
+                dev_clocks.append(in_clock)
+        if not dev_clocks:
+            raise Exception(
+                "No device clocks possible in current config. Sample rate too high"
+            )
+        return dev_clocks
+
+    def device_clock_ranges(self):
+        """Generate min and max values for device clock"""
+
+        clks = self.device_clock_available()
+        return np.min(clks), np.max(clks)
+
+    def sysref_clock_ranges(self):
+        """sysref must be multiple of LMFC"""
+        lmfc = self.multiframe_clock
+        return lmfc / 2048, lmfc / 2
+
+    def sysref_met(self, sysref_clock, sample_clock):
+        if sysref_clock % self.multiframe_clock != 0:
+            raise Exception("SYSREF not a multiple of LMFC")
+        if (self.multiframe_clock / sysref_clock) < 2 * self.input_clock_divider:
+            raise Exception("SYSREF not a multiple of LMFC > 1")

adijif/converters/adrv9009_util.py

@@ -0,0 +1,89 @@
+"""ADRV9009 Utility Functions."""
+
+from typing import Dict, Union
+
+from adijif.converters.converter import converter
+
+
+def _convert_to_config(
+    L: Union[int, float],
+    M: Union[int, float],
+    Np: Union[int, float],
+    S: Union[int, float] = 1,
+) -> Dict:
+    return {
+        "L": L,
+        "M": M,
+        "F": Np / 8 * M * S / L,
+        "S": S,
+        "HD": (
+            1
+            if (M == 1 and L == 2 and S == 1)
+            or (M == 2 and L == 4 and S == 1)
+            or (M == 1 and L == 4 and S == 2)
+            else 0
+        ),
+        "Np": Np,
+        "N": Np,
+        "CS": 0,
+        "CF": 0,
+        "K": 32,  # THIS IS A SUGGESTED VALUE
+    }
+
+
+quick_configuration_modes_tx = {
+    # M = 1
+    str(0): _convert_to_config(M=1, L=1, Np=16),
+    str(1): _convert_to_config(M=1, L=2, Np=16),
+    # M = 2
+    str(2): _convert_to_config(M=2, L=1, Np=16),
+    str(3): _convert_to_config(M=2, L=2, Np=16),
+    str(4): _convert_to_config(M=2, L=4, Np=16),
+    # M = 4
+    str(5): _convert_to_config(M=4, L=1, Np=16),
+    str(6): _convert_to_config(M=4, L=2, Np=16),
+    str(7): _convert_to_config(M=4, L=4, Np=16),
+    str(8): _convert_to_config(M=4, L=2, Np=12),
+}
+
+
+quick_configuration_modes_rx = {
+    # M = 1
+    str(0): _convert_to_config(M=1, L=1, S=1, Np=16),
+    str(1): _convert_to_config(M=1, L=1, S=2, Np=16),
+    str(2): _convert_to_config(M=1, L=1, S=4, Np=16),
+    str(3): _convert_to_config(M=1, L=2, S=1, Np=16),
+    str(4): _convert_to_config(M=1, L=2, S=2, Np=16),
+    str(5): _convert_to_config(M=1, L=2, S=4, Np=16),
+    str(6): _convert_to_config(M=1, L=4, S=2, Np=16),
+    str(7): _convert_to_config(M=1, L=4, S=4, Np=16),
+    # M = 2
+    str(8): _convert_to_config(M=2, L=1, S=1, Np=16),
+    str(9): _convert_to_config(M=2, L=1, S=2, Np=16),
+    str(10): _convert_to_config(M=2, L=2, S=1, Np=16),
+    str(11): _convert_to_config(M=2, L=2, S=2, Np=16),
+    str(12): _convert_to_config(M=2, L=2, S=4, Np=16),
+    str(13): _convert_to_config(M=2, L=4, S=1, Np=16),
+    str(14): _convert_to_config(M=2, L=4, S=2, Np=16),
+    str(15): _convert_to_config(M=2, L=4, S=4, Np=16),
+    # M = 4
+    str(16): _convert_to_config(M=4, L=1, S=1, Np=16),
+    str(17): _convert_to_config(M=4, L=2, S=1, Np=16),
+    str(18): _convert_to_config(M=4, L=2, S=2, Np=16),
+    str(19): _convert_to_config(M=4, L=4, S=1, Np=16),
+    str(20): _convert_to_config(M=4, L=4, S=2, Np=16),
+    str(21): _convert_to_config(M=4, L=4, S=4, Np=16),
+    # Np = 12,24
+    str(22): _convert_to_config(M=2, L=1, S=2, Np=12),
+    str(23): _convert_to_config(M=4, L=1, S=1, Np=12),
+    str(24): _convert_to_config(M=4, L=2, S=1, Np=12),
+    str(25): _convert_to_config(M=2, L=2, S=2, Np=24),
+    str(26): _convert_to_config(M=4, L=2, S=1, Np=24),
+}
+
+
+def _extra_jesd_check(dev: converter) -> None:
+    FK = dev.F * dev.K
+    assert FK <= 256, "F x K must be <= 256"
+    assert FK >= 20, "F x K must be >= 20"
+    assert FK % 4 == 0, "F x K must be a multiple of 4"

adijif/converters/converter.py

@@ -0,0 +1,399 @@
+"""Converter base meta class for all converter clocking models."""
+
+from abc import ABCMeta, abstractmethod
+from typing import Dict, List, Union
+
+from ..common import core
+from ..draw import Layout, Node
+from ..gekko_trans import gekko_translation
+from ..jesd import jesd
+
+
+class converter(core, jesd, gekko_translation, metaclass=ABCMeta):
+    """Converter base meta class used to enforce all converter classes.
+
+    This class should be inherited from for all converters: ADCs, DACs,
+    and transceivers.
+
+    """
+
+    """Nested device with multiple dependent converters. Includes MxFE and
+    transceivers"""
+    _nested = False
+
+    """DSP data path of device"""
+    datapath = None
+
+    config: Dict = {}
+    _jesd_params_to_skip = [
+        "E",
+        "global_index",
+    ]  # Params in table not to set
+    _jesd_params_to_skip_check = [
+        "DualLink",
+        "E",
+        "decimations",
+        "global_index",
+    ]
+
+    def draw(
+        self, clocks: Dict, lo: Layout = None, clock_chip_node: Node = None
+    ) -> str:
+        """Generic Draw converter model.
+
+        Args:
+            clocks (Dict): Clocking configuration
+            lo (Layout): Layout object to draw on
+            clock_chip_node (Node): Clock chip node to add to. Defaults to None.
+
+        Returns:
+            str: Path to image file
+
+        Raises:
+            Exception: If no solution is saved
+        """
+        system_draw = lo is not None
+        name = self.name.lower()
+
+        if not system_draw:
+            lo = Layout(f"{name} Example")
+        else:
+            assert isinstance(lo, Layout), "lo must be a Layout object"
+
+        ic_node = Node(self.name)
+        lo.add_node(ic_node)
+
+        # rate = clocks[f"{name}_ref_clk"]
+        # Find key with ending
+        ref_clk_name = None
+        for key in clocks.keys():
+            if key.lower().endswith(f"{name.lower()}_ref_clk"):
+                ref_clk_name = key
+                break
+        if ref_clk_name is None:
+            raise Exception(
+                f"No clock found for {name}_ref_clk\n.Options: {clocks.keys()}"
+            )
+
+        sysref_clk_name = None
+        for key in clocks.keys():
+            if key.lower().endswith(f"{name.lower()}_sysref"):
+                sysref_clk_name = key
+                break
+        if sysref_clk_name is None:
+            raise Exception(
+                f"No clock found for {name}_sysref\n.Options: {clocks.keys()}"
+            )
+
+        if not system_draw:
+            ref_in = Node("REF_IN", ntype="input")
+            lo.add_node(ref_in)
+        else:
+            to_node = lo.get_node(ref_clk_name)
+            from_node = lo.get_connection(to=to_node.name)
+            assert from_node, "No connection found"
+            assert isinstance(from_node, list), "Connection must be a list"
+            assert len(from_node) == 1, "Only one connection allowed"
+            ref_in = from_node[0]["from"]
+            # Remove to_node since it is not needed
+            lo.remove_node(to_node.name)
+
+        rate = clocks[ref_clk_name]
+
+        lo.add_connection({"from": ref_in, "to": ic_node, "rate": rate})
+
+        # Add framer
+        jesd204_framer = Node("JESD204 Framer", ntype="jesd204framer")
+        ic_node.add_child(jesd204_framer)
+
+        # SYSREF
+        if not system_draw:
+            sysref_in = Node("SYSREF_IN", ntype="input")
+            lo.add_connection(
+                {
+                    "from": sysref_in,
+                    "to": jesd204_framer,
+                    # "rate": clocks[f"{name}_sysref"],
+                    "rate": clocks[sysref_clk_name],
+                }
+            )
+        else:
+            # to_node = lo.get_node(f"{name}_sysref")
+            to_node = lo.get_node(sysref_clk_name)
+            from_node = lo.get_connection(to=to_node.name)
+            assert from_node, "No connection found"
+            assert isinstance(from_node, list), "Connection must be a list"
+            assert len(from_node) == 1, "Only one connection allowed"
+            sysref_in = from_node[0]["from"]
+            lo.remove_node(to_node.name)
+
+            lo.add_connection(
+                {
+                    "from": sysref_in,
+                    "to": jesd204_framer,
+                    # "rate": clocks[f"{name}_sysref"],
+                    "rate": clocks[sysref_clk_name],
+                }
+            )
+
+        # WIP Add remote deframer
+        jesd204_deframer = Node("JESD204 Deframer", ntype="deframer")
+
+        # Add connect for each lane
+        for _ in range(self.L):
+            lane_rate = self.bit_clock
+            lo.add_connection(
+                {"from": jesd204_framer, "to": jesd204_deframer, "rate": lane_rate}
+            )
+
+        if not system_draw:
+            return lo.draw()
+
+    def validate_config(self) -> None:
+        """Validate device configuration including JESD and clocks.
+
+        This check only is for static configuration that does not include
+        variables which are solved.
+        """
+        self._check_valid_jesd_mode()
+        self._check_valid_internal_configuration()  # type: ignore
+        self.validate_clocks()
+
+    def set_quick_configuration_mode(
+        self, mode: Union[str, int], jesd_class: str = "jesd204b"
+    ) -> None:
+        """Set JESD configuration based on preset mode table.
+
+        Args:
+            mode (str): Integer of desired mode.
+            jesd_class (str): JESD class to use. Default is jesd204b.
+
+        Raises:
+            Exception: Invalid mode selected
+        """
+        smode = str(mode)
+        if smode not in self.quick_configuration_modes[jesd_class].keys():
+            raise Exception(f"Mode {smode} not among configurations for {jesd_class}")
+
+        if jesd_class not in self.available_jesd_modes:
+            raise Exception(f"{jesd_class} not available for {self.name}")
+        self.jesd_class = jesd_class
+
+        cfg = self.quick_configuration_modes[jesd_class][smode]
+        for jparam in cfg:
+            if jparam in self._jesd_params_to_skip:
+                continue
+            setattr(self, jparam, cfg[jparam])
+
+    def _check_valid_jesd_mode(self) -> str:
+        """Verify current JESD configuration for part is valid.
+
+        Raises:
+            Exception: Invalid JESD configuration
+
+        Returns:
+            str: Current JESD mode
+        """
+        # Check to make sure JESD clocks in range
+        self._check_jesd_config()
+        # Pull current mode
+        k = next(iter(self.quick_configuration_modes[self.jesd_class]))
+        attrs = self.quick_configuration_modes[self.jesd_class][k].keys()
+
+        current_config = {}
+        for attr in attrs:
+            if attr in self._jesd_params_to_skip_check:
+                continue
+            current_config[attr] = getattr(self, attr)
+
+        # Check mode in supported modes
+        for mode in self.quick_configuration_modes[self.jesd_class].keys():
+            cmode = self.quick_configuration_modes[self.jesd_class][mode].copy()
+            for k in self._jesd_params_to_skip_check:
+                if hasattr(cmode, k) or k in cmode:
+                    del cmode[k]
+                if hasattr(current_config, k) or k in current_config:
+                    del current_config[k]
+            if current_config == cmode:
+                return mode
+        raise Exception(f"Invalid JESD configuration for {self.name}\n{current_config}")
+
+    def get_current_jesd_mode_settings(self) -> Dict:
+        """Get current JESD mode settings.
+
+        Returns:
+            Dict: Current JESD mode settings
+            str: Current JESD mode
+        """
+        k = next(iter(self.quick_configuration_modes[self.jesd_class]))
+        attrs = self.quick_configuration_modes[self.jesd_class][k].keys()
+        current_config = {}
+        for attr in attrs:
+            if attr in self._jesd_params_to_skip_check:
+                continue
+            current_config[attr] = getattr(self, attr)
+        return current_config
+
+    @property
+    @abstractmethod
+    def converter_type(self) -> str:
+        """Type of converter. ADC or DAC.
+
+        Returns:
+            str: Type of converter
+        """
+        raise NotImplementedError
+
+    @property
+    @abstractmethod
+    def clocking_option_available(self) -> List[str]:
+        """Supported clocking modes.
+
+        Returns:
+            List: List of string of clocking modes
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    _clocking_option = "direct"
+
+    @property
+    def clocking_option(self) -> str:
+        """Get clocking mode for device.
+
+        Returns:
+            str: Clocking mode for device (integrated_pll, direct)
+        """
+        return self._clocking_option
+
+    @clocking_option.setter
+    def clocking_option(self, value: str) -> None:
+        """Set clocking mode for device.
+
+        Args:
+            value (str): Clocking mode for device (integrated_pll, direct)
+
+        Raises:
+            Exception: clocking_option not supported by device
+        """
+        if value not in self.clocking_option_available:
+            raise Exception("clocking_option not available for device")
+        self._clocking_option = value
+
+    @property
+    @abstractmethod
+    def quick_configuration_modes(self) -> Dict:
+        """Supported JESD mode table.
+
+        Returns:
+            Dict: Dictionary of supported modes
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    @property
+    @abstractmethod
+    def _check_valid_internal_configuration(self) -> None:
+        """Check current device mode is valid."""
+        raise NotImplementedError  # pragma: no cover
+
+    @property
+    @abstractmethod
+    def converter_clock_min(self) -> Union[int, float]:
+        """Minimum rate of data converter.
+
+        Returns:
+            Union[int, float]: converter min rate
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    @property
+    @abstractmethod
+    def converter_clock_max(self) -> Union[int, float]:
+        """Maximum rate of data converter.
+
+        Returns:
+            Union[int, float]: converter max rate
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    @property
+    @abstractmethod
+    def name(self) -> str:
+        """Name of supported by device.
+
+        Must be a string
+
+        Raises:
+            NotImplementedError: If child classes do not implement method/property
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    @property
+    @abstractmethod
+    def device_clock_available(self) -> None:
+        """Allowable K settings for device.
+
+        Must be a list ints
+
+        Raises:
+            NotImplementedError: If child classes do not implement method/property
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    @property
+    @abstractmethod
+    def device_clock_ranges(self) -> None:
+        """Allowable ranges for device clocks based on config.
+
+        This is only used for brute-force implementations and not solver based
+
+        Raises:
+            NotImplementedError: If child classes do not implement method/property
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    @property
+    @abstractmethod
+    def get_required_clocks(self) -> List:
+        """Get list of strings of names of requested clocks.
+
+        This list of names is for the clocks defined by get_required_clocks
+
+        Raises:
+            NotImplementedError: If child classes do not implement method/property
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    @property
+    @abstractmethod
+    def get_required_clock_names(self) -> List[str]:
+        """Generate list of required clock names.
+
+        This is a list of strings
+
+        Raises:
+            NotImplementedError: If child classes do not implement method/property
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    @property
+    @abstractmethod
+    def get_config(self) -> Dict:
+        """Extract configuration from solver solution.
+
+        Return dictionary of clocking config for converter
+
+        Raises:
+            NotImplementedError: If child classes do not implement method/property
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    def _get_converters(self) -> Union["converter", List["converter"]]:
+        return self
+
+    def __str__(self) -> str:
+        """Get string description of converter object.
+
+        Returns:
+            str: Description string
+        """
+        return f"{self.name} data converter model"

adijif/converters/dac.py

@@ -0,0 +1,85 @@
+"""Converter base meta class for all converter clocking models."""
+
+from abc import ABCMeta, abstractmethod
+from typing import List, Union
+
+from adijif.converters.converter import converter
+
+
+class dac(converter, metaclass=ABCMeta):
+    """DAC base meta class used to enforce all DAC classes.
+
+    This class should be inherited from for all DACs and transceivers.
+
+    """
+
+    def _check_valid_internal_configuration(self) -> None:
+        """Verify current internal clocking configuration for part is valid.
+
+        Raises:
+            Exception: Invalid clocking configuration
+        """
+        if self.interpolation * self.sample_clock > self.converter_clock_max:
+            raise Exception(
+                "DAC rate too fast for configuration {} (max: {})".format(
+                    self.interpolation * self.sample_clock,
+                    self.converter_clock_max,
+                )
+            )
+        if self.interpolation * self.sample_clock < self.converter_clock_min:
+            raise Exception(
+                "DAC rate too slow for configuration {} (min: {})".format(
+                    self.interpolation * self.sample_clock,
+                    self.converter_clock_min,
+                )
+            )
+
+    @property
+    @abstractmethod
+    def interpolation_available(self) -> List:
+        """Interpolation settings available.
+
+        Must be a list or None
+
+        Raises:
+            NotImplementedError: If child classes do not implement method/property
+        """
+        raise NotImplementedError  # pragma: no cover
+
+    _interpolation = 1
+
+    @property
+    def interpolation(self) -> Union[int, float]:
+        """Interpolation between DAC and JESD framer. If none device is not an DAC.
+
+        Generally a multiple of 2
+
+        Returns:
+            int: interpolation value
+        """
+        return self._interpolation
+
+    @interpolation.setter
+    def interpolation(self, value: int) -> None:
+        """Interpolation between DAC and JESD framer. If none device is not an DAC.
+
+        Args:
+            value (int): interpolation
+
+        Raises:
+            Exception: interpolation not an integer or not in range
+        """
+        if int(value) != value:
+            raise Exception("interpolation_available must be an integer")
+        if value not in self.interpolation_available:
+            raise Exception("interpolation_available not in range for device")
+        self._interpolation = value
+
+    @property
+    def converter_clock(self) -> Union[int, float]:
+        """Get rate of converter in samples per second.
+
+        Returns:
+            float: converter clock rate in samples per second
+        """
+        return self.sample_clock * self.interpolation