accelforge 0.0.1__py3-none-any.whl

notebooks/compute_in_memory/wang_vlsi_2022.ipynb

@@ -0,0 +1,602 @@
+{
+  "cells": [
+    {
+      "cell_type": "markdown",
+      "id": "7e2a43f3",
+      "metadata": {},
+      "source": [
+        "### Model of \"A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C Ladder for Charge Domain Computation in 22nm for Edge Inference\", VLSI 2022\n",
+        "\n",
+        "Paper by Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Xiaosen\n",
+        "Liu, Dan Lake, Brent Carlton, and May Wu\n",
+        "\n"
+      ]
+    },
+    {
+      "cell_type": "code",
+      "execution_count": null,
+      "id": "e465e48f",
+      "metadata": {},
+      "outputs": [
+        {
+          "name": "stderr",
+          "output_type": "stream",
+          "text": [
+            "WARNING Loading configuration file from /home/tanner/.config/accelforge/config.yaml\n"
+          ]
+        },
+        {
+          "data": {
+            "text/markdown": [
+              "Some of the important variables for wang_vlsi_2022:\n",
+              "\n",
+              "- *array_wordlines*: array_parallel_inputs * cim_unit_width_cells rows in the array\n",
+              "- *array_bitlines*: array_parallel_outputs * cim_unit_depth_cells columns in the array\n",
+              "- *array_parallel_inputs*: get_array_fanout_reuse_output(spec) input slice(s) consumed in each cycle.\n",
+              "- *array_parallel_weights*: get_array_fanout_total(spec) weights slice(s) used for computation in each cycle.\n",
+              "- *array_parallel_outputs*: get_array_fanout_reuse_input(spec) partial sums produced in each cycle.\n",
+              "- *tech_node*: 2.2e-08 m\n",
+              "- *adc_resolution*: 8 bit(s)\n",
+              "- *dac_resolution*: max(voltage_dac_resolution, temporal_dac_resolution) bit(s)\n",
+              "- *n_adc_per_bank*: 16 ADC(s)\n",
+              "- *supported_input_bits*: 8 bit(s)\n",
+              "- *supported_output_bits*: 8 bit(s)\n",
+              "- *supported_weight_bits*: 8 bit(s)\n",
+              "- *bits_per_cell*: 1 bit(s)\n",
+              "- *cim_unit_width_cells*: supported_weight_bits adjacent cell(s) in a wordline store bit(s) in one weight slice and process one input & output slice together\n",
+              "- *cim_unit_depth_cells*: 8 adjacent cell(s) in a bitline operate in separate cycles\n",
+              "- *cell_config*: /home/tanner/research/fusion/accelforge/accelforge/examples/arches/compute_in_memory/memory_cells/sram_wang_vlsi_2022.yaml \n",
+              "- *cycle_period*: max(base_latency * no_faster_than_digital * voltage_latency_scale, limited_by_temporal_dac, 2e-9) second(s)"
+            ],
+            "text/plain": [
+              "<IPython.core.display.Markdown object>"
+            ]
+          },
+          "metadata": {},
+          "output_type": "display_data"
+        },
+        {
+          "name": "stderr",
+          "output_type": "stream",
+          "text": [
+            "WARNING Loading configuration file from /home/tanner/.config/accelforge/config.yaml\n"
+          ]
+        },
+        {
+          "data": {
+            "image/svg+xml": [
+              "<?xml version=\"1.0\" encoding=\"UTF-8\" standalone=\"no\"?>\n",
+              "<!DOCTYPE svg PUBLIC \"-//W3C//DTD SVG 1.1//EN\"\n",
+              " \"http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd\">\n",
+              "<!-- Generated by graphviz version 2.43.0 (0)\n",
+              " -->\n",
+              "<!-- Title: G Pages: 1 -->\n",
+              "<svg width=\"132pt\" height=\"44pt\"\n",
+              " viewBox=\"0.00 0.00 132.00 44.00\" xmlns=\"http://www.w3.org/2000/svg\" xmlns:xlink=\"http://www.w3.org/1999/xlink\">\n",
+              "<g id=\"graph0\" class=\"graph\" transform=\"scale(1 1) rotate(0) translate(4 40)\">\n",
+              "<title>G</title>\n",
+              "<polygon fill=\"white\" stroke=\"transparent\" points=\"-4,4 -4,-40 128,-40 128,4 -4,4\"/>\n",
+              "<!-- root -->\n",
+              "<g id=\"node1\" class=\"node\">\n",
+              "<title>root</title>\n",
+              "<polygon fill=\"none\" stroke=\"black\" points=\"124,-36 0,-36 0,0 124,0 124,-36\"/>\n",
+              "<text text-anchor=\"middle\" x=\"62\" y=\"-14.9\" font-family=\"Arial\" font-size=\"12.00\">TODO: Arch Render</text>\n",
+              "</g>\n",
+              "</g>\n",
+              "</svg>\n"
+            ],
+            "text/plain": [
+              "Arch(nodes=ArchNodes([ProcessingStage(name='DAC', spatial=[], component_class='DualSidedR2RLadderDAC', component_model=None, component_modeling_log=[], actions=[TensorHolderAction(name='read', energy=None, energy_scale=1, latency=None, latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action')], enabled=True, area=None, total_area=None, area_scale=1, leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale=1, total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances='array_parallel_inputs', extra_attributes_for_component_model=_ExtraAttrs(resolution='dac_resolution', unit_resistance='dac_unit_resistance', zero_between_values=0, bit_distribution='input_bit_distribution', hist='hist_to_magnitude(inputs_hist)'), tensors=Tensors(keep='input', may_keep='<Nothing if keep is defined, else All>', back='Nothing', tile_shape=[], no_refetch_from_above='~All', tensor_order_options=[], force_memory_hierarchy_order=True), bits_per_value_scale={'All': 1}, bits_per_action='input_bits / n_input_slices', direction='down'), ProcessingStage(name='RowDrivers', spatial=[], component_class='ArrayRowDrivers', component_model=None, component_modeling_log=[], actions=[TensorHolderAction(name='read', energy=None, energy_scale=1, latency=None, latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action')], enabled=True, area=None, total_area=None, area_scale=1, leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale=1, total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances=1, extra_attributes_for_component_model=_ExtraAttrs(), tensors=Tensors(keep='input', may_keep='<Nothing if keep is defined, else All>', back='Nothing', tile_shape=[], no_refetch_from_above='~All', tensor_order_options=[], force_memory_hierarchy_order=True), bits_per_value_scale={'All': 1}, bits_per_action='input_bits / n_input_slices', direction='down'), ProcessingStage(name='WeightDrivers', spatial=[], component_class='ArrayRowDrivers', component_model=None, component_modeling_log=[], actions=[TensorHolderAction(name='read', energy=None, energy_scale=1, latency=None, latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action')], enabled=True, area=None, total_area=None, area_scale=1, leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale=1, total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances=1, extra_attributes_for_component_model=_ExtraAttrs(rows='array_wordlines', cols='array_bitlines', cols_active_at_once='array_parallel_outputs', cell_config='cell_config', average_input_value='average_input_value', average_cell_value='average_weight_value', cycle_seconds='cycle_period', voltage='voltage', temporal_dac_bits='temporal_dac_resolution', sequential=True, read_pulse_width=0, resolution='adc_resolution', n_adcs='n_adc_per_bank', width='encoded_output_bits'), tensors=Tensors(keep='weight & Above', may_keep='<Nothing if keep is defined, else All>', back='Nothing', tile_shape=[], no_refetch_from_above='~All', tensor_order_options=[], force_memory_hierarchy_order=True), bits_per_value_scale={'All': 1}, bits_per_action='weight_bits / n_weight_slices', direction='down'), ProcessingStage(name='SelectWordlineDrivers', spatial=[], component_class='ArrayRowDrivers', component_model=None, component_modeling_log=[], actions=[TensorHolderAction(name='read', energy=None, energy_scale=1, latency=None, latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action')], enabled=True, area=None, total_area=None, area_scale=1, leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale=1, total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances=1, extra_attributes_for_component_model=_ExtraAttrs(average_input_value=1), tensors=Tensors(keep='input', may_keep='<Nothing if keep is defined, else All>', back='Nothing', tile_shape=[], no_refetch_from_above='~All', tensor_order_options=[], force_memory_hierarchy_order=True), bits_per_value_scale={'All': 1}, bits_per_action='input_bits / n_input_slices', direction='down'), ProcessingStage(name='ADC', spatial=[], component_class='ADC', component_model=None, component_modeling_log=[], actions=[TensorHolderAction(name='read', energy=None, energy_scale=1, latency=None, latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action')], enabled=True, area=None, total_area=None, area_scale='adc_area_scale', leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale='adc_energy_scale', total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances=1, extra_attributes_for_component_model=_ExtraAttrs(n_bits='adc_resolution', throughput_scale=1, throughput='1 / cycle_period * cols_active_at_once * throughput_scale'), tensors=Tensors(keep='output', may_keep='<Nothing if keep is defined, else All>', back='Nothing', tile_shape=[], no_refetch_from_above='~All', tensor_order_options=[], force_memory_hierarchy_order=True), bits_per_value_scale={'All': 1}, bits_per_action='output_bits / n_sliced_psums', direction='up'), ProcessingStage(name='ColumnDrivers', spatial=[], component_class='ArrayColumnDrivers', component_model=None, component_modeling_log=[], actions=[TensorHolderAction(name='read', energy=None, energy_scale=1, latency='cycle_period / cols_active_at_once', latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action')], enabled=True, area=None, total_area=None, area_scale=1, leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale=1, total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances=1, extra_attributes_for_component_model=_ExtraAttrs(), tensors=Tensors(keep='output', may_keep='<Nothing if keep is defined, else All>', back='Nothing', tile_shape=[], no_refetch_from_above='~All', tensor_order_options=[], force_memory_hierarchy_order=True), bits_per_value_scale={'All': 1}, bits_per_action='output_bits / n_sliced_psums', direction='up'), Fanout(name='ColumnOfSubBanks', spatial=[Spatial(name='array_reuse_input', fanout=16, may_reuse='All', loop_bounds=[], min_usage=1, reuse='input', usage_scale='n_weight_slices', power_gateable=False)]), ProcessingStage(name='ColumnBandwidthLimiter', spatial=[], component_class='Dummy', component_model=None, component_modeling_log=[], actions=[TensorHolderAction(name='read', energy=None, energy_scale=1, latency='cycle_period', latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action')], enabled=True, area=None, total_area=None, area_scale=1, leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale=1, total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances=1, extra_attributes_for_component_model=_ExtraAttrs(), tensors=Tensors(keep='(weight | output) & Above', may_keep='<Nothing if keep is defined, else All>', back='Nothing', tile_shape=[], no_refetch_from_above='~All', tensor_order_options=[], force_memory_hierarchy_order=True), bits_per_value_scale={'weight': 'n_weight_slices / weight_bits / 2', 'output': 'n_sliced_psums / output_bits', 'All - (weight | output)': 0}, bits_per_action=None, direction='down'), Fanout(name='SubBank', spatial=[Spatial(name='array_reuse_output', fanout=64, may_reuse='All', loop_bounds=[], min_usage=1, reuse='output', usage_scale=1, power_gateable=False)]), Memory(name='CimUnit', spatial=[], component_class='MemoryCell', component_model=None, component_modeling_log=[], actions=[TensorHolderAction(name='read', energy=None, energy_scale=1, latency='cycle_period', latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action'), TensorHolderAction(name='write', energy=None, energy_scale=1, latency=None, latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action')], enabled=True, area=None, total_area=None, area_scale=1, leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale=1, total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances='n_weight_slices', extra_attributes_for_component_model=_ExtraAttrs(n_instances='cim_unit_width_cells * cim_unit_depth_cells'), tensors=Tensors(keep='weight', may_keep='<Nothing if keep is defined, else All>', back='Nothing', tile_shape=[], no_refetch_from_above='weight', tensor_order_options=[], force_memory_hierarchy_order=False), bits_per_value_scale={'All': 1}, bits_per_action='weight.bits_per_value / n_weight_slices / n_input_slices', size='cim_unit_width_cells * cim_unit_depth_cells * bits_per_cell * n_weight_slices'), ProcessingStage(name='C2CMultiplier', spatial=[], component_class='C2CMultiplier', component_model=None, component_modeling_log=[], actions=[TensorHolderAction(name='read', energy=None, energy_scale=1, latency=None, latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action')], enabled=True, area=None, total_area=None, area_scale=1, leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale=1, total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances=1, extra_attributes_for_component_model=_ExtraAttrs(resolution='cim_unit_width_cells', a_hist='inputs_hist', b_bit_distribution='weight_bit_distribution', unit_capacitance=2e-15), tensors=Tensors(keep='input', may_keep='<Nothing if keep is defined, else All>', back='Nothing', tile_shape=[], no_refetch_from_above='~All', tensor_order_options=[], force_memory_hierarchy_order=True), bits_per_value_scale={'All': 1}, bits_per_action='input.bits_per_value / n_weight_slices / n_input_slices', direction='down'), ProcessingStage(name='C2CMultiplierPortB', spatial=[], component_class='C2CMultiplierPortB', component_model=None, component_modeling_log=[], actions=[TensorHolderAction(name='read', energy=None, energy_scale=1, latency=None, latency_scale=1, extra_attributes_for_component_model=ParseExtras(), bits_per_action='1 if bits_per_action is None else bits_per_action')], enabled=True, area=None, total_area=None, area_scale=1, leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale=1, total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances=1, extra_attributes_for_component_model=_ExtraAttrs(resolution='cim_unit_width_cells', a_hist='inputs_hist', b_bit_distribution='weight_bit_distribution', unit_capacitance=2e-15), tensors=Tensors(keep='weight', may_keep='<Nothing if keep is defined, else All>', back='Nothing', tile_shape=[], no_refetch_from_above='~All', tensor_order_options=[], force_memory_hierarchy_order=True), bits_per_value_scale={'All': 1}, bits_per_action='weight.bits_per_value / n_sliced_psums', direction='down'), Compute(name='FreeCompute', spatial=[], component_class='Dummy', component_model=None, component_modeling_log=[], actions=[Action(name='compute', energy=None, energy_scale=1, latency=None, latency_scale=1, extra_attributes_for_component_model=ParseExtras())], enabled='len(All) == 3', area=None, total_area=None, area_scale=1, leak_power=None, total_leak_power=None, leak_power_scale=1, energy_scale=1, total_latency='sum(*action2latency.values())', latency_scale=1, n_parallel_instances=1, extra_attributes_for_component_model=_ExtraAttrs())]), arch_globals_dependent_on_workload=ParseExtras(encoded_input_bits='input_bits', encoded_weight_bits='weight_bits', encoded_output_bits='output_bits', input_encoding_func='offset_encode_hist', weight_encoding_func='offset_encode_hist', signed_sum_across_inputs=True, signed_sum_across_weights=False, cim_unit_width_cells='supported_weight_bits', cim_unit_depth_cells=8, bits_per_cell=1, adc_resolution=8, voltage_dac_resolution=8, temporal_dac_resolution=1, dac_unit_resistance=5000, n_adc_per_bank=16, base_latency=6.4e-09, latency_columns_scale='dac_unit_resistance / 5000 * array_bitlines / 128', latency_dac_resolution_scale='voltage_dac_resolution / 8', no_faster_than_digital='max(0.5, latency_columns_scale * latency_dac_resolution_scale)', limited_by_temporal_dac='0.05e-9 * (2 ** temporal_dac_resolution - 1)', cycle_period='max(base_latency * no_faster_than_digital * voltage_latency_scale, limited_by_temporal_dac, 2e-9)', read_pulse_width='cycle_period', weight_bits='weight.bits_per_value', input_bits='input.bits_per_value', output_bits='output.bits_per_value', array_parallel_inputs='get_array_fanout_reuse_output(spec)', array_parallel_outputs='get_array_fanout_reuse_input(spec)', array_parallel_weights='get_array_fanout_total(spec)', array_wordlines='array_parallel_inputs * cim_unit_width_cells', array_bitlines='array_parallel_outputs * cim_unit_depth_cells', dac_resolution='max(voltage_dac_resolution, temporal_dac_resolution)', cols_active_at_once='array_parallel_outputs', in_b='encoded_input_bits', w_b='encoded_weight_bits', max_input_bits_per_slice='min(dac_resolution, in_b)', max_weight_bits_per_slice='min(cim_unit_width_cells * bits_per_cell, w_b)', average_input_bits_per_slice='encoded_input_bits / n_input_slices', average_weight_bits_per_slice='encoded_weight_bits / n_weight_slices', n_virtual_macs='max_input_bits_per_slice * max_weight_bits_per_slice * encoded_output_bits', ehtas='encoded_hist_to_avg_slice', in_enc_fn='input_encoding_func', w_enc_fn='weight_encoding_func', average_input_value='ehtas(in_enc_fn(inputs_hist), in_b, max_input_bits_per_slice)', average_weight_value='ehtas(w_enc_fn(weights_hist), w_b, max_weight_bits_per_slice)', input_bit_distribution='ehtas(in_enc_fn(inputs_hist), in_b, 1, return_per_slice=True)', weight_bit_distribution='ehtas(w_enc_fn(weights_hist), w_b, 1, return_per_slice=True)', min_weight_slices='ceil(min_supported_weight_bits / bits_per_cell / cim_unit_width_cells)', min_input_slices='ceil(min_supported_input_bits / max_input_bits_per_slice)', n_input_slices='max(ceil(in_b / max_input_bits_per_slice), min_input_slices)', n_weight_slices='max(ceil(w_b / max_weight_bits_per_slice), min_weight_slices)', n_sliced_psums='n_input_slices * n_weight_slices'), extra_attributes_for_all_component_models=ParseExtras(tech_node='tech_node', cycle_period='cycle_period', rows='array_wordlines', cols='array_bitlines', cols_active_at_once='array_parallel_outputs', cell_config='cell_config', average_input_value='average_input_value', average_cell_value='average_weight_value', voltage='voltage', temporal_dac_bits='temporal_dac_resolution', read_pulse_width='read_pulse_width', resolution='adc_resolution', n_adcs='n_adc_per_bank', width='encoded_output_bits'))"
+            ]
+          },
+          "execution_count": 1,
+          "metadata": {},
+          "output_type": "execute_result"
+        }
+      ],
+      "source": [
+        "from _scripts import (\n",
+        "    display_important_variables,\n",
+        "    get_spec,\n",
+        "    bar_comparison,\n",
+        "    bar_stacked,\n",
+        "    bar,\n",
+        ")\n",
+        "display_important_variables('wang_vlsi_2022')\n",
+        "get_spec('wang_vlsi_2022').arch"
+      ]
+    },
+    {
+      "cell_type": "markdown",
+      "id": "a652cef4",
+      "metadata": {},
+      "source": [
+        "#### Description of The Macro\n",
+        "\n",
+        "The macro uses a 512-row by 128-column SRAM array. Every eight adjacent columns\n",
+        "store 8b weight slices and together compute one 8b MAC operation. An 8b voltage\n",
+        "DAC provides 8b inputs in a single cycle. An analog-digital C-2C multiplier\n",
+        "computes a MAC operation between an 8b analog input and an 8b digital weight.\n",
+        "These multipliers allow the macro to compute 8b MACs in a single cycle and read\n",
+        "the results with one ADC convert. Furthermore, they allow the macro to avoid\n",
+        "connecting memory cells to analog circuits.\n",
+        "\n",
+        "Every eight rows in the array share a C-2C multiplier. These rows are activated\n",
+        "in separate cycles, so it requires eight cycles to activate all rows in the\n",
+        "array.\n"
+      ]
+    },
+    {
+      "cell_type": "code",
+      "execution_count": null,
+      "id": "e654dbb4",
+      "metadata": {},
+      "outputs": [],
+      "source": [
+        "import accelforge as af\n",
+        "import matplotlib.pyplot as plt"
+      ]
+    },
+    {
+      "cell_type": "markdown",
+      "id": "6b448caf",
+      "metadata": {},
+      "source": [
+        "#### Area Breakdown\n",
+        "\n",
+        "This test replicates the results of Fig. 22(b) of the paper.\n",
+        "\n",
+        "We show the area breakdown of the macro. The area is broken down into the\n",
+        "following components:\n",
+        "\n",
+        "- ADC: Area consumed by the ADC\n",
+        "- DAC: Area consumed by the DAC\n",
+        "- MAC: Area consumed by the MAC, including the row drivers, select wordline\n",
+        "    drivers, CiM unit, and C-2C multiplier.\n",
+        "- Misc: Area consumed by the weight drivers and control circuitry.\n",
+        "\n",
+        "Modeled miscellaneous area is lower than reference because we do not model\n",
+        "the control circuitry in the weight drivers.\n"
+      ]
+    },
+    {
+      "cell_type": "code",
+      "execution_count": null,
+      "id": "2f7ce1a4",
+      "metadata": {},
+      "outputs": [],
+      "source": [
+        "parsed = get_spec('wang_vlsi_2022').calculate_component_area_energy_latency_leak()\n",
+        "\n",
+        "area = parsed.arch.per_component_total_area\n",
+        "\n",
+        "TOTAL_AREA = 0.124e-6\n",
+        "\n",
+        "expected_area = {\n",
+        "    \"ADC\": 0.13 * TOTAL_AREA,\n",
+        "    \"DAC\": 0.3 * TOTAL_AREA,\n",
+        "    \"MAC\": 0.46 * TOTAL_AREA,\n",
+        "    \"Misc\": 0.11 * TOTAL_AREA,\n",
+        "}\n",
+        "modeled = {}\n",
+        "modeled[\"ADC\"] = area[\"ADC\"] + area[\"ColumnDrivers\"] + area[\"ColumnBandwidthLimiter\"]\n",
+        "modeled[\"DAC\"] = area[\"DAC\"]\n",
+        "modeled[\"MAC\"] = area[\"CimUnit\"] + area[\"C2CMultiplier\"] + area[\"C2CMultiplierPortB\"] + area[\"RowDrivers\"] + area[\"SelectWordlineDrivers\"]\n",
+        "modeled[\"Misc\"] = sum(area.values()) - sum(modeled.values()) + area[\"WeightDrivers\"]\n",
+        "total_area = sum(modeled.values())\n",
+        "\n",
+        "fig, ax = plt.subplots(1, 1, figsize=(10, 5))\n",
+        "bar_comparison(\n",
+        "    {\n",
+        "        \"Modeled\": modeled,\n",
+        "        \"Expected\": expected_area,\n",
+        "    },\n",
+        "    \"Component\",\n",
+        "    \"Area (mm^2)\",\n",
+        "    \"Area Breakdown: Modeled vs Expected\",\n",
+        "    ax,\n",
+        ")"
+      ]
+    },
+    {
+      "cell_type": "markdown",
+      "id": "e8a29514",
+      "metadata": {},
+      "source": [
+        "#### Energy Breakdown\n",
+        "\n",
+        "This test replicates the results of Fig. 22(a) of the paper. We show the energy\n",
+        "breakdown of the macro. The energy is broken down into the following components:\n",
+        "\n",
+        "- ADC: Energy consumed by the ADC\n",
+        "- DAC: Energy consumed by the DAC\n",
+        "- MAC: Energy consumed by the MAC, including the row drivers, select wordline drivers,\n",
+        "  CiM unit, and C-2C multiplier.\n",
+        "- Misc: The weight drivers are miscellaneous components in our model, but they consume\n",
+        "  no energy in this weight-stationary test. Misc also includes control circuitry in the\n",
+        "  reference.\n",
+        "  \n",
+        "Modeled miscellaneous energy is lower than reference because we do not model the control\n",
+        "circuitry."
+      ]
+    },
+    {
+      "cell_type": "code",
+      "execution_count": null,
+      "id": "47c5a41b",
+      "metadata": {},
+      "outputs": [],
+      "source": [
+        "spec = get_spec('wang_vlsi_2022', add_dummy_main_memory=True)\n",
+        "spec.mapper.ffm.metrics = af.mapper.FFM.Metrics.ENERGY\n",
+        "results = af.mapper.FFM.map_workload_to_arch(spec)\n",
+        "energy = results.energy(per_component=True)\n",
+        "\n",
+        "TOPS_PER_WATT = 16.37572276\n",
+        "PJ_PER_MVM = 2 / TOPS_PER_WATT * 16 * 64# * 8\n",
+        "\n",
+        "expected_energy = {\n",
+        "    \"ADC\": PJ_PER_MVM * 0.34 * 1e-12,\n",
+        "    \"DAC\": PJ_PER_MVM * 0.22 * 1e-12,\n",
+        "    \"MAC\": PJ_PER_MVM * 0.4 * 1e-12,\n",
+        "    \"Misc\": PJ_PER_MVM * 0.04 * 1e-12,\n",
+        "}\n",
+        "\n",
+        "modeled = {}\n",
+        "modeled[\"ADC\"] = energy[\"ADC\"] + energy[\"ColumnDrivers\"] + energy[\"ColumnBandwidthLimiter\"]\n",
+        "modeled[\"DAC\"] = energy[\"DAC\"]\n",
+        "modeled[\"MAC\"] = energy[\"CimUnit\"] + energy[\"C2CMultiplier\"] + energy[\"C2CMultiplierPortB\"] + energy[\"RowDrivers\"] + energy[\"SelectWordlineDrivers\"]\n",
+        "modeled[\"Misc\"] = sum(energy.values()) - sum(modeled.values()) + energy[\"WeightDrivers\"]\n",
+        "\n",
+        "fig, ax = plt.subplots(1, 1, figsize=(10, 5))\n",
+        "bar_comparison(\n",
+        "    {\n",
+        "        \"Modeled\": modeled,\n",
+        "        \"Expected\": expected_energy,\n",
+        "    },\n",
+        "    \"Component\",\n",
+        "    \"Energy (J)\",\n",
+        "    \"Energy Breakdown: Modeled vs Expected\",\n",
+        "    ax,\n",
+        ")"
+      ]
+    },
+    {
+      "cell_type": "markdown",
+      "id": "90204682",
+      "metadata": {},
+      "source": [
+        "#### Energy Efficiency, Throughput, and Compute Density\n",
+        "\n",
+        "This test replicates the results of Table III in the paper.\n",
+        "\n",
+        "In this test, we show the energy efficiency, throughput, and compute density\n",
+        "of the macro at 0.7V and 1.1V supply voltages.\n",
+        "\n",
+        "We see that increasing the supply voltage increases throughput at the cost of\n",
+        "lower energy efficiency."
+      ]
+    },
+    {
+      "cell_type": "code",
+      "execution_count": null,
+      "id": "8df3fd5d",
+      "metadata": {},
+      "outputs": [],
+      "source": [
+        "spec = get_spec('wang_vlsi_2022', add_dummy_main_memory=True)\n",
+        "spec.mapper.ffm.metrics = af.mapper.Metrics.ENERGY\n",
+        "\n",
+        "spec_parsed = spec.calculate_component_area_energy_latency_leak()\n",
+        "spec.variables.voltage = 0.7\n",
+        "results_a = af.mapper.FFM.map_workload_to_arch(spec)\n",
+        "spec.variables.voltage = 1.1\n",
+        "results_b = af.mapper.FFM.map_workload_to_arch(spec)"
+      ]
+    },
+    {
+      "cell_type": "code",
+      "execution_count": null,
+      "id": "6ef3fe67",
+      "metadata": {},
+      "outputs": [],
+      "source": [
+        "per_compute_latency_a = results_a.per_compute().to_dict()[\"Total<SEP>latency\"]\n",
+        "per_compute_latency_b = results_b.per_compute().to_dict()[\"Total<SEP>latency\"]\n",
+        "\n",
+        "tops_a = 2 / results_a.per_compute().to_dict()[\"Total<SEP>latency\"] / 1e12\n",
+        "tops_b = 2 / results_b.per_compute().to_dict()[\"Total<SEP>latency\"] / 1e12\n",
+        "\n",
+        "tops_per_mm_a = tops_a / total_area / 1e6\n",
+        "tops_per_mm_b = tops_b / total_area / 1e6\n",
+        "\n",
+        "tops_per_w_a = 2 / results_a.per_compute().energy() / 1e12\n",
+        "tops_per_w_b = 2 / results_b.per_compute().energy() / 1e12\n",
+        "\n",
+        "# Structure the dictionaries flat from the start\n",
+        "modeled = {\n",
+        "    \"0.7V tops_per_mm2\": tops_per_mm_a,\n",
+        "    \"0.7V tops_per_w\": tops_per_w_a,\n",
+        "    \"0.7V tops\": tops_a,\n",
+        "    \"1.1V tops_per_mm2\": tops_per_mm_b,\n",
+        "    \"1.1V tops_per_w\": tops_per_w_b,\n",
+        "    \"1.1V tops\": tops_b,\n",
+        "}\n",
+        "\n",
+        "expected = {\n",
+        "    \"0.7V tops_per_mm2\": 2.4,\n",
+        "    \"0.7V tops_per_w\": 32.2,\n",
+        "    \"0.7V tops\": 0.3,\n",
+        "    \"1.1V tops_per_mm2\": 4.0,\n",
+        "    \"1.1V tops_per_w\": 15.5,\n",
+        "    \"1.1V tops\": 0.5,\n",
+        "}\n",
+        "\n",
+        "fig, ax = plt.subplots(1, 1, figsize=(15, 6))\n",
+        "ax.set_yscale('log')\n",
+        "bar_comparison(\n",
+        "    {\n",
+        "        \"Modeled\": modeled,\n",
+        "        \"Expected\": expected,\n",
+        "    },\n",
+        "    \"Metric\",\n",
+        "    \"Value\",\n",
+        "    \"Energy Efficiency, Throughput, and Compute Density\",\n",
+        "    ax,\n",
+        ")"
+      ]
+    },
+    {
+      "cell_type": "code",
+      "execution_count": null,
+      "id": "c92021a2",
+      "metadata": {},
+      "outputs": [],
+      "source": [
+        "\n",
+        "\n",
+        "\n",
+        "\n",
+        "\n",
+        "\n",
+        "# # def test_voltage_scaling():\n",
+        "# #     \"\"\"\n",
+        "# #     ### Voltage Scaling\n",
+        "\n",
+        "# #     This test replicates the results of Fig. 23 of the paper.\n",
+        "\n",
+        "# #     We show the effects of voltage scaling on the energy efficiency and\n",
+        "# #     throughput of the macro, testing supply voltages of 0.7V, 0.8V, 0.9V, 1V,\n",
+        "# #     and 1.1V.\n",
+        "\n",
+        "# #     We can see that increasing the supply voltage increases throughput and\n",
+        "# #     compute density at the cost of lower energy efficiency.\n",
+        "\n",
+        "# #     Modeled and reference compute density varies because we did not model the\n",
+        "# #     area of some miscellaneous components, leading to the model having a smaller\n",
+        "# #     area and higher compute density. This could be corrected by adding\n",
+        "# #     additional components to the model. We also use a different scaling factor\n",
+        "# #     for voltage versus energy, leading to a different curve shape. This could be\n",
+        "# #     corrected by adjusting the VOLTAGE_ENERGY_SCALE formula and propagating the\n",
+        "# #     value to each subcomponent model.\n",
+        "# #     \"\"\"\n",
+        "# #     results = utl.parallel_test(\n",
+        "# #         utl.delayed(utl.quick_run)(macro=MACRO_NAME, variables=dict(VOLTAGE=x))\n",
+        "# #         for x in [0.7, 0.8, 0.9, 1, 1.1]\n",
+        "# #     )\n",
+        "\n",
+        "# #     for r, tops_mm, tops_w in zip(\n",
+        "# #         results,\n",
+        "# #         [2.377, 2.858, 3.200, 3.596, 3.941],\n",
+        "# #         [31.998, 22.590, 18.439, 16.376, 15.467],\n",
+        "# #     ):\n",
+        "# #         r.add_compare_ref(\"tops_per_mm2\", tops_mm)\n",
+        "# #         r.add_compare_ref(\"tops_per_w\", tops_w)\n",
+        "# #         r.add_compare_ref(\"tops\", tops_mm * TOTAL_AREA / 1e6)\n",
+        "# #     return results\n",
+        "\n",
+        "\n",
+        "# # def test_tops():\n",
+        "# #     \"\"\"\n",
+        "# #     ### Energy Efficiency, Throughput, and Compute Density\n",
+        "\n",
+        "# #     This test replicates the results of Table III in the paper.\n",
+        "\n",
+        "# #     In this test, we show the energy efficiency, throughput, and compute density\n",
+        "# #     of the macro at 0.7V and 1.1V supply voltages.\n",
+        "\n",
+        "# #     We see that increasing the supply voltage increases throughput at the cost of\n",
+        "# #     lower energy efficiency.\n",
+        "# #     \"\"\"\n",
+        "# #     results = utl.parallel_test(\n",
+        "# #         utl.delayed(utl.quick_run)(macro=MACRO_NAME, variables=dict(VOLTAGE=x))\n",
+        "# #         for x in [0.7, 1.1]\n",
+        "# #     )\n",
+        "# #     for r, tops_mm, tops_w, tops in zip(\n",
+        "# #         results,\n",
+        "# #         [2.4, 4.0],\n",
+        "# #         [32.2, 15.5],\n",
+        "# #         [0.3, 0.5],\n",
+        "# #     ):\n",
+        "# #         r.add_compare_ref(\"tops_per_mm2\", tops_mm)\n",
+        "# #         r.add_compare_ref(\"tops_per_w\", tops_w)\n",
+        "# #         r.add_compare_ref(\"tops\", tops)\n",
+        "# #     return results\n",
+        "\n",
+        "\n",
+        "# # def test_full_system_dnn(dnn_name: str, batch_size: int = None):\n",
+        "# #     \"\"\"\n",
+        "# #     ### Exploration of Full-System Energy Efficiency\n",
+        "\n",
+        "# #     In this test, we look at the full-system energy breakdown when running DNNs\n",
+        "# #     on a CiM accelerator. We place the macro in a chip with local input/output\n",
+        "# #     buffers, routers for on-chip data movement, a global buffer, and DRAM. We\n",
+        "# #     show the area and energy spent on DRAM, the global buffer, and other\n",
+        "# #     components.\n",
+        "\n",
+        "# #     We compare three scenarios:\n",
+        "\n",
+        "# #     1. Inputs, outputs, and weights stored off-chip in DRAM and fetched for each\n",
+        "# #        layer\n",
+        "# #     2. Inputs and outputs fetched from DRAM, weights stationary (pre-loaded for\n",
+        "# #        each layer)\n",
+        "# #     3. Weights stationary, layers fused to keep inputs/outputs on-chip in the\n",
+        "# #        global\n",
+        "\n",
+        "# #     We can see that weight-stationary processing significantly reduces overall\n",
+        "# #     energy due to fewer weight fetches from off-chip. Benefits are limited,\n",
+        "# #     however, because inputs and outputs still must be fetched from off-chip. To\n",
+        "# #     see further benefits, fusing layers is necessary to keep data on-chip\n",
+        "# #     between DNN layers. We note that weight-stationary CiM requires sufficient\n",
+        "# #     memory to keep all DNN weights on-chip. To store large DNNs, this may\n",
+        "# #     require a multi-chip pipeline or dense storage technologies.\n",
+        "# #     \"\"\"\n",
+        "\n",
+        "# #     dnn_dir = utl.path_from_model_dir(f\"workloads/{dnn_name}\")\n",
+        "# #     layer_paths = [\n",
+        "# #         os.path.join(dnn_dir, l) for l in os.listdir(dnn_dir) if l.endswith(\".yaml\")\n",
+        "# #     ]\n",
+        "\n",
+        "# #     layer_paths = [l for l in layer_paths if \"From einsum\" not in open(l, \"r\").read()]\n",
+        "\n",
+        "# #     if \"gpt2_medium\" in dnn_name:\n",
+        "# #         layer_paths = layer_paths[:-1]\n",
+        "\n",
+        "# #     def callfunc(spec):\n",
+        "# #         spec.architecture.find(\"shared_router_group\").spatial.meshX = 64\n",
+        "# #         spec.architecture.find(\"shared_router_group\").attributes.has_power_gating = True\n",
+        "# #         spec.architecture.find(\"shared_router_group\").constraints.spatial.no_reuse = []\n",
+        "\n",
+        "# #         spec.architecture.find(\"tile_in_chip\").spatial.meshX = 16\n",
+        "# #         spec.architecture.find(\"tile_in_chip\").attributes.has_power_gating = True\n",
+        "# #         spec.architecture.find(\"tile_in_chip\").constraints.spatial.no_reuse = []\n",
+        "\n",
+        "# #         if batch_size is not None:\n",
+        "# #             spec.problem.instance[\"N\"] = batch_size\n",
+        "# #         spec.architecture.find(\"output_buffer\").constraints.temporal.iter_only = []\n",
+        "\n",
+        "# #     results = utl.parallel_test(\n",
+        "# #         utl.delayed(utl.run_layer)(\n",
+        "# #             macro=MACRO_NAME,\n",
+        "# #             layer=l,\n",
+        "# #             variables=dict(EXPERIMENT_NAME=s),\n",
+        "# #             tile=\"input_output_bufs\",\n",
+        "# #             chip=\"large_router_glb\",\n",
+        "# #             system=system,\n",
+        "# #             callfunc=callfunc,\n",
+        "# #         )\n",
+        "# #         for l in layer_paths\n",
+        "# #         for s, system in (\n",
+        "# #             ('\"All Tensors Off-Chip\"', \"fetch_all_lpddr4\"),\n",
+        "# #             ('\"Weight-Stationary\"', \"fetch_weights_lpddr4\"),\n",
+        "# #             ('\"Weight-Stationary + Fusion\"', None),\n",
+        "# #         )\n",
+        "# #     )\n",
+        "\n",
+        "# #     for r in results:\n",
+        "# #         r.per_component_energy.setdefault(\"main_memory\", 0)\n",
+        "\n",
+        "# #     results.combine_per_component_energy(\n",
+        "# #         [\n",
+        "# #             \"c2c_multiplier_analog_port\",\n",
+        "# #             \"c2c_multiplier_digital_port\",\n",
+        "# #             \"cim_unit\",\n",
+        "# #             \"adc\",\n",
+        "# #             \"select_wordline_drivers\",\n",
+        "# #             \"row_drivers\",\n",
+        "# #             \"dac\",\n",
+        "# #             \"output_buffer\",\n",
+        "# #             \"input_buffer\",\n",
+        "# #             \"router\",\n",
+        "# #             \"weight_drivers\",\n",
+        "# #             \"column_drivers\",\n",
+        "# #         ],\n",
+        "# #         \"Macro & Other On-Chip Data Movement\",\n",
+        "# #     )\n",
+        "# #     results.combine_per_component_energy([\"glb\"], \"Global Buffer\")\n",
+        "# #     results.combine_per_component_energy([\"main_memory\"], \"Off-Chip DRAM\")\n",
+        "# #     results.clear_zero_energies()\n",
+        "\n",
+        "# #     return results\n",
+        "\n",
+        "\n",
+        "# if __name__ == \"__main__\":\n",
+        "#     test_energy_breakdown(),\n",
+        "#     test_area_breakdown(),\n",
+        "#     test_voltage_scaling(),\n",
+        "#     test_tops(),\n",
+        "#     test_full_system_dnn(\"resnet18\")\n",
+        "\n",
+        "\n",
+        "\n",
+        "# def test_tops():\n",
+        "#     \"\"\"\n",
+        "#     \"\"\"\n",
+        "#     results = utl.parallel_test(\n",
+        "#         utl.delayed(utl.quick_run)(macro=MACRO_NAME, variables=dict(VOLTAGE=x))\n",
+        "#         for x in [0.7, 1.1]\n",
+        "#     )\n",
+        "#     for r, tops_mm, tops_w, tops in zip(\n",
+        "#         results,\n",
+        "#         [2.4, 4.0],\n",
+        "#         [32.2, 15.5],\n",
+        "#         [0.3, 0.5],\n",
+        "#     ):\n",
+        "#         r.add_compare_ref(\"tops_per_mm2\", tops_mm)\n",
+        "#         r.add_compare_ref(\"tops_per_w\", tops_w)\n",
+        "#         r.add_compare_ref(\"tops\", tops)\n",
+        "#     return results\n",
+        "\n",
+        "\n",
+        "\n",
+        "\n",
+        "\n",
+        "# result = run_test(\"wang_vlsi_2022\", \"test_tops\")\n",
+        "\n",
+        "# fig, ax = plt.subplots(1, 3, figsize=(15, 5))\n",
+        "# bar_side_by_side(\n",
+        "#     {r.variables[\"VOLTAGE\"]: r.tops for r in result},\n",
+        "#     xlabel=\"Voltage (V)\",\n",
+        "#     ylabel=\"Throughput (TOPS)\",\n",
+        "#     title=\"Voltage vs. Throughput\",\n",
+        "#     ax=ax[0],\n",
+        "# )\n",
+        "# bar_side_by_side(\n",
+        "#     {r.variables[\"VOLTAGE\"]: r.tops_per_w for r in result},\n",
+        "#     xlabel=\"Voltage (V)\",\n",
+        "#     ylabel=\"Energy Efficiency (TOPS/W)\",\n",
+        "#     title=\"Voltage vs. Energy Efficiency\",\n",
+        "#     ax=ax[1],\n",
+        "# )\n",
+        "# bar_side_by_side(\n",
+        "#     {r.variables[\"VOLTAGE\"]: r.tops_per_mm2 for r in result},\n",
+        "#     xlabel=\"Voltage (V)\",\n",
+        "#     ylabel=\"Compute Density (TOPS/mm^2)\",\n",
+        "#     title=\"Voltage vs. Compute Density\",\n",
+        "#     ax=ax[2],\n",
+        "# )"
+      ]
+    }
+  ],
+  "metadata": {
+    "kernelspec": {
+      "display_name": "Python 3",
+      "language": "python",
+      "name": "python3"
+    },
+    "language_info": {
+      "codemirror_mode": {
+        "name": "ipython",
+        "version": 3
+      },
+      "file_extension": ".py",
+      "mimetype": "text/x-python",
+      "name": "python",
+      "nbconvert_exporter": "python",
+      "pygments_lexer": "ipython3",
+      "version": "3.12.11"
+    }
+  },
+  "nbformat": 4,
+  "nbformat_minor": 5
+}

notebooks/paths.py

@@ -0,0 +1,4 @@
+import os
+from pathlib import Path
+
+EXAMPLES_DIR = Path(os.path.abspath("../../examples"))