PyNerva 0.0.7__py3-none-any.whl
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- nervapy/__init__.py +50 -0
- nervapy/abi.py +91 -0
- nervapy/arm/__init__.py +124 -0
- nervapy/arm/__main__.py +0 -0
- nervapy/arm/abi.py +138 -0
- nervapy/arm/formats.py +49 -0
- nervapy/arm/function.py +2465 -0
- nervapy/arm/generic.py +10796 -0
- nervapy/arm/instructions.py +519 -0
- nervapy/arm/isa.py +409 -0
- nervapy/arm/literal_pool.py +331 -0
- nervapy/arm/microarchitecture.py +211 -0
- nervapy/arm/pseudo.py +652 -0
- nervapy/arm/registers.py +1458 -0
- nervapy/arm/vfpneon.py +4092 -0
- nervapy/arm.py +13 -0
- nervapy/c/__init__.py +1 -0
- nervapy/c/types.py +436 -0
- nervapy/codegen.py +99 -0
- nervapy/common/__init__.py +4 -0
- nervapy/common/function.py +5 -0
- nervapy/common/regalloc.py +121 -0
- nervapy/constant_data.py +282 -0
- nervapy/encoder.py +246 -0
- nervapy/formats/__init__.py +2 -0
- nervapy/formats/elf/__init__.py +4 -0
- nervapy/formats/elf/file.py +178 -0
- nervapy/formats/elf/image.py +106 -0
- nervapy/formats/elf/section.py +422 -0
- nervapy/formats/elf/symbol.py +281 -0
- nervapy/formats/macho/__init__.py +2 -0
- nervapy/formats/macho/file.py +123 -0
- nervapy/formats/macho/image.py +143 -0
- nervapy/formats/macho/section.py +322 -0
- nervapy/formats/macho/symbol.py +158 -0
- nervapy/formats/mscoff/__init__.py +8 -0
- nervapy/formats/mscoff/image.py +132 -0
- nervapy/formats/mscoff/section.py +181 -0
- nervapy/formats/mscoff/symbol.py +148 -0
- nervapy/function.py +136 -0
- nervapy/literal.py +731 -0
- nervapy/loader.py +188 -0
- nervapy/name.py +159 -0
- nervapy/parse.py +52 -0
- nervapy/stream.py +58 -0
- nervapy/util.py +126 -0
- nervapy/writer.py +518 -0
- nervapy/x86_64/__init__.py +324 -0
- nervapy/x86_64/__main__.py +407 -0
- nervapy/x86_64/abi.py +517 -0
- nervapy/x86_64/amd.py +6464 -0
- nervapy/x86_64/avx.py +102029 -0
- nervapy/x86_64/crypto.py +1533 -0
- nervapy/x86_64/encoding.py +424 -0
- nervapy/x86_64/fma.py +19138 -0
- nervapy/x86_64/function.py +2707 -0
- nervapy/x86_64/generic.py +23384 -0
- nervapy/x86_64/instructions.py +500 -0
- nervapy/x86_64/isa.py +476 -0
- nervapy/x86_64/lower.py +126 -0
- nervapy/x86_64/mask.py +2593 -0
- nervapy/x86_64/meta.py +143 -0
- nervapy/x86_64/mmxsse.py +17265 -0
- nervapy/x86_64/nacl.py +327 -0
- nervapy/x86_64/operand.py +1204 -0
- nervapy/x86_64/options.py +21 -0
- nervapy/x86_64/pseudo.py +686 -0
- nervapy/x86_64/registers.py +1225 -0
- nervapy/x86_64/types.py +17 -0
- nervapy/x86_64/uarch.py +580 -0
- pynerva-0.0.7.dist-info/METADATA +310 -0
- pynerva-0.0.7.dist-info/RECORD +74 -0
- pynerva-0.0.7.dist-info/WHEEL +4 -0
- pynerva-0.0.7.dist-info/licenses/LICENSE.rst +15 -0
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"""
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Literal Pool Support for ARM Assembly
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This module implements literal pool functionality for the LDR =label pseudo-instruction.
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It manages constant literals that can be loaded into registers using PC-relative addressing.
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Usage:
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from nervapy.arm.literal_pool import Literal
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from nervapy.arm.generic import LDR
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with Function("my_func", ...) as func:
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# Load constant using literal pool
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LDR(r0, literal=Literal(0x11111111))
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# Load with custom label
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LDR(r0, literal=Literal(0x11111111, label="MY_CONSTANT"))
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# Or load from ConstantData label
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magic = ConstantData.uint32(0x11111111, name="MAGIC_NUMBER")
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LDR(r0, literal=magic)
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"""
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import inspect
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import nervapy.arm.function
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import nervapy.stream
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from nervapy.arm.generic import Operand
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from nervapy.arm.instructions import Instruction
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class Literal:
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"""
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Wrapper class for literal values with optional custom labels.
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Use this class to specify a literal value for LDR instruction with an optional label.
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This is useful when you want to control the label name in the generated assembly.
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Examples:
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# Simple literal (auto-generated label)
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LDR(r0, literal=Literal(0x11111111))
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# Generates: literal_123456789: .word 0x11111111
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# Literal with custom label
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LDR(r0, literal=Literal(0x11111111, label="MY_CONSTANT"))
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# Generates: MY_CONSTANT: .word 0x11111111
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# 64-bit literal
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LDR(r0, literal=Literal(0x123456789ABCDEF0))
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# Direct integer also works (backward compatibility)
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LDR(r1, literal=0x22222222)
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"""
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def __init__(self, value, label=None):
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"""
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Args:
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value: The literal value (int or float)
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label: Optional custom label name for the literal
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"""
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self.value = value
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self.label = label
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def get_value(self):
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"""Return the literal value"""
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return self.value
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def get_label(self):
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"""Return the custom label, if any"""
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return self.label
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class LiteralPoolEntry:
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"""Represents a single entry in the literal pool"""
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def __init__(self, value, label=None, size=32):
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"""
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Args:
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value: The literal value (int, float, or ConstantData)
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label: Optional label name for the literal
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size: Size in bits (8, 16, 32, or 64)
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"""
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self.value = value
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self.label = label or f"literal_{id(self)}"
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self.size = size
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self._is_constant_data = False
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# Check if value is a ConstantData object
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try:
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from nervapy.constant_data import ConstantData
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if isinstance(value, ConstantData):
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self._is_constant_data = True
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self.label = value.get_label()
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except ImportError:
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pass
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def is_constant_data(self):
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"""Check if this entry references ConstantData"""
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return self._is_constant_data
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def get_label(self):
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"""Get the label for this literal"""
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return self.label
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def get_value(self):
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"""Get the numeric value"""
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if self._is_constant_data:
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# For ConstantData, return the first value
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if hasattr(self.value, 'data') and len(self.value.data) > 0:
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return self.value.data[0]
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return 0
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return self.value
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def generate_assembly(self, format='gas'):
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"""Generate assembly for this literal entry"""
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if self._is_constant_data:
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# ConstantData generates its own .data section
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return ""
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if format == 'gas':
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if self.size == 64:
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# 64-bit value
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return f"{self.label}:\n\t.word 0x{self.value & 0xFFFFFFFF:08X}, 0x{(self.value >> 32) & 0xFFFFFFFF:08X}"
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elif self.size == 32:
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return f"{self.label}:\n\t.word 0x{self.value:08X}"
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elif self.size == 16:
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return f"{self.label}:\n\t.hword 0x{self.value:04X}"
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elif self.size == 8:
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return f"{self.label}:\n\t.byte 0x{self.value:02X}"
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elif format == 'armcc':
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if self.size == 64:
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return f"{self.label} DCD 0x{self.value & 0xFFFFFFFF:08X}, 0x{(self.value >> 32) & 0xFFFFFFFF:08X}"
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elif self.size == 32:
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return f"{self.label} DCD 0x{self.value:08X}"
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elif self.size == 16:
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return f"{self.label} DCW 0x{self.value:04X}"
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elif self.size == 8:
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return f"{self.label} DCB 0x{self.value:02X}"
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return ""
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class LiteralPool:
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"""Manages a pool of literals for a function"""
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def __init__(self):
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self.entries = []
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self._value_map = {} # Map values to entries for deduplication
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def add_literal(self, value, label=None, size=32):
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"""
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Add a literal to the pool
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Args:
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value: The literal value
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label: Optional label name
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size: Size in bits
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Returns:
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LiteralPoolEntry: The pool entry
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"""
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# Check if we already have this value (deduplication)
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if label is None and not self._is_constant_data(value):
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key = (value, size)
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if key in self._value_map:
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return self._value_map[key]
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entry = LiteralPoolEntry(value, label, size)
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self.entries.append(entry)
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if label is None and not entry.is_constant_data():
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self._value_map[(value, size)] = entry
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return entry
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def _is_constant_data(self, value):
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"""Check if value is ConstantData"""
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try:
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from nervapy.constant_data import ConstantData
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return isinstance(value, ConstantData)
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except ImportError:
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return False
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def generate_assembly(self, format='gas'):
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"""Generate assembly for the entire literal pool"""
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if not self.entries:
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return ""
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lines = []
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if format == 'gas':
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lines.append("\t.align 4")
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for entry in self.entries:
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if not entry.is_constant_data():
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asm = entry.generate_assembly(format='gas')
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if asm:
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lines.append(asm)
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elif format == 'armcc':
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lines.append(" ALIGN 4")
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for entry in self.entries:
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if not entry.is_constant_data():
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asm = entry.generate_assembly(format='armcc')
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if asm:
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lines.append(asm)
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return "\n".join(lines) if lines else ""
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class LiteralLoadInstruction(Instruction):
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"""
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LDR pseudo-instruction for loading literals: LDR rd, =value
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This generates either:
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1. A literal pool entry + PC-relative LDR
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2. An optimized MOV/MVN if the value is encodable
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3. A reference to a ConstantData label
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"""
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def __init__(self, register, value, label=None, origin=None):
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"""
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Args:
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register: Destination register
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value: Literal value (int, float, ConstantData, or Literal object)
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label: Optional custom label name for the literal
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"""
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self.literal_register = Operand(register)
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# Extract value and label from Literal object if provided
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actual_value = value
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actual_label = label
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if isinstance(value, Literal):
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actual_value = value.get_value()
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if label is None: # Only use Literal's label if not explicitly provided
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actual_label = value.get_label()
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self.literal_value = actual_value
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self.pool_entry = None
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# Check if it's a ConstantData object
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self._is_constant_data = False
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try:
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from nervapy.constant_data import ConstantData
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if isinstance(actual_value, ConstantData):
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self._is_constant_data = True
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except ImportError:
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pass
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# Add to literal pool if function is active
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if nervapy.arm.function.active_function is not None:
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if not hasattr(nervapy.arm.function.active_function, 'literal_pool'):
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nervapy.arm.function.active_function.literal_pool = LiteralPool()
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size = 32
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if isinstance(actual_value, int):
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if actual_value > 0xFFFFFFFF:
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size = 64
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self.pool_entry = nervapy.arm.function.active_function.literal_pool.add_literal(
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actual_value, label=actual_label, size=size
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)
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# Create instruction representation
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super(LiteralLoadInstruction, self).__init__(
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"LDR", [self.literal_register], origin=origin
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)
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def __str__(self):
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"""Generate the assembly string"""
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if self.pool_entry:
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label = self.pool_entry.get_label()
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return f"LDR {self.literal_register}, ={label}"
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else:
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# Fallback if no pool entry
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return f"LDR {self.literal_register}, =0x{self.literal_value:X}"
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def get_output_registers_list(self):
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"""Return list of registers modified by this instruction"""
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return [self.literal_register.get_registers_list()[0]]
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def get_input_registers_list(self):
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"""Return list of registers used by this instruction"""
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return []
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|
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def LDR_LITERAL(register, value, label=None):
|
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|
+
"""
|
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|
+
Load a literal value into a register using the literal pool.
|
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|
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|
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289
|
+
This implements the ARM pseudo-instruction: LDR rd, =value
|
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|
+
Args:
|
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|
+
register: Destination general-purpose register
|
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293
|
+
value: Literal value to load (int, float, or ConstantData)
|
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|
+
label: Optional custom label name for the literal
|
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|
+
|
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|
+
Returns:
|
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297
|
+
LiteralLoadInstruction: The instruction object
|
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|
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|
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299
|
+
Examples:
|
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300
|
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# Load a 32-bit constant
|
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301
|
+
LDR_LITERAL(r0, 0x11111111)
|
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|
+
|
|
303
|
+
# Load with custom label
|
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|
+
LDR_LITERAL(r0, 0x11111111, label="my_constant")
|
|
305
|
+
|
|
306
|
+
# Load from ConstantData
|
|
307
|
+
magic = ConstantData.uint32(0x12345678, name="MAGIC")
|
|
308
|
+
LDR_LITERAL(r1, magic)
|
|
309
|
+
|
|
310
|
+
# Load a large value
|
|
311
|
+
LDR_LITERAL(r2, 0xDEADBEEF)
|
|
312
|
+
|
|
313
|
+
Note:
|
|
314
|
+
The assembler will automatically:
|
|
315
|
+
- Create a literal pool entry
|
|
316
|
+
- Generate PC-relative LDR instruction
|
|
317
|
+
- Place the literal in .text or .rodata section
|
|
318
|
+
|
|
319
|
+
For ConstantData objects, it references the .data section label.
|
|
320
|
+
"""
|
|
321
|
+
origin = (
|
|
322
|
+
inspect.stack() if nervapy.arm.function.active_function.collect_origin else None
|
|
323
|
+
)
|
|
324
|
+
instruction = LiteralLoadInstruction(register, value, label=label, origin=origin)
|
|
325
|
+
if nervapy.stream.active_stream is not None:
|
|
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|
+
nervapy.stream.active_stream.add_instruction(instruction)
|
|
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|
+
return instruction
|
|
328
|
+
|
|
329
|
+
|
|
330
|
+
# Alias for convenience
|
|
331
|
+
LDRL = LDR_LITERAL
|
|
@@ -0,0 +1,211 @@
|
|
|
1
|
+
# This file is part of PeachPy package and is licensed under the Simplified BSD license.
|
|
2
|
+
# See license.rst for the full text of the license.
|
|
3
|
+
|
|
4
|
+
from typing import Optional
|
|
5
|
+
|
|
6
|
+
from nervapy.arm.isa import Extension, Extensions
|
|
7
|
+
|
|
8
|
+
|
|
9
|
+
class Microarchitecture:
|
|
10
|
+
def __init__(self, name, extensions):
|
|
11
|
+
self.name = name
|
|
12
|
+
self.extensions = Extensions(
|
|
13
|
+
*[
|
|
14
|
+
prerequisite
|
|
15
|
+
for extension in extensions
|
|
16
|
+
for prerequisite in extension.prerequisites
|
|
17
|
+
]
|
|
18
|
+
)
|
|
19
|
+
|
|
20
|
+
def is_supported(self, extension):
|
|
21
|
+
return extension in self.extensions
|
|
22
|
+
|
|
23
|
+
@property
|
|
24
|
+
def id(self):
|
|
25
|
+
return self.name.replace(" ", "")
|
|
26
|
+
|
|
27
|
+
def __add__(self, extension):
|
|
28
|
+
return Microarchitecture(self.name, self.extensions + extension)
|
|
29
|
+
|
|
30
|
+
def __sub__(self, extension):
|
|
31
|
+
return Microarchitecture(self.name, self.extensions - extension)
|
|
32
|
+
|
|
33
|
+
def __str__(self):
|
|
34
|
+
return self.name
|
|
35
|
+
|
|
36
|
+
Default: Optional["Microarchitecture"] = None
|
|
37
|
+
XScale: Optional["Microarchitecture"] = None
|
|
38
|
+
ARM9: Optional["Microarchitecture"] = None
|
|
39
|
+
ARM11: Optional["Microarchitecture"] = None
|
|
40
|
+
CortexA5: Optional["Microarchitecture"] = None
|
|
41
|
+
CortexA7: Optional["Microarchitecture"] = None
|
|
42
|
+
CortexA8: Optional["Microarchitecture"] = None
|
|
43
|
+
CortexA9: Optional["Microarchitecture"] = None
|
|
44
|
+
CortexA12: Optional["Microarchitecture"] = None
|
|
45
|
+
CortexA15: Optional["Microarchitecture"] = None
|
|
46
|
+
CortexM0: Optional["Microarchitecture"] = None
|
|
47
|
+
CortexM0Plus: Optional["Microarchitecture"] = None
|
|
48
|
+
CortexM1: Optional["Microarchitecture"] = None
|
|
49
|
+
CortexM3: Optional["Microarchitecture"] = None
|
|
50
|
+
CortexM4: Optional["Microarchitecture"] = None
|
|
51
|
+
CortexM7: Optional["Microarchitecture"] = None
|
|
52
|
+
CortexM23: Optional["Microarchitecture"] = None
|
|
53
|
+
CortexM33: Optional["Microarchitecture"] = None
|
|
54
|
+
CortexM35P: Optional["Microarchitecture"] = None
|
|
55
|
+
CortexM55: Optional["Microarchitecture"] = None
|
|
56
|
+
CortexM85: Optional["Microarchitecture"] = None
|
|
57
|
+
Scorpion: Optional["Microarchitecture"] = None
|
|
58
|
+
Krait: Optional["Microarchitecture"] = None
|
|
59
|
+
PJ4: Optional["Microarchitecture"] = None
|
|
60
|
+
|
|
61
|
+
|
|
62
|
+
Microarchitecture.Default = Microarchitecture("Default", Extension.All)
|
|
63
|
+
Microarchitecture.XScale = Microarchitecture(
|
|
64
|
+
"XScale", [Extension.V5E, Extension.Thumb, Extension.XScale, Extension.WMMX2]
|
|
65
|
+
)
|
|
66
|
+
Microarchitecture.ARM9 = Microarchitecture("ARM9", [Extension.V5E, Extension.Thumb])
|
|
67
|
+
Microarchitecture.ARM11 = Microarchitecture(
|
|
68
|
+
"ARM11", [Extension.V6K, Extension.Thumb, Extension.VFP2, Extension.VFPVectorMode]
|
|
69
|
+
)
|
|
70
|
+
Microarchitecture.CortexA5 = Microarchitecture(
|
|
71
|
+
"Cortex A5",
|
|
72
|
+
[
|
|
73
|
+
Extension.V7MP,
|
|
74
|
+
Extension.Thumb2,
|
|
75
|
+
Extension.VFP4,
|
|
76
|
+
Extension.VFPd32,
|
|
77
|
+
Extension.NEON2,
|
|
78
|
+
],
|
|
79
|
+
)
|
|
80
|
+
Microarchitecture.CortexA7 = Microarchitecture(
|
|
81
|
+
"Cortex A7",
|
|
82
|
+
[
|
|
83
|
+
Extension.V7MP,
|
|
84
|
+
Extension.Thumb2,
|
|
85
|
+
Extension.Div,
|
|
86
|
+
Extension.VFP4,
|
|
87
|
+
Extension.VFPd32,
|
|
88
|
+
Extension.NEON2,
|
|
89
|
+
],
|
|
90
|
+
)
|
|
91
|
+
Microarchitecture.CortexA8 = Microarchitecture(
|
|
92
|
+
"Cortex A8",
|
|
93
|
+
[Extension.V7, Extension.Thumb2, Extension.VFP3, Extension.VFPd32, Extension.NEON],
|
|
94
|
+
)
|
|
95
|
+
Microarchitecture.CortexA9 = Microarchitecture(
|
|
96
|
+
"Cortex A9", [Extension.V7MP, Extension.Thumb2, Extension.VFP3, Extension.VFPHP]
|
|
97
|
+
)
|
|
98
|
+
Microarchitecture.CortexA12 = Microarchitecture(
|
|
99
|
+
"Cortex A12",
|
|
100
|
+
[
|
|
101
|
+
Extension.V7MP,
|
|
102
|
+
Extension.Thumb2,
|
|
103
|
+
Extension.Div,
|
|
104
|
+
Extension.VFP4,
|
|
105
|
+
Extension.VFPd32,
|
|
106
|
+
Extension.NEON2,
|
|
107
|
+
],
|
|
108
|
+
)
|
|
109
|
+
Microarchitecture.CortexA15 = Microarchitecture(
|
|
110
|
+
"Cortex A15",
|
|
111
|
+
[
|
|
112
|
+
Extension.V7MP,
|
|
113
|
+
Extension.Thumb2,
|
|
114
|
+
Extension.Div,
|
|
115
|
+
Extension.VFP4,
|
|
116
|
+
Extension.VFPd32,
|
|
117
|
+
Extension.NEON2,
|
|
118
|
+
],
|
|
119
|
+
)
|
|
120
|
+
Microarchitecture.Scorpion = Microarchitecture(
|
|
121
|
+
"Scorpion",
|
|
122
|
+
[
|
|
123
|
+
Extension.V7MP,
|
|
124
|
+
Extension.Thumb2,
|
|
125
|
+
Extension.VFP3,
|
|
126
|
+
Extension.VFPd32,
|
|
127
|
+
Extension.VFPHP,
|
|
128
|
+
Extension.NEON,
|
|
129
|
+
Extension.NEONHP,
|
|
130
|
+
],
|
|
131
|
+
)
|
|
132
|
+
Microarchitecture.Krait = Microarchitecture(
|
|
133
|
+
"Krait",
|
|
134
|
+
[
|
|
135
|
+
Extension.V7MP,
|
|
136
|
+
Extension.Thumb2,
|
|
137
|
+
Extension.Div,
|
|
138
|
+
Extension.VFP4,
|
|
139
|
+
Extension.VFPd32,
|
|
140
|
+
Extension.NEON2,
|
|
141
|
+
],
|
|
142
|
+
)
|
|
143
|
+
Microarchitecture.PJ4 = Microarchitecture(
|
|
144
|
+
"PJ4", [Extension.V7, Extension.Thumb2, Extension.VFP3, Extension.WMMX2]
|
|
145
|
+
)
|
|
146
|
+
|
|
147
|
+
# Cortex-M series microarchitectures
|
|
148
|
+
Microarchitecture.CortexM0 = Microarchitecture(
|
|
149
|
+
"Cortex M0", [Extension.V6, Extension.Thumb2]
|
|
150
|
+
)
|
|
151
|
+
Microarchitecture.CortexM0Plus = Microarchitecture(
|
|
152
|
+
"Cortex M0+", [Extension.V6, Extension.Thumb2]
|
|
153
|
+
)
|
|
154
|
+
Microarchitecture.CortexM1 = Microarchitecture(
|
|
155
|
+
"Cortex M1", [Extension.V6, Extension.Thumb2]
|
|
156
|
+
)
|
|
157
|
+
Microarchitecture.CortexM3 = Microarchitecture(
|
|
158
|
+
"Cortex M3", [Extension.V7M, Extension.Thumb2]
|
|
159
|
+
)
|
|
160
|
+
Microarchitecture.CortexM4 = Microarchitecture(
|
|
161
|
+
"Cortex M4", [Extension.V7M, Extension.Thumb2, Extension.DSP, Extension.VFP4]
|
|
162
|
+
)
|
|
163
|
+
Microarchitecture.CortexM7 = Microarchitecture(
|
|
164
|
+
"Cortex M7",
|
|
165
|
+
[Extension.V7M, Extension.Thumb2, Extension.DSP, Extension.VFP4, Extension.VFPd32],
|
|
166
|
+
)
|
|
167
|
+
|
|
168
|
+
# ARMv8-M Cortex-M series microarchitectures
|
|
169
|
+
Microarchitecture.CortexM23 = Microarchitecture(
|
|
170
|
+
"Cortex M23", [Extension.V8MBase, Extension.Thumb, Extension.TrustZone]
|
|
171
|
+
)
|
|
172
|
+
Microarchitecture.CortexM33 = Microarchitecture(
|
|
173
|
+
"Cortex M33",
|
|
174
|
+
[
|
|
175
|
+
Extension.V8MMain,
|
|
176
|
+
Extension.Thumb2,
|
|
177
|
+
Extension.DSP,
|
|
178
|
+
Extension.TrustZone,
|
|
179
|
+
],
|
|
180
|
+
)
|
|
181
|
+
Microarchitecture.CortexM35P = Microarchitecture(
|
|
182
|
+
"Cortex M35P",
|
|
183
|
+
[
|
|
184
|
+
Extension.V8MMain,
|
|
185
|
+
Extension.Thumb2,
|
|
186
|
+
Extension.DSP,
|
|
187
|
+
Extension.TrustZone,
|
|
188
|
+
],
|
|
189
|
+
)
|
|
190
|
+
Microarchitecture.CortexM55 = Microarchitecture(
|
|
191
|
+
"Cortex M55",
|
|
192
|
+
[
|
|
193
|
+
Extension.V8_1MMain,
|
|
194
|
+
Extension.Thumb2,
|
|
195
|
+
Extension.DSP,
|
|
196
|
+
Extension.VFP4,
|
|
197
|
+
Extension.TrustZone,
|
|
198
|
+
Extension.MVE,
|
|
199
|
+
],
|
|
200
|
+
)
|
|
201
|
+
Microarchitecture.CortexM85 = Microarchitecture(
|
|
202
|
+
"Cortex M85",
|
|
203
|
+
[
|
|
204
|
+
Extension.V8_1MMain,
|
|
205
|
+
Extension.Thumb2,
|
|
206
|
+
Extension.DSP,
|
|
207
|
+
Extension.VFP4,
|
|
208
|
+
Extension.TrustZone,
|
|
209
|
+
Extension.MVE,
|
|
210
|
+
],
|
|
211
|
+
)
|