PyNerva 0.0.7__py3-none-any.whl

nervapy/x86_64/isa.py

@@ -0,0 +1,476 @@
+# This file is part of PeachPy package and is licensed under the Simplified BSD license.
+#    See license.rst for the full text of the license.
+
+
+class Extension:
+    def __init__(self, name, safe_name=None):
+        assert isinstance(name, str), "name must be a string"
+        self.name = name
+        if safe_name is None:
+            self.safe_name = self.name
+        else:
+            self.safe_name = safe_name
+
+    def __hash__(self):
+        return hash(self.name)
+
+    def __eq__(self, other):
+        return self.name == other.name
+
+    def __ne__(self, other):
+        return self.name != other.name
+
+    def __gt__(self, other):
+        return other in self.prerequisites
+
+    def __lt__(self, other):
+        return self in other.prerequisites
+
+    @property
+    def prerequisites(self):
+        return {
+            "RDTSC": (rdtsc,),
+            "RDTSCP": (rdtsc, rdtscp),
+            "CPUID": (cpuid,),
+            "MMX": (mmx,),
+            "MMX+": (mmx, mmx_plus),
+            "3dnow!": (mmx, three_d_now, prefetch, prefetchw),
+            "3dnow!+": (mmx, three_d_now, three_d_now_plus, prefetch, prefetchw),
+            "FEMMS": (mmx, femms),
+            "SSE": (mmx, mmx_plus, sse),
+            "SSE2": (mmx, mmx_plus, sse, sse2),
+            "SSE3": (mmx, mmx_plus, sse, sse2, sse3),
+            "SSSE3": (mmx, mmx_plus, sse, sse2, sse3, ssse3),
+            "SSE4A": (mmx, mmx_plus, sse, sse2, sse3, sse4a),
+            "SSE4.1": (mmx, mmx_plus, sse, sse2, sse3, ssse3, sse4_1),
+            "SSE4.2": (mmx, mmx_plus, sse, sse2, sse3, ssse3, sse4_1, sse4_2),
+            "AES": (mmx, mmx_plus, sse, sse2, sse3, ssse3, sse4_1, sse4_2, aes),
+            "PCLMULQDQ": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                pclmulqdq,
+            ),
+            "RDRAND": (rdrand,),
+            "RDSEED": (rdrand, rdseed),
+            "SHA": (sha,),
+            "AVX": (mmx, mmx_plus, sse, sse2, sse3, ssse3, sse4_1, sse4_2, avx),
+            "F16C": (mmx, mmx_plus, sse, sse2, sse3, ssse3, sse4_1, sse4_2, avx, f16c),
+            "AVX2": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+            ),
+            "XOP": (mmx, mmx_plus, sse, sse2, sse3, ssse3, sse4_1, sse4_2, avx, xop),
+            "FMA3": (mmx, mmx_plus, sse, sse2, sse3, ssse3, sse4_1, sse4_2, avx, fma3),
+            "FMA4": (mmx, mmx_plus, sse, sse2, sse3, ssse3, sse4_1, sse4_2, avx, fma4),
+            "AVX512F": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+            ),
+            "AVX512BW": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512bw,
+            ),
+            "AVX512DQ": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512dq,
+            ),
+            "AVX512VL": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512vl,
+            ),
+            "AVX512CD": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512cd,
+            ),
+            "AVX512PF": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512pf,
+            ),
+            "AVX512ER": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512er,
+            ),
+            "AVX512VBMI": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512vbmi,
+            ),
+            "AVX512IFMA": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512ifma,
+            ),
+            "AVX512VPOPCNTDQ": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512vpopcntdq,
+            ),
+            "AVX512_4VNNIW": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512_4vnniw,
+            ),
+            "AVX512_4FMAPS": (
+                mmx,
+                mmx_plus,
+                sse,
+                sse2,
+                sse3,
+                ssse3,
+                sse4_1,
+                sse4_2,
+                sse4_2,
+                avx,
+                f16c,
+                fma3,
+                avx2,
+                avx512f,
+                avx512_4fmaps,
+            ),
+            "PREFETCH": (prefetch,),
+            "PREFETCHW": (prefetchw,),
+            "PREFETCHWT1": (prefetchwt1,),
+            "CLFLUSH": (clflush,),
+            "CLFLUSHOPT": (
+                clflush,
+                clflushopt,
+            ),
+            "CLWB": (clwb,),
+            "CLZERO": (clzero,),
+            "CMOV": (cmov,),
+            "POPCNT": (popcnt,),
+            "LZCNT": (lzcnt,),
+            "MOVBE": (movbe,),
+            "BMI": (bmi,),
+            "BMI2": (bmi, bmi2),
+            "TBM": (tbm,),
+            "ADX": (adx,),
+        }[self.name]
+
+    @property
+    def ancestors(self):
+        return {
+            "RDTSC": (rdtsc,),
+            "RDTSCP": (rdtsc, rdtscp),
+            "CPUID": (cpuid,),
+            "MMX": (mmx,),
+            "MMX+": (mmx, mmx_plus),
+            "3dnow!": (mmx, three_d_now),
+            "3dnow!+": (mmx, three_d_now, three_d_now_plus),
+            "FEMMS": (femms,),
+            "SSE": (sse,),
+            "SSE2": (sse, sse2),
+            "SSE3": (sse, sse2, sse3),
+            "SSSE3": (sse, sse2, sse3, ssse3),
+            "SSE4A": (sse, sse2, sse3, sse4a),
+            "SSE4.1": (sse, sse2, sse3, ssse3, sse4_1),
+            "SSE4.2": (sse, sse2, sse3, ssse3, sse4_1, sse4_2),
+            "AES": (aes,),
+            "PCLMULQDQ": (pclmulqdq,),
+            "RDRAND": (rdrand,),
+            "RDSEED": (rdrand, rdseed),
+            "SHA": (sha,),
+            "AVX": (avx,),
+            "F16C": (f16c,),
+            "AVX2": (avx, avx2),
+            "XOP": (xop,),
+            "FMA3": (fma3,),
+            "FMA4": (fma4,),
+            "AVX512F": (avx, fma3, f16c, avx2, avx512f),
+            "AVX512BW": (avx, fma3, f16c, avx2, avx512f, avx512bw),
+            "AVX512DQ": (avx, fma3, f16c, avx2, avx512f, avx512dq),
+            "AVX512VL": (avx, fma3, f16c, avx2, avx512f, avx512vl),
+            "AVX512ER": (avx, fma3, f16c, avx2, avx512f, avx512er),
+            "AVX512PF": (avx, fma3, f16c, avx2, avx512f, avx512pf),
+            "AVX512CD": (avx, fma3, f16c, avx2, avx512f, avx512cd),
+            "AVX512VBMI": (avx, fma3, f16c, avx2, avx512f, avx512vbmi),
+            "AVX512IFMA": (avx, fma3, f16c, avx2, avx512f, avx512ifma),
+            "AVX512VPOPCNTDQ": (avx, f16c, fma3, avx2, avx512f, avx512vpopcntdq),
+            "AVX512_4VNNIW": (avx, f16c, fma3, avx2, avx512f, avx512_4vnniw),
+            "AVX512_4FMAPS": (avx, f16c, fma3, avx2, avx512f, avx512_4fmaps),
+            "PREFETCH": (prefetch,),
+            "PREFETCHW": (prefetchw,),
+            "PREFETCHWT1": (prefetchwt1,),
+            "CLFLUSH": (clflush,),
+            "CLFLUSHOPT": (
+                clflush,
+                clflushopt,
+            ),
+            "CLWB": (clwb,),
+            "CLZERO": (clzero,),
+            "CMOV": (cmov,),
+            "POPCNT": (popcnt,),
+            "LZCNT": (lzcnt,),
+            "MOVBE": (movbe,),
+            "BMI": (bmi,),
+            "BMI2": (bmi, bmi2),
+            "TBM": (tbm,),
+            "ADX": (adx,),
+        }[self.name]
+
+    def __add__(self, extension):
+        return Extensions(self, extension)
+
+    def __str__(self):
+        return self.name
+
+    def __repr__(self):
+        return str(self)
+
+
+rdtsc = Extension("RDTSC")
+rdtscp = Extension("RDTSCP")
+cpuid = Extension("CPUID")
+mmx = Extension("MMX")
+mmx_plus = Extension("MMX+", safe_name="MMXPlus")
+three_d_now = Extension("3dnow!", safe_name="3dnow")
+three_d_now_plus = Extension("3dnow!+", safe_name="3dnowPlus")
+femms = Extension("FEMMS")
+sse = Extension("SSE")
+sse2 = Extension("SSE2")
+sse3 = Extension("SSE3")
+ssse3 = Extension("SSSE3")
+sse4a = Extension("SSE4A")
+sse4_1 = Extension("SSE4.1", safe_name="SSE4_1")
+sse4_2 = Extension("SSE4.2", safe_name="SSE4_2")
+aes = Extension("AES")
+pclmulqdq = Extension("PCLMULQDQ")
+rdrand = Extension("RDRAND")
+rdseed = Extension("RDSEED")
+sha = Extension("SHA")
+avx = Extension("AVX")
+avx2 = Extension("AVX2")
+avx512f = Extension("AVX512F")
+avx512pf = Extension("AVX512PF")
+avx512cd = Extension("AVX512CD")
+avx512er = Extension("AVX512ER")
+avx512dq = Extension("AVX512DQ")
+avx512bw = Extension("AVX512BW")
+avx512vl = Extension("AVX512VL")
+avx512ifma = Extension("AVX512IFMA")
+avx512vbmi = Extension("AVX512VBMI")
+avx512vpopcntdq = Extension("AVX512VPOPCNTDQ")
+avx512_4vnniw = Extension("AVX512_4VNNIW")
+avx512_4fmaps = Extension("AVX512_4FMAPS")
+prefetch = Extension("PREFETCH")
+prefetchw = Extension("PREFETCHW")
+prefetchwt1 = Extension("PREFETCHWT1")
+clflush = Extension("CLFLUSH")
+clflushopt = Extension("CLFLUSHOPT")
+clwb = Extension("CLWB")
+clzero = Extension("CLZERO")
+xop = Extension("XOP")
+f16c = Extension("F16C")
+fma3 = Extension("FMA3")
+fma4 = Extension("FMA4")
+cmov = Extension("CMOV")
+popcnt = Extension("POPCNT")
+lzcnt = Extension("LZCNT")
+movbe = Extension("MOVBE")
+bmi = Extension("BMI")
+bmi2 = Extension("BMI2")
+tbm = Extension("TBM")
+adx = Extension("ADX")
+default = (cpuid, rdtsc, cmov, mmx, mmx_plus, sse, sse2)
+
+
+class Extensions:
+    def __init__(self, *args):
+        self.extensions = set()
+        for extension in args:
+            assert extension is None or isinstance(
+                extension, (Extension, Extensions)
+            ), "Each argument must be an Extension or Extensions object"
+            if isinstance(extension, Extensions):
+                self.extensions.add(extension.extensions)
+            elif isinstance(extension, Extension):
+                self.extensions.add(extension)
+
+    def minify(self):
+        extensions = list(reversed(sorted(self.extensions)))
+        for extension in extensions:
+            for ancestor in extension.ancestors:
+                if ancestor != extension and ancestor in extensions:
+                    extensions.remove(ancestor)
+        return extensions
+
+    def __add__(self, extension):
+        return Extensions(extension, *self.extensions)
+
+    def __sub__(self, extension):
+        extensions = set(self.extensions)
+        if extension in extensions:
+            del extensions[extension]
+        else:
+            raise KeyError("Extension set does not contain {0}".format(extension))
+        return Extensions(*extensions)
+
+    def __str__(self):
+        return ", ".join(sorted(map(str, self.minify())))
+
+    def __contains__(self, extension):
+        return extension in self.extensions
+
+    def __len__(self):
+        return len(self.extensions)
+
+    def __not__(self):
+        return not self.extensions
+
+    def __iter__(self):
+        return iter(self.extensions)

nervapy/x86_64/lower.py

@@ -0,0 +1,126 @@
+from nervapy import Type
+from nervapy.stream import NullStream
+from nervapy.x86_64 import m128, m128d, m128i, m256, m256d, m256i
+from nervapy.x86_64.avx import VMOVAPD, VMOVAPS, VMOVDQA, VMOVSD, VMOVSS
+from nervapy.x86_64.generic import MOV, MOVSX, MOVSXD, MOVZX
+from nervapy.x86_64.mmxsse import MOVAPD, MOVAPS, MOVDQA, MOVQ, MOVSD, MOVSS
+from nervapy.x86_64.operand import byte, dword, word
+from nervapy.x86_64.registers import (GeneralPurposeRegister, MMXRegister,
+                                      XMMRegister, YMMRegister)
+
+
+def load_register(dst_reg, src_reg, data_type, prototype):
+    assert dst_reg.size >= src_reg.size
+    assert isinstance(data_type, Type)
+    with NullStream():
+        if isinstance(dst_reg, GeneralPurposeRegister):
+            if dst_reg.size == src_reg.size:
+                if dst_reg != src_reg or dst_reg.size == 4:
+                    return MOV(dst_reg, src_reg, prototype=prototype)
+            elif (dst_reg.size, src_reg.size) == (8, 4):
+                if data_type.is_signed_integer:
+                    return MOVSXD(dst_reg, src_reg, prototype=prototype)
+                else:
+                    return MOV(dst_reg.as_dword, src_reg, prototype=prototype)
+            else:
+                if data_type.is_signed_integer:
+                    return MOVSX(dst_reg, src_reg, prototype=prototype)
+                else:
+                    if dst_reg.size == 8:
+                        return MOVZX(dst_reg.as_dword, src_reg, prototype=prototype)
+                    else:
+                        return MOVZX(dst_reg, src_reg, prototype=prototype)
+        elif isinstance(dst_reg, MMXRegister):
+            if dst_reg != src_reg:
+                return MOVQ(dst_reg, src_reg, prototype=prototype)
+        elif isinstance(dst_reg, XMMRegister):
+            if dst_reg != src_reg:
+                if data_type.is_floating_point:
+                    assert data_type.size in [4, 8]
+                    xmm_fp_mov = {
+                        (4, True): VMOVAPS,
+                        (4, False): MOVSS,
+                        (8, True): VMOVAPD,
+                        (8, False): MOVSD,
+                    }[(data_type.size, bool(prototype.avx_mode))]
+                    return xmm_fp_mov(dst_reg, src_reg, prototype=prototype)
+                else:
+                    assert data_type in [m128, m128d, m128i]
+                    xmm_mov = {
+                        (m128, True): VMOVAPS,
+                        (m128, False): MOVAPS,
+                        (m128d, True): VMOVAPD,
+                        (m128d, False): MOVAPD,
+                        (m128i, True): VMOVDQA,
+                        (m128i, False): MOVDQA,
+                    }[(data_type, bool(prototype.avx_mode))]
+                    return xmm_mov(dst_reg, src_reg, prototype=prototype)
+        elif isinstance(dst_reg, YMMRegister):
+            if dst_reg != src_reg:
+                ymm_mov = {m256: VMOVAPS, m256d: VMOVAPD, m256i: VMOVDQA}[data_type]
+                return ymm_mov(dst_reg, src_reg, prototype=prototype)
+        else:
+            assert False, "Unexpected type: " + dst_reg.__class__
+
+
+def load_memory(dst_reg, src_address, src_type, prototype):
+    assert dst_reg.size >= src_type.size
+    assert isinstance(src_type, Type)
+    with NullStream():
+        if isinstance(dst_reg, GeneralPurposeRegister):
+            if dst_reg.size == src_type.size:
+                return MOV(dst_reg, [src_address], prototype=prototype)
+            elif (dst_reg.size, src_type.size) == (8, 4):
+                if src_type.is_signed_integer:
+                    return MOVSXD(dst_reg, dword[src_address], prototype=prototype)
+                else:
+                    return MOV(
+                        dst_reg.as_dword, dword[src_address], prototype=prototype
+                    )
+            else:
+                size_spec = {1: byte, 2: word, 4: dword}[src_type.size]
+                if src_type.is_signed_integer:
+                    return MOVSX(dst_reg, size_spec[src_address], prototype=prototype)
+                else:
+                    if dst_reg.size == 8:
+                        return MOVZX(
+                            dst_reg.as_dword,
+                            size_spec[src_address],
+                            prototype=prototype,
+                        )
+                    else:
+                        return MOVZX(
+                            dst_reg, size_spec[src_address], prototype=prototype
+                        )
+        elif isinstance(dst_reg, MMXRegister):
+            return MOVQ(dst_reg, [src_address], prototype)
+        elif isinstance(dst_reg, XMMRegister):
+            if src_type.is_floating_point:
+                assert src_type.size in [4, 8]
+                if src_type.size == 4:
+                    if prototype.avx_mode:
+                        return VMOVSS(dst_reg, [src_address], prototype=prototype)
+                    else:
+                        return MOVSS(dst_reg, [src_address], prototype=prototype)
+                else:
+                    if prototype.avx_mode:
+                        return VMOVSD(dst_reg, [src_address], prototype=prototype)
+                    else:
+                        return MOVSD(dst_reg, [src_address], prototype=prototype)
+            else:
+                assert src_type in [m128, m128d, m128i]
+                if src_type == m128:
+                    if prototype.avx_mode:
+                        return VMOVAPS(dst_reg, [src_address], prototype=prototype)
+                    else:
+                        return MOVAPS(dst_reg, [src_address], prototype=prototype)
+                elif src_type == m128d:
+                    if prototype.avx_mode:
+                        return VMOVAPD(dst_reg, [src_address], prototype=prototype)
+                    else:
+                        return MOVAPD(dst_reg, [src_address], prototype=prototype)
+                else:
+                    if prototype.avx_mode:
+                        return VMOVDQA(dst_reg, [src_address], prototype=prototype)
+                    else:
+                        return MOVDQA(dst_reg, [src_address], prototype=prototype)