webgpu-bench 0.1.1 → 0.3.0

package/dist/shaders/flopsF16Vec4.d.ts

@@ -1,7 +1,8 @@
 /**
- * fp16 vec4 FLOPS probe — a single FMA chain held in a `vec4<f16>` register
- * (4 independent half-precision lanes per step; only GPUs with packed-half
- * ALUs run this faster than the fp32 vec4 probe).
+ * fp16 vec4 FLOPS probe — {@link flopsF32Vec4Wgsl}'s eight independent,
+ * 4x-unrolled `vec4` FMA chains, but every operand and accumulator is `f16`.
+ * 256 FLOPs per loop iteration. Only GPUs with packed-half ALUs run this
+ * faster than the fp32 version.
  */
-export declare const flopsF16Vec4Wgsl = "\nenable f16;\n\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let s: f16 = f16(idx & 15u) * f16(0.001);\n  let half: f16 = f16(0.5);\n  let one: f16 = f16(1.0);\n  let a: vec4<f16> = vec4<f16>(one - s, one - f16(2.0) * s, one - f16(3.0) * s, one - f16(4.0) * s);\n  let b: vec4<f16> = vec4<f16>(half + s, half + f16(2.0) * s, half + f16(3.0) * s, half + f16(4.0) * s);\n  var x: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001));\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x = x * a + b;\n  }\n  out[idx] = f32(x.x + x.y + x.z + x.w);\n}\n";
+export declare const flopsF16Vec4Wgsl = "\nenable f16;\n\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let s: f16 = f16(idx & 15u) * f16(0.001);\n  let half: f16 = f16(0.5);\n  let one: f16 = f16(1.0);\n  let a: vec4<f16> = vec4<f16>(one - s, one - f16(2.0) * s, one - f16(3.0) * s, one - f16(4.0) * s);\n  let b: vec4<f16> = vec4<f16>(half + s, half + f16(2.0) * s, half + f16(3.0) * s, half + f16(4.0) * s);\n  var x0: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.01));\n  var x1: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.02));\n  var x2: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.03));\n  var x3: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.04));\n  var x4: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.05));\n  var x5: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.06));\n  var x6: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.07));\n  var x7: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.08));\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n  }\n  let t = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n  out[idx] = f32(t.x + t.y + t.z + t.w);\n}\n";
 //# sourceMappingURL=flopsF16Vec4.d.ts.map

package/dist/shaders/flopsF16Vec4.d.ts.map

@@ -1 +1 @@
-{"version":3,"file":"flopsF16Vec4.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF16Vec4.ts"],"names":[],"mappings":"AAAA;;;;GAIG;AACH,eAAO,MAAM,gBAAgB,i2BA4B5B,CAAC"}
+{"version":3,"file":"flopsF16Vec4.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF16Vec4.ts"],"names":[],"mappings":"AAAA;;;;;GAKG;AACH,eAAO,MAAM,gBAAgB,umEAmE5B,CAAC"}

package/dist/shaders/flopsF16Vec4.js

@@ -1,7 +1,8 @@
 /**
- * fp16 vec4 FLOPS probe — a single FMA chain held in a `vec4<f16>` register
- * (4 independent half-precision lanes per step; only GPUs with packed-half
- * ALUs run this faster than the fp32 vec4 probe).
+ * fp16 vec4 FLOPS probe — {@link flopsF32Vec4Wgsl}'s eight independent,
+ * 4x-unrolled `vec4` FMA chains, but every operand and accumulator is `f16`.
+ * 256 FLOPs per loop iteration. Only GPUs with packed-half ALUs run this
+ * faster than the fp32 version.
  */
 export const flopsF16Vec4Wgsl = /* wgsl */ `
 enable f16;
@@ -25,11 +26,50 @@ fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
   let one: f16 = f16(1.0);
   let a: vec4<f16> = vec4<f16>(one - s, one - f16(2.0) * s, one - f16(3.0) * s, one - f16(4.0) * s);
   let b: vec4<f16> = vec4<f16>(half + s, half + f16(2.0) * s, half + f16(3.0) * s, half + f16(4.0) * s);
-  var x: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001));
+  var x0: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.01));
+  var x1: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.02));
+  var x2: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.03));
+  var x3: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.04));
+  var x4: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.05));
+  var x5: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.06));
+  var x6: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.07));
+  var x7: vec4<f16> = vec4<f16>(f16(idx & 255u) * f16(0.0001) + f16(0.08));
   for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
-    x = x * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
   }
-  out[idx] = f32(x.x + x.y + x.z + x.w);
+  let t = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;
+  out[idx] = f32(t.x + t.y + t.z + t.w);
 }
 `;
 //# sourceMappingURL=flopsF16Vec4.js.map

package/dist/shaders/flopsF16Vec4.js.map

@@ -1 +1 @@
-{"version":3,"file":"flopsF16Vec4.js","sourceRoot":"","sources":["../../src/shaders/flopsF16Vec4.ts"],"names":[],"mappings":"AAAA;;;;GAIG;AACH,MAAM,CAAC,MAAM,gBAAgB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA4B1C,CAAC"}
+{"version":3,"file":"flopsF16Vec4.js","sourceRoot":"","sources":["../../src/shaders/flopsF16Vec4.ts"],"names":[],"mappings":"AAAA;;;;;GAKG;AACH,MAAM,CAAC,MAAM,gBAAgB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CAmE1C,CAAC"}

package/dist/shaders/flopsF32Div.d.ts

@@ -1,10 +1,13 @@
 /**
  * fp32 divide-add FLOPS probe. Same shape as {@link flopsF32ScalarWgsl}
  * (eight independent chains, unrolled 4x) but with the multiply replaced by
- * a divide: `x = x / a + b`. `a` is kept > 1 so each step is a contraction
- * (bounded, no risk of overflow/underflow over hundreds of iterations).
+ * a divide: `x = a / x + b`. The *divisor* must be the loop-carried value:
+ * with `x / a` the compiler hoists `1/a` out of the loop (WGSL allows the
+ * approximation) and the loop silently becomes an FMA — it measured 2.9
+ * TFLOP/s on an M3 vs 0.84 for a real divide. `x >= b > 0` from the first
+ * step, so the chain is bounded and never divides by zero.
  * 64 ops (32 divides + 32 adds) per loop iteration, same MAC-as-2 convention
  * as the multiply version, so throughput is directly comparable.
  */
-export declare const flopsF32DivWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let a: f32 = 1.2 + f32(idx & 15u) * 0.05;\n  let b: f32 = 0.5 + f32(idx & 7u) * 0.001;\n  var x0: f32 = f32(idx & 255u) * 0.0001 + 0.01;\n  var x1: f32 = f32(idx & 255u) * 0.0001 + 0.02;\n  var x2: f32 = f32(idx & 255u) * 0.0001 + 0.03;\n  var x3: f32 = f32(idx & 255u) * 0.0001 + 0.04;\n  var x4: f32 = f32(idx & 255u) * 0.0001 + 0.05;\n  var x5: f32 = f32(idx & 255u) * 0.0001 + 0.06;\n  var x6: f32 = f32(idx & 255u) * 0.0001 + 0.07;\n  var x7: f32 = f32(idx & 255u) * 0.0001 + 0.08;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n  }\n  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n}\n";
+export declare const flopsF32DivWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let a: f32 = 1.2 + f32(idx & 15u) * 0.05;\n  let b: f32 = 0.5 + f32(idx & 7u) * 0.001;\n  var x0: f32 = f32(idx & 255u) * 0.0001 + 0.01;\n  var x1: f32 = f32(idx & 255u) * 0.0001 + 0.02;\n  var x2: f32 = f32(idx & 255u) * 0.0001 + 0.03;\n  var x3: f32 = f32(idx & 255u) * 0.0001 + 0.04;\n  var x4: f32 = f32(idx & 255u) * 0.0001 + 0.05;\n  var x5: f32 = f32(idx & 255u) * 0.0001 + 0.06;\n  var x6: f32 = f32(idx & 255u) * 0.0001 + 0.07;\n  var x7: f32 = f32(idx & 255u) * 0.0001 + 0.08;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = a / x0 + b;\n    x1 = a / x1 + b;\n    x2 = a / x2 + b;\n    x3 = a / x3 + b;\n    x4 = a / x4 + b;\n    x5 = a / x5 + b;\n    x6 = a / x6 + b;\n    x7 = a / x7 + b;\n    x0 = a / x0 + b;\n    x1 = a / x1 + b;\n    x2 = a / x2 + b;\n    x3 = a / x3 + b;\n    x4 = a / x4 + b;\n    x5 = a / x5 + b;\n    x6 = a / x6 + b;\n    x7 = a / x7 + b;\n    x0 = a / x0 + b;\n    x1 = a / x1 + b;\n    x2 = a / x2 + b;\n    x3 = a / x3 + b;\n    x4 = a / x4 + b;\n    x5 = a / x5 + b;\n    x6 = a / x6 + b;\n    x7 = a / x7 + b;\n    x0 = a / x0 + b;\n    x1 = a / x1 + b;\n    x2 = a / x2 + b;\n    x3 = a / x3 + b;\n    x4 = a / x4 + b;\n    x5 = a / x5 + b;\n    x6 = a / x6 + b;\n    x7 = a / x7 + b;\n  }\n  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n}\n";
 //# sourceMappingURL=flopsF32Div.d.ts.map

package/dist/shaders/flopsF32Div.d.ts.map

@@ -1 +1 @@
-{"version":3,"file":"flopsF32Div.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Div.ts"],"names":[],"mappings":"AAAA;;;;;;;GAOG;AACH,eAAO,MAAM,eAAe,6nDA6D3B,CAAC"}
+{"version":3,"file":"flopsF32Div.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Div.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;GAUG;AACH,eAAO,MAAM,eAAe,6nDA6D3B,CAAC"}

package/dist/shaders/flopsF32Div.js

@@ -1,8 +1,11 @@
 /**
  * fp32 divide-add FLOPS probe. Same shape as {@link flopsF32ScalarWgsl}
  * (eight independent chains, unrolled 4x) but with the multiply replaced by
- * a divide: `x = x / a + b`. `a` is kept > 1 so each step is a contraction
- * (bounded, no risk of overflow/underflow over hundreds of iterations).
+ * a divide: `x = a / x + b`. The *divisor* must be the loop-carried value:
+ * with `x / a` the compiler hoists `1/a` out of the loop (WGSL allows the
+ * approximation) and the loop silently becomes an FMA — it measured 2.9
+ * TFLOP/s on an M3 vs 0.84 for a real divide. `x >= b > 0` from the first
+ * step, so the chain is bounded and never divides by zero.
  * 64 ops (32 divides + 32 adds) per loop iteration, same MAC-as-2 convention
  * as the multiply version, so throughput is directly comparable.
  */
@@ -32,38 +35,38 @@ fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
   var x6: f32 = f32(idx & 255u) * 0.0001 + 0.07;
   var x7: f32 = f32(idx & 255u) * 0.0001 + 0.08;
   for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
-    x0 = x0 / a + b;
-    x1 = x1 / a + b;
-    x2 = x2 / a + b;
-    x3 = x3 / a + b;
-    x4 = x4 / a + b;
-    x5 = x5 / a + b;
-    x6 = x6 / a + b;
-    x7 = x7 / a + b;
-    x0 = x0 / a + b;
-    x1 = x1 / a + b;
-    x2 = x2 / a + b;
-    x3 = x3 / a + b;
-    x4 = x4 / a + b;
-    x5 = x5 / a + b;
-    x6 = x6 / a + b;
-    x7 = x7 / a + b;
-    x0 = x0 / a + b;
-    x1 = x1 / a + b;
-    x2 = x2 / a + b;
-    x3 = x3 / a + b;
-    x4 = x4 / a + b;
-    x5 = x5 / a + b;
-    x6 = x6 / a + b;
-    x7 = x7 / a + b;
-    x0 = x0 / a + b;
-    x1 = x1 / a + b;
-    x2 = x2 / a + b;
-    x3 = x3 / a + b;
-    x4 = x4 / a + b;
-    x5 = x5 / a + b;
-    x6 = x6 / a + b;
-    x7 = x7 / a + b;
+    x0 = a / x0 + b;
+    x1 = a / x1 + b;
+    x2 = a / x2 + b;
+    x3 = a / x3 + b;
+    x4 = a / x4 + b;
+    x5 = a / x5 + b;
+    x6 = a / x6 + b;
+    x7 = a / x7 + b;
+    x0 = a / x0 + b;
+    x1 = a / x1 + b;
+    x2 = a / x2 + b;
+    x3 = a / x3 + b;
+    x4 = a / x4 + b;
+    x5 = a / x5 + b;
+    x6 = a / x6 + b;
+    x7 = a / x7 + b;
+    x0 = a / x0 + b;
+    x1 = a / x1 + b;
+    x2 = a / x2 + b;
+    x3 = a / x3 + b;
+    x4 = a / x4 + b;
+    x5 = a / x5 + b;
+    x6 = a / x6 + b;
+    x7 = a / x7 + b;
+    x0 = a / x0 + b;
+    x1 = a / x1 + b;
+    x2 = a / x2 + b;
+    x3 = a / x3 + b;
+    x4 = a / x4 + b;
+    x5 = a / x5 + b;
+    x6 = a / x6 + b;
+    x7 = a / x7 + b;
   }
   out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;
 }

package/dist/shaders/flopsF32Div.js.map

@@ -1 +1 @@
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+{"version":3,"file":"flopsF32Div.js","sourceRoot":"","sources":["../../src/shaders/flopsF32Div.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;GAUG;AACH,MAAM,CAAC,MAAM,eAAe,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA6DzC,CAAC"}

package/dist/shaders/flopsF32F16Convert.d.ts

@@ -3,9 +3,9 @@
  * `unpack2x16float` builtins (round each of a vec2<f32>'s lanes to fp16 and
  * back) — these don't need the `shader-f16` device feature, unlike the
  * flops-f16-* kernels which compute *in* f16. Eight independent vec2<f32>
- * lanes; each step: pack (1 op) + unpack (1 op) + a vec2 FMA to keep the
- * chain moving and bounded (4 ops: 2 muls + 2 adds) = 6 ops/lane/step,
- * unrolled 4x. 192 ops per loop iteration.
+ * chains, unrolled 4x; each step packs, unpacks, then a vec2 FMA keeps the
+ * chain moving and bounded. Counted as 2 ops per lane (one f32 -> f16
+ * convert and one back; the FMA is not counted): 128 ops per loop iteration.
  */
 export declare const flopsF32F16ConvertWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let a: vec2<f32> = vec2<f32>(0.97 + f32(idx & 15u) * 0.001);\n  let b: vec2<f32> = vec2<f32>(0.5 + f32(idx & 7u) * 0.001);\n  var x0: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.01);\n  var x1: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.02);\n  var x2: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.03);\n  var x3: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.04);\n  var x4: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.05);\n  var x5: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.06);\n  var x6: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.07);\n  var x7: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.08);\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = unpack2x16float(pack2x16float(x0)) * a + b;\n    x1 = unpack2x16float(pack2x16float(x1)) * a + b;\n    x2 = unpack2x16float(pack2x16float(x2)) * a + b;\n    x3 = unpack2x16float(pack2x16float(x3)) * a + b;\n    x4 = unpack2x16float(pack2x16float(x4)) * a + b;\n    x5 = unpack2x16float(pack2x16float(x5)) * a + b;\n    x6 = unpack2x16float(pack2x16float(x6)) * a + b;\n    x7 = unpack2x16float(pack2x16float(x7)) * a + b;\n    x0 = unpack2x16float(pack2x16float(x0)) * a + b;\n    x1 = unpack2x16float(pack2x16float(x1)) * a + b;\n    x2 = unpack2x16float(pack2x16float(x2)) * a + b;\n    x3 = unpack2x16float(pack2x16float(x3)) * a + b;\n    x4 = unpack2x16float(pack2x16float(x4)) * a + b;\n    x5 = unpack2x16float(pack2x16float(x5)) * a + b;\n    x6 = unpack2x16float(pack2x16float(x6)) * a + b;\n    x7 = unpack2x16float(pack2x16float(x7)) * a + b;\n    x0 = unpack2x16float(pack2x16float(x0)) * a + b;\n    x1 = unpack2x16float(pack2x16float(x1)) * a + b;\n    x2 = unpack2x16float(pack2x16float(x2)) * a + b;\n    x3 = unpack2x16float(pack2x16float(x3)) * a + b;\n    x4 = unpack2x16float(pack2x16float(x4)) * a + b;\n    x5 = unpack2x16float(pack2x16float(x5)) * a + b;\n    x6 = unpack2x16float(pack2x16float(x6)) * a + b;\n    x7 = unpack2x16float(pack2x16float(x7)) * a + b;\n    x0 = unpack2x16float(pack2x16float(x0)) * a + b;\n    x1 = unpack2x16float(pack2x16float(x1)) * a + b;\n    x2 = unpack2x16float(pack2x16float(x2)) * a + b;\n    x3 = unpack2x16float(pack2x16float(x3)) * a + b;\n    x4 = unpack2x16float(pack2x16float(x4)) * a + b;\n    x5 = unpack2x16float(pack2x16float(x5)) * a + b;\n    x6 = unpack2x16float(pack2x16float(x6)) * a + b;\n    x7 = unpack2x16float(pack2x16float(x7)) * a + b;\n  }\n  let s0 = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n  out[idx] = s0.x + s0.y;\n}\n";
 //# sourceMappingURL=flopsF32F16Convert.d.ts.map

package/dist/shaders/flopsF32F16Convert.js

@@ -3,9 +3,9 @@
  * `unpack2x16float` builtins (round each of a vec2<f32>'s lanes to fp16 and
  * back) — these don't need the `shader-f16` device feature, unlike the
  * flops-f16-* kernels which compute *in* f16. Eight independent vec2<f32>
- * lanes; each step: pack (1 op) + unpack (1 op) + a vec2 FMA to keep the
- * chain moving and bounded (4 ops: 2 muls + 2 adds) = 6 ops/lane/step,
- * unrolled 4x. 192 ops per loop iteration.
+ * chains, unrolled 4x; each step packs, unpacks, then a vec2 FMA keeps the
+ * chain moving and bounded. Counted as 2 ops per lane (one f32 -> f16
+ * convert and one back; the FMA is not counted): 128 ops per loop iteration.
  */
 export const flopsF32F16ConvertWgsl = /* wgsl */ `
 struct Params {

package/dist/shaders/flopsF32Vec4.d.ts

@@ -1,9 +1,11 @@
 /**
- * fp32 vec4 FLOPS probe: a single FMA chain held in a `vec4<f32>` register.
- * On scalar-SIMT GPUs (Apple, NVIDIA, AMD) this compiles to 4 independent
- * scalar FMAs per step, so it measures 4-wide instruction-level parallelism
- * rather than a wider ALU. Same runtime-derived operands/loop count as the
- * scalar probe to defeat constant folding.
+ * fp32 vec4 FLOPS probe: eight independent FMA chains, each held in a
+ * `vec4<f32>` register, unrolled 4x — the same chain/unroll shape as
+ * {@link flopsF32ScalarWgsl} so the two are directly comparable. (A single
+ * vec4 chain measured FMA latency, not throughput: 4x slower than scalar on
+ * an M3 purely from the missing ILP.) On scalar-SIMT GPUs each vec4 FMA is 4
+ * scalar FMAs. 8 chains x 4 unrolled x 4 lanes = 128 FMAs (256 FLOPs) per
+ * loop iteration.
  */
-export declare const flopsF32Vec4Wgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let s: f32 = f32(idx & 15u) * 0.001;\n  let a: vec4<f32> = vec4<f32>(1.0 - s, 1.0 - 2.0 * s, 1.0 - 3.0 * s, 1.0 - 4.0 * s);\n  let b: vec4<f32> = vec4<f32>(0.5 + s, 0.5 + 2.0 * s, 0.5 + 3.0 * s, 0.5 + 4.0 * s);\n  var x: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001);\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x = x * a + b;\n  }\n  out[idx] = x.x + x.y + x.z + x.w;\n}\n";
+export declare const flopsF32Vec4Wgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let s: f32 = f32(idx & 15u) * 0.001;\n  let a: vec4<f32> = vec4<f32>(1.0 - s, 1.0 - 2.0 * s, 1.0 - 3.0 * s, 1.0 - 4.0 * s);\n  let b: vec4<f32> = vec4<f32>(0.5 + s, 0.5 + 2.0 * s, 0.5 + 3.0 * s, 0.5 + 4.0 * s);\n  var x0: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.01);\n  var x1: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.02);\n  var x2: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.03);\n  var x3: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.04);\n  var x4: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.05);\n  var x5: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.06);\n  var x6: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.07);\n  var x7: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.08);\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n  }\n  let t = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n  out[idx] = t.x + t.y + t.z + t.w;\n}\n";
 //# sourceMappingURL=flopsF32Vec4.d.ts.map

package/dist/shaders/flopsF32Vec4.d.ts.map

@@ -1 +1 @@
-{"version":3,"file":"flopsF32Vec4.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Vec4.ts"],"names":[],"mappings":"AAAA;;;;;;GAMG;AACH,eAAO,MAAM,gBAAgB,wuBAwB5B,CAAC"}
+{"version":3,"file":"flopsF32Vec4.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Vec4.ts"],"names":[],"mappings":"AAAA;;;;;;;;GAQG;AACH,eAAO,MAAM,gBAAgB,m6DA+D5B,CAAC"}

package/dist/shaders/flopsF32Vec4.js

@@ -1,9 +1,11 @@
 /**
- * fp32 vec4 FLOPS probe: a single FMA chain held in a `vec4<f32>` register.
- * On scalar-SIMT GPUs (Apple, NVIDIA, AMD) this compiles to 4 independent
- * scalar FMAs per step, so it measures 4-wide instruction-level parallelism
- * rather than a wider ALU. Same runtime-derived operands/loop count as the
- * scalar probe to defeat constant folding.
+ * fp32 vec4 FLOPS probe: eight independent FMA chains, each held in a
+ * `vec4<f32>` register, unrolled 4x — the same chain/unroll shape as
+ * {@link flopsF32ScalarWgsl} so the two are directly comparable. (A single
+ * vec4 chain measured FMA latency, not throughput: 4x slower than scalar on
+ * an M3 purely from the missing ILP.) On scalar-SIMT GPUs each vec4 FMA is 4
+ * scalar FMAs. 8 chains x 4 unrolled x 4 lanes = 128 FMAs (256 FLOPs) per
+ * loop iteration.
  */
 export const flopsF32Vec4Wgsl = /* wgsl */ `
 struct Params {
@@ -23,11 +25,50 @@ fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
   let s: f32 = f32(idx & 15u) * 0.001;
   let a: vec4<f32> = vec4<f32>(1.0 - s, 1.0 - 2.0 * s, 1.0 - 3.0 * s, 1.0 - 4.0 * s);
   let b: vec4<f32> = vec4<f32>(0.5 + s, 0.5 + 2.0 * s, 0.5 + 3.0 * s, 0.5 + 4.0 * s);
-  var x: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001);
+  var x0: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.01);
+  var x1: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.02);
+  var x2: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.03);
+  var x3: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.04);
+  var x4: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.05);
+  var x5: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.06);
+  var x6: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.07);
+  var x7: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001 + 0.08);
   for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
-    x = x * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
   }
-  out[idx] = x.x + x.y + x.z + x.w;
+  let t = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;
+  out[idx] = t.x + t.y + t.z + t.w;
 }
 `;
 //# sourceMappingURL=flopsF32Vec4.js.map

package/dist/shaders/flopsF32Vec4.js.map

@@ -1 +1 @@
-{"version":3,"file":"flopsF32Vec4.js","sourceRoot":"","sources":["../../src/shaders/flopsF32Vec4.ts"],"names":[],"mappings":"AAAA;;;;;;GAMG;AACH,MAAM,CAAC,MAAM,gBAAgB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;CAwB1C,CAAC"}
+{"version":3,"file":"flopsF32Vec4.js","sourceRoot":"","sources":["../../src/shaders/flopsF32Vec4.ts"],"names":[],"mappings":"AAAA;;;;;;;;GAQG;AACH,MAAM,CAAC,MAAM,gBAAgB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA+D1C,CAAC"}

package/dist/shaders/flopsI32Div.d.ts

@@ -1,10 +1,12 @@
 /**
  * i32 divide-add ops probe. Same shape as {@link flopsI8ScalarWgsl} (eight
  * independent chains, unrolled 4x) but with the multiply replaced by integer
- * division: `x = x / a + b`. `a` is always >= 2 so each step shrinks `x`
- * (bounded, no overflow) and never divides by zero. 64 ops (32 divides + 32
+ * division: `x = a / x + b`. The divisor is the loop-carried value so the
+ * division can't be strength-reduced against a loop-invariant `a` (see
+ * flopsF32Div.ts). `x >= b >= 5` from the first step, so it never divides by
+ * zero and stays within `[b, a / b + b]`. 64 ops (32 divides + 32
  * adds) per loop iteration, same MAC-as-2 convention as the other scalar
  * probes.
  */
-export declare const flopsI32DivWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let a: i32 = 2 + i32(idx & 3u);\n  let b: i32 = 5 + i32(idx & 7u);\n  var x0: i32 = i32(idx & 255u) + 1000;\n  var x1: i32 = i32(idx & 255u) + 2000;\n  var x2: i32 = i32(idx & 255u) + 3000;\n  var x3: i32 = i32(idx & 255u) + 4000;\n  var x4: i32 = i32(idx & 255u) + 5000;\n  var x5: i32 = i32(idx & 255u) + 6000;\n  var x6: i32 = i32(idx & 255u) + 7000;\n  var x7: i32 = i32(idx & 255u) + 8000;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n  }\n  out[idx] = f32(x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7);\n}\n";
+export declare const flopsI32DivWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let a: i32 = 100003 + i32(idx & 255u) * 7;\n  let b: i32 = 5 + i32(idx & 7u);\n  var x0: i32 = i32(idx & 255u) + 1000;\n  var x1: i32 = i32(idx & 255u) + 2000;\n  var x2: i32 = i32(idx & 255u) + 3000;\n  var x3: i32 = i32(idx & 255u) + 4000;\n  var x4: i32 = i32(idx & 255u) + 5000;\n  var x5: i32 = i32(idx & 255u) + 6000;\n  var x6: i32 = i32(idx & 255u) + 7000;\n  var x7: i32 = i32(idx & 255u) + 8000;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = a / x0 + b;\n    x1 = a / x1 + b;\n    x2 = a / x2 + b;\n    x3 = a / x3 + b;\n    x4 = a / x4 + b;\n    x5 = a / x5 + b;\n    x6 = a / x6 + b;\n    x7 = a / x7 + b;\n    x0 = a / x0 + b;\n    x1 = a / x1 + b;\n    x2 = a / x2 + b;\n    x3 = a / x3 + b;\n    x4 = a / x4 + b;\n    x5 = a / x5 + b;\n    x6 = a / x6 + b;\n    x7 = a / x7 + b;\n    x0 = a / x0 + b;\n    x1 = a / x1 + b;\n    x2 = a / x2 + b;\n    x3 = a / x3 + b;\n    x4 = a / x4 + b;\n    x5 = a / x5 + b;\n    x6 = a / x6 + b;\n    x7 = a / x7 + b;\n    x0 = a / x0 + b;\n    x1 = a / x1 + b;\n    x2 = a / x2 + b;\n    x3 = a / x3 + b;\n    x4 = a / x4 + b;\n    x5 = a / x5 + b;\n    x6 = a / x6 + b;\n    x7 = a / x7 + b;\n  }\n  out[idx] = f32(x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7);\n}\n";
 //# sourceMappingURL=flopsI32Div.d.ts.map

package/dist/shaders/flopsI32Div.d.ts.map

@@ -1 +1 @@
-{"version":3,"file":"flopsI32Div.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsI32Div.ts"],"names":[],"mappings":"AAAA;;;;;;;GAOG;AACH,eAAO,MAAM,eAAe,siDA6D3B,CAAC"}
+{"version":3,"file":"flopsI32Div.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsI32Div.ts"],"names":[],"mappings":"AAAA;;;;;;;;;GASG;AACH,eAAO,MAAM,eAAe,ijDA6D3B,CAAC"}

package/dist/shaders/flopsI32Div.js

@@ -1,8 +1,10 @@
 /**
  * i32 divide-add ops probe. Same shape as {@link flopsI8ScalarWgsl} (eight
  * independent chains, unrolled 4x) but with the multiply replaced by integer
- * division: `x = x / a + b`. `a` is always >= 2 so each step shrinks `x`
- * (bounded, no overflow) and never divides by zero. 64 ops (32 divides + 32
+ * division: `x = a / x + b`. The divisor is the loop-carried value so the
+ * division can't be strength-reduced against a loop-invariant `a` (see
+ * flopsF32Div.ts). `x >= b >= 5` from the first step, so it never divides by
+ * zero and stays within `[b, a / b + b]`. 64 ops (32 divides + 32
  * adds) per loop iteration, same MAC-as-2 convention as the other scalar
  * probes.
  */
@@ -21,7 +23,7 @@ fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
   if (idx >= params.threads) {
     return;
   }
-  let a: i32 = 2 + i32(idx & 3u);
+  let a: i32 = 100003 + i32(idx & 255u) * 7;
   let b: i32 = 5 + i32(idx & 7u);
   var x0: i32 = i32(idx & 255u) + 1000;
   var x1: i32 = i32(idx & 255u) + 2000;
@@ -32,38 +34,38 @@ fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
   var x6: i32 = i32(idx & 255u) + 7000;
   var x7: i32 = i32(idx & 255u) + 8000;
   for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
-    x0 = x0 / a + b;
-    x1 = x1 / a + b;
-    x2 = x2 / a + b;
-    x3 = x3 / a + b;
-    x4 = x4 / a + b;
-    x5 = x5 / a + b;
-    x6 = x6 / a + b;
-    x7 = x7 / a + b;
-    x0 = x0 / a + b;
-    x1 = x1 / a + b;
-    x2 = x2 / a + b;
-    x3 = x3 / a + b;
-    x4 = x4 / a + b;
-    x5 = x5 / a + b;
-    x6 = x6 / a + b;
-    x7 = x7 / a + b;
-    x0 = x0 / a + b;
-    x1 = x1 / a + b;
-    x2 = x2 / a + b;
-    x3 = x3 / a + b;
-    x4 = x4 / a + b;
-    x5 = x5 / a + b;
-    x6 = x6 / a + b;
-    x7 = x7 / a + b;
-    x0 = x0 / a + b;
-    x1 = x1 / a + b;
-    x2 = x2 / a + b;
-    x3 = x3 / a + b;
-    x4 = x4 / a + b;
-    x5 = x5 / a + b;
-    x6 = x6 / a + b;
-    x7 = x7 / a + b;
+    x0 = a / x0 + b;
+    x1 = a / x1 + b;
+    x2 = a / x2 + b;
+    x3 = a / x3 + b;
+    x4 = a / x4 + b;
+    x5 = a / x5 + b;
+    x6 = a / x6 + b;
+    x7 = a / x7 + b;
+    x0 = a / x0 + b;
+    x1 = a / x1 + b;
+    x2 = a / x2 + b;
+    x3 = a / x3 + b;
+    x4 = a / x4 + b;
+    x5 = a / x5 + b;
+    x6 = a / x6 + b;
+    x7 = a / x7 + b;
+    x0 = a / x0 + b;
+    x1 = a / x1 + b;
+    x2 = a / x2 + b;
+    x3 = a / x3 + b;
+    x4 = a / x4 + b;
+    x5 = a / x5 + b;
+    x6 = a / x6 + b;
+    x7 = a / x7 + b;
+    x0 = a / x0 + b;
+    x1 = a / x1 + b;
+    x2 = a / x2 + b;
+    x3 = a / x3 + b;
+    x4 = a / x4 + b;
+    x5 = a / x5 + b;
+    x6 = a / x6 + b;
+    x7 = a / x7 + b;
   }
   out[idx] = f32(x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7);
 }

package/dist/shaders/flopsI32Div.js.map

@@ -1 +1 @@
-{"version":3,"file":"flopsI32Div.js","sourceRoot":"","sources":["../../src/shaders/flopsI32Div.ts"],"names":[],"mappings":"AAAA;;;;;;;GAOG;AACH,MAAM,CAAC,MAAM,eAAe,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA6DzC,CAAC"}
+{"version":3,"file":"flopsI32Div.js","sourceRoot":"","sources":["../../src/shaders/flopsI32Div.ts"],"names":[],"mappings":"AAAA;;;;;;;;;GASG;AACH,MAAM,CAAC,MAAM,eAAe,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA6DzC,CAAC"}

package/dist/shaders/flopsI32F32Convert.d.ts

@@ -3,8 +3,8 @@
  * but each step is `xf = f32(xi) * a + b; xi = i32(xf)`: two conversions
  * plus the same FMA as the fp32 scalar test, so the delta against that test
  * isolates conversion cost. `a` < 1 keeps the round-tripped integer bounded.
- * 128 ops (32 x [f32-convert, multiply, add, i32-convert]) per loop
- * iteration.
+ * Counted as 2 ops per lane step (one convert each way; the FMA is not
+ * counted): 64 ops per loop iteration.
  */
 export declare const flopsI32F32ConvertWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let a: f32 = 0.9 + f32(idx & 15u) * 0.005;\n  let b: f32 = 3.0 + f32(idx & 7u) * 0.1;\n  var x0: i32 = i32(idx & 255u) + 100;\n  var x1: i32 = i32(idx & 255u) + 200;\n  var x2: i32 = i32(idx & 255u) + 300;\n  var x3: i32 = i32(idx & 255u) + 400;\n  var x4: i32 = i32(idx & 255u) + 500;\n  var x5: i32 = i32(idx & 255u) + 600;\n  var x6: i32 = i32(idx & 255u) + 700;\n  var x7: i32 = i32(idx & 255u) + 800;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = i32(f32(x0) * a + b);\n    x1 = i32(f32(x1) * a + b);\n    x2 = i32(f32(x2) * a + b);\n    x3 = i32(f32(x3) * a + b);\n    x4 = i32(f32(x4) * a + b);\n    x5 = i32(f32(x5) * a + b);\n    x6 = i32(f32(x6) * a + b);\n    x7 = i32(f32(x7) * a + b);\n    x0 = i32(f32(x0) * a + b);\n    x1 = i32(f32(x1) * a + b);\n    x2 = i32(f32(x2) * a + b);\n    x3 = i32(f32(x3) * a + b);\n    x4 = i32(f32(x4) * a + b);\n    x5 = i32(f32(x5) * a + b);\n    x6 = i32(f32(x6) * a + b);\n    x7 = i32(f32(x7) * a + b);\n    x0 = i32(f32(x0) * a + b);\n    x1 = i32(f32(x1) * a + b);\n    x2 = i32(f32(x2) * a + b);\n    x3 = i32(f32(x3) * a + b);\n    x4 = i32(f32(x4) * a + b);\n    x5 = i32(f32(x5) * a + b);\n    x6 = i32(f32(x6) * a + b);\n    x7 = i32(f32(x7) * a + b);\n    x0 = i32(f32(x0) * a + b);\n    x1 = i32(f32(x1) * a + b);\n    x2 = i32(f32(x2) * a + b);\n    x3 = i32(f32(x3) * a + b);\n    x4 = i32(f32(x4) * a + b);\n    x5 = i32(f32(x5) * a + b);\n    x6 = i32(f32(x6) * a + b);\n    x7 = i32(f32(x7) * a + b);\n  }\n  out[idx] = f32(x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7);\n}\n";
 //# sourceMappingURL=flopsI32F32Convert.d.ts.map

package/dist/shaders/flopsI32F32Convert.js

@@ -3,8 +3,8 @@
  * but each step is `xf = f32(xi) * a + b; xi = i32(xf)`: two conversions
  * plus the same FMA as the fp32 scalar test, so the delta against that test
  * isolates conversion cost. `a` < 1 keeps the round-tripped integer bounded.
- * 128 ops (32 x [f32-convert, multiply, add, i32-convert]) per loop
- * iteration.
+ * Counted as 2 ops per lane step (one convert each way; the FMA is not
+ * counted): 64 ops per loop iteration.
  */
 export const flopsI32F32ConvertWgsl = /* wgsl */ `
 struct Params {

package/dist/shaders/flopsI8Dp4a.d.ts

@@ -2,14 +2,17 @@
  * int8 packed-dot-product FLOPS probe: uses the `packed_4x8_integer_dot_product`
  * extension's `dot4I8Packed` builtin directly (two u32s, each four packed
  * signed int8 lanes, one instruction) in a tight accumulation loop, to
- * isolate the instruction's peak throughput. `a` is fed back from the
- * running accumulator every iteration (not just `idx`-derived and fixed),
- * so `dot4I8Packed(a, b)` is genuinely loop-carried — a compiler that
+ * isolate the instruction's peak throughput. Eight independent accumulators
+ * per thread so the number is throughput, not the latency of one dependent
+ * chain. Each `a` is fed back from its own running accumulator every
+ * iteration (not just `idx`-derived and fixed), so `dot4I8Packed(a, b)` is
+ * genuinely loop-carried — a compiler that
  * noticed `a`/`b` were loop-invariant could otherwise hoist the call out of
  * the loop and replace all `iterations` of it with one call + a multiply,
  * which is exactly what happened before this fix (the loop collapsed to
  * ~free, and the dispatch finished faster than the timestamp-query clock's
- * resolution, reading back as a literal 0ns elapsed).
+ * resolution, reading back as a literal 0ns elapsed). 8 dots x 4 MACs =
+ * 64 ops per loop iteration.
  *
  * `packed_4x8_integer_dot_product` is a WGSL *language extension* (gated by
  * `navigator.gpu.wgslLanguageFeatures`, checked as `ctx.info.supportsI8Dot`
@@ -19,5 +22,5 @@
  * 'f16', or 'primitive_index'" — the compiler listing valid enable-extension
  * names), which used to go undetected and read back as a silent 0ns result.
  */
-export declare const flopsI8Dp4aWgsl = "\nrequires packed_4x8_integer_dot_product;\n\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let b: u32 = 0x05060708u ^ (idx * 0x85ebca6bu);\n  var a: u32 = 0x01020304u ^ (idx * 0x9e3779b1u);\n  var acc: i32 = i32(idx & 255u);\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    acc = acc + dot4I8Packed(a, b);\n    a = a ^ u32(acc);\n  }\n  out[idx] = f32(acc);\n}\n";
+export declare const flopsI8Dp4aWgsl = "\nrequires packed_4x8_integer_dot_product;\n\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let b: u32 = 0x05060708u ^ (idx * 0x85ebca6bu);\n  var a0: u32 = 0x01020300u ^ (idx * 0x9e3779b1u);\n  var acc0: i32 = i32(idx & 255u) + 0;\n  var a1: u32 = 0x01020301u ^ (idx * 0x9e3779b1u);\n  var acc1: i32 = i32(idx & 255u) + 1;\n  var a2: u32 = 0x01020302u ^ (idx * 0x9e3779b1u);\n  var acc2: i32 = i32(idx & 255u) + 2;\n  var a3: u32 = 0x01020303u ^ (idx * 0x9e3779b1u);\n  var acc3: i32 = i32(idx & 255u) + 3;\n  var a4: u32 = 0x01020304u ^ (idx * 0x9e3779b1u);\n  var acc4: i32 = i32(idx & 255u) + 4;\n  var a5: u32 = 0x01020305u ^ (idx * 0x9e3779b1u);\n  var acc5: i32 = i32(idx & 255u) + 5;\n  var a6: u32 = 0x01020306u ^ (idx * 0x9e3779b1u);\n  var acc6: i32 = i32(idx & 255u) + 6;\n  var a7: u32 = 0x01020307u ^ (idx * 0x9e3779b1u);\n  var acc7: i32 = i32(idx & 255u) + 7;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    acc0 = acc0 + dot4I8Packed(a0, b);\n    a0 = a0 ^ u32(acc0);\n    acc1 = acc1 + dot4I8Packed(a1, b);\n    a1 = a1 ^ u32(acc1);\n    acc2 = acc2 + dot4I8Packed(a2, b);\n    a2 = a2 ^ u32(acc2);\n    acc3 = acc3 + dot4I8Packed(a3, b);\n    a3 = a3 ^ u32(acc3);\n    acc4 = acc4 + dot4I8Packed(a4, b);\n    a4 = a4 ^ u32(acc4);\n    acc5 = acc5 + dot4I8Packed(a5, b);\n    a5 = a5 ^ u32(acc5);\n    acc6 = acc6 + dot4I8Packed(a6, b);\n    a6 = a6 ^ u32(acc6);\n    acc7 = acc7 + dot4I8Packed(a7, b);\n    a7 = a7 ^ u32(acc7);\n  }\n  out[idx] = f32(acc0 + acc1 + acc2 + acc3 + acc4 + acc5 + acc6 + acc7);\n}\n";
 //# sourceMappingURL=flopsI8Dp4a.d.ts.map

package/dist/shaders/flopsI8Dp4a.d.ts.map

@@ -1 +1 @@
-{"version":3,"file":"flopsI8Dp4a.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsI8Dp4a.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;;;;;;;;;;GAoBG;AACH,eAAO,MAAM,eAAe,uqBA0B3B,CAAC"}
+{"version":3,"file":"flopsI8Dp4a.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsI8Dp4a.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;;;;;;;;;;;;;GAuBG;AACH,eAAO,MAAM,eAAe,uzDAsD3B,CAAC"}