webgpu-bench 0.1.0

package/dist/shaders/flopsI8Dp4a.js

@@ -0,0 +1,49 @@
+/**
+ * int8 packed-dot-product FLOPS probe: uses the `packed_4x8_integer_dot_product`
+ * extension's `dot4I8Packed` builtin directly (two u32s, each four packed
+ * signed int8 lanes, one instruction) in a tight accumulation loop, to
+ * isolate the instruction's peak throughput. `a` is fed back from the
+ * running accumulator every iteration (not just `idx`-derived and fixed),
+ * so `dot4I8Packed(a, b)` is genuinely loop-carried — a compiler that
+ * noticed `a`/`b` were loop-invariant could otherwise hoist the call out of
+ * the loop and replace all `iterations` of it with one call + a multiply,
+ * which is exactly what happened before this fix (the loop collapsed to
+ * ~free, and the dispatch finished faster than the timestamp-query clock's
+ * resolution, reading back as a literal 0ns elapsed).
+ *
+ * `packed_4x8_integer_dot_product` is a WGSL *language extension* (gated by
+ * `navigator.gpu.wgslLanguageFeatures`, checked as `ctx.info.supportsI8Dot`
+ * in flopsCommon.ts), not an enable-extension tied to a GPUFeatureName like
+ * `f16` — so it's opted into with the `requires` directive, not `enable`.
+ * Using `enable` here fails shader compilation ("Expected 'clip_distances',
+ * 'f16', or 'primitive_index'" — the compiler listing valid enable-extension
+ * names), which used to go undetected and read back as a silent 0ns result.
+ */
+export const flopsI8Dp4aWgsl = /* wgsl */ `
+requires packed_4x8_integer_dot_product;
+
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let b: u32 = 0x05060708u ^ (idx * 0x85ebca6bu);
+  var a: u32 = 0x01020304u ^ (idx * 0x9e3779b1u);
+  var acc: i32 = i32(idx & 255u);
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    acc = acc + dot4I8Packed(a, b);
+    a = a ^ u32(acc);
+  }
+  out[idx] = f32(acc);
+}
+`;
+//# sourceMappingURL=flopsI8Dp4a.js.map

package/dist/shaders/flopsI8Dp4a.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8Dp4a.js","sourceRoot":"","sources":["../../src/shaders/flopsI8Dp4a.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;;;;;;;;;;GAoBG;AACH,MAAM,CAAC,MAAM,eAAe,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;CA0BzC,CAAC"}

package/dist/shaders/flopsI8Mat4.d.ts

@@ -0,0 +1,9 @@
+/**
+ * int8-range mat4 FLOPS probe. WGSL has no `mat4x4<i32>` type (matrices
+ * are f32/f16-only), so the 4x4 integer matrix is emulated as four
+ * `vec4<i32>` rows and the matvec is built from `dot()` (which WGSL defines
+ * for integer vectors too) — the same 4 dot-products + write pattern a
+ * real int4x4 * int4 multiply would compile down to.
+ */
+export declare const flopsI8Mat4Wgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  // Every matrix entry is runtime-derived: a literal 1 here would let the\n  // compiler fold 1 * x away and skip three quarters of the multiplies.\n  let s: i32 = i32(idx & 15u) + 1;\n  let t: i32 = i32((idx >> 4u) & 15u) + 2;\n  let u: i32 = i32((idx >> 8u) & 15u) + 3;\n  let v: i32 = i32((idx >> 12u) & 15u) + 4;\n  let m0: vec4<i32> = vec4<i32>(s, t, u, v);\n  let m1: vec4<i32> = vec4<i32>(v, s, t, u);\n  let m2: vec4<i32> = vec4<i32>(u, v, s, t);\n  let m3: vec4<i32> = vec4<i32>(t, u, v, s);\n  let c: vec4<i32> = vec4<i32>(s, t, u, v);\n  var x: vec4<i32> = vec4<i32>(i32(idx & 255u));\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x = vec4<i32>(dot(m0, x), dot(m1, x), dot(m2, x), dot(m3, x)) + c;\n  }\n  out[idx] = f32(x.x + x.y + x.z + x.w);\n}\n";
+//# sourceMappingURL=flopsI8Mat4.d.ts.map

package/dist/shaders/flopsI8Mat4.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8Mat4.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsI8Mat4.ts"],"names":[],"mappings":"AAAA;;;;;;GAMG;AACH,eAAO,MAAM,eAAe,smCAgC3B,CAAC"}

package/dist/shaders/flopsI8Mat4.js

@@ -0,0 +1,41 @@
+/**
+ * int8-range mat4 FLOPS probe. WGSL has no `mat4x4<i32>` type (matrices
+ * are f32/f16-only), so the 4x4 integer matrix is emulated as four
+ * `vec4<i32>` rows and the matvec is built from `dot()` (which WGSL defines
+ * for integer vectors too) — the same 4 dot-products + write pattern a
+ * real int4x4 * int4 multiply would compile down to.
+ */
+export const flopsI8Mat4Wgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  // Every matrix entry is runtime-derived: a literal 1 here would let the
+  // compiler fold 1 * x away and skip three quarters of the multiplies.
+  let s: i32 = i32(idx & 15u) + 1;
+  let t: i32 = i32((idx >> 4u) & 15u) + 2;
+  let u: i32 = i32((idx >> 8u) & 15u) + 3;
+  let v: i32 = i32((idx >> 12u) & 15u) + 4;
+  let m0: vec4<i32> = vec4<i32>(s, t, u, v);
+  let m1: vec4<i32> = vec4<i32>(v, s, t, u);
+  let m2: vec4<i32> = vec4<i32>(u, v, s, t);
+  let m3: vec4<i32> = vec4<i32>(t, u, v, s);
+  let c: vec4<i32> = vec4<i32>(s, t, u, v);
+  var x: vec4<i32> = vec4<i32>(i32(idx & 255u));
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    x = vec4<i32>(dot(m0, x), dot(m1, x), dot(m2, x), dot(m3, x)) + c;
+  }
+  out[idx] = f32(x.x + x.y + x.z + x.w);
+}
+`;
+//# sourceMappingURL=flopsI8Mat4.js.map

package/dist/shaders/flopsI8Mat4.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8Mat4.js","sourceRoot":"","sources":["../../src/shaders/flopsI8Mat4.ts"],"names":[],"mappings":"AAAA;;;;;;GAMG;AACH,MAAM,CAAC,MAAM,eAAe,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CAgCzC,CAAC"}

package/dist/shaders/flopsI8Matvec.d.ts

@@ -0,0 +1,16 @@
+/**
+ * Register-resident matvec tile, int8-range weights unpacked to i32: a 4-row x 8-column weight tile held in
+ * registers (8 x vec4<i32>, hashed from the thread id so every thread has a
+ * different tile), applied to an 8-wide input vector every iteration. Each
+ * output row is two 4-wide integer dot() calls; the 4 outputs then become the next
+ * 4 input lanes (the other 4 shift over), so the loop is genuinely
+ * loop-carried and can't be hoisted. This is the same dot-product-and-
+ * accumulate shape as a real matvec/GEMV inner loop, but with no storage
+ * buffer traffic at all: it isolates how fast this dtype's dot products run
+ * on the ALU once bandwidth is out of the picture. 32 MACs (64 FLOPs) per
+ * loop iteration.
+ * The outputs are shifted back down into int8 range before being fed back
+ * (integer wraparound keeps it bounded regardless).
+ */
+export declare const flopsI8MatvecWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n// Hashes a seed into four int8-range weights, held unpacked as a vec4<i32>\n// (what a dequantize-on-load kernel holds after unpack4xI8).\nfn weights(seed: u32) -> vec4<i32> {\n  return unpack4xI8(seed * 0x9e3779b1u);\n}\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let w00: vec4<i32> = weights(idx * 8u + 1u);\n  let w01: vec4<i32> = weights(idx * 8u + 2u);\n  let w10: vec4<i32> = weights(idx * 8u + 3u);\n  let w11: vec4<i32> = weights(idx * 8u + 4u);\n  let w20: vec4<i32> = weights(idx * 8u + 5u);\n  let w21: vec4<i32> = weights(idx * 8u + 6u);\n  let w30: vec4<i32> = weights(idx * 8u + 7u);\n  let w31: vec4<i32> = weights(idx * 8u + 8u);\n  var x0: vec4<i32> = vec4<i32>(i32(idx & 255u) + 1, 2, 3, 4);\n  var x1: vec4<i32> = vec4<i32>(i32(idx & 255u) + 2, 4, 6, 8);\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    let o0 = dot(w00, x0) + dot(w01, x1);\n    let o1 = dot(w10, x0) + dot(w11, x1);\n    let o2 = dot(w20, x0) + dot(w21, x1);\n    let o3 = dot(w30, x0) + dot(w31, x1);\n    x0 = x1;\n    x1 = vec4<i32>(o0, o1, o2, o3) >> vec4<u32>(4u);\n  }\n  out[idx] = f32(x0.x + x0.y + x0.z + x0.w + x1.x + x1.y + x1.z + x1.w);\n}\n";
+//# sourceMappingURL=flopsI8Matvec.d.ts.map

package/dist/shaders/flopsI8Matvec.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8Matvec.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsI8Matvec.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;;;GAaG;AACH,eAAO,MAAM,iBAAiB,y7CAyC7B,CAAC"}

package/dist/shaders/flopsI8Matvec.js

@@ -0,0 +1,57 @@
+/**
+ * Register-resident matvec tile, int8-range weights unpacked to i32: a 4-row x 8-column weight tile held in
+ * registers (8 x vec4<i32>, hashed from the thread id so every thread has a
+ * different tile), applied to an 8-wide input vector every iteration. Each
+ * output row is two 4-wide integer dot() calls; the 4 outputs then become the next
+ * 4 input lanes (the other 4 shift over), so the loop is genuinely
+ * loop-carried and can't be hoisted. This is the same dot-product-and-
+ * accumulate shape as a real matvec/GEMV inner loop, but with no storage
+ * buffer traffic at all: it isolates how fast this dtype's dot products run
+ * on the ALU once bandwidth is out of the picture. 32 MACs (64 FLOPs) per
+ * loop iteration.
+ * The outputs are shifted back down into int8 range before being fed back
+ * (integer wraparound keeps it bounded regardless).
+ */
+export const flopsI8MatvecWgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+// Hashes a seed into four int8-range weights, held unpacked as a vec4<i32>
+// (what a dequantize-on-load kernel holds after unpack4xI8).
+fn weights(seed: u32) -> vec4<i32> {
+  return unpack4xI8(seed * 0x9e3779b1u);
+}
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let w00: vec4<i32> = weights(idx * 8u + 1u);
+  let w01: vec4<i32> = weights(idx * 8u + 2u);
+  let w10: vec4<i32> = weights(idx * 8u + 3u);
+  let w11: vec4<i32> = weights(idx * 8u + 4u);
+  let w20: vec4<i32> = weights(idx * 8u + 5u);
+  let w21: vec4<i32> = weights(idx * 8u + 6u);
+  let w30: vec4<i32> = weights(idx * 8u + 7u);
+  let w31: vec4<i32> = weights(idx * 8u + 8u);
+  var x0: vec4<i32> = vec4<i32>(i32(idx & 255u) + 1, 2, 3, 4);
+  var x1: vec4<i32> = vec4<i32>(i32(idx & 255u) + 2, 4, 6, 8);
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    let o0 = dot(w00, x0) + dot(w01, x1);
+    let o1 = dot(w10, x0) + dot(w11, x1);
+    let o2 = dot(w20, x0) + dot(w21, x1);
+    let o3 = dot(w30, x0) + dot(w31, x1);
+    x0 = x1;
+    x1 = vec4<i32>(o0, o1, o2, o3) >> vec4<u32>(4u);
+  }
+  out[idx] = f32(x0.x + x0.y + x0.z + x0.w + x1.x + x1.y + x1.z + x1.w);
+}
+`;
+//# sourceMappingURL=flopsI8Matvec.js.map

package/dist/shaders/flopsI8Matvec.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8Matvec.js","sourceRoot":"","sources":["../../src/shaders/flopsI8Matvec.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;;;GAaG;AACH,MAAM,CAAC,MAAM,iBAAiB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CAyC3C,CAAC"}

package/dist/shaders/flopsI8MatvecDp4a.d.ts

@@ -0,0 +1,17 @@
+/**
+ * Register-resident matvec tile, packed int8: a 4-row x 8-column weight tile held in
+ * registers (8 x u32 (4 packed int8 lanes each), hashed from the thread id so every thread has a
+ * different tile), applied to an 8-wide input vector every iteration. Each
+ * output row is two 4-wide dot4I8Packed() calls; the 4 outputs then become the next
+ * 4 input lanes (the other 4 shift over), so the loop is genuinely
+ * loop-carried and can't be hoisted. This is the same dot-product-and-
+ * accumulate shape as a real matvec/GEMV inner loop, but with no storage
+ * buffer traffic at all: it isolates how fast this dtype's dot products run
+ * on the ALU once bandwidth is out of the picture. 32 MACs (64 FLOPs) per
+ * loop iteration.
+ * Uses the packed_4x8_integer_dot_product WGSL language extension (opted in
+ * with `requires`, see flopsI8Dp4a.ts); the 4 outputs are
+ * shifted down and re-packed with pack4xI8 to form the next input word.
+ */
+export declare const flopsI8MatvecDp4aWgsl = "\nrequires packed_4x8_integer_dot_product;\n\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n// Hashes a seed into a u32 holding four packed int8 weights, exactly the\n// storage format dot4I8Packed consumes.\nfn weights(seed: u32) -> u32 {\n  return seed * 0x9e3779b1u;\n}\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let w00: u32 = weights(idx * 8u + 1u);\n  let w01: u32 = weights(idx * 8u + 2u);\n  let w10: u32 = weights(idx * 8u + 3u);\n  let w11: u32 = weights(idx * 8u + 4u);\n  let w20: u32 = weights(idx * 8u + 5u);\n  let w21: u32 = weights(idx * 8u + 6u);\n  let w30: u32 = weights(idx * 8u + 7u);\n  let w31: u32 = weights(idx * 8u + 8u);\n  var x0: u32 = (idx * 0x85ebca6bu) ^ 0x01020304u;\n  var x1: u32 = (idx * 0x85ebca6bu) ^ 0x02040608u;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    let o0 = dot4I8Packed(w00, x0) + dot4I8Packed(w01, x1);\n    let o1 = dot4I8Packed(w10, x0) + dot4I8Packed(w11, x1);\n    let o2 = dot4I8Packed(w20, x0) + dot4I8Packed(w21, x1);\n    let o3 = dot4I8Packed(w30, x0) + dot4I8Packed(w31, x1);\n    x0 = x1;\n    x1 = pack4xI8(vec4<i32>(o0, o1, o2, o3) >> vec4<u32>(4u));\n  }\n  out[idx] = f32(i32(x0) + i32(x1));\n}\n";
+//# sourceMappingURL=flopsI8MatvecDp4a.d.ts.map

package/dist/shaders/flopsI8MatvecDp4a.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8MatvecDp4a.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsI8MatvecDp4a.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;;;;GAcG;AACH,eAAO,MAAM,qBAAqB,k6CA2CjC,CAAC"}

package/dist/shaders/flopsI8MatvecDp4a.js

@@ -0,0 +1,60 @@
+/**
+ * Register-resident matvec tile, packed int8: a 4-row x 8-column weight tile held in
+ * registers (8 x u32 (4 packed int8 lanes each), hashed from the thread id so every thread has a
+ * different tile), applied to an 8-wide input vector every iteration. Each
+ * output row is two 4-wide dot4I8Packed() calls; the 4 outputs then become the next
+ * 4 input lanes (the other 4 shift over), so the loop is genuinely
+ * loop-carried and can't be hoisted. This is the same dot-product-and-
+ * accumulate shape as a real matvec/GEMV inner loop, but with no storage
+ * buffer traffic at all: it isolates how fast this dtype's dot products run
+ * on the ALU once bandwidth is out of the picture. 32 MACs (64 FLOPs) per
+ * loop iteration.
+ * Uses the packed_4x8_integer_dot_product WGSL language extension (opted in
+ * with `requires`, see flopsI8Dp4a.ts); the 4 outputs are
+ * shifted down and re-packed with pack4xI8 to form the next input word.
+ */
+export const flopsI8MatvecDp4aWgsl = /* wgsl */ `
+requires packed_4x8_integer_dot_product;
+
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+// Hashes a seed into a u32 holding four packed int8 weights, exactly the
+// storage format dot4I8Packed consumes.
+fn weights(seed: u32) -> u32 {
+  return seed * 0x9e3779b1u;
+}
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let w00: u32 = weights(idx * 8u + 1u);
+  let w01: u32 = weights(idx * 8u + 2u);
+  let w10: u32 = weights(idx * 8u + 3u);
+  let w11: u32 = weights(idx * 8u + 4u);
+  let w20: u32 = weights(idx * 8u + 5u);
+  let w21: u32 = weights(idx * 8u + 6u);
+  let w30: u32 = weights(idx * 8u + 7u);
+  let w31: u32 = weights(idx * 8u + 8u);
+  var x0: u32 = (idx * 0x85ebca6bu) ^ 0x01020304u;
+  var x1: u32 = (idx * 0x85ebca6bu) ^ 0x02040608u;
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    let o0 = dot4I8Packed(w00, x0) + dot4I8Packed(w01, x1);
+    let o1 = dot4I8Packed(w10, x0) + dot4I8Packed(w11, x1);
+    let o2 = dot4I8Packed(w20, x0) + dot4I8Packed(w21, x1);
+    let o3 = dot4I8Packed(w30, x0) + dot4I8Packed(w31, x1);
+    x0 = x1;
+    x1 = pack4xI8(vec4<i32>(o0, o1, o2, o3) >> vec4<u32>(4u));
+  }
+  out[idx] = f32(i32(x0) + i32(x1));
+}
+`;
+//# sourceMappingURL=flopsI8MatvecDp4a.js.map

package/dist/shaders/flopsI8MatvecDp4a.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8MatvecDp4a.js","sourceRoot":"","sources":["../../src/shaders/flopsI8MatvecDp4a.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;;;;GAcG;AACH,MAAM,CAAC,MAAM,qBAAqB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA2C/C,CAAC"}

package/dist/shaders/flopsI8Scalar.d.ts

@@ -0,0 +1,9 @@
+/**
+ * Raw int8-range FLOPS probe — same shape as {@link flopsF32ScalarWgsl}
+ * (eight independent chains, unrolled 4x), but on `i32` (WGSL has no
+ * first-class i8 type outside the packed-dot-product extension). Integer
+ * overflow wraps (defined two's-complement behavior in WGSL), so the chains
+ * stay bounded for any iteration count. 64 integer ops per loop iteration.
+ */
+export declare const flopsI8ScalarWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let a: i32 = 3 + i32(idx & 15u);\n  let b: i32 = 5 + i32(idx & 7u);\n  var x0: i32 = i32(idx & 255u) + 1;\n  var x1: i32 = i32(idx & 255u) + 2;\n  var x2: i32 = i32(idx & 255u) + 3;\n  var x3: i32 = i32(idx & 255u) + 4;\n  var x4: i32 = i32(idx & 255u) + 5;\n  var x5: i32 = i32(idx & 255u) + 6;\n  var x6: i32 = i32(idx & 255u) + 7;\n  var x7: i32 = i32(idx & 255u) + 8;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n  }\n  out[idx] = f32(x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7);\n}\n";
+//# sourceMappingURL=flopsI8Scalar.d.ts.map

package/dist/shaders/flopsI8Scalar.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8Scalar.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsI8Scalar.ts"],"names":[],"mappings":"AAAA;;;;;;GAMG;AACH,eAAO,MAAM,iBAAiB,+gDA6D7B,CAAC"}

package/dist/shaders/flopsI8Scalar.js

@@ -0,0 +1,70 @@
+/**
+ * Raw int8-range FLOPS probe — same shape as {@link flopsF32ScalarWgsl}
+ * (eight independent chains, unrolled 4x), but on `i32` (WGSL has no
+ * first-class i8 type outside the packed-dot-product extension). Integer
+ * overflow wraps (defined two's-complement behavior in WGSL), so the chains
+ * stay bounded for any iteration count. 64 integer ops per loop iteration.
+ */
+export const flopsI8ScalarWgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let a: i32 = 3 + i32(idx & 15u);
+  let b: i32 = 5 + i32(idx & 7u);
+  var x0: i32 = i32(idx & 255u) + 1;
+  var x1: i32 = i32(idx & 255u) + 2;
+  var x2: i32 = i32(idx & 255u) + 3;
+  var x3: i32 = i32(idx & 255u) + 4;
+  var x4: i32 = i32(idx & 255u) + 5;
+  var x5: i32 = i32(idx & 255u) + 6;
+  var x6: i32 = i32(idx & 255u) + 7;
+  var x7: i32 = i32(idx & 255u) + 8;
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
+    x0 = x0 * a + b;
+    x1 = x1 * a + b;
+    x2 = x2 * a + b;
+    x3 = x3 * a + b;
+    x4 = x4 * a + b;
+    x5 = x5 * a + b;
+    x6 = x6 * a + b;
+    x7 = x7 * a + b;
+  }
+  out[idx] = f32(x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7);
+}
+`;
+//# sourceMappingURL=flopsI8Scalar.js.map

package/dist/shaders/flopsI8Scalar.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8Scalar.js","sourceRoot":"","sources":["../../src/shaders/flopsI8Scalar.ts"],"names":[],"mappings":"AAAA;;;;;;GAMG;AACH,MAAM,CAAC,MAAM,iBAAiB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA6D3C,CAAC"}

package/dist/shaders/flopsI8Vec4.d.ts

@@ -0,0 +1,7 @@
+/**
+ * int8-range vec4 FLOPS probe: a single integer FMA chain held in a
+ * `vec4<i32>` register (4 independent lanes per step; see the fp32 vec4
+ * probe for why this is ILP, not SIMD, on most GPUs).
+ */
+export declare const flopsI8Vec4Wgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let s: i32 = i32(idx & 15u);\n  let a: vec4<i32> = vec4<i32>(3 + s, 5 + s, 7 + s, 9 + s);\n  let b: vec4<i32> = vec4<i32>(11 - s, 13 - s, 17 - s, 19 - s);\n  var x: vec4<i32> = vec4<i32>(i32(idx & 255u));\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x = x * a + b;\n  }\n  out[idx] = f32(x.x + x.y + x.z + x.w);\n}\n";
+//# sourceMappingURL=flopsI8Vec4.d.ts.map

package/dist/shaders/flopsI8Vec4.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8Vec4.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsI8Vec4.ts"],"names":[],"mappings":"AAAA;;;;GAIG;AACH,eAAO,MAAM,eAAe,4qBAwB3B,CAAC"}

package/dist/shaders/flopsI8Vec4.js

@@ -0,0 +1,31 @@
+/**
+ * int8-range vec4 FLOPS probe: a single integer FMA chain held in a
+ * `vec4<i32>` register (4 independent lanes per step; see the fp32 vec4
+ * probe for why this is ILP, not SIMD, on most GPUs).
+ */
+export const flopsI8Vec4Wgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let s: i32 = i32(idx & 15u);
+  let a: vec4<i32> = vec4<i32>(3 + s, 5 + s, 7 + s, 9 + s);
+  let b: vec4<i32> = vec4<i32>(11 - s, 13 - s, 17 - s, 19 - s);
+  var x: vec4<i32> = vec4<i32>(i32(idx & 255u));
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    x = x * a + b;
+  }
+  out[idx] = f32(x.x + x.y + x.z + x.w);
+}
+`;
+//# sourceMappingURL=flopsI8Vec4.js.map

package/dist/shaders/flopsI8Vec4.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsI8Vec4.js","sourceRoot":"","sources":["../../src/shaders/flopsI8Vec4.ts"],"names":[],"mappings":"AAAA;;;;GAIG;AACH,MAAM,CAAC,MAAM,eAAe,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;CAwBzC,CAAC"}

package/dist/shaders/flopsU32PackUnpack.d.ts

@@ -0,0 +1,11 @@
+/**
+ * Manual byte pack/unpack ops probe: no `pack4x*` (or `unpack4x*`) builtin, just
+ * the shift+mask bit-twiddling those builtins compile to, so this measures
+ * the raw integer ALU/shifter cost of doing it by hand. Eight independent
+ * u32 lanes, each per step: unpack 4 bytes (4 mask + 3 shift = 7 ops),
+ * increment+wrap each byte (4 add + 4 mask = 8 ops), repack (4 mask + 3
+ * shift + 3 or = 10 ops) = 25 ops/lane/step, no unrolling (each step is
+ * already many instructions deep). 200 ops per loop iteration.
+ */
+export declare const flopsU32PackUnpackWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\nfn unpack4(v: u32) -> vec4<u32> {\n  return vec4<u32>(v & 0xFFu, (v >> 8u) & 0xFFu, (v >> 16u) & 0xFFu, (v >> 24u) & 0xFFu);\n}\n\nfn pack4(b: vec4<u32>) -> u32 {\n  return (b.x & 0xFFu) | ((b.y & 0xFFu) << 8u) | ((b.z & 0xFFu) << 16u) | ((b.w & 0xFFu) << 24u);\n}\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  var v0: u32 = idx * 2654435761u;\n  var v1: u32 = (idx + 1u) * 2654435761u;\n  var v2: u32 = (idx + 2u) * 2654435761u;\n  var v3: u32 = (idx + 3u) * 2654435761u;\n  var v4: u32 = (idx + 4u) * 2654435761u;\n  var v5: u32 = (idx + 5u) * 2654435761u;\n  var v6: u32 = (idx + 6u) * 2654435761u;\n  var v7: u32 = (idx + 7u) * 2654435761u;\n  let one = vec4<u32>(1u);\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    v0 = pack4((unpack4(v0) + one) & vec4<u32>(0xFFu));\n    v1 = pack4((unpack4(v1) + one) & vec4<u32>(0xFFu));\n    v2 = pack4((unpack4(v2) + one) & vec4<u32>(0xFFu));\n    v3 = pack4((unpack4(v3) + one) & vec4<u32>(0xFFu));\n    v4 = pack4((unpack4(v4) + one) & vec4<u32>(0xFFu));\n    v5 = pack4((unpack4(v5) + one) & vec4<u32>(0xFFu));\n    v6 = pack4((unpack4(v6) + one) & vec4<u32>(0xFFu));\n    v7 = pack4((unpack4(v7) + one) & vec4<u32>(0xFFu));\n  }\n  out[idx] = f32(v0 ^ v1 ^ v2 ^ v3 ^ v4 ^ v5 ^ v6 ^ v7);\n}\n";
+//# sourceMappingURL=flopsU32PackUnpack.d.ts.map

package/dist/shaders/flopsU32PackUnpack.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsU32PackUnpack.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsU32PackUnpack.ts"],"names":[],"mappings":"AAAA;;;;;;;;GAQG;AACH,eAAO,MAAM,sBAAsB,yhDA4ClC,CAAC"}

package/dist/shaders/flopsU32PackUnpack.js

@@ -0,0 +1,55 @@
+/**
+ * Manual byte pack/unpack ops probe: no `pack4x*` (or `unpack4x*`) builtin, just
+ * the shift+mask bit-twiddling those builtins compile to, so this measures
+ * the raw integer ALU/shifter cost of doing it by hand. Eight independent
+ * u32 lanes, each per step: unpack 4 bytes (4 mask + 3 shift = 7 ops),
+ * increment+wrap each byte (4 add + 4 mask = 8 ops), repack (4 mask + 3
+ * shift + 3 or = 10 ops) = 25 ops/lane/step, no unrolling (each step is
+ * already many instructions deep). 200 ops per loop iteration.
+ */
+export const flopsU32PackUnpackWgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+fn unpack4(v: u32) -> vec4<u32> {
+  return vec4<u32>(v & 0xFFu, (v >> 8u) & 0xFFu, (v >> 16u) & 0xFFu, (v >> 24u) & 0xFFu);
+}
+
+fn pack4(b: vec4<u32>) -> u32 {
+  return (b.x & 0xFFu) | ((b.y & 0xFFu) << 8u) | ((b.z & 0xFFu) << 16u) | ((b.w & 0xFFu) << 24u);
+}
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  var v0: u32 = idx * 2654435761u;
+  var v1: u32 = (idx + 1u) * 2654435761u;
+  var v2: u32 = (idx + 2u) * 2654435761u;
+  var v3: u32 = (idx + 3u) * 2654435761u;
+  var v4: u32 = (idx + 4u) * 2654435761u;
+  var v5: u32 = (idx + 5u) * 2654435761u;
+  var v6: u32 = (idx + 6u) * 2654435761u;
+  var v7: u32 = (idx + 7u) * 2654435761u;
+  let one = vec4<u32>(1u);
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    v0 = pack4((unpack4(v0) + one) & vec4<u32>(0xFFu));
+    v1 = pack4((unpack4(v1) + one) & vec4<u32>(0xFFu));
+    v2 = pack4((unpack4(v2) + one) & vec4<u32>(0xFFu));
+    v3 = pack4((unpack4(v3) + one) & vec4<u32>(0xFFu));
+    v4 = pack4((unpack4(v4) + one) & vec4<u32>(0xFFu));
+    v5 = pack4((unpack4(v5) + one) & vec4<u32>(0xFFu));
+    v6 = pack4((unpack4(v6) + one) & vec4<u32>(0xFFu));
+    v7 = pack4((unpack4(v7) + one) & vec4<u32>(0xFFu));
+  }
+  out[idx] = f32(v0 ^ v1 ^ v2 ^ v3 ^ v4 ^ v5 ^ v6 ^ v7);
+}
+`;
+//# sourceMappingURL=flopsU32PackUnpack.js.map

package/dist/shaders/flopsU32PackUnpack.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsU32PackUnpack.js","sourceRoot":"","sources":["../../src/shaders/flopsU32PackUnpack.ts"],"names":[],"mappings":"AAAA;;;;;;;;GAQG;AACH,MAAM,CAAC,MAAM,sBAAsB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA4ChD,CAAC"}

package/dist/shaders/streamRead.d.ts

@@ -0,0 +1,10 @@
+/**
+ * Read-bandwidth probe: each thread streams a run of `vec4<f32>` values out
+ * of a large storage buffer and folds them together with plain addition (no
+ * second buffer, no multiply) — the cheapest possible "prove you read it"
+ * op — then writes a single scalar. Reads dominate; writes are negligible
+ * (one f32 per thread vs. `cols4` vec4s read), so throughput here is close
+ * to the device's peak storage-buffer read bandwidth.
+ */
+export declare const streamReadWgsl = "\nstruct Params {\n  rows: u32,\n  cols4: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read> data: array<vec4<f32>>;\n@group(0) @binding(2) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let row = gid.x;\n  if (row >= params.rows) {\n    return;\n  }\n  var sum: vec4<f32> = vec4<f32>(0.0, 0.0, 0.0, 0.0);\n  let base = row * params.cols4;\n  for (var c: u32 = 0u; c < params.cols4; c = c + 1u) {\n    sum = sum + data[base + c];\n  }\n  out[row] = sum.x + sum.y + sum.z + sum.w;\n}\n";
+//# sourceMappingURL=streamRead.d.ts.map

package/dist/shaders/streamRead.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"streamRead.d.ts","sourceRoot":"","sources":["../../src/shaders/streamRead.ts"],"names":[],"mappings":"AAAA;;;;;;;GAOG;AACH,eAAO,MAAM,cAAc,unBAuB1B,CAAC"}

package/dist/shaders/streamRead.js

@@ -0,0 +1,33 @@
+/**
+ * Read-bandwidth probe: each thread streams a run of `vec4<f32>` values out
+ * of a large storage buffer and folds them together with plain addition (no
+ * second buffer, no multiply) — the cheapest possible "prove you read it"
+ * op — then writes a single scalar. Reads dominate; writes are negligible
+ * (one f32 per thread vs. `cols4` vec4s read), so throughput here is close
+ * to the device's peak storage-buffer read bandwidth.
+ */
+export const streamReadWgsl = /* wgsl */ `
+struct Params {
+  rows: u32,
+  cols4: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read> data: array<vec4<f32>>;
+@group(0) @binding(2) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let row = gid.x;
+  if (row >= params.rows) {
+    return;
+  }
+  var sum: vec4<f32> = vec4<f32>(0.0, 0.0, 0.0, 0.0);
+  let base = row * params.cols4;
+  for (var c: u32 = 0u; c < params.cols4; c = c + 1u) {
+    sum = sum + data[base + c];
+  }
+  out[row] = sum.x + sum.y + sum.z + sum.w;
+}
+`;
+//# sourceMappingURL=streamRead.js.map

package/dist/shaders/streamRead.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"streamRead.js","sourceRoot":"","sources":["../../src/shaders/streamRead.ts"],"names":[],"mappings":"AAAA;;;;;;;GAOG;AACH,MAAM,CAAC,MAAM,cAAc,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;CAuBxC,CAAC"}

package/dist/shaders/streamWrite.d.ts

@@ -0,0 +1,8 @@
+/**
+ * Write-bandwidth probe: each thread stores a run of `vec4<f32>` values into
+ * a large storage buffer. No buffer reads at all; the only input is the
+ * thread's own id, so throughput here is close to the device's peak
+ * storage-buffer write bandwidth.
+ */
+export declare const streamWriteWgsl = "\nstruct Params {\n  rows: u32,\n  cols4: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<vec4<f32>>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let row = gid.x;\n  if (row >= params.rows) {\n    return;\n  }\n  let base = row * params.cols4;\n  let v = vec4<f32>(f32(row), f32(row), f32(row), f32(row));\n  for (var c: u32 = 0u; c < params.cols4; c = c + 1u) {\n    out[base + c] = v;\n  }\n}\n";
+//# sourceMappingURL=streamWrite.d.ts.map

package/dist/shaders/streamWrite.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"streamWrite.d.ts","sourceRoot":"","sources":["../../src/shaders/streamWrite.ts"],"names":[],"mappings":"AAAA;;;;;GAKG;AACH,eAAO,MAAM,eAAe,4gBAqB3B,CAAC"}

package/dist/shaders/streamWrite.js

@@ -0,0 +1,29 @@
+/**
+ * Write-bandwidth probe: each thread stores a run of `vec4<f32>` values into
+ * a large storage buffer. No buffer reads at all; the only input is the
+ * thread's own id, so throughput here is close to the device's peak
+ * storage-buffer write bandwidth.
+ */
+export const streamWriteWgsl = /* wgsl */ `
+struct Params {
+  rows: u32,
+  cols4: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<vec4<f32>>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let row = gid.x;
+  if (row >= params.rows) {
+    return;
+  }
+  let base = row * params.cols4;
+  let v = vec4<f32>(f32(row), f32(row), f32(row), f32(row));
+  for (var c: u32 = 0u; c < params.cols4; c = c + 1u) {
+    out[base + c] = v;
+  }
+}
+`;
+//# sourceMappingURL=streamWrite.js.map

package/dist/shaders/streamWrite.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"streamWrite.js","sourceRoot":"","sources":["../../src/shaders/streamWrite.ts"],"names":[],"mappings":"AAAA;;;;;GAKG;AACH,MAAM,CAAC,MAAM,eAAe,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;CAqBzC,CAAC"}

package/dist/stats.d.ts

@@ -0,0 +1,31 @@
+import type { Stats } from './types.ts';
+/** Student-t multiplier for a two-sided 95% confidence interval with `df` degrees of freedom. */
+export declare function tQuantile975(df: number): number;
+export declare function computeStats(values: readonly number[]): Stats;
+export interface BestStableOptions {
+    /** Never declare the best stable with fewer samples than this. */
+    minRuns: number;
+    /** The best must have gone this many consecutive samples without a meaningful improvement. */
+    stableRuns: number;
+    /** A new best more than this fraction below the previous best counts as an improvement (0.01 = 1%). */
+    tolerance: number;
+}
+/**
+ * Stopping rule for best-of-N sampling.
+ *
+ * The reported statistic is the *minimum* time, since every source of noise a
+ * benchmark meets (thermal throttling, clock ramp, compositor frames, other
+ * apps) only ever makes a run slower — the fastest run is the closest thing
+ * to the device's true capability. So sampling is done once the minimum has
+ * settled: the last `stableRuns` samples failed to beat the best seen before
+ * them by more than `tolerance`. Three tight samples converge immediately
+ * (minRuns 3, stableRuns 2: sample 1 sets the best, samples 2 and 3 confirm
+ * it); a still-ramping GPU that keeps producing faster runs keeps sampling.
+ *
+ * Degenerate data (non-positive or non-finite best) never converges, so the
+ * caller runs to its cap and can then diagnose the bad timings itself.
+ */
+export declare function isBestStable(values: readonly number[], opts: BestStableOptions): boolean;
+/** True when `sampleMs` is more than `threshold` (fraction) slower than `bestMs` — the signature of a throttled run. */
+export declare function isThrottled(sampleMs: number, bestMs: number, threshold: number): boolean;
+//# sourceMappingURL=stats.d.ts.map