webgpu-bench 0.1.0

package/dist/shaders/flopsF32Div.d.ts

@@ -0,0 +1,10 @@
+/**
+ * fp32 divide-add FLOPS probe. Same shape as {@link flopsF32ScalarWgsl}
+ * (eight independent chains, unrolled 4x) but with the multiply replaced by
+ * a divide: `x = x / a + b`. `a` is kept > 1 so each step is a contraction
+ * (bounded, no risk of overflow/underflow over hundreds of iterations).
+ * 64 ops (32 divides + 32 adds) per loop iteration, same MAC-as-2 convention
+ * as the multiply version, so throughput is directly comparable.
+ */
+export declare const flopsF32DivWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let a: f32 = 1.2 + f32(idx & 15u) * 0.05;\n  let b: f32 = 0.5 + f32(idx & 7u) * 0.001;\n  var x0: f32 = f32(idx & 255u) * 0.0001 + 0.01;\n  var x1: f32 = f32(idx & 255u) * 0.0001 + 0.02;\n  var x2: f32 = f32(idx & 255u) * 0.0001 + 0.03;\n  var x3: f32 = f32(idx & 255u) * 0.0001 + 0.04;\n  var x4: f32 = f32(idx & 255u) * 0.0001 + 0.05;\n  var x5: f32 = f32(idx & 255u) * 0.0001 + 0.06;\n  var x6: f32 = f32(idx & 255u) * 0.0001 + 0.07;\n  var x7: f32 = f32(idx & 255u) * 0.0001 + 0.08;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n    x0 = x0 / a + b;\n    x1 = x1 / a + b;\n    x2 = x2 / a + b;\n    x3 = x3 / a + b;\n    x4 = x4 / a + b;\n    x5 = x5 / a + b;\n    x6 = x6 / a + b;\n    x7 = x7 / a + b;\n  }\n  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n}\n";
+//# sourceMappingURL=flopsF32Div.d.ts.map

package/dist/shaders/flopsF32Div.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Div.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Div.ts"],"names":[],"mappings":"AAAA;;;;;;;GAOG;AACH,eAAO,MAAM,eAAe,6nDA6D3B,CAAC"}

package/dist/shaders/flopsF32Div.js

@@ -0,0 +1,71 @@
+/**
+ * fp32 divide-add FLOPS probe. Same shape as {@link flopsF32ScalarWgsl}
+ * (eight independent chains, unrolled 4x) but with the multiply replaced by
+ * a divide: `x = x / a + b`. `a` is kept > 1 so each step is a contraction
+ * (bounded, no risk of overflow/underflow over hundreds of iterations).
+ * 64 ops (32 divides + 32 adds) per loop iteration, same MAC-as-2 convention
+ * as the multiply version, so throughput is directly comparable.
+ */
+export const flopsF32DivWgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let a: f32 = 1.2 + f32(idx & 15u) * 0.05;
+  let b: f32 = 0.5 + f32(idx & 7u) * 0.001;
+  var x0: f32 = f32(idx & 255u) * 0.0001 + 0.01;
+  var x1: f32 = f32(idx & 255u) * 0.0001 + 0.02;
+  var x2: f32 = f32(idx & 255u) * 0.0001 + 0.03;
+  var x3: f32 = f32(idx & 255u) * 0.0001 + 0.04;
+  var x4: f32 = f32(idx & 255u) * 0.0001 + 0.05;
+  var x5: f32 = f32(idx & 255u) * 0.0001 + 0.06;
+  var x6: f32 = f32(idx & 255u) * 0.0001 + 0.07;
+  var x7: f32 = f32(idx & 255u) * 0.0001 + 0.08;
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    x0 = x0 / a + b;
+    x1 = x1 / a + b;
+    x2 = x2 / a + b;
+    x3 = x3 / a + b;
+    x4 = x4 / a + b;
+    x5 = x5 / a + b;
+    x6 = x6 / a + b;
+    x7 = x7 / a + b;
+    x0 = x0 / a + b;
+    x1 = x1 / a + b;
+    x2 = x2 / a + b;
+    x3 = x3 / a + b;
+    x4 = x4 / a + b;
+    x5 = x5 / a + b;
+    x6 = x6 / a + b;
+    x7 = x7 / a + b;
+    x0 = x0 / a + b;
+    x1 = x1 / a + b;
+    x2 = x2 / a + b;
+    x3 = x3 / a + b;
+    x4 = x4 / a + b;
+    x5 = x5 / a + b;
+    x6 = x6 / a + b;
+    x7 = x7 / a + b;
+    x0 = x0 / a + b;
+    x1 = x1 / a + b;
+    x2 = x2 / a + b;
+    x3 = x3 / a + b;
+    x4 = x4 / a + b;
+    x5 = x5 / a + b;
+    x6 = x6 / a + b;
+    x7 = x7 / a + b;
+  }
+  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;
+}
+`;
+//# sourceMappingURL=flopsF32Div.js.map

package/dist/shaders/flopsF32Div.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Div.js","sourceRoot":"","sources":["../../src/shaders/flopsF32Div.ts"],"names":[],"mappings":"AAAA;;;;;;;GAOG;AACH,MAAM,CAAC,MAAM,eAAe,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA6DzC,CAAC"}

package/dist/shaders/flopsF32F16Convert.d.ts

@@ -0,0 +1,11 @@
+/**
+ * fp32<->fp16 conversion FLOPS probe, using the core `pack2x16float` /
+ * `unpack2x16float` builtins (round each of a vec2<f32>'s lanes to fp16 and
+ * back) — these don't need the `shader-f16` device feature, unlike the
+ * flops-f16-* kernels which compute *in* f16. Eight independent vec2<f32>
+ * lanes; each step: pack (1 op) + unpack (1 op) + a vec2 FMA to keep the
+ * chain moving and bounded (4 ops: 2 muls + 2 adds) = 6 ops/lane/step,
+ * unrolled 4x. 192 ops per loop iteration.
+ */
+export declare const flopsF32F16ConvertWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let a: vec2<f32> = vec2<f32>(0.97 + f32(idx & 15u) * 0.001);\n  let b: vec2<f32> = vec2<f32>(0.5 + f32(idx & 7u) * 0.001);\n  var x0: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.01);\n  var x1: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.02);\n  var x2: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.03);\n  var x3: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.04);\n  var x4: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.05);\n  var x5: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.06);\n  var x6: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.07);\n  var x7: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.08);\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = unpack2x16float(pack2x16float(x0)) * a + b;\n    x1 = unpack2x16float(pack2x16float(x1)) * a + b;\n    x2 = unpack2x16float(pack2x16float(x2)) * a + b;\n    x3 = unpack2x16float(pack2x16float(x3)) * a + b;\n    x4 = unpack2x16float(pack2x16float(x4)) * a + b;\n    x5 = unpack2x16float(pack2x16float(x5)) * a + b;\n    x6 = unpack2x16float(pack2x16float(x6)) * a + b;\n    x7 = unpack2x16float(pack2x16float(x7)) * a + b;\n    x0 = unpack2x16float(pack2x16float(x0)) * a + b;\n    x1 = unpack2x16float(pack2x16float(x1)) * a + b;\n    x2 = unpack2x16float(pack2x16float(x2)) * a + b;\n    x3 = unpack2x16float(pack2x16float(x3)) * a + b;\n    x4 = unpack2x16float(pack2x16float(x4)) * a + b;\n    x5 = unpack2x16float(pack2x16float(x5)) * a + b;\n    x6 = unpack2x16float(pack2x16float(x6)) * a + b;\n    x7 = unpack2x16float(pack2x16float(x7)) * a + b;\n    x0 = unpack2x16float(pack2x16float(x0)) * a + b;\n    x1 = unpack2x16float(pack2x16float(x1)) * a + b;\n    x2 = unpack2x16float(pack2x16float(x2)) * a + b;\n    x3 = unpack2x16float(pack2x16float(x3)) * a + b;\n    x4 = unpack2x16float(pack2x16float(x4)) * a + b;\n    x5 = unpack2x16float(pack2x16float(x5)) * a + b;\n    x6 = unpack2x16float(pack2x16float(x6)) * a + b;\n    x7 = unpack2x16float(pack2x16float(x7)) * a + b;\n    x0 = unpack2x16float(pack2x16float(x0)) * a + b;\n    x1 = unpack2x16float(pack2x16float(x1)) * a + b;\n    x2 = unpack2x16float(pack2x16float(x2)) * a + b;\n    x3 = unpack2x16float(pack2x16float(x3)) * a + b;\n    x4 = unpack2x16float(pack2x16float(x4)) * a + b;\n    x5 = unpack2x16float(pack2x16float(x5)) * a + b;\n    x6 = unpack2x16float(pack2x16float(x6)) * a + b;\n    x7 = unpack2x16float(pack2x16float(x7)) * a + b;\n  }\n  let s0 = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n  out[idx] = s0.x + s0.y;\n}\n";
+//# sourceMappingURL=flopsF32F16Convert.d.ts.map

package/dist/shaders/flopsF32F16Convert.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32F16Convert.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32F16Convert.ts"],"names":[],"mappings":"AAAA;;;;;;;;GAQG;AACH,eAAO,MAAM,sBAAsB,k0FA8DlC,CAAC"}

package/dist/shaders/flopsF32F16Convert.js

@@ -0,0 +1,73 @@
+/**
+ * fp32<->fp16 conversion FLOPS probe, using the core `pack2x16float` /
+ * `unpack2x16float` builtins (round each of a vec2<f32>'s lanes to fp16 and
+ * back) — these don't need the `shader-f16` device feature, unlike the
+ * flops-f16-* kernels which compute *in* f16. Eight independent vec2<f32>
+ * lanes; each step: pack (1 op) + unpack (1 op) + a vec2 FMA to keep the
+ * chain moving and bounded (4 ops: 2 muls + 2 adds) = 6 ops/lane/step,
+ * unrolled 4x. 192 ops per loop iteration.
+ */
+export const flopsF32F16ConvertWgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let a: vec2<f32> = vec2<f32>(0.97 + f32(idx & 15u) * 0.001);
+  let b: vec2<f32> = vec2<f32>(0.5 + f32(idx & 7u) * 0.001);
+  var x0: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.01);
+  var x1: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.02);
+  var x2: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.03);
+  var x3: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.04);
+  var x4: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.05);
+  var x5: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.06);
+  var x6: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.07);
+  var x7: vec2<f32> = vec2<f32>(f32(idx & 255u) * 0.0001 + 0.08);
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    x0 = unpack2x16float(pack2x16float(x0)) * a + b;
+    x1 = unpack2x16float(pack2x16float(x1)) * a + b;
+    x2 = unpack2x16float(pack2x16float(x2)) * a + b;
+    x3 = unpack2x16float(pack2x16float(x3)) * a + b;
+    x4 = unpack2x16float(pack2x16float(x4)) * a + b;
+    x5 = unpack2x16float(pack2x16float(x5)) * a + b;
+    x6 = unpack2x16float(pack2x16float(x6)) * a + b;
+    x7 = unpack2x16float(pack2x16float(x7)) * a + b;
+    x0 = unpack2x16float(pack2x16float(x0)) * a + b;
+    x1 = unpack2x16float(pack2x16float(x1)) * a + b;
+    x2 = unpack2x16float(pack2x16float(x2)) * a + b;
+    x3 = unpack2x16float(pack2x16float(x3)) * a + b;
+    x4 = unpack2x16float(pack2x16float(x4)) * a + b;
+    x5 = unpack2x16float(pack2x16float(x5)) * a + b;
+    x6 = unpack2x16float(pack2x16float(x6)) * a + b;
+    x7 = unpack2x16float(pack2x16float(x7)) * a + b;
+    x0 = unpack2x16float(pack2x16float(x0)) * a + b;
+    x1 = unpack2x16float(pack2x16float(x1)) * a + b;
+    x2 = unpack2x16float(pack2x16float(x2)) * a + b;
+    x3 = unpack2x16float(pack2x16float(x3)) * a + b;
+    x4 = unpack2x16float(pack2x16float(x4)) * a + b;
+    x5 = unpack2x16float(pack2x16float(x5)) * a + b;
+    x6 = unpack2x16float(pack2x16float(x6)) * a + b;
+    x7 = unpack2x16float(pack2x16float(x7)) * a + b;
+    x0 = unpack2x16float(pack2x16float(x0)) * a + b;
+    x1 = unpack2x16float(pack2x16float(x1)) * a + b;
+    x2 = unpack2x16float(pack2x16float(x2)) * a + b;
+    x3 = unpack2x16float(pack2x16float(x3)) * a + b;
+    x4 = unpack2x16float(pack2x16float(x4)) * a + b;
+    x5 = unpack2x16float(pack2x16float(x5)) * a + b;
+    x6 = unpack2x16float(pack2x16float(x6)) * a + b;
+    x7 = unpack2x16float(pack2x16float(x7)) * a + b;
+  }
+  let s0 = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;
+  out[idx] = s0.x + s0.y;
+}
+`;
+//# sourceMappingURL=flopsF32F16Convert.js.map

package/dist/shaders/flopsF32F16Convert.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32F16Convert.js","sourceRoot":"","sources":["../../src/shaders/flopsF32F16Convert.ts"],"names":[],"mappings":"AAAA;;;;;;;;GAQG;AACH,MAAM,CAAC,MAAM,sBAAsB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA8DhD,CAAC"}

package/dist/shaders/flopsF32Log.d.ts

@@ -0,0 +1,11 @@
+/**
+ * fp32 ln-add FLOPS probe. Same shape as {@link flopsF32ScalarWgsl} but
+ * `x = log(x) + b` (natural log) in place of the FMA. `b` is kept large
+ * (10-17) so it dominates the small log(x) term and the chain stays
+ * comfortably positive forever — log of a negative/zero argument is
+ * undefined, so this is the stabilization that matters here. 64 ops (32
+ * logs + 32 adds) per loop iteration, same MAC-as-2 convention as the
+ * multiply version.
+ */
+export declare const flopsF32LogWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let b: f32 = 10.0 + f32(idx & 7u);\n  var x0: f32 = 10.0 + f32(idx & 255u) * 0.01;\n  var x1: f32 = 11.0 + f32(idx & 255u) * 0.01;\n  var x2: f32 = 12.0 + f32(idx & 255u) * 0.01;\n  var x3: f32 = 13.0 + f32(idx & 255u) * 0.01;\n  var x4: f32 = 14.0 + f32(idx & 255u) * 0.01;\n  var x5: f32 = 15.0 + f32(idx & 255u) * 0.01;\n  var x6: f32 = 16.0 + f32(idx & 255u) * 0.01;\n  var x7: f32 = 17.0 + f32(idx & 255u) * 0.01;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = log(x0) + b;\n    x1 = log(x1) + b;\n    x2 = log(x2) + b;\n    x3 = log(x3) + b;\n    x4 = log(x4) + b;\n    x5 = log(x5) + b;\n    x6 = log(x6) + b;\n    x7 = log(x7) + b;\n    x0 = log(x0) + b;\n    x1 = log(x1) + b;\n    x2 = log(x2) + b;\n    x3 = log(x3) + b;\n    x4 = log(x4) + b;\n    x5 = log(x5) + b;\n    x6 = log(x6) + b;\n    x7 = log(x7) + b;\n    x0 = log(x0) + b;\n    x1 = log(x1) + b;\n    x2 = log(x2) + b;\n    x3 = log(x3) + b;\n    x4 = log(x4) + b;\n    x5 = log(x5) + b;\n    x6 = log(x6) + b;\n    x7 = log(x7) + b;\n    x0 = log(x0) + b;\n    x1 = log(x1) + b;\n    x2 = log(x2) + b;\n    x3 = log(x3) + b;\n    x4 = log(x4) + b;\n    x5 = log(x5) + b;\n    x6 = log(x6) + b;\n    x7 = log(x7) + b;\n  }\n  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n}\n";
+//# sourceMappingURL=flopsF32Log.d.ts.map

package/dist/shaders/flopsF32Log.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Log.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Log.ts"],"names":[],"mappings":"AAAA;;;;;;;;GAQG;AACH,eAAO,MAAM,eAAe,ylDA4D3B,CAAC"}

package/dist/shaders/flopsF32Log.js

@@ -0,0 +1,71 @@
+/**
+ * fp32 ln-add FLOPS probe. Same shape as {@link flopsF32ScalarWgsl} but
+ * `x = log(x) + b` (natural log) in place of the FMA. `b` is kept large
+ * (10-17) so it dominates the small log(x) term and the chain stays
+ * comfortably positive forever — log of a negative/zero argument is
+ * undefined, so this is the stabilization that matters here. 64 ops (32
+ * logs + 32 adds) per loop iteration, same MAC-as-2 convention as the
+ * multiply version.
+ */
+export const flopsF32LogWgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let b: f32 = 10.0 + f32(idx & 7u);
+  var x0: f32 = 10.0 + f32(idx & 255u) * 0.01;
+  var x1: f32 = 11.0 + f32(idx & 255u) * 0.01;
+  var x2: f32 = 12.0 + f32(idx & 255u) * 0.01;
+  var x3: f32 = 13.0 + f32(idx & 255u) * 0.01;
+  var x4: f32 = 14.0 + f32(idx & 255u) * 0.01;
+  var x5: f32 = 15.0 + f32(idx & 255u) * 0.01;
+  var x6: f32 = 16.0 + f32(idx & 255u) * 0.01;
+  var x7: f32 = 17.0 + f32(idx & 255u) * 0.01;
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    x0 = log(x0) + b;
+    x1 = log(x1) + b;
+    x2 = log(x2) + b;
+    x3 = log(x3) + b;
+    x4 = log(x4) + b;
+    x5 = log(x5) + b;
+    x6 = log(x6) + b;
+    x7 = log(x7) + b;
+    x0 = log(x0) + b;
+    x1 = log(x1) + b;
+    x2 = log(x2) + b;
+    x3 = log(x3) + b;
+    x4 = log(x4) + b;
+    x5 = log(x5) + b;
+    x6 = log(x6) + b;
+    x7 = log(x7) + b;
+    x0 = log(x0) + b;
+    x1 = log(x1) + b;
+    x2 = log(x2) + b;
+    x3 = log(x3) + b;
+    x4 = log(x4) + b;
+    x5 = log(x5) + b;
+    x6 = log(x6) + b;
+    x7 = log(x7) + b;
+    x0 = log(x0) + b;
+    x1 = log(x1) + b;
+    x2 = log(x2) + b;
+    x3 = log(x3) + b;
+    x4 = log(x4) + b;
+    x5 = log(x5) + b;
+    x6 = log(x6) + b;
+    x7 = log(x7) + b;
+  }
+  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;
+}
+`;
+//# sourceMappingURL=flopsF32Log.js.map

package/dist/shaders/flopsF32Log.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Log.js","sourceRoot":"","sources":["../../src/shaders/flopsF32Log.ts"],"names":[],"mappings":"AAAA;;;;;;;;GAQG;AACH,MAAM,CAAC,MAAM,eAAe,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA4DzC,CAAC"}

package/dist/shaders/flopsF32Mat4.d.ts

@@ -0,0 +1,9 @@
+/**
+ * fp32 mat4 FLOPS probe: `x = m * x + c` chained in a register, `m` a
+ * 4x4 matrix. `m` is a row-stochastic contraction (rows sum to 1, every
+ * entry runtime-derived and non-zero) so the recurrence stays bounded for
+ * any iteration count while still exercising a full, non-degenerate
+ * mat4x4 * vec4 multiply every iteration.
+ */
+export declare const flopsF32Mat4Wgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let s: f32 = f32(idx & 15u) * 0.001 + 0.0001;\n  let m: mat4x4<f32> = mat4x4<f32>(\n    vec4<f32>(1.0 - 3.0 * s, s, s, s),\n    vec4<f32>(s, 1.0 - 3.0 * s, s, s),\n    vec4<f32>(s, s, 1.0 - 3.0 * s, s),\n    vec4<f32>(s, s, s, 1.0 - 3.0 * s),\n  );\n  let c: vec4<f32> = vec4<f32>(s, s, s, s);\n  var x: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001);\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x = m * x + c;\n  }\n  out[idx] = x.x + x.y + x.z + x.w;\n}\n";
+//# sourceMappingURL=flopsF32Mat4.d.ts.map

package/dist/shaders/flopsF32Mat4.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Mat4.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Mat4.ts"],"names":[],"mappings":"AAAA;;;;;;GAMG;AACH,eAAO,MAAM,gBAAgB,2zBA6B5B,CAAC"}

package/dist/shaders/flopsF32Mat4.js

@@ -0,0 +1,38 @@
+/**
+ * fp32 mat4 FLOPS probe: `x = m * x + c` chained in a register, `m` a
+ * 4x4 matrix. `m` is a row-stochastic contraction (rows sum to 1, every
+ * entry runtime-derived and non-zero) so the recurrence stays bounded for
+ * any iteration count while still exercising a full, non-degenerate
+ * mat4x4 * vec4 multiply every iteration.
+ */
+export const flopsF32Mat4Wgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let s: f32 = f32(idx & 15u) * 0.001 + 0.0001;
+  let m: mat4x4<f32> = mat4x4<f32>(
+    vec4<f32>(1.0 - 3.0 * s, s, s, s),
+    vec4<f32>(s, 1.0 - 3.0 * s, s, s),
+    vec4<f32>(s, s, 1.0 - 3.0 * s, s),
+    vec4<f32>(s, s, s, 1.0 - 3.0 * s),
+  );
+  let c: vec4<f32> = vec4<f32>(s, s, s, s);
+  var x: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.0001);
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    x = m * x + c;
+  }
+  out[idx] = x.x + x.y + x.z + x.w;
+}
+`;
+//# sourceMappingURL=flopsF32Mat4.js.map

package/dist/shaders/flopsF32Mat4.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Mat4.js","sourceRoot":"","sources":["../../src/shaders/flopsF32Mat4.ts"],"names":[],"mappings":"AAAA;;;;;;GAMG;AACH,MAAM,CAAC,MAAM,gBAAgB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA6B1C,CAAC"}

package/dist/shaders/flopsF32Matvec.d.ts

@@ -0,0 +1,14 @@
+/**
+ * Register-resident matvec tile, fp32: a 4-row x 8-column weight tile held in
+ * registers (8 x vec4<f32>, hashed from the thread id so every thread has a
+ * different tile), applied to an 8-wide input vector every iteration. Each
+ * output row is two 4-wide dot() calls; the 4 outputs then become the next
+ * 4 input lanes (the other 4 shift over), so the loop is genuinely
+ * loop-carried and can't be hoisted. This is the same dot-product-and-
+ * accumulate shape as a real matvec/GEMV inner loop, but with no storage
+ * buffer traffic at all: it isolates how fast this dtype's dot products run
+ * on the ALU once bandwidth is out of the picture. 32 MACs (64 FLOPs) per
+ * loop iteration.
+ */
+export declare const flopsF32MatvecWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n// Hashes a seed into four pseudo-random weights in about [-1/32, 1/32] (small\n// enough that the 8-wide dot products below are a contraction, so the\n// recurrence stays bounded for any iteration count).\nfn weights(seed: u32) -> vec4<f32> {\n  let h = seed * 0x9e3779b1u;\n  let bytes = vec4<u32>(h & 0xffu, (h >> 8u) & 0xffu, (h >> 16u) & 0xffu, h >> 24u);\n  return (vec4<f32>(bytes) - vec4<f32>(127.5)) * (1.0 / 4096.0);\n}\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let w00: vec4<f32> = weights(idx * 8u + 1u);\n  let w01: vec4<f32> = weights(idx * 8u + 2u);\n  let w10: vec4<f32> = weights(idx * 8u + 3u);\n  let w11: vec4<f32> = weights(idx * 8u + 4u);\n  let w20: vec4<f32> = weights(idx * 8u + 5u);\n  let w21: vec4<f32> = weights(idx * 8u + 6u);\n  let w30: vec4<f32> = weights(idx * 8u + 7u);\n  let w31: vec4<f32> = weights(idx * 8u + 8u);\n  var x0: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.001 + 0.1, 0.2, 0.3, 0.4);\n  var x1: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.001 + 0.2, 0.4, 0.6, 0.8);\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    let o0 = dot(w00, x0) + dot(w01, x1);\n    let o1 = dot(w10, x0) + dot(w11, x1);\n    let o2 = dot(w20, x0) + dot(w21, x1);\n    let o3 = dot(w30, x0) + dot(w31, x1);\n    x0 = x1;\n    x1 = vec4<f32>(o0, o1, o2, o3);\n  }\n  out[idx] = x0.x + x0.y + x0.z + x0.w + x1.x + x1.y + x1.z + x1.w;\n}\n";
+//# sourceMappingURL=flopsF32Matvec.d.ts.map

package/dist/shaders/flopsF32Matvec.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Matvec.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Matvec.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;GAWG;AACH,eAAO,MAAM,kBAAkB,mpDA4C9B,CAAC"}

package/dist/shaders/flopsF32Matvec.js

@@ -0,0 +1,58 @@
+/**
+ * Register-resident matvec tile, fp32: a 4-row x 8-column weight tile held in
+ * registers (8 x vec4<f32>, hashed from the thread id so every thread has a
+ * different tile), applied to an 8-wide input vector every iteration. Each
+ * output row is two 4-wide dot() calls; the 4 outputs then become the next
+ * 4 input lanes (the other 4 shift over), so the loop is genuinely
+ * loop-carried and can't be hoisted. This is the same dot-product-and-
+ * accumulate shape as a real matvec/GEMV inner loop, but with no storage
+ * buffer traffic at all: it isolates how fast this dtype's dot products run
+ * on the ALU once bandwidth is out of the picture. 32 MACs (64 FLOPs) per
+ * loop iteration.
+ */
+export const flopsF32MatvecWgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+// Hashes a seed into four pseudo-random weights in about [-1/32, 1/32] (small
+// enough that the 8-wide dot products below are a contraction, so the
+// recurrence stays bounded for any iteration count).
+fn weights(seed: u32) -> vec4<f32> {
+  let h = seed * 0x9e3779b1u;
+  let bytes = vec4<u32>(h & 0xffu, (h >> 8u) & 0xffu, (h >> 16u) & 0xffu, h >> 24u);
+  return (vec4<f32>(bytes) - vec4<f32>(127.5)) * (1.0 / 4096.0);
+}
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let w00: vec4<f32> = weights(idx * 8u + 1u);
+  let w01: vec4<f32> = weights(idx * 8u + 2u);
+  let w10: vec4<f32> = weights(idx * 8u + 3u);
+  let w11: vec4<f32> = weights(idx * 8u + 4u);
+  let w20: vec4<f32> = weights(idx * 8u + 5u);
+  let w21: vec4<f32> = weights(idx * 8u + 6u);
+  let w30: vec4<f32> = weights(idx * 8u + 7u);
+  let w31: vec4<f32> = weights(idx * 8u + 8u);
+  var x0: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.001 + 0.1, 0.2, 0.3, 0.4);
+  var x1: vec4<f32> = vec4<f32>(f32(idx & 255u) * 0.001 + 0.2, 0.4, 0.6, 0.8);
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    let o0 = dot(w00, x0) + dot(w01, x1);
+    let o1 = dot(w10, x0) + dot(w11, x1);
+    let o2 = dot(w20, x0) + dot(w21, x1);
+    let o3 = dot(w30, x0) + dot(w31, x1);
+    x0 = x1;
+    x1 = vec4<f32>(o0, o1, o2, o3);
+  }
+  out[idx] = x0.x + x0.y + x0.z + x0.w + x1.x + x1.y + x1.z + x1.w;
+}
+`;
+//# sourceMappingURL=flopsF32Matvec.js.map

package/dist/shaders/flopsF32Matvec.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Matvec.js","sourceRoot":"","sources":["../../src/shaders/flopsF32Matvec.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;GAWG;AACH,MAAM,CAAC,MAAM,kBAAkB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA4C5C,CAAC"}

package/dist/shaders/flopsF32Pow.d.ts

@@ -0,0 +1,10 @@
+/**
+ * fp32 pow-add FLOPS probe. Same shape as {@link flopsF32ScalarWgsl} but
+ * `x = pow(x, e) + b` in place of the FMA. `e` is a per-lane exponent in
+ * (0, 1): for any x > 0, x^e is a contraction towards 1, so adding a
+ * positive `b` each step keeps the chain bounded and positive forever. 64
+ * ops (32 pows + 32 adds) per loop iteration, same MAC-as-2 convention as
+ * the multiply version.
+ */
+export declare const flopsF32PowWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let e: f32 = 0.4 + f32(idx & 15u) * 0.02;\n  let b: f32 = 0.5 + f32(idx & 7u) * 0.001;\n  var x0: f32 = f32(idx & 255u) * 0.0001 + 0.01;\n  var x1: f32 = f32(idx & 255u) * 0.0001 + 0.02;\n  var x2: f32 = f32(idx & 255u) * 0.0001 + 0.03;\n  var x3: f32 = f32(idx & 255u) * 0.0001 + 0.04;\n  var x4: f32 = f32(idx & 255u) * 0.0001 + 0.05;\n  var x5: f32 = f32(idx & 255u) * 0.0001 + 0.06;\n  var x6: f32 = f32(idx & 255u) * 0.0001 + 0.07;\n  var x7: f32 = f32(idx & 255u) * 0.0001 + 0.08;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = pow(x0, e) + b;\n    x1 = pow(x1, e) + b;\n    x2 = pow(x2, e) + b;\n    x3 = pow(x3, e) + b;\n    x4 = pow(x4, e) + b;\n    x5 = pow(x5, e) + b;\n    x6 = pow(x6, e) + b;\n    x7 = pow(x7, e) + b;\n    x0 = pow(x0, e) + b;\n    x1 = pow(x1, e) + b;\n    x2 = pow(x2, e) + b;\n    x3 = pow(x3, e) + b;\n    x4 = pow(x4, e) + b;\n    x5 = pow(x5, e) + b;\n    x6 = pow(x6, e) + b;\n    x7 = pow(x7, e) + b;\n    x0 = pow(x0, e) + b;\n    x1 = pow(x1, e) + b;\n    x2 = pow(x2, e) + b;\n    x3 = pow(x3, e) + b;\n    x4 = pow(x4, e) + b;\n    x5 = pow(x5, e) + b;\n    x6 = pow(x6, e) + b;\n    x7 = pow(x7, e) + b;\n    x0 = pow(x0, e) + b;\n    x1 = pow(x1, e) + b;\n    x2 = pow(x2, e) + b;\n    x3 = pow(x3, e) + b;\n    x4 = pow(x4, e) + b;\n    x5 = pow(x5, e) + b;\n    x6 = pow(x6, e) + b;\n    x7 = pow(x7, e) + b;\n  }\n  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n}\n";
+//# sourceMappingURL=flopsF32Pow.d.ts.map

package/dist/shaders/flopsF32Pow.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Pow.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Pow.ts"],"names":[],"mappings":"AAAA;;;;;;;GAOG;AACH,eAAO,MAAM,eAAe,6vDA6D3B,CAAC"}

package/dist/shaders/flopsF32Pow.js

@@ -0,0 +1,71 @@
+/**
+ * fp32 pow-add FLOPS probe. Same shape as {@link flopsF32ScalarWgsl} but
+ * `x = pow(x, e) + b` in place of the FMA. `e` is a per-lane exponent in
+ * (0, 1): for any x > 0, x^e is a contraction towards 1, so adding a
+ * positive `b` each step keeps the chain bounded and positive forever. 64
+ * ops (32 pows + 32 adds) per loop iteration, same MAC-as-2 convention as
+ * the multiply version.
+ */
+export const flopsF32PowWgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let e: f32 = 0.4 + f32(idx & 15u) * 0.02;
+  let b: f32 = 0.5 + f32(idx & 7u) * 0.001;
+  var x0: f32 = f32(idx & 255u) * 0.0001 + 0.01;
+  var x1: f32 = f32(idx & 255u) * 0.0001 + 0.02;
+  var x2: f32 = f32(idx & 255u) * 0.0001 + 0.03;
+  var x3: f32 = f32(idx & 255u) * 0.0001 + 0.04;
+  var x4: f32 = f32(idx & 255u) * 0.0001 + 0.05;
+  var x5: f32 = f32(idx & 255u) * 0.0001 + 0.06;
+  var x6: f32 = f32(idx & 255u) * 0.0001 + 0.07;
+  var x7: f32 = f32(idx & 255u) * 0.0001 + 0.08;
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    x0 = pow(x0, e) + b;
+    x1 = pow(x1, e) + b;
+    x2 = pow(x2, e) + b;
+    x3 = pow(x3, e) + b;
+    x4 = pow(x4, e) + b;
+    x5 = pow(x5, e) + b;
+    x6 = pow(x6, e) + b;
+    x7 = pow(x7, e) + b;
+    x0 = pow(x0, e) + b;
+    x1 = pow(x1, e) + b;
+    x2 = pow(x2, e) + b;
+    x3 = pow(x3, e) + b;
+    x4 = pow(x4, e) + b;
+    x5 = pow(x5, e) + b;
+    x6 = pow(x6, e) + b;
+    x7 = pow(x7, e) + b;
+    x0 = pow(x0, e) + b;
+    x1 = pow(x1, e) + b;
+    x2 = pow(x2, e) + b;
+    x3 = pow(x3, e) + b;
+    x4 = pow(x4, e) + b;
+    x5 = pow(x5, e) + b;
+    x6 = pow(x6, e) + b;
+    x7 = pow(x7, e) + b;
+    x0 = pow(x0, e) + b;
+    x1 = pow(x1, e) + b;
+    x2 = pow(x2, e) + b;
+    x3 = pow(x3, e) + b;
+    x4 = pow(x4, e) + b;
+    x5 = pow(x5, e) + b;
+    x6 = pow(x6, e) + b;
+    x7 = pow(x7, e) + b;
+  }
+  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;
+}
+`;
+//# sourceMappingURL=flopsF32Pow.js.map

package/dist/shaders/flopsF32Pow.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Pow.js","sourceRoot":"","sources":["../../src/shaders/flopsF32Pow.ts"],"names":[],"mappings":"AAAA;;;;;;;GAOG;AACH,MAAM,CAAC,MAAM,eAAe,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA6DzC,CAAC"}

package/dist/shaders/flopsF32Rsqrt.d.ts

@@ -0,0 +1,12 @@
+/**
+ * fp32 rsqrt-add FLOPS probe. Same shape as {@link flopsF32ScalarWgsl} but
+ * `x = inverseSqrt(x) + b` in place of the FMA. inverseSqrt(x) is always
+ * positive for x > 0, so `x` is bounded below by `b` from the second step
+ * on — always positive, never blows up. This is the op behind every
+ * `normalize()`: most GPUs have a dedicated fast-rsqrt path distinct from
+ * sqrt-then-divide, which is what the gap against flops-f32-sqrt shows. 64
+ * ops (32 rsqrts + 32 adds) per loop iteration, same MAC-as-2 convention as
+ * the multiply version.
+ */
+export declare const flopsF32RsqrtWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let b: f32 = 0.5 + f32(idx & 7u) * 0.001;\n  var x0: f32 = f32(idx & 255u) * 0.0001 + 0.01;\n  var x1: f32 = f32(idx & 255u) * 0.0001 + 0.02;\n  var x2: f32 = f32(idx & 255u) * 0.0001 + 0.03;\n  var x3: f32 = f32(idx & 255u) * 0.0001 + 0.04;\n  var x4: f32 = f32(idx & 255u) * 0.0001 + 0.05;\n  var x5: f32 = f32(idx & 255u) * 0.0001 + 0.06;\n  var x6: f32 = f32(idx & 255u) * 0.0001 + 0.07;\n  var x7: f32 = f32(idx & 255u) * 0.0001 + 0.08;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = inverseSqrt(x0) + b;\n    x1 = inverseSqrt(x1) + b;\n    x2 = inverseSqrt(x2) + b;\n    x3 = inverseSqrt(x3) + b;\n    x4 = inverseSqrt(x4) + b;\n    x5 = inverseSqrt(x5) + b;\n    x6 = inverseSqrt(x6) + b;\n    x7 = inverseSqrt(x7) + b;\n    x0 = inverseSqrt(x0) + b;\n    x1 = inverseSqrt(x1) + b;\n    x2 = inverseSqrt(x2) + b;\n    x3 = inverseSqrt(x3) + b;\n    x4 = inverseSqrt(x4) + b;\n    x5 = inverseSqrt(x5) + b;\n    x6 = inverseSqrt(x6) + b;\n    x7 = inverseSqrt(x7) + b;\n    x0 = inverseSqrt(x0) + b;\n    x1 = inverseSqrt(x1) + b;\n    x2 = inverseSqrt(x2) + b;\n    x3 = inverseSqrt(x3) + b;\n    x4 = inverseSqrt(x4) + b;\n    x5 = inverseSqrt(x5) + b;\n    x6 = inverseSqrt(x6) + b;\n    x7 = inverseSqrt(x7) + b;\n    x0 = inverseSqrt(x0) + b;\n    x1 = inverseSqrt(x1) + b;\n    x2 = inverseSqrt(x2) + b;\n    x3 = inverseSqrt(x3) + b;\n    x4 = inverseSqrt(x4) + b;\n    x5 = inverseSqrt(x5) + b;\n    x6 = inverseSqrt(x6) + b;\n    x7 = inverseSqrt(x7) + b;\n  }\n  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n}\n";
+//# sourceMappingURL=flopsF32Rsqrt.d.ts.map

package/dist/shaders/flopsF32Rsqrt.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Rsqrt.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Rsqrt.ts"],"names":[],"mappings":"AAAA;;;;;;;;;GASG;AACH,eAAO,MAAM,iBAAiB,g3DA4D7B,CAAC"}

package/dist/shaders/flopsF32Rsqrt.js

@@ -0,0 +1,72 @@
+/**
+ * fp32 rsqrt-add FLOPS probe. Same shape as {@link flopsF32ScalarWgsl} but
+ * `x = inverseSqrt(x) + b` in place of the FMA. inverseSqrt(x) is always
+ * positive for x > 0, so `x` is bounded below by `b` from the second step
+ * on — always positive, never blows up. This is the op behind every
+ * `normalize()`: most GPUs have a dedicated fast-rsqrt path distinct from
+ * sqrt-then-divide, which is what the gap against flops-f32-sqrt shows. 64
+ * ops (32 rsqrts + 32 adds) per loop iteration, same MAC-as-2 convention as
+ * the multiply version.
+ */
+export const flopsF32RsqrtWgsl = /* wgsl */ `
+struct Params {
+  threads: u32,
+  iterations: u32,
+};
+
+@group(0) @binding(0) var<uniform> params: Params;
+@group(0) @binding(1) var<storage, read_write> out: array<f32>;
+
+@compute @workgroup_size(64)
+fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
+  let idx = gid.x;
+  if (idx >= params.threads) {
+    return;
+  }
+  let b: f32 = 0.5 + f32(idx & 7u) * 0.001;
+  var x0: f32 = f32(idx & 255u) * 0.0001 + 0.01;
+  var x1: f32 = f32(idx & 255u) * 0.0001 + 0.02;
+  var x2: f32 = f32(idx & 255u) * 0.0001 + 0.03;
+  var x3: f32 = f32(idx & 255u) * 0.0001 + 0.04;
+  var x4: f32 = f32(idx & 255u) * 0.0001 + 0.05;
+  var x5: f32 = f32(idx & 255u) * 0.0001 + 0.06;
+  var x6: f32 = f32(idx & 255u) * 0.0001 + 0.07;
+  var x7: f32 = f32(idx & 255u) * 0.0001 + 0.08;
+  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {
+    x0 = inverseSqrt(x0) + b;
+    x1 = inverseSqrt(x1) + b;
+    x2 = inverseSqrt(x2) + b;
+    x3 = inverseSqrt(x3) + b;
+    x4 = inverseSqrt(x4) + b;
+    x5 = inverseSqrt(x5) + b;
+    x6 = inverseSqrt(x6) + b;
+    x7 = inverseSqrt(x7) + b;
+    x0 = inverseSqrt(x0) + b;
+    x1 = inverseSqrt(x1) + b;
+    x2 = inverseSqrt(x2) + b;
+    x3 = inverseSqrt(x3) + b;
+    x4 = inverseSqrt(x4) + b;
+    x5 = inverseSqrt(x5) + b;
+    x6 = inverseSqrt(x6) + b;
+    x7 = inverseSqrt(x7) + b;
+    x0 = inverseSqrt(x0) + b;
+    x1 = inverseSqrt(x1) + b;
+    x2 = inverseSqrt(x2) + b;
+    x3 = inverseSqrt(x3) + b;
+    x4 = inverseSqrt(x4) + b;
+    x5 = inverseSqrt(x5) + b;
+    x6 = inverseSqrt(x6) + b;
+    x7 = inverseSqrt(x7) + b;
+    x0 = inverseSqrt(x0) + b;
+    x1 = inverseSqrt(x1) + b;
+    x2 = inverseSqrt(x2) + b;
+    x3 = inverseSqrt(x3) + b;
+    x4 = inverseSqrt(x4) + b;
+    x5 = inverseSqrt(x5) + b;
+    x6 = inverseSqrt(x6) + b;
+    x7 = inverseSqrt(x7) + b;
+  }
+  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;
+}
+`;
+//# sourceMappingURL=flopsF32Rsqrt.js.map

package/dist/shaders/flopsF32Rsqrt.js.map

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+{"version":3,"file":"flopsF32Rsqrt.js","sourceRoot":"","sources":["../../src/shaders/flopsF32Rsqrt.ts"],"names":[],"mappings":"AAAA;;;;;;;;;GASG;AACH,MAAM,CAAC,MAAM,iBAAiB,GAAG,UAAU,CAAC;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;CA4D3C,CAAC"}

package/dist/shaders/flopsF32Scalar.d.ts

@@ -0,0 +1,11 @@
+/**
+ * Raw fp32 FLOPS probe. Eight *independent* scalar FMA chains per thread,
+ * with the loop body unrolled 4x, so the ALU always has work in flight:
+ * a single dependent chain would measure FMA latency (plus loop overhead)
+ * rather than throughput. `a`/`b`/the trip count are runtime values, and
+ * every chain starts from a different value so the compiler can't merge
+ * them. One tiny write per thread at the end; everything else is pure ALU.
+ * 8 chains x 4 unrolled steps = 32 FMAs (64 FLOPs) per loop iteration.
+ */
+export declare const flopsF32ScalarWgsl = "\nstruct Params {\n  threads: u32,\n  iterations: u32,\n};\n\n@group(0) @binding(0) var<uniform> params: Params;\n@group(0) @binding(1) var<storage, read_write> out: array<f32>;\n\n@compute @workgroup_size(64)\nfn main(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let idx = gid.x;\n  if (idx >= params.threads) {\n    return;\n  }\n  let a: f32 = 1.0 - f32(idx & 15u) * 0.001;\n  let b: f32 = 0.5 + f32(idx & 7u) * 0.001;\n  var x0: f32 = f32(idx & 255u) * 0.0001 + 0.01;\n  var x1: f32 = f32(idx & 255u) * 0.0001 + 0.02;\n  var x2: f32 = f32(idx & 255u) * 0.0001 + 0.03;\n  var x3: f32 = f32(idx & 255u) * 0.0001 + 0.04;\n  var x4: f32 = f32(idx & 255u) * 0.0001 + 0.05;\n  var x5: f32 = f32(idx & 255u) * 0.0001 + 0.06;\n  var x6: f32 = f32(idx & 255u) * 0.0001 + 0.07;\n  var x7: f32 = f32(idx & 255u) * 0.0001 + 0.08;\n  for (var i: u32 = 0u; i < params.iterations; i = i + 1u) {\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n    x0 = x0 * a + b;\n    x1 = x1 * a + b;\n    x2 = x2 * a + b;\n    x3 = x3 * a + b;\n    x4 = x4 * a + b;\n    x5 = x5 * a + b;\n    x6 = x6 * a + b;\n    x7 = x7 * a + b;\n  }\n  out[idx] = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7;\n}\n";
+//# sourceMappingURL=flopsF32Scalar.d.ts.map

package/dist/shaders/flopsF32Scalar.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"flopsF32Scalar.d.ts","sourceRoot":"","sources":["../../src/shaders/flopsF32Scalar.ts"],"names":[],"mappings":"AAAA;;;;;;;;GAQG;AACH,eAAO,MAAM,kBAAkB,8nDA6D9B,CAAC"}