rp2040js 0.17.17 → 0.18.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/dist/cjs/clock/clock.d.ts +11 -11
- package/dist/cjs/clock/clock.js +2 -2
- package/dist/cjs/clock/mock-clock.d.ts +17 -17
- package/dist/cjs/clock/mock-clock.js +52 -52
- package/dist/cjs/clock/realtime-clock.d.ts +23 -23
- package/dist/cjs/clock/realtime-clock.js +73 -73
- package/dist/cjs/cortex-m0-core.d.ts +87 -87
- package/dist/cjs/cortex-m0-core.js +1251 -1251
- package/dist/cjs/gdb/gdb-connection.d.ts +11 -11
- package/dist/cjs/gdb/gdb-connection.js +57 -57
- package/dist/cjs/gdb/gdb-server.d.ts +23 -23
- package/dist/cjs/gdb/gdb-server.js +232 -232
- package/dist/cjs/gdb/gdb-tcp-server.d.ts +10 -10
- package/dist/cjs/gdb/gdb-tcp-server.js +34 -34
- package/dist/cjs/gdb/gdb-utils.d.ts +9 -9
- package/dist/cjs/gdb/gdb-utils.js +48 -48
- package/dist/cjs/gpio-pin.d.ts +56 -56
- package/dist/cjs/gpio-pin.js +216 -216
- package/dist/cjs/index.d.ts +11 -11
- package/dist/cjs/index.js +36 -36
- package/dist/cjs/interpolator.d.ts +36 -36
- package/dist/cjs/interpolator.js +150 -150
- package/dist/cjs/irq.d.ts +29 -29
- package/dist/cjs/irq.js +33 -33
- package/dist/cjs/peripherals/adc.d.ts +52 -52
- package/dist/cjs/peripherals/adc.js +261 -261
- package/dist/cjs/peripherals/busctrl.d.ts +10 -10
- package/dist/cjs/peripherals/busctrl.js +84 -84
- package/dist/cjs/peripherals/clocks.d.ts +9 -9
- package/dist/cjs/peripherals/clocks.js +42 -42
- package/dist/cjs/peripherals/dma.d.ts +109 -109
- package/dist/cjs/peripherals/dma.js +520 -520
- package/dist/cjs/peripherals/i2c.d.ts +54 -54
- package/dist/cjs/peripherals/i2c.js +458 -458
- package/dist/cjs/peripherals/io.d.ts +11 -11
- package/dist/cjs/peripherals/io.js +100 -100
- package/dist/cjs/peripherals/pads.d.ts +13 -13
- package/dist/cjs/peripherals/pads.js +58 -58
- package/dist/cjs/peripherals/peripheral.d.ts +22 -22
- package/dist/cjs/peripherals/peripheral.js +61 -61
- package/dist/cjs/peripherals/pio.d.ts +120 -120
- package/dist/cjs/peripherals/pio.js +1086 -1086
- package/dist/cjs/peripherals/ppb.d.ts +25 -25
- package/dist/cjs/peripherals/ppb.js +229 -229
- package/dist/cjs/peripherals/pwm.d.ts +65 -65
- package/dist/cjs/peripherals/pwm.js +372 -372
- package/dist/cjs/peripherals/reset.d.ts +8 -8
- package/dist/cjs/peripherals/reset.js +40 -40
- package/dist/cjs/peripherals/rtc.d.ts +10 -10
- package/dist/cjs/peripherals/rtc.js +74 -74
- package/dist/cjs/peripherals/spi.d.ts +38 -38
- package/dist/cjs/peripherals/spi.js +240 -240
- package/dist/cjs/peripherals/ssi.d.ts +6 -6
- package/dist/cjs/peripherals/ssi.js +43 -43
- package/dist/cjs/peripherals/syscfg.d.ts +5 -5
- package/dist/cjs/peripherals/syscfg.js +26 -26
- package/dist/cjs/peripherals/sysinfo.d.ts +4 -4
- package/dist/cjs/peripherals/sysinfo.js +22 -22
- package/dist/cjs/peripherals/tbman.d.ts +4 -4
- package/dist/cjs/peripherals/tbman.js +17 -17
- package/dist/cjs/peripherals/timer.d.ts +18 -18
- package/dist/cjs/peripherals/timer.js +156 -156
- package/dist/cjs/peripherals/uart.d.ts +31 -31
- package/dist/cjs/peripherals/uart.js +132 -132
- package/dist/cjs/peripherals/usb.d.ts +29 -29
- package/dist/cjs/peripherals/usb.js +309 -309
- package/dist/cjs/rp2040.d.ts +71 -71
- package/dist/cjs/rp2040.js +361 -361
- package/dist/cjs/sio.d.ts +21 -21
- package/dist/cjs/sio.js +425 -425
- package/dist/cjs/usb/cdc.d.ts +20 -20
- package/dist/cjs/usb/cdc.js +126 -126
- package/dist/cjs/usb/interfaces.d.ts +47 -47
- package/dist/cjs/usb/interfaces.js +46 -46
- package/dist/cjs/usb/setup.d.ts +5 -5
- package/dist/cjs/usb/setup.js +53 -53
- package/dist/cjs/utils/assembler.d.ts +79 -79
- package/dist/cjs/utils/assembler.js +328 -328
- package/dist/cjs/utils/bit.d.ts +3 -3
- package/dist/cjs/utils/bit.js +15 -15
- package/dist/cjs/utils/fifo.d.ts +15 -15
- package/dist/cjs/utils/fifo.js +56 -56
- package/dist/cjs/utils/logging.d.ts +23 -23
- package/dist/cjs/utils/logging.js +48 -48
- package/dist/cjs/utils/pio-assembler.d.ts +45 -45
- package/dist/cjs/utils/pio-assembler.js +87 -87
- package/dist/cjs/utils/time.d.ts +2 -2
- package/dist/cjs/utils/time.js +32 -32
- package/dist/cjs/utils/timer32.d.ts +57 -57
- package/dist/cjs/utils/timer32.js +208 -208
- package/dist/esm/clock/clock.d.ts +11 -11
- package/dist/esm/clock/clock.js +1 -1
- package/dist/esm/clock/mock-clock.d.ts +17 -17
- package/dist/esm/clock/mock-clock.js +47 -47
- package/dist/esm/clock/realtime-clock.d.ts +23 -23
- package/dist/esm/clock/realtime-clock.js +68 -68
- package/dist/esm/cortex-m0-core.d.ts +87 -87
- package/dist/esm/cortex-m0-core.js +1247 -1247
- package/dist/esm/gdb/gdb-connection.d.ts +11 -11
- package/dist/esm/gdb/gdb-connection.js +53 -53
- package/dist/esm/gdb/gdb-server.d.ts +23 -23
- package/dist/esm/gdb/gdb-server.js +228 -228
- package/dist/esm/gdb/gdb-tcp-server.d.ts +10 -10
- package/dist/esm/gdb/gdb-tcp-server.js +30 -30
- package/dist/esm/gdb/gdb-utils.d.ts +9 -9
- package/dist/esm/gdb/gdb-utils.js +36 -36
- package/dist/esm/gpio-pin.d.ts +56 -56
- package/dist/esm/gpio-pin.js +212 -212
- package/dist/esm/index.d.ts +11 -11
- package/dist/esm/index.js +11 -11
- package/dist/esm/interpolator.d.ts +36 -36
- package/dist/esm/interpolator.js +145 -145
- package/dist/esm/irq.d.ts +29 -29
- package/dist/esm/irq.js +30 -30
- package/dist/esm/peripherals/adc.d.ts +52 -52
- package/dist/esm/peripherals/adc.js +257 -257
- package/dist/esm/peripherals/busctrl.d.ts +10 -10
- package/dist/esm/peripherals/busctrl.js +80 -80
- package/dist/esm/peripherals/clocks.d.ts +9 -9
- package/dist/esm/peripherals/clocks.js +38 -38
- package/dist/esm/peripherals/dma.d.ts +109 -109
- package/dist/esm/peripherals/dma.js +515 -515
- package/dist/esm/peripherals/i2c.d.ts +54 -54
- package/dist/esm/peripherals/i2c.js +454 -454
- package/dist/esm/peripherals/io.d.ts +11 -11
- package/dist/esm/peripherals/io.js +96 -96
- package/dist/esm/peripherals/pads.d.ts +13 -13
- package/dist/esm/peripherals/pads.js +54 -54
- package/dist/esm/peripherals/peripheral.d.ts +22 -22
- package/dist/esm/peripherals/peripheral.js +55 -55
- package/dist/esm/peripherals/pio.d.ts +120 -120
- package/dist/esm/peripherals/pio.js +1081 -1081
- package/dist/esm/peripherals/ppb.d.ts +25 -25
- package/dist/esm/peripherals/ppb.js +225 -225
- package/dist/esm/peripherals/pwm.d.ts +65 -65
- package/dist/esm/peripherals/pwm.js +368 -368
- package/dist/esm/peripherals/reset.d.ts +8 -8
- package/dist/esm/peripherals/reset.js +36 -36
- package/dist/esm/peripherals/rtc.d.ts +10 -10
- package/dist/esm/peripherals/rtc.js +70 -70
- package/dist/esm/peripherals/spi.d.ts +38 -38
- package/dist/esm/peripherals/spi.js +236 -236
- package/dist/esm/peripherals/ssi.d.ts +6 -6
- package/dist/esm/peripherals/ssi.js +39 -39
- package/dist/esm/peripherals/syscfg.d.ts +5 -5
- package/dist/esm/peripherals/syscfg.js +22 -22
- package/dist/esm/peripherals/sysinfo.d.ts +4 -4
- package/dist/esm/peripherals/sysinfo.js +18 -18
- package/dist/esm/peripherals/tbman.d.ts +4 -4
- package/dist/esm/peripherals/tbman.js +13 -13
- package/dist/esm/peripherals/timer.d.ts +18 -18
- package/dist/esm/peripherals/timer.js +152 -152
- package/dist/esm/peripherals/uart.d.ts +31 -31
- package/dist/esm/peripherals/uart.js +128 -128
- package/dist/esm/peripherals/usb.d.ts +29 -29
- package/dist/esm/peripherals/usb.js +305 -305
- package/dist/esm/rp2040.d.ts +71 -71
- package/dist/esm/rp2040.js +357 -357
- package/dist/esm/sio.d.ts +21 -21
- package/dist/esm/sio.js +421 -421
- package/dist/esm/usb/cdc.d.ts +20 -20
- package/dist/esm/usb/cdc.js +121 -121
- package/dist/esm/usb/interfaces.d.ts +47 -47
- package/dist/esm/usb/interfaces.js +43 -43
- package/dist/esm/usb/setup.d.ts +5 -5
- package/dist/esm/usb/setup.js +46 -46
- package/dist/esm/utils/assembler.d.ts +79 -79
- package/dist/esm/utils/assembler.js +245 -245
- package/dist/esm/utils/bit.d.ts +3 -3
- package/dist/esm/utils/bit.js +9 -9
- package/dist/esm/utils/fifo.d.ts +15 -15
- package/dist/esm/utils/fifo.js +52 -52
- package/dist/esm/utils/logging.d.ts +23 -23
- package/dist/esm/utils/logging.js +44 -44
- package/dist/esm/utils/pio-assembler.d.ts +45 -45
- package/dist/esm/utils/pio-assembler.js +75 -75
- package/dist/esm/utils/time.d.ts +2 -2
- package/dist/esm/utils/time.js +27 -27
- package/dist/esm/utils/timer32.d.ts +57 -57
- package/dist/esm/utils/timer32.js +203 -203
- package/package.json +33 -22
- package/dist/esm/package.json +0 -1
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"use strict";
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Object.defineProperty(exports, "__esModule", { value: true });
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exports.opcodePOP = exports.opcodeORRS = exports.opcodeNOP = exports.opcodeMVNS = exports.opcodeMULS = exports.opcodeMSR = exports.opcodeMRS = exports.opcodeMOVSreg = exports.opcodeMOVS = exports.opcodeMOV = exports.opcodeLSRSreg = exports.opcodeLSRS = exports.opcodeLSLSimm = exports.opcodeLSLSreg = exports.opcodeLDRSH = exports.opcodeLDRSB = exports.opcodeLDRHreg = exports.opcodeLDRH = exports.opcodeLDRBreg = exports.opcodeLDRsp = exports.opcodeLDRB = exports.opcodeLDRlit = exports.opcodeLDRimm = exports.opcodeLDRreg = exports.opcodeLDMIA = exports.opcodeISBSY = exports.opcodeEORS = exports.opcodeDSBSY = exports.opcodeDMBSY = exports.opcodeCMPregT2 = exports.opcodeCMPregT1 = exports.opcodeCMPimm = exports.opcodeCMN = exports.opcodeBX = exports.opcodeBLX = exports.opcodeBL = exports.opcodeBICS = exports.opcodeBT2 = exports.opcodeBT1 = exports.opcodeASRSreg = exports.opcodeASRS = exports.opcodeANDS = exports.opcodeADR = exports.opcodeADDreg = exports.opcodeADDSreg = exports.opcodeADDsp2 = exports.opcodeADDspPlusImm = exports.opcodeADDS2 = exports.opcodeADDS1 = exports.opcodeADCS = void 0;
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exports.opcodeYIELD = exports.opcodeWFI = exports.opcodeUXTH = exports.opcodeUDF2 = exports.opcodeUDF = exports.opcodeUXTB = exports.opcodeTST = exports.opcodeSXTH = exports.opcodeSXTB = exports.opcodeSVC = exports.opcodeSUBsp = exports.opcodeSUBSreg = exports.opcodeSUBS2 = exports.opcodeSUBS1 = exports.opcodeSTRHreg = exports.opcodeSTRH = exports.opcodeSTRBreg = exports.opcodeSTRB = exports.opcodeSTRreg = exports.opcodeSTRsp = exports.opcodeSTR = exports.opcodeSTMIA = exports.opcodeSBCS = exports.opcodeRSBS = exports.opcodeROR = exports.opcodeREVSH = exports.opcodeREV16 = exports.opcodeREV = exports.opcodePUSH = void 0;
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function opcodeADCS(Rdn, Rm) {
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return (0b0100000101 << 6) | ((Rm & 7) << 3) | (Rdn & 7);
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}
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exports.opcodeADCS = opcodeADCS;
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function opcodeADDS1(Rd, Rn, imm3) {
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return (0b0001110 << 9) | ((imm3 & 0x7) << 6) | ((Rn & 7) << 3) | (Rd & 7);
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}
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exports.opcodeADDS1 = opcodeADDS1;
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function opcodeADDS2(Rdn, imm8) {
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return (0b00110 << 11) | ((Rdn & 7) << 8) | (imm8 & 0xff);
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}
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exports.opcodeADDS2 = opcodeADDS2;
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function opcodeADDspPlusImm(Rd, imm8) {
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return (0b10101 << 11) | ((Rd & 7) << 8) | ((imm8 >> 2) & 0xff);
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}
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exports.opcodeADDspPlusImm = opcodeADDspPlusImm;
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function opcodeADDsp2(imm) {
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return (0b101100000 << 7) | ((imm >> 2) & 0x7f);
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}
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exports.opcodeADDsp2 = opcodeADDsp2;
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function opcodeADDSreg(Rd, Rn, Rm) {
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return (0b0001100 << 9) | ((Rm & 0x7) << 6) | ((Rn & 7) << 3) | (Rd & 7);
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}
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exports.opcodeADDSreg = opcodeADDSreg;
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function opcodeADDreg(Rdn, Rm) {
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return (0b01000100 << 8) | ((Rdn & 0x8) << 4) | ((Rm & 0xf) << 3) | (Rdn & 0x7);
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}
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exports.opcodeADDreg = opcodeADDreg;
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function opcodeADR(Rd, imm8) {
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return (0b10100 << 11) | ((Rd & 7) << 8) | ((imm8 >> 2) & 0xff);
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}
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exports.opcodeADR = opcodeADR;
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function opcodeANDS(Rn, Rm) {
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return (0b0100000000 << 6) | ((Rm & 7) << 3) | (Rn & 0x7);
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}
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exports.opcodeANDS = opcodeANDS;
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function opcodeASRS(Rd, Rm, imm5) {
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return (0b00010 << 11) | ((imm5 & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rd & 0x7);
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}
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exports.opcodeASRS = opcodeASRS;
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function opcodeASRSreg(Rdn, Rm) {
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return (0b0100000100 << 6) | ((Rm & 0x7) << 3) | ((Rm & 0x7) << 3) | (Rdn & 0x7);
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}
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exports.opcodeASRSreg = opcodeASRSreg;
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function opcodeBT1(cond, imm8) {
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return (0b1101 << 12) | ((cond & 0xf) << 8) | ((imm8 >> 1) & 0x1ff);
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}
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exports.opcodeBT1 = opcodeBT1;
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function opcodeBT2(imm11) {
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return (0b11100 << 11) | ((imm11 >> 1) & 0x7ff);
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}
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exports.opcodeBT2 = opcodeBT2;
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function opcodeBICS(Rdn, Rm) {
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return (0b0100001110 << 6) | ((Rm & 7) << 3) | (Rdn & 7);
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}
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exports.opcodeBICS = opcodeBICS;
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function opcodeBL(imm) {
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const imm11 = (imm >> 1) & 0x7ff;
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const imm10 = (imm >> 12) & 0x3ff;
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const s = imm < 0 ? 1 : 0;
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const j2 = 1 - (((imm >> 22) & 0x1) ^ s);
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const j1 = 1 - (((imm >> 23) & 0x1) ^ s);
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const opcode = (0b1101 << 28) | (j1 << 29) | (j2 << 27) | (imm11 << 16) | (0b11110 << 11) | (s << 10) | imm10;
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return opcode >>> 0;
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}
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exports.opcodeBL = opcodeBL;
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function opcodeBLX(Rm) {
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return (0b010001111 << 7) | (Rm << 3);
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}
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exports.opcodeBLX = opcodeBLX;
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function opcodeBX(Rm) {
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return (0b010001110 << 7) | (Rm << 3);
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}
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exports.opcodeBX = opcodeBX;
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function opcodeCMN(Rn, Rm) {
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return (0b0100001011 << 6) | ((Rm & 0x7) << 3) | (Rn & 0x7);
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}
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exports.opcodeCMN = opcodeCMN;
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function opcodeCMPimm(Rn, Imm8) {
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return (0b00101 << 11) | ((Rn & 0x7) << 8) | (Imm8 & 0xff);
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}
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exports.opcodeCMPimm = opcodeCMPimm;
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function opcodeCMPregT1(Rn, Rm) {
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return (0b0100001010 << 6) | ((Rm & 0x7) << 3) | (Rn & 0x7);
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}
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exports.opcodeCMPregT1 = opcodeCMPregT1;
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function opcodeCMPregT2(Rn, Rm) {
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return (0b01000101 << 8) | (((Rn >> 3) & 0x1) << 7) | ((Rm & 0xf) << 3) | (Rn & 0x7);
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}
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exports.opcodeCMPregT2 = opcodeCMPregT2;
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function opcodeDMBSY() {
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return 0x8f50f3bf;
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}
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exports.opcodeDMBSY = opcodeDMBSY;
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function opcodeDSBSY() {
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return 0x8f4ff3bf;
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}
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exports.opcodeDSBSY = opcodeDSBSY;
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function opcodeEORS(Rdn, Rm) {
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return (0b0100000001 << 6) | ((Rm & 0x7) << 3) | (Rdn & 0x7);
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}
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exports.opcodeEORS = opcodeEORS;
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function opcodeISBSY() {
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return 0x8f6ff3bf;
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}
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exports.opcodeISBSY = opcodeISBSY;
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function opcodeLDMIA(Rn, registers) {
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return (0b11001 << 11) | ((Rn & 0x7) << 8) | (registers & 0xff);
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}
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exports.opcodeLDMIA = opcodeLDMIA;
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115
|
-
function opcodeLDRreg(Rt, Rn, Rm) {
|
|
116
|
-
return (0b0101100 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
117
|
-
}
|
|
118
|
-
exports.opcodeLDRreg = opcodeLDRreg;
|
|
119
|
-
function opcodeLDRimm(Rt, Rn, imm5) {
|
|
120
|
-
return (0b01101 << 11) | (((imm5 >> 2) & 0x1f) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
121
|
-
}
|
|
122
|
-
exports.opcodeLDRimm = opcodeLDRimm;
|
|
123
|
-
function opcodeLDRlit(Rt, imm8) {
|
|
124
|
-
return (0b01001 << 11) | ((imm8 >> 2) & 0xff) | ((Rt & 0x7) << 8);
|
|
125
|
-
}
|
|
126
|
-
exports.opcodeLDRlit = opcodeLDRlit;
|
|
127
|
-
function opcodeLDRB(Rt, Rn, imm5) {
|
|
128
|
-
return (0b01111 << 11) | ((imm5 & 0x1f) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
129
|
-
}
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130
|
-
exports.opcodeLDRB = opcodeLDRB;
|
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131
|
-
function opcodeLDRsp(Rt, imm8) {
|
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132
|
-
return (0b10011 << 11) | ((Rt & 7) << 8) | ((imm8 >> 2) & 0xff);
|
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133
|
-
}
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134
|
-
exports.opcodeLDRsp = opcodeLDRsp;
|
|
135
|
-
function opcodeLDRBreg(Rt, Rn, Rm) {
|
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136
|
-
return (0b0101110 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
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137
|
-
}
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138
|
-
exports.opcodeLDRBreg = opcodeLDRBreg;
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139
|
-
function opcodeLDRH(Rt, Rn, imm5) {
|
|
140
|
-
return (0b10001 << 11) | (((imm5 >> 1) & 0xf) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
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141
|
-
}
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142
|
-
exports.opcodeLDRH = opcodeLDRH;
|
|
143
|
-
function opcodeLDRHreg(Rt, Rn, Rm) {
|
|
144
|
-
return (0b0101101 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
145
|
-
}
|
|
146
|
-
exports.opcodeLDRHreg = opcodeLDRHreg;
|
|
147
|
-
function opcodeLDRSB(Rt, Rn, Rm) {
|
|
148
|
-
return (0b0101011 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
149
|
-
}
|
|
150
|
-
exports.opcodeLDRSB = opcodeLDRSB;
|
|
151
|
-
function opcodeLDRSH(Rt, Rn, Rm) {
|
|
152
|
-
return (0b0101111 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
153
|
-
}
|
|
154
|
-
exports.opcodeLDRSH = opcodeLDRSH;
|
|
155
|
-
function opcodeLSLSreg(Rdn, Rm) {
|
|
156
|
-
return (0b0100000010 << 6) | ((Rm & 0x7) << 3) | (Rdn & 0x7);
|
|
157
|
-
}
|
|
158
|
-
exports.opcodeLSLSreg = opcodeLSLSreg;
|
|
159
|
-
function opcodeLSLSimm(Rd, Rm, Imm5) {
|
|
160
|
-
return (0b00000 << 11) | ((Imm5 & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rd & 0x7);
|
|
161
|
-
}
|
|
162
|
-
exports.opcodeLSLSimm = opcodeLSLSimm;
|
|
163
|
-
function opcodeLSRS(Rd, Rm, imm5) {
|
|
164
|
-
return (0b00001 << 11) | ((imm5 & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rd & 0x7);
|
|
165
|
-
}
|
|
166
|
-
exports.opcodeLSRS = opcodeLSRS;
|
|
167
|
-
function opcodeLSRSreg(Rdn, Rm) {
|
|
168
|
-
return (0b0100000011 << 6) | ((Rm & 0x7) << 3) | (Rdn & 0x7);
|
|
169
|
-
}
|
|
170
|
-
exports.opcodeLSRSreg = opcodeLSRSreg;
|
|
171
|
-
function opcodeMOV(Rd, Rm) {
|
|
172
|
-
return (0b01000110 << 8) | ((Rd & 0x8 ? 1 : 0) << 7) | (Rm << 3) | (Rd & 0x7);
|
|
173
|
-
}
|
|
174
|
-
exports.opcodeMOV = opcodeMOV;
|
|
175
|
-
function opcodeMOVS(Rd, imm8) {
|
|
176
|
-
return (0b00100 << 11) | ((Rd & 0x7) << 8) | (imm8 & 0xff);
|
|
177
|
-
}
|
|
178
|
-
exports.opcodeMOVS = opcodeMOVS;
|
|
179
|
-
function opcodeMOVSreg(Rd, Rm) {
|
|
180
|
-
return (0b000000000 << 6) | ((Rm & 0x7) << 3) | (Rd & 0x7);
|
|
181
|
-
}
|
|
182
|
-
exports.opcodeMOVSreg = opcodeMOVSreg;
|
|
183
|
-
function opcodeMRS(Rd, specReg) {
|
|
184
|
-
return (((0b1000 << 28) | ((Rd & 0xf) << 24) | ((specReg & 0xff) << 16) | 0b1111001111101111) >>> 0);
|
|
185
|
-
}
|
|
186
|
-
exports.opcodeMRS = opcodeMRS;
|
|
187
|
-
function opcodeMSR(specReg, Rn) {
|
|
188
|
-
return ((0b10001000 << 24) | ((specReg & 0xff) << 16) | (0b111100111000 << 4) | (Rn & 0xf)) >>> 0;
|
|
189
|
-
}
|
|
190
|
-
exports.opcodeMSR = opcodeMSR;
|
|
191
|
-
function opcodeMULS(Rn, Rdm) {
|
|
192
|
-
return (0b0100001101 << 6) | ((Rn & 7) << 3) | (Rdm & 7);
|
|
193
|
-
}
|
|
194
|
-
exports.opcodeMULS = opcodeMULS;
|
|
195
|
-
function opcodeMVNS(Rd, Rm) {
|
|
196
|
-
return (0b0100001111 << 6) | ((Rm & 7) << 3) | (Rd & 7);
|
|
197
|
-
}
|
|
198
|
-
exports.opcodeMVNS = opcodeMVNS;
|
|
199
|
-
function opcodeNOP() {
|
|
200
|
-
return 0b1011111100000000;
|
|
201
|
-
}
|
|
202
|
-
exports.opcodeNOP = opcodeNOP;
|
|
203
|
-
function opcodeORRS(Rn, Rm) {
|
|
204
|
-
return (0b0100001100 << 6) | ((Rm & 0x7) << 3) | (Rn & 0x7);
|
|
205
|
-
}
|
|
206
|
-
exports.opcodeORRS = opcodeORRS;
|
|
207
|
-
function opcodePOP(P, registerList) {
|
|
208
|
-
return (0b1011110 << 9) | ((P ? 1 : 0) << 8) | registerList;
|
|
209
|
-
}
|
|
210
|
-
exports.opcodePOP = opcodePOP;
|
|
211
|
-
function opcodePUSH(M, registerList) {
|
|
212
|
-
return (0b1011010 << 9) | ((M ? 1 : 0) << 8) | registerList;
|
|
213
|
-
}
|
|
214
|
-
exports.opcodePUSH = opcodePUSH;
|
|
215
|
-
function opcodeREV(Rd, Rn) {
|
|
216
|
-
return (0b1011101000 << 6) | ((Rn & 0x7) << 3) | (Rd & 0x7);
|
|
217
|
-
}
|
|
218
|
-
exports.opcodeREV = opcodeREV;
|
|
219
|
-
function opcodeREV16(Rd, Rn) {
|
|
220
|
-
return (0b1011101001 << 6) | ((Rn & 0x7) << 3) | (Rd & 0x7);
|
|
221
|
-
}
|
|
222
|
-
exports.opcodeREV16 = opcodeREV16;
|
|
223
|
-
function opcodeREVSH(Rd, Rn) {
|
|
224
|
-
return (0b1011101011 << 6) | ((Rn & 0x7) << 3) | (Rd & 0x7);
|
|
225
|
-
}
|
|
226
|
-
exports.opcodeREVSH = opcodeREVSH;
|
|
227
|
-
function opcodeROR(Rdn, Rm) {
|
|
228
|
-
return (0b0100000111 << 6) | ((Rm & 0x7) << 3) | (Rdn & 0x7);
|
|
229
|
-
}
|
|
230
|
-
exports.opcodeROR = opcodeROR;
|
|
231
|
-
function opcodeRSBS(Rd, Rn) {
|
|
232
|
-
return (0b0100001001 << 6) | ((Rn & 0x7) << 3) | (Rd & 0x7);
|
|
233
|
-
}
|
|
234
|
-
exports.opcodeRSBS = opcodeRSBS;
|
|
235
|
-
function opcodeSBCS(Rn, Rm) {
|
|
236
|
-
return (0b0100000110 << 6) | ((Rm & 0x7) << 3) | (Rn & 0x7);
|
|
237
|
-
}
|
|
238
|
-
exports.opcodeSBCS = opcodeSBCS;
|
|
239
|
-
function opcodeSTMIA(Rn, registers) {
|
|
240
|
-
return (0b11000 << 11) | ((Rn & 0x7) << 8) | (registers & 0xff);
|
|
241
|
-
}
|
|
242
|
-
exports.opcodeSTMIA = opcodeSTMIA;
|
|
243
|
-
function opcodeSTR(Rt, Rm, imm5) {
|
|
244
|
-
return (0b01100 << 11) | (((imm5 >> 2) & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rt & 0x7);
|
|
245
|
-
}
|
|
246
|
-
exports.opcodeSTR = opcodeSTR;
|
|
247
|
-
function opcodeSTRsp(Rt, imm8) {
|
|
248
|
-
return (0b10010 << 11) | ((Rt & 7) << 8) | ((imm8 >> 2) & 0xff);
|
|
249
|
-
}
|
|
250
|
-
exports.opcodeSTRsp = opcodeSTRsp;
|
|
251
|
-
function opcodeSTRreg(Rt, Rn, Rm) {
|
|
252
|
-
return (0b0101000 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
253
|
-
}
|
|
254
|
-
exports.opcodeSTRreg = opcodeSTRreg;
|
|
255
|
-
function opcodeSTRB(Rt, Rm, imm5) {
|
|
256
|
-
return (0b01110 << 11) | ((imm5 & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rt & 0x7);
|
|
257
|
-
}
|
|
258
|
-
exports.opcodeSTRB = opcodeSTRB;
|
|
259
|
-
function opcodeSTRBreg(Rt, Rn, Rm) {
|
|
260
|
-
return (0b0101010 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
261
|
-
}
|
|
262
|
-
exports.opcodeSTRBreg = opcodeSTRBreg;
|
|
263
|
-
function opcodeSTRH(Rt, Rm, imm5) {
|
|
264
|
-
return (0b10000 << 11) | (((imm5 >> 1) & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rt & 0x7);
|
|
265
|
-
}
|
|
266
|
-
exports.opcodeSTRH = opcodeSTRH;
|
|
267
|
-
function opcodeSTRHreg(Rt, Rn, Rm) {
|
|
268
|
-
return (0b0101001 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
269
|
-
}
|
|
270
|
-
exports.opcodeSTRHreg = opcodeSTRHreg;
|
|
271
|
-
function opcodeSUBS1(Rd, Rn, imm3) {
|
|
272
|
-
return (0b0001111 << 9) | ((imm3 & 0x7) << 6) | ((Rn & 7) << 3) | (Rd & 7);
|
|
273
|
-
}
|
|
274
|
-
exports.opcodeSUBS1 = opcodeSUBS1;
|
|
275
|
-
function opcodeSUBS2(Rdn, imm8) {
|
|
276
|
-
return (0b00111 << 11) | ((Rdn & 7) << 8) | (imm8 & 0xff);
|
|
277
|
-
}
|
|
278
|
-
exports.opcodeSUBS2 = opcodeSUBS2;
|
|
279
|
-
function opcodeSUBSreg(Rd, Rn, Rm) {
|
|
280
|
-
return (0b0001101 << 9) | ((Rm & 0x7) << 6) | ((Rn & 7) << 3) | (Rd & 7);
|
|
281
|
-
}
|
|
282
|
-
exports.opcodeSUBSreg = opcodeSUBSreg;
|
|
283
|
-
function opcodeSUBsp(imm) {
|
|
284
|
-
return (0b101100001 << 7) | ((imm >> 2) & 0x7f);
|
|
285
|
-
}
|
|
286
|
-
exports.opcodeSUBsp = opcodeSUBsp;
|
|
287
|
-
function opcodeSVC(imm8) {
|
|
288
|
-
return (0b11011111 << 8) | (imm8 & 0xff);
|
|
289
|
-
}
|
|
290
|
-
exports.opcodeSVC = opcodeSVC;
|
|
291
|
-
function opcodeSXTB(Rd, Rm) {
|
|
292
|
-
return (0b1011001001 << 6) | ((Rm & 7) << 3) | (Rd & 7);
|
|
293
|
-
}
|
|
294
|
-
exports.opcodeSXTB = opcodeSXTB;
|
|
295
|
-
function opcodeSXTH(Rd, Rm) {
|
|
296
|
-
return (0b1011001000 << 6) | ((Rm & 7) << 3) | (Rd & 7);
|
|
297
|
-
}
|
|
298
|
-
exports.opcodeSXTH = opcodeSXTH;
|
|
299
|
-
function opcodeTST(Rm, Rn) {
|
|
300
|
-
return (0b0100001000 << 6) | ((Rn & 7) << 3) | (Rm & 7);
|
|
301
|
-
}
|
|
302
|
-
exports.opcodeTST = opcodeTST;
|
|
303
|
-
function opcodeUXTB(Rd, Rm) {
|
|
304
|
-
return (0b1011001011 << 6) | ((Rm & 7) << 3) | (Rd & 7);
|
|
305
|
-
}
|
|
306
|
-
exports.opcodeUXTB = opcodeUXTB;
|
|
307
|
-
function opcodeUDF(imm8) {
|
|
308
|
-
return ((0b11011110 << 8) | (imm8 & 0xff)) >>> 0;
|
|
309
|
-
}
|
|
310
|
-
exports.opcodeUDF = opcodeUDF;
|
|
311
|
-
function opcodeUDF2(imm16) {
|
|
312
|
-
const imm12 = imm16 & 0xfff;
|
|
313
|
-
const imm4 = (imm16 >> 12) & 0xf;
|
|
314
|
-
return ((0b111101111111 << 4) | imm4 | (0b1010 << 28) | (imm12 << 16)) >>> 0;
|
|
315
|
-
}
|
|
316
|
-
exports.opcodeUDF2 = opcodeUDF2;
|
|
317
|
-
function opcodeUXTH(Rd, Rm) {
|
|
318
|
-
return (0b1011001010 << 6) | ((Rm & 7) << 3) | (Rd & 7);
|
|
319
|
-
}
|
|
320
|
-
exports.opcodeUXTH = opcodeUXTH;
|
|
321
|
-
function opcodeWFI() {
|
|
322
|
-
return 0b1011111100110000;
|
|
323
|
-
}
|
|
324
|
-
exports.opcodeWFI = opcodeWFI;
|
|
325
|
-
function opcodeYIELD() {
|
|
326
|
-
return 0b1011111100010000;
|
|
327
|
-
}
|
|
328
|
-
exports.opcodeYIELD = opcodeYIELD;
|
|
1
|
+
"use strict";
|
|
2
|
+
Object.defineProperty(exports, "__esModule", { value: true });
|
|
3
|
+
exports.opcodePOP = exports.opcodeORRS = exports.opcodeNOP = exports.opcodeMVNS = exports.opcodeMULS = exports.opcodeMSR = exports.opcodeMRS = exports.opcodeMOVSreg = exports.opcodeMOVS = exports.opcodeMOV = exports.opcodeLSRSreg = exports.opcodeLSRS = exports.opcodeLSLSimm = exports.opcodeLSLSreg = exports.opcodeLDRSH = exports.opcodeLDRSB = exports.opcodeLDRHreg = exports.opcodeLDRH = exports.opcodeLDRBreg = exports.opcodeLDRsp = exports.opcodeLDRB = exports.opcodeLDRlit = exports.opcodeLDRimm = exports.opcodeLDRreg = exports.opcodeLDMIA = exports.opcodeISBSY = exports.opcodeEORS = exports.opcodeDSBSY = exports.opcodeDMBSY = exports.opcodeCMPregT2 = exports.opcodeCMPregT1 = exports.opcodeCMPimm = exports.opcodeCMN = exports.opcodeBX = exports.opcodeBLX = exports.opcodeBL = exports.opcodeBICS = exports.opcodeBT2 = exports.opcodeBT1 = exports.opcodeASRSreg = exports.opcodeASRS = exports.opcodeANDS = exports.opcodeADR = exports.opcodeADDreg = exports.opcodeADDSreg = exports.opcodeADDsp2 = exports.opcodeADDspPlusImm = exports.opcodeADDS2 = exports.opcodeADDS1 = exports.opcodeADCS = void 0;
|
|
4
|
+
exports.opcodeYIELD = exports.opcodeWFI = exports.opcodeUXTH = exports.opcodeUDF2 = exports.opcodeUDF = exports.opcodeUXTB = exports.opcodeTST = exports.opcodeSXTH = exports.opcodeSXTB = exports.opcodeSVC = exports.opcodeSUBsp = exports.opcodeSUBSreg = exports.opcodeSUBS2 = exports.opcodeSUBS1 = exports.opcodeSTRHreg = exports.opcodeSTRH = exports.opcodeSTRBreg = exports.opcodeSTRB = exports.opcodeSTRreg = exports.opcodeSTRsp = exports.opcodeSTR = exports.opcodeSTMIA = exports.opcodeSBCS = exports.opcodeRSBS = exports.opcodeROR = exports.opcodeREVSH = exports.opcodeREV16 = exports.opcodeREV = exports.opcodePUSH = void 0;
|
|
5
|
+
function opcodeADCS(Rdn, Rm) {
|
|
6
|
+
return (0b0100000101 << 6) | ((Rm & 7) << 3) | (Rdn & 7);
|
|
7
|
+
}
|
|
8
|
+
exports.opcodeADCS = opcodeADCS;
|
|
9
|
+
function opcodeADDS1(Rd, Rn, imm3) {
|
|
10
|
+
return (0b0001110 << 9) | ((imm3 & 0x7) << 6) | ((Rn & 7) << 3) | (Rd & 7);
|
|
11
|
+
}
|
|
12
|
+
exports.opcodeADDS1 = opcodeADDS1;
|
|
13
|
+
function opcodeADDS2(Rdn, imm8) {
|
|
14
|
+
return (0b00110 << 11) | ((Rdn & 7) << 8) | (imm8 & 0xff);
|
|
15
|
+
}
|
|
16
|
+
exports.opcodeADDS2 = opcodeADDS2;
|
|
17
|
+
function opcodeADDspPlusImm(Rd, imm8) {
|
|
18
|
+
return (0b10101 << 11) | ((Rd & 7) << 8) | ((imm8 >> 2) & 0xff);
|
|
19
|
+
}
|
|
20
|
+
exports.opcodeADDspPlusImm = opcodeADDspPlusImm;
|
|
21
|
+
function opcodeADDsp2(imm) {
|
|
22
|
+
return (0b101100000 << 7) | ((imm >> 2) & 0x7f);
|
|
23
|
+
}
|
|
24
|
+
exports.opcodeADDsp2 = opcodeADDsp2;
|
|
25
|
+
function opcodeADDSreg(Rd, Rn, Rm) {
|
|
26
|
+
return (0b0001100 << 9) | ((Rm & 0x7) << 6) | ((Rn & 7) << 3) | (Rd & 7);
|
|
27
|
+
}
|
|
28
|
+
exports.opcodeADDSreg = opcodeADDSreg;
|
|
29
|
+
function opcodeADDreg(Rdn, Rm) {
|
|
30
|
+
return (0b01000100 << 8) | ((Rdn & 0x8) << 4) | ((Rm & 0xf) << 3) | (Rdn & 0x7);
|
|
31
|
+
}
|
|
32
|
+
exports.opcodeADDreg = opcodeADDreg;
|
|
33
|
+
function opcodeADR(Rd, imm8) {
|
|
34
|
+
return (0b10100 << 11) | ((Rd & 7) << 8) | ((imm8 >> 2) & 0xff);
|
|
35
|
+
}
|
|
36
|
+
exports.opcodeADR = opcodeADR;
|
|
37
|
+
function opcodeANDS(Rn, Rm) {
|
|
38
|
+
return (0b0100000000 << 6) | ((Rm & 7) << 3) | (Rn & 0x7);
|
|
39
|
+
}
|
|
40
|
+
exports.opcodeANDS = opcodeANDS;
|
|
41
|
+
function opcodeASRS(Rd, Rm, imm5) {
|
|
42
|
+
return (0b00010 << 11) | ((imm5 & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rd & 0x7);
|
|
43
|
+
}
|
|
44
|
+
exports.opcodeASRS = opcodeASRS;
|
|
45
|
+
function opcodeASRSreg(Rdn, Rm) {
|
|
46
|
+
return (0b0100000100 << 6) | ((Rm & 0x7) << 3) | ((Rm & 0x7) << 3) | (Rdn & 0x7);
|
|
47
|
+
}
|
|
48
|
+
exports.opcodeASRSreg = opcodeASRSreg;
|
|
49
|
+
function opcodeBT1(cond, imm8) {
|
|
50
|
+
return (0b1101 << 12) | ((cond & 0xf) << 8) | ((imm8 >> 1) & 0x1ff);
|
|
51
|
+
}
|
|
52
|
+
exports.opcodeBT1 = opcodeBT1;
|
|
53
|
+
function opcodeBT2(imm11) {
|
|
54
|
+
return (0b11100 << 11) | ((imm11 >> 1) & 0x7ff);
|
|
55
|
+
}
|
|
56
|
+
exports.opcodeBT2 = opcodeBT2;
|
|
57
|
+
function opcodeBICS(Rdn, Rm) {
|
|
58
|
+
return (0b0100001110 << 6) | ((Rm & 7) << 3) | (Rdn & 7);
|
|
59
|
+
}
|
|
60
|
+
exports.opcodeBICS = opcodeBICS;
|
|
61
|
+
function opcodeBL(imm) {
|
|
62
|
+
const imm11 = (imm >> 1) & 0x7ff;
|
|
63
|
+
const imm10 = (imm >> 12) & 0x3ff;
|
|
64
|
+
const s = imm < 0 ? 1 : 0;
|
|
65
|
+
const j2 = 1 - (((imm >> 22) & 0x1) ^ s);
|
|
66
|
+
const j1 = 1 - (((imm >> 23) & 0x1) ^ s);
|
|
67
|
+
const opcode = (0b1101 << 28) | (j1 << 29) | (j2 << 27) | (imm11 << 16) | (0b11110 << 11) | (s << 10) | imm10;
|
|
68
|
+
return opcode >>> 0;
|
|
69
|
+
}
|
|
70
|
+
exports.opcodeBL = opcodeBL;
|
|
71
|
+
function opcodeBLX(Rm) {
|
|
72
|
+
return (0b010001111 << 7) | (Rm << 3);
|
|
73
|
+
}
|
|
74
|
+
exports.opcodeBLX = opcodeBLX;
|
|
75
|
+
function opcodeBX(Rm) {
|
|
76
|
+
return (0b010001110 << 7) | (Rm << 3);
|
|
77
|
+
}
|
|
78
|
+
exports.opcodeBX = opcodeBX;
|
|
79
|
+
function opcodeCMN(Rn, Rm) {
|
|
80
|
+
return (0b0100001011 << 6) | ((Rm & 0x7) << 3) | (Rn & 0x7);
|
|
81
|
+
}
|
|
82
|
+
exports.opcodeCMN = opcodeCMN;
|
|
83
|
+
function opcodeCMPimm(Rn, Imm8) {
|
|
84
|
+
return (0b00101 << 11) | ((Rn & 0x7) << 8) | (Imm8 & 0xff);
|
|
85
|
+
}
|
|
86
|
+
exports.opcodeCMPimm = opcodeCMPimm;
|
|
87
|
+
function opcodeCMPregT1(Rn, Rm) {
|
|
88
|
+
return (0b0100001010 << 6) | ((Rm & 0x7) << 3) | (Rn & 0x7);
|
|
89
|
+
}
|
|
90
|
+
exports.opcodeCMPregT1 = opcodeCMPregT1;
|
|
91
|
+
function opcodeCMPregT2(Rn, Rm) {
|
|
92
|
+
return (0b01000101 << 8) | (((Rn >> 3) & 0x1) << 7) | ((Rm & 0xf) << 3) | (Rn & 0x7);
|
|
93
|
+
}
|
|
94
|
+
exports.opcodeCMPregT2 = opcodeCMPregT2;
|
|
95
|
+
function opcodeDMBSY() {
|
|
96
|
+
return 0x8f50f3bf;
|
|
97
|
+
}
|
|
98
|
+
exports.opcodeDMBSY = opcodeDMBSY;
|
|
99
|
+
function opcodeDSBSY() {
|
|
100
|
+
return 0x8f4ff3bf;
|
|
101
|
+
}
|
|
102
|
+
exports.opcodeDSBSY = opcodeDSBSY;
|
|
103
|
+
function opcodeEORS(Rdn, Rm) {
|
|
104
|
+
return (0b0100000001 << 6) | ((Rm & 0x7) << 3) | (Rdn & 0x7);
|
|
105
|
+
}
|
|
106
|
+
exports.opcodeEORS = opcodeEORS;
|
|
107
|
+
function opcodeISBSY() {
|
|
108
|
+
return 0x8f6ff3bf;
|
|
109
|
+
}
|
|
110
|
+
exports.opcodeISBSY = opcodeISBSY;
|
|
111
|
+
function opcodeLDMIA(Rn, registers) {
|
|
112
|
+
return (0b11001 << 11) | ((Rn & 0x7) << 8) | (registers & 0xff);
|
|
113
|
+
}
|
|
114
|
+
exports.opcodeLDMIA = opcodeLDMIA;
|
|
115
|
+
function opcodeLDRreg(Rt, Rn, Rm) {
|
|
116
|
+
return (0b0101100 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
117
|
+
}
|
|
118
|
+
exports.opcodeLDRreg = opcodeLDRreg;
|
|
119
|
+
function opcodeLDRimm(Rt, Rn, imm5) {
|
|
120
|
+
return (0b01101 << 11) | (((imm5 >> 2) & 0x1f) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
121
|
+
}
|
|
122
|
+
exports.opcodeLDRimm = opcodeLDRimm;
|
|
123
|
+
function opcodeLDRlit(Rt, imm8) {
|
|
124
|
+
return (0b01001 << 11) | ((imm8 >> 2) & 0xff) | ((Rt & 0x7) << 8);
|
|
125
|
+
}
|
|
126
|
+
exports.opcodeLDRlit = opcodeLDRlit;
|
|
127
|
+
function opcodeLDRB(Rt, Rn, imm5) {
|
|
128
|
+
return (0b01111 << 11) | ((imm5 & 0x1f) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
129
|
+
}
|
|
130
|
+
exports.opcodeLDRB = opcodeLDRB;
|
|
131
|
+
function opcodeLDRsp(Rt, imm8) {
|
|
132
|
+
return (0b10011 << 11) | ((Rt & 7) << 8) | ((imm8 >> 2) & 0xff);
|
|
133
|
+
}
|
|
134
|
+
exports.opcodeLDRsp = opcodeLDRsp;
|
|
135
|
+
function opcodeLDRBreg(Rt, Rn, Rm) {
|
|
136
|
+
return (0b0101110 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
137
|
+
}
|
|
138
|
+
exports.opcodeLDRBreg = opcodeLDRBreg;
|
|
139
|
+
function opcodeLDRH(Rt, Rn, imm5) {
|
|
140
|
+
return (0b10001 << 11) | (((imm5 >> 1) & 0xf) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
141
|
+
}
|
|
142
|
+
exports.opcodeLDRH = opcodeLDRH;
|
|
143
|
+
function opcodeLDRHreg(Rt, Rn, Rm) {
|
|
144
|
+
return (0b0101101 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
145
|
+
}
|
|
146
|
+
exports.opcodeLDRHreg = opcodeLDRHreg;
|
|
147
|
+
function opcodeLDRSB(Rt, Rn, Rm) {
|
|
148
|
+
return (0b0101011 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
149
|
+
}
|
|
150
|
+
exports.opcodeLDRSB = opcodeLDRSB;
|
|
151
|
+
function opcodeLDRSH(Rt, Rn, Rm) {
|
|
152
|
+
return (0b0101111 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
153
|
+
}
|
|
154
|
+
exports.opcodeLDRSH = opcodeLDRSH;
|
|
155
|
+
function opcodeLSLSreg(Rdn, Rm) {
|
|
156
|
+
return (0b0100000010 << 6) | ((Rm & 0x7) << 3) | (Rdn & 0x7);
|
|
157
|
+
}
|
|
158
|
+
exports.opcodeLSLSreg = opcodeLSLSreg;
|
|
159
|
+
function opcodeLSLSimm(Rd, Rm, Imm5) {
|
|
160
|
+
return (0b00000 << 11) | ((Imm5 & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rd & 0x7);
|
|
161
|
+
}
|
|
162
|
+
exports.opcodeLSLSimm = opcodeLSLSimm;
|
|
163
|
+
function opcodeLSRS(Rd, Rm, imm5) {
|
|
164
|
+
return (0b00001 << 11) | ((imm5 & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rd & 0x7);
|
|
165
|
+
}
|
|
166
|
+
exports.opcodeLSRS = opcodeLSRS;
|
|
167
|
+
function opcodeLSRSreg(Rdn, Rm) {
|
|
168
|
+
return (0b0100000011 << 6) | ((Rm & 0x7) << 3) | (Rdn & 0x7);
|
|
169
|
+
}
|
|
170
|
+
exports.opcodeLSRSreg = opcodeLSRSreg;
|
|
171
|
+
function opcodeMOV(Rd, Rm) {
|
|
172
|
+
return (0b01000110 << 8) | ((Rd & 0x8 ? 1 : 0) << 7) | (Rm << 3) | (Rd & 0x7);
|
|
173
|
+
}
|
|
174
|
+
exports.opcodeMOV = opcodeMOV;
|
|
175
|
+
function opcodeMOVS(Rd, imm8) {
|
|
176
|
+
return (0b00100 << 11) | ((Rd & 0x7) << 8) | (imm8 & 0xff);
|
|
177
|
+
}
|
|
178
|
+
exports.opcodeMOVS = opcodeMOVS;
|
|
179
|
+
function opcodeMOVSreg(Rd, Rm) {
|
|
180
|
+
return (0b000000000 << 6) | ((Rm & 0x7) << 3) | (Rd & 0x7);
|
|
181
|
+
}
|
|
182
|
+
exports.opcodeMOVSreg = opcodeMOVSreg;
|
|
183
|
+
function opcodeMRS(Rd, specReg) {
|
|
184
|
+
return (((0b1000 << 28) | ((Rd & 0xf) << 24) | ((specReg & 0xff) << 16) | 0b1111001111101111) >>> 0);
|
|
185
|
+
}
|
|
186
|
+
exports.opcodeMRS = opcodeMRS;
|
|
187
|
+
function opcodeMSR(specReg, Rn) {
|
|
188
|
+
return ((0b10001000 << 24) | ((specReg & 0xff) << 16) | (0b111100111000 << 4) | (Rn & 0xf)) >>> 0;
|
|
189
|
+
}
|
|
190
|
+
exports.opcodeMSR = opcodeMSR;
|
|
191
|
+
function opcodeMULS(Rn, Rdm) {
|
|
192
|
+
return (0b0100001101 << 6) | ((Rn & 7) << 3) | (Rdm & 7);
|
|
193
|
+
}
|
|
194
|
+
exports.opcodeMULS = opcodeMULS;
|
|
195
|
+
function opcodeMVNS(Rd, Rm) {
|
|
196
|
+
return (0b0100001111 << 6) | ((Rm & 7) << 3) | (Rd & 7);
|
|
197
|
+
}
|
|
198
|
+
exports.opcodeMVNS = opcodeMVNS;
|
|
199
|
+
function opcodeNOP() {
|
|
200
|
+
return 0b1011111100000000;
|
|
201
|
+
}
|
|
202
|
+
exports.opcodeNOP = opcodeNOP;
|
|
203
|
+
function opcodeORRS(Rn, Rm) {
|
|
204
|
+
return (0b0100001100 << 6) | ((Rm & 0x7) << 3) | (Rn & 0x7);
|
|
205
|
+
}
|
|
206
|
+
exports.opcodeORRS = opcodeORRS;
|
|
207
|
+
function opcodePOP(P, registerList) {
|
|
208
|
+
return (0b1011110 << 9) | ((P ? 1 : 0) << 8) | registerList;
|
|
209
|
+
}
|
|
210
|
+
exports.opcodePOP = opcodePOP;
|
|
211
|
+
function opcodePUSH(M, registerList) {
|
|
212
|
+
return (0b1011010 << 9) | ((M ? 1 : 0) << 8) | registerList;
|
|
213
|
+
}
|
|
214
|
+
exports.opcodePUSH = opcodePUSH;
|
|
215
|
+
function opcodeREV(Rd, Rn) {
|
|
216
|
+
return (0b1011101000 << 6) | ((Rn & 0x7) << 3) | (Rd & 0x7);
|
|
217
|
+
}
|
|
218
|
+
exports.opcodeREV = opcodeREV;
|
|
219
|
+
function opcodeREV16(Rd, Rn) {
|
|
220
|
+
return (0b1011101001 << 6) | ((Rn & 0x7) << 3) | (Rd & 0x7);
|
|
221
|
+
}
|
|
222
|
+
exports.opcodeREV16 = opcodeREV16;
|
|
223
|
+
function opcodeREVSH(Rd, Rn) {
|
|
224
|
+
return (0b1011101011 << 6) | ((Rn & 0x7) << 3) | (Rd & 0x7);
|
|
225
|
+
}
|
|
226
|
+
exports.opcodeREVSH = opcodeREVSH;
|
|
227
|
+
function opcodeROR(Rdn, Rm) {
|
|
228
|
+
return (0b0100000111 << 6) | ((Rm & 0x7) << 3) | (Rdn & 0x7);
|
|
229
|
+
}
|
|
230
|
+
exports.opcodeROR = opcodeROR;
|
|
231
|
+
function opcodeRSBS(Rd, Rn) {
|
|
232
|
+
return (0b0100001001 << 6) | ((Rn & 0x7) << 3) | (Rd & 0x7);
|
|
233
|
+
}
|
|
234
|
+
exports.opcodeRSBS = opcodeRSBS;
|
|
235
|
+
function opcodeSBCS(Rn, Rm) {
|
|
236
|
+
return (0b0100000110 << 6) | ((Rm & 0x7) << 3) | (Rn & 0x7);
|
|
237
|
+
}
|
|
238
|
+
exports.opcodeSBCS = opcodeSBCS;
|
|
239
|
+
function opcodeSTMIA(Rn, registers) {
|
|
240
|
+
return (0b11000 << 11) | ((Rn & 0x7) << 8) | (registers & 0xff);
|
|
241
|
+
}
|
|
242
|
+
exports.opcodeSTMIA = opcodeSTMIA;
|
|
243
|
+
function opcodeSTR(Rt, Rm, imm5) {
|
|
244
|
+
return (0b01100 << 11) | (((imm5 >> 2) & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rt & 0x7);
|
|
245
|
+
}
|
|
246
|
+
exports.opcodeSTR = opcodeSTR;
|
|
247
|
+
function opcodeSTRsp(Rt, imm8) {
|
|
248
|
+
return (0b10010 << 11) | ((Rt & 7) << 8) | ((imm8 >> 2) & 0xff);
|
|
249
|
+
}
|
|
250
|
+
exports.opcodeSTRsp = opcodeSTRsp;
|
|
251
|
+
function opcodeSTRreg(Rt, Rn, Rm) {
|
|
252
|
+
return (0b0101000 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
253
|
+
}
|
|
254
|
+
exports.opcodeSTRreg = opcodeSTRreg;
|
|
255
|
+
function opcodeSTRB(Rt, Rm, imm5) {
|
|
256
|
+
return (0b01110 << 11) | ((imm5 & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rt & 0x7);
|
|
257
|
+
}
|
|
258
|
+
exports.opcodeSTRB = opcodeSTRB;
|
|
259
|
+
function opcodeSTRBreg(Rt, Rn, Rm) {
|
|
260
|
+
return (0b0101010 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
261
|
+
}
|
|
262
|
+
exports.opcodeSTRBreg = opcodeSTRBreg;
|
|
263
|
+
function opcodeSTRH(Rt, Rm, imm5) {
|
|
264
|
+
return (0b10000 << 11) | (((imm5 >> 1) & 0x1f) << 6) | ((Rm & 0x7) << 3) | (Rt & 0x7);
|
|
265
|
+
}
|
|
266
|
+
exports.opcodeSTRH = opcodeSTRH;
|
|
267
|
+
function opcodeSTRHreg(Rt, Rn, Rm) {
|
|
268
|
+
return (0b0101001 << 9) | ((Rm & 0x7) << 6) | ((Rn & 0x7) << 3) | (Rt & 0x7);
|
|
269
|
+
}
|
|
270
|
+
exports.opcodeSTRHreg = opcodeSTRHreg;
|
|
271
|
+
function opcodeSUBS1(Rd, Rn, imm3) {
|
|
272
|
+
return (0b0001111 << 9) | ((imm3 & 0x7) << 6) | ((Rn & 7) << 3) | (Rd & 7);
|
|
273
|
+
}
|
|
274
|
+
exports.opcodeSUBS1 = opcodeSUBS1;
|
|
275
|
+
function opcodeSUBS2(Rdn, imm8) {
|
|
276
|
+
return (0b00111 << 11) | ((Rdn & 7) << 8) | (imm8 & 0xff);
|
|
277
|
+
}
|
|
278
|
+
exports.opcodeSUBS2 = opcodeSUBS2;
|
|
279
|
+
function opcodeSUBSreg(Rd, Rn, Rm) {
|
|
280
|
+
return (0b0001101 << 9) | ((Rm & 0x7) << 6) | ((Rn & 7) << 3) | (Rd & 7);
|
|
281
|
+
}
|
|
282
|
+
exports.opcodeSUBSreg = opcodeSUBSreg;
|
|
283
|
+
function opcodeSUBsp(imm) {
|
|
284
|
+
return (0b101100001 << 7) | ((imm >> 2) & 0x7f);
|
|
285
|
+
}
|
|
286
|
+
exports.opcodeSUBsp = opcodeSUBsp;
|
|
287
|
+
function opcodeSVC(imm8) {
|
|
288
|
+
return (0b11011111 << 8) | (imm8 & 0xff);
|
|
289
|
+
}
|
|
290
|
+
exports.opcodeSVC = opcodeSVC;
|
|
291
|
+
function opcodeSXTB(Rd, Rm) {
|
|
292
|
+
return (0b1011001001 << 6) | ((Rm & 7) << 3) | (Rd & 7);
|
|
293
|
+
}
|
|
294
|
+
exports.opcodeSXTB = opcodeSXTB;
|
|
295
|
+
function opcodeSXTH(Rd, Rm) {
|
|
296
|
+
return (0b1011001000 << 6) | ((Rm & 7) << 3) | (Rd & 7);
|
|
297
|
+
}
|
|
298
|
+
exports.opcodeSXTH = opcodeSXTH;
|
|
299
|
+
function opcodeTST(Rm, Rn) {
|
|
300
|
+
return (0b0100001000 << 6) | ((Rn & 7) << 3) | (Rm & 7);
|
|
301
|
+
}
|
|
302
|
+
exports.opcodeTST = opcodeTST;
|
|
303
|
+
function opcodeUXTB(Rd, Rm) {
|
|
304
|
+
return (0b1011001011 << 6) | ((Rm & 7) << 3) | (Rd & 7);
|
|
305
|
+
}
|
|
306
|
+
exports.opcodeUXTB = opcodeUXTB;
|
|
307
|
+
function opcodeUDF(imm8) {
|
|
308
|
+
return ((0b11011110 << 8) | (imm8 & 0xff)) >>> 0;
|
|
309
|
+
}
|
|
310
|
+
exports.opcodeUDF = opcodeUDF;
|
|
311
|
+
function opcodeUDF2(imm16) {
|
|
312
|
+
const imm12 = imm16 & 0xfff;
|
|
313
|
+
const imm4 = (imm16 >> 12) & 0xf;
|
|
314
|
+
return ((0b111101111111 << 4) | imm4 | (0b1010 << 28) | (imm12 << 16)) >>> 0;
|
|
315
|
+
}
|
|
316
|
+
exports.opcodeUDF2 = opcodeUDF2;
|
|
317
|
+
function opcodeUXTH(Rd, Rm) {
|
|
318
|
+
return (0b1011001010 << 6) | ((Rm & 7) << 3) | (Rd & 7);
|
|
319
|
+
}
|
|
320
|
+
exports.opcodeUXTH = opcodeUXTH;
|
|
321
|
+
function opcodeWFI() {
|
|
322
|
+
return 0b1011111100110000;
|
|
323
|
+
}
|
|
324
|
+
exports.opcodeWFI = opcodeWFI;
|
|
325
|
+
function opcodeYIELD() {
|
|
326
|
+
return 0b1011111100010000;
|
|
327
|
+
}
|
|
328
|
+
exports.opcodeYIELD = opcodeYIELD;
|