@woosh/meep-engine 3.16.0 → 3.17.0

package/src/shade/renderer/particles/optimizer/particle_program_analysis.d.ts

@@ -1,6 +1,6 @@
 /**
- * The analysis every optimizer pass reads: instructions decoded into the operand runs they touch,
- * the def-use graph over those runs, and per-lane liveness.
+ * The analysis every optimizer pass reads: instructions decoded into the operands they resolve and
+ * the run they write, the def-use graph over those, and per-lane liveness.
  *
  * Everything here is derived, never authoritative — the instruction words are. A pass rewrites
  * words and the next one re-derives, which is why there is no incremental update path and no
@@ -11,56 +11,79 @@
  *
  * ## Lanes, not registers
  *
- * A register is one `f32` slot and an operand of width `w` is a RUN of `w` of them, so nothing here
- * is per-register: a value's producer is per (instruction, lane), and so is its liveness. The rules
- * for how far an operand reaches are irregular — reductions write one lane, `SCALE` and `CURVE`
- * have a scalar source, a `SWIZZLE` reads as far as its pattern names, `STORE_ATTR` and `KILL` keep
- * a *source* in the destination slot — and they are not restated here:
- * {@link vm_visit_register_operands} is the one place that knows them.
+ * A register is one `f32` slot and a value of width `w` is a run of `w` of them, so nothing here is
+ * per-register: a value's producer is per (instruction, lane), and so is its liveness. Which slots a
+ * source reads is the operand's own business — its base and its swizzle, read at as many lanes as the
+ * opcode takes of it — and {@link particle_read_slots} is the one place that turns an operand into
+ * slots. The ISA's {@link vm_visit_operands} is the one place that says how many lanes that is.
+ *
+ * ## Kinds
+ *
+ * A source is a register run or a literal, by the kind bits its instruction carries. Only the first
+ * is a run of the file, so `reads` holds only those — every question about liveness, aliasing and
+ * dependency is a question about the file, and a literal whose bits happen to look like a slot index
+ * must never answer it. The passes that care what a source *is* rather than where it lives — folding,
+ * sharing, the copy rewrites — read `sources`, which lists every operand with its kind.
  */
 /**
  * @typedef {object} ParticleOperandRun
- * @property {number} operand which operand this is: `-1` for the source that `STORE_ATTR` and
- *   `KILL` keep in the destination slot, otherwise the source slot `0..2`.
- * @property {number} base first register slot
- * @property {number} span consecutive slots the operand reaches
+ * @property {number} operand which source slot this is, `0..2`; `-1` for the destination
+ * @property {number} kind a `VM_KIND`; `REG` for every entry of `reads` and for the write
+ * @property {number} word the operand word as encoded
+ * @property {number} base first register slot, or `-1` for a literal
+ * @property {number} pattern the swizzle the operand reads through, as `pack_swizzle` packs one; the
+ *   identity for a write
+ * @property {number} lanes how many lanes the instruction reads of it — the operation's width, or one
+ *   for a slot the ISA marks scalar; for the write, how many it writes
+ * @property {number} span consecutive slots the operand reaches from its base
  */
 /**
  * @typedef {object} ParticleDecodedInstruction
  * @property {number} index position in the stream
- * @property {number[]} words the five instruction words
+ * @property {number[]} words the four instruction words
  * @property {number} op
  * @property {number} width the encoded width field
+ * @property {number} dst the encoded destination register
+ * @property {number} kinds the three source kinds as one field, as word 0 carries them
  * @property {number} operation_width lanes the operation spans, after the ISA's fixed-width rules
  * @property {object} meta the {@link VM_ISA} entry
  * @property {import("./particle_vm_semantics.js").ParticleOpSemantics} semantics
  * @property {ParticleOperandRun|null} write destination run, or null when the opcode writes nothing
- * @property {ParticleOperandRun[]} reads every register run the instruction reads
+ * @property {ParticleOperandRun[]} reads every register operand the instruction reads — the `REG` sources
+ * @property {ParticleOperandRun[]} sources every source operand, whatever its kind, in slot order
  */
 /**
- * Decode one instruction into the runs of register slots it reads and writes.
+ * Decode one instruction into the operands it resolves and the run it writes.
  *
- * @param {ArrayLike<number>} words the five words of a single instruction
+ * @param {ArrayLike<number>} words the four words of a single instruction
  * @param {number} [index]
  * @returns {ParticleDecodedInstruction}
  */
 export function decode_particle_instruction(words: ArrayLike<number>, index?: number): ParticleDecodedInstruction;
 /**
- * @param {ArrayLike<ArrayLike<number>>} instructions five-word tuples
+ * @param {ArrayLike<ArrayLike<number>>} instructions four-word tuples
  * @returns {ParticleDecodedInstruction[]}
  */
 export function decode_particle_instructions(instructions: ArrayLike<ArrayLike<number>>): ParticleDecodedInstruction[];
 /**
- * Whether an instruction's operands satisfy the rule {@link ../isa/ParticleProgram.js} enforces:
- * two runs of one instruction name the same slots or disjoint ones, never a partial overlap.
+ * The slots a register operand reads, one per lane read — in lane order, and a slot appears once per
+ * lane that reads it, so a broadcast lists the same slot several times.
+ *
+ * @param {ParticleOperandRun} read a `REG` run
+ * @param {number} [lanes] how many lanes to read; the operand's own count when left out
+ * @returns {number[]}
+ */
+export function particle_read_slots(read: ParticleOperandRun, lanes?: number): number[];
+/**
+ * Whether an instruction fits the register file: its kinds agree with its opcode, and every run it
+ * touches ends inside the file.
  *
- * Every executor reads slot `c` of a source to write slot `c` of the destination, so an exact alias
- * is fine and a shifted one would read slots the same instruction has already written. A pass that
- * moves a base or changes a width can turn a legal pair into an illegal one, so each of them checks
- * its candidate here before keeping it — cheaper than discovering it in `validate()` downstream, and
- * it keeps the rule stated once.
+ * There is no aliasing rule to check. Every executor resolves every source before it writes the
+ * destination, so a source may overlap the destination in any way and mean what it held before the
+ * instruction — which is also what lets a pass move a base or fold a swizzle without asking how the
+ * result sits against the other operands.
  *
- * @param {ArrayLike<number>} words the five words of a single instruction
+ * @param {ArrayLike<number>} words the four words of a single instruction
  * @returns {boolean}
  */
 export function particle_instruction_is_well_formed(words: ArrayLike<number>): boolean;
@@ -88,8 +111,6 @@ export function build_particle_def_use_graph(decoded: ParticleDecodedInstruction
  *   has an effect beyond its destination or something reads a lane it writes
  * @property {Int32Array} width per instruction: the width field it could carry, once the lanes
  *   nothing reads are dropped. Equal to the encoded one wherever narrowing is not allowed.
- * @property {Int32Array} pattern per instruction: the swizzle pattern at that width; the encoded
- *   one for every other opcode.
  * @property {Uint8Array} live_lanes per instruction: bitmask of destination lanes read later
  * @property {number} halt_index index of the first `HALT`, or `-1`
  */
@@ -102,8 +123,8 @@ export function build_particle_def_use_graph(decoded: ParticleDecodedInstruction
  * record, the kill flag or the RNG by the time it ends.
  *
  * Narrowing is decided inside the same backward pass rather than after it, because an instruction's
- * reads follow its width: narrowing a broadcast to two lanes shortens the run it reads, which is
- * what makes the value above it dead. Deciding both at once reaches that fixed point in one sweep.
+ * reads follow its width: a narrowed copy reads fewer lanes of its source, which is what makes the
+ * value above it dead. Deciding both at once reaches that fixed point in one sweep.
  *
  * @param {ParticleDecodedInstruction[]} decoded
  * @param {number} [register_slots]
@@ -111,15 +132,18 @@ export function build_particle_def_use_graph(decoded: ParticleDecodedInstruction
  */
 export function analyze_particle_lanes(decoded: ParticleDecodedInstruction[], register_slots?: number): ParticleLaneAnalysis;
 /**
- * How far a read reaches once the instruction is narrowed to `operation_width`.
+ * The most slots alive at once anywhere in the section — what a perfect allocator would need, and
+ * the one measure of an instruction order the scheduling pass is for.
  *
- * @param {ParticleDecodedInstruction} instruction
- * @param {ParticleOperandRun} read
- * @param {number} operation_width
- * @param {number} pattern the (possibly trimmed) swizzle pattern
+ * A slot is alive between a write and a later read of it; a read at the instruction that overwrites
+ * the slot counts for the value above, since every executor reads its sources before it writes.
+ * `HALT` is not special here: what follows one is dead code, and counting it can only overstate.
+ *
+ * @param {ParticleDecodedInstruction[]} decoded
+ * @param {number} [register_slots]
  * @returns {number}
  */
-export function read_span_at(instruction: ParticleDecodedInstruction, read: ParticleOperandRun, operation_width: number, pattern: number): number;
+export function particle_peak_live_slots(decoded: ParticleDecodedInstruction[], register_slots?: number): number;
 /**
  * @param {number} base_a
  * @param {number} span_a
@@ -132,7 +156,8 @@ export function particle_runs_overlap(base_a: number, span_a: number, base_b: nu
  * Whether anything in `[from, to)` reads or writes any slot of a run.
  *
  * What a pass moving an instruction has to ask: a value that nothing in the gap looks at or
- * disturbs can be produced anywhere in that gap.
+ * disturbs can be produced anywhere in that gap. A read is taken at its whole span, which is at
+ * least what it touches.
  *
  * @param {ParticleDecodedInstruction[]} decoded
  * @param {number} from inclusive
@@ -142,6 +167,18 @@ export function particle_runs_overlap(base_a: number, span_a: number, base_b: nu
  * @returns {boolean}
  */
 export function particle_run_is_touched_between(decoded: ParticleDecodedInstruction[], from: number, to: number, base: number, span: number): boolean;
+/**
+ * Whether anything in `[from, to)` writes any slot of a run — the weaker question, for a pass that
+ * needs a value to still be where it was but does not mind who has looked at it in between.
+ *
+ * @param {ParticleDecodedInstruction[]} decoded
+ * @param {number} from inclusive
+ * @param {number} to exclusive
+ * @param {number} base
+ * @param {number} span
+ * @returns {boolean}
+ */
+export function particle_run_is_written_between(decoded: ParticleDecodedInstruction[], from: number, to: number, base: number, span: number): boolean;
 /**
  * Whether every slot of a run is overwritten — or the section ends — before anything reads it again.
  *
@@ -163,9 +200,11 @@ export function particle_run_is_dead_after(decoded: ParticleDecodedInstruction[]
  * numbers, and both need a copy to carry its source's number across rather than minting a new one —
  * otherwise a value moved between registers stops being recognisable as itself.
  *
- * Numbers are minted per write and inherited by `MOV` and `SWIZZLE`, the only two opcodes that move
- * a value without changing it. Because a number is never reused, a slot overwritten since simply
- * fails to match, and there is no invalidation step to get wrong.
+ * Numbers are minted per write and inherited by `MOV`, the one opcode that moves a value without
+ * changing it — through whatever swizzle its source carries, so a broadcast's lanes all hold one
+ * number and a permutation's hold the source's in the permuted order. Because a number is never
+ * reused, a slot overwritten since simply fails to match, and there is no invalidation step to get
+ * wrong.
  */
 export class ParticleValueNumbering {
     /**
@@ -178,14 +217,25 @@ export class ParticleValueNumbering {
     value_id: Int32Array;
     /** @type {Int32Array} the slot each value was first computed in */
     home: Int32Array;
+    /** @type {Int32Array} which publish computed the value in each slot; `-1` for the reset's zero */
+    producer: Int32Array;
     /** @type {number} */
     next_id: number;
+    /** @type {number} publishes so far, which is what names a producer */
+    published: number;
     /**
      * @param {number} base
      * @param {number} span
      * @returns {number[]|null} the numbers in that run, or `null` if it leaves the file
      */
     ids_of(base: number, span: number): number[] | null;
+    /**
+     * The numbers a register operand reads, one per lane, through its swizzle.
+     *
+     * @param {ParticleOperandRun} read a `REG` run
+     * @returns {number[]|null} `null` if a lane reaches outside the file
+     */
+    ids_read(read: ParticleOperandRun): number[] | null;
     /**
      * @param {number} base
      * @param {number[]} ids
@@ -193,17 +243,23 @@ export class ParticleValueNumbering {
      */
     holds(base: number, ids: number[]): boolean;
     /**
-     * Where the values in a run were originally computed, when that is itself a run and still holds
-     * them.
+     * The register operand that reads the same values from where they were first computed.
      *
-     * Two lanes of a broadcast were both computed in the same slot, which is not a run — so a
-     * broadcast as a whole has no origin to be read past, however each of its lanes does.
+     * Lane by lane, the value a read sees has a home slot; if every home still holds its value and
+     * the homes fit in the four slots a swizzle can reach from one base, the read can be redirected
+     * there. That is how a copy is read through, a broadcast folds into the consumer's swizzle, and a
+     * value moved between registers stays recognisable as itself.
      *
-     * @param {number} base
-     * @param {number} span
-     * @returns {number} the origin's base, or `-1`
+     * Every lane has to come from ONE instruction. Two producers' results side by side could be named
+     * by one swizzled operand too, but folding them there would leave both producers where they are;
+     * forwarding one of them into the copy's slot deletes the copy outright, and that is the rewrite
+     * the copy-propagation pass wants to have the chance to make.
+     *
+     * @param {ParticleOperandRun} read a `REG` run
+     * @returns {number} a register operand word, or `-1` when the values are not all at home, come from
+     *   more than one producer, or their homes do not fit one operand
      */
-    origin_of(base: number, span: number): number;
+    origin_of_read(read: ParticleOperandRun): number;
     /**
      * Record what an instruction leaves in its destination.
      *
@@ -211,22 +267,39 @@ export class ParticleValueNumbering {
      * moved a source or rewritten the opcode by the time it gets here — the state has to describe
      * the program that will run.
      *
-     * @param {ArrayLike<number>} words the five words of a single instruction
+     * @param {ArrayLike<number>} words the four words of a single instruction
      */
     publish(words: ArrayLike<number>): void;
 }
 export type ParticleOperandRun = {
     /**
-     * which operand this is: `-1` for the source that `STORE_ATTR` and
-     * `KILL` keep in the destination slot, otherwise the source slot `0..2`.
+     * which source slot this is, `0..2`; `-1` for the destination
      */
     operand: number;
     /**
-     * first register slot
+     * a `VM_KIND`; `REG` for every entry of `reads` and for the write
+     */
+    kind: number;
+    /**
+     * the operand word as encoded
+     */
+    word: number;
+    /**
+     * first register slot, or `-1` for a literal
      */
     base: number;
     /**
-     * consecutive slots the operand reaches
+     * the swizzle the operand reads through, as `pack_swizzle` packs one; the
+     * identity for a write
+     */
+    pattern: number;
+    /**
+     * how many lanes the instruction reads of it — the operation's width, or one
+     * for a slot the ISA marks scalar; for the write, how many it writes
+     */
+    lanes: number;
+    /**
+     * consecutive slots the operand reaches from its base
      */
     span: number;
 };
@@ -236,7 +309,7 @@ export type ParticleDecodedInstruction = {
      */
     index: number;
     /**
-     * the five instruction words
+     * the four instruction words
      */
     words: number[];
     op: number;
@@ -244,6 +317,14 @@ export type ParticleDecodedInstruction = {
      * the encoded width field
      */
     width: number;
+    /**
+     * the encoded destination register
+     */
+    dst: number;
+    /**
+     * the three source kinds as one field, as word 0 carries them
+     */
+    kinds: number;
     /**
      * lanes the operation spans, after the ISA's fixed-width rules
      */
@@ -258,9 +339,13 @@ export type ParticleDecodedInstruction = {
      */
     write: ParticleOperandRun | null;
     /**
-     * every register run the instruction reads
+     * every register operand the instruction reads — the `REG` sources
      */
     reads: ParticleOperandRun[];
+    /**
+     * every source operand, whatever its kind, in slot order
+     */
+    sources: ParticleOperandRun[];
 };
 export type ParticleLaneAnalysis = {
     /**
@@ -273,11 +358,6 @@ export type ParticleLaneAnalysis = {
      * nothing reads are dropped. Equal to the encoded one wherever narrowing is not allowed.
      */
     width: Int32Array;
-    /**
-     * per instruction: the swizzle pattern at that width; the encoded
-     * one for every other opcode.
-     */
-    pattern: Int32Array;
     /**
      * per instruction: bitmask of destination lanes read later
      */

package/src/shade/renderer/particles/optimizer/particle_program_analysis.d.ts.map

@@ -1 +1 @@
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