@typeberry/lib 0.5.1-aff8b4f → 0.5.1-eb84786

package/packages/core/pvm-interpreter/ops-dispatchers/three-regs-dispatcher.test.js

@@ -0,0 +1,59 @@
+import assert from "node:assert";
+import { test } from "node:test";
+import { ArgumentType } from "../args-decoder/argument-type.js";
+import { instructionArgumentTypeMap } from "../args-decoder/instruction-argument-type-map.js";
+import { Instruction } from "../instruction.js";
+import { BitOps, BitRotationOps, BooleanOps, MathOps, MoveOps, ShiftOps } from "../ops/index.js";
+import { Registers } from "../registers.js";
+import { ThreeRegsDispatcher } from "./three-regs-dispatcher.js";
+test("ThreeRegsDispatcher", async (t) => {
+    const regs = new Registers();
+    const mathOps = new MathOps(regs);
+    const bitOps = new BitOps(regs);
+    const shiftOps = new ShiftOps(regs);
+    const booleanOps = new BooleanOps(regs);
+    const moveOps = new MoveOps(regs);
+    const bitRotationOps = new BitRotationOps(regs);
+    const mockFn = t.mock.fn();
+    function mockAllMethods(obj) {
+        const methodNames = Object.getOwnPropertyNames(Object.getPrototypeOf(obj));
+        for (const method of methodNames) {
+            t.mock.method(obj, method, mockFn);
+        }
+    }
+    t.before(() => {
+        mockAllMethods(bitOps);
+        mockAllMethods(booleanOps);
+        mockAllMethods(moveOps);
+        mockAllMethods(mathOps);
+        mockAllMethods(bitOps);
+        mockAllMethods(shiftOps);
+        mockAllMethods(bitRotationOps);
+    });
+    t.after(() => {
+        t.mock.restoreAll();
+    });
+    t.beforeEach(() => {
+        mockFn.mock.resetCalls();
+    });
+    const threeRegsInstructions = Object.entries(Instruction)
+        .filter((entry) => typeof entry[0] === "string" && typeof entry[1] === "number")
+        .filter((entry) => instructionArgumentTypeMap[entry[1]] === ArgumentType.THREE_REGISTERS);
+    for (const [name, instruction] of threeRegsInstructions) {
+        await t.test(`checks if instruction ${name} = ${instruction} is handled by ThreeRegsDispatcher`, () => {
+            const threeRegsDispatcher = new ThreeRegsDispatcher(mathOps, shiftOps, bitOps, booleanOps, moveOps, bitRotationOps);
+            threeRegsDispatcher.dispatch(instruction, {});
+            assert.strictEqual(mockFn.mock.calls.length, 1);
+        });
+    }
+    const otherInstructions = Object.entries(Instruction)
+        .filter((entry) => typeof entry[0] === "string" && typeof entry[1] === "number")
+        .filter((entry) => instructionArgumentTypeMap[entry[1]] !== ArgumentType.THREE_REGISTERS);
+    for (const [name, instruction] of otherInstructions) {
+        await t.test(`checks if instruction ${name} = ${instruction} is not handled by ThreeRegsDispatcher`, () => {
+            const threeRegsDispatcher = new ThreeRegsDispatcher(mathOps, shiftOps, bitOps, booleanOps, moveOps, bitRotationOps);
+            threeRegsDispatcher.dispatch(instruction, {});
+            assert.strictEqual(mockFn.mock.calls.length, 0);
+        });
+    }
+});

package/packages/core/pvm-interpreter/ops-dispatchers/two-imms-dispatcher.d.ts

@@ -0,0 +1,9 @@
+import type { TwoImmediatesArgs } from "../args-decoder/args-decoder.js";
+import { Instruction } from "../instruction.js";
+import type { StoreOps } from "../ops/index.js";
+export declare class TwoImmsDispatcher {
+    private storeOps;
+    constructor(storeOps: StoreOps);
+    dispatch(instruction: Instruction, args: TwoImmediatesArgs): void;
+}
+//# sourceMappingURL=two-imms-dispatcher.d.ts.map

package/packages/core/pvm-interpreter/ops-dispatchers/two-imms-dispatcher.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"two-imms-dispatcher.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops-dispatchers/two-imms-dispatcher.ts"],"names":[],"mappings":"AAAA,OAAO,KAAK,EAAE,iBAAiB,EAAE,MAAM,iCAAiC,CAAC;AACzE,OAAO,EAAE,WAAW,EAAE,MAAM,mBAAmB,CAAC;AAChD,OAAO,KAAK,EAAE,QAAQ,EAAE,MAAM,iBAAiB,CAAC;AAEhD,qBAAa,iBAAiB;IAChB,OAAO,CAAC,QAAQ;gBAAR,QAAQ,EAAE,QAAQ;IAEtC,QAAQ,CAAC,WAAW,EAAE,WAAW,EAAE,IAAI,EAAE,iBAAiB;CAgB3D"}

package/packages/core/pvm-interpreter/ops-dispatchers/two-imms-dispatcher.js

@@ -0,0 +1,23 @@
+import { Instruction } from "../instruction.js";
+export class TwoImmsDispatcher {
+    storeOps;
+    constructor(storeOps) {
+        this.storeOps = storeOps;
+    }
+    dispatch(instruction, args) {
+        switch (instruction) {
+            case Instruction.STORE_IMM_U8:
+                this.storeOps.storeImmediateU8(args.firstImmediateDecoder.getUnsigned(), args.secondImmediateDecoder);
+                break;
+            case Instruction.STORE_IMM_U16:
+                this.storeOps.storeImmediateU16(args.firstImmediateDecoder.getUnsigned(), args.secondImmediateDecoder);
+                break;
+            case Instruction.STORE_IMM_U32:
+                this.storeOps.storeImmediateU32(args.firstImmediateDecoder.getUnsigned(), args.secondImmediateDecoder);
+                break;
+            case Instruction.STORE_IMM_U64:
+                this.storeOps.storeImmediateU64(args.firstImmediateDecoder.getUnsigned(), args.secondImmediateDecoder);
+                break;
+        }
+    }
+}

package/packages/core/pvm-interpreter/ops-dispatchers/two-imms-dispatcher.test.d.ts

@@ -0,0 +1,2 @@
+export {};
+//# sourceMappingURL=two-imms-dispatcher.test.d.ts.map

package/packages/core/pvm-interpreter/ops-dispatchers/two-imms-dispatcher.test.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"two-imms-dispatcher.test.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops-dispatchers/two-imms-dispatcher.test.ts"],"names":[],"mappings":""}

package/packages/core/pvm-interpreter/ops-dispatchers/two-imms-dispatcher.test.js

@@ -0,0 +1,57 @@
+import assert from "node:assert";
+import { after, before, beforeEach, describe, it, mock } from "node:test";
+import { ArgumentType } from "../args-decoder/argument-type.js";
+import { ImmediateDecoder } from "../args-decoder/decoders/immediate-decoder.js";
+import { instructionArgumentTypeMap } from "../args-decoder/instruction-argument-type-map.js";
+import { Instruction } from "../instruction.js";
+import { InstructionResult } from "../instruction-result.js";
+import { Memory } from "../memory/index.js";
+import { StoreOps } from "../ops/index.js";
+import { Registers } from "../registers.js";
+import { TwoImmsDispatcher } from "./two-imms-dispatcher.js";
+describe("TwoImmsDispatcher", () => {
+    const regs = new Registers();
+    const memory = new Memory();
+    const instructionResult = new InstructionResult();
+    const storeOps = new StoreOps(regs, memory, instructionResult);
+    const mockFn = mock.fn();
+    function mockAllMethods(obj) {
+        const methodNames = Object.getOwnPropertyNames(Object.getPrototypeOf(obj));
+        for (const method of methodNames) {
+            mock.method(obj, method, mockFn);
+        }
+    }
+    before(() => {
+        mockAllMethods(storeOps);
+    });
+    after(() => {
+        mock.restoreAll();
+    });
+    beforeEach(() => {
+        mockFn.mock.resetCalls();
+    });
+    const argsMock = {
+        firstImmediateDecoder: new ImmediateDecoder(),
+        secondImmediateDecoder: new ImmediateDecoder(),
+    };
+    const relevantInstructions = Object.entries(Instruction)
+        .filter((entry) => typeof entry[0] === "string" && typeof entry[1] === "number")
+        .filter((entry) => instructionArgumentTypeMap[entry[1]] === ArgumentType.TWO_IMMEDIATES);
+    for (const [name, instruction] of relevantInstructions) {
+        it(`checks if instruction ${name} = ${instruction} is handled by TwoImmsDispatcher`, () => {
+            const dispatcher = new TwoImmsDispatcher(storeOps);
+            dispatcher.dispatch(instruction, argsMock);
+            assert.strictEqual(mockFn.mock.calls.length, 1);
+        });
+    }
+    const otherInstructions = Object.entries(Instruction)
+        .filter((entry) => typeof entry[0] === "string" && typeof entry[1] === "number")
+        .filter((entry) => instructionArgumentTypeMap[entry[1]] !== ArgumentType.TWO_IMMEDIATES);
+    for (const [name, instruction] of otherInstructions) {
+        it(`checks if instruction ${name} = ${instruction} is not handled by TwoImmsDispatcher`, () => {
+            const dispatcher = new TwoImmsDispatcher(storeOps);
+            dispatcher.dispatch(instruction, argsMock);
+            assert.strictEqual(mockFn.mock.calls.length, 0);
+        });
+    }
+});

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-dispatcher.d.ts

@@ -0,0 +1,12 @@
+import type { TwoRegistersArgs } from "../args-decoder/args-decoder.js";
+import { Instruction } from "../instruction.js";
+import type { BitOps, BitRotationOps, MemoryOps, MoveOps } from "../ops/index.js";
+export declare class TwoRegsDispatcher {
+    private moveOps;
+    private memoryOps;
+    private bitOps;
+    private bitRotationOps;
+    constructor(moveOps: MoveOps, memoryOps: MemoryOps, bitOps: BitOps, bitRotationOps: BitRotationOps);
+    dispatch(instruction: Instruction, args: TwoRegistersArgs): void;
+}
+//# sourceMappingURL=two-regs-dispatcher.d.ts.map

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-dispatcher.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"two-regs-dispatcher.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops-dispatchers/two-regs-dispatcher.ts"],"names":[],"mappings":"AAAA,OAAO,KAAK,EAAE,gBAAgB,EAAE,MAAM,iCAAiC,CAAC;AACxE,OAAO,EAAE,WAAW,EAAE,MAAM,mBAAmB,CAAC;AAChD,OAAO,KAAK,EAAE,MAAM,EAAE,cAAc,EAAE,SAAS,EAAE,OAAO,EAAE,MAAM,iBAAiB,CAAC;AAElF,qBAAa,iBAAiB;IAE1B,OAAO,CAAC,OAAO;IACf,OAAO,CAAC,SAAS;IACjB,OAAO,CAAC,MAAM;IACd,OAAO,CAAC,cAAc;gBAHd,OAAO,EAAE,OAAO,EAChB,SAAS,EAAE,SAAS,EACpB,MAAM,EAAE,MAAM,EACd,cAAc,EAAE,cAAc;IAGxC,QAAQ,CAAC,WAAW,EAAE,WAAW,EAAE,IAAI,EAAE,gBAAgB;CAmD1D"}

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-dispatcher.js

@@ -0,0 +1,53 @@
+import { Instruction } from "../instruction.js";
+export class TwoRegsDispatcher {
+    moveOps;
+    memoryOps;
+    bitOps;
+    bitRotationOps;
+    constructor(moveOps, memoryOps, bitOps, bitRotationOps) {
+        this.moveOps = moveOps;
+        this.memoryOps = memoryOps;
+        this.bitOps = bitOps;
+        this.bitRotationOps = bitRotationOps;
+    }
+    dispatch(instruction, args) {
+        switch (instruction) {
+            case Instruction.MOVE_REG:
+                this.moveOps.moveRegister(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.SBRK:
+                this.memoryOps.sbrk(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.COUNT_SET_BITS_64:
+                this.bitOps.countSetBits64(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.COUNT_SET_BITS_32:
+                this.bitOps.countSetBits32(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.LEADING_ZERO_BITS_64:
+                this.bitOps.leadingZeroBits64(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.LEADING_ZERO_BITS_32:
+                this.bitOps.leadingZeroBits32(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.TRAILING_ZERO_BITS_64:
+                this.bitOps.trailingZeroBits64(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.TRAILING_ZERO_BITS_32:
+                this.bitOps.trailingZeroBits32(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.SIGN_EXTEND_8:
+                this.bitOps.signExtend8(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.SIGN_EXTEND_16:
+                this.bitOps.signExtend16(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.ZERO_EXTEND_16:
+                this.bitOps.zeroExtend16(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+            case Instruction.REVERSE_BYTES:
+                this.bitRotationOps.reverseBytes(args.firstRegisterIndex, args.secondRegisterIndex);
+                break;
+        }
+    }
+}

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-dispatcher.test.d.ts

@@ -0,0 +1,2 @@
+export {};
+//# sourceMappingURL=two-regs-dispatcher.test.d.ts.map

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-dispatcher.test.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"two-regs-dispatcher.test.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops-dispatchers/two-regs-dispatcher.test.ts"],"names":[],"mappings":""}

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-dispatcher.test.js

@@ -0,0 +1,59 @@
+import assert from "node:assert";
+import { after, before, beforeEach, describe, it, mock } from "node:test";
+import { ArgumentType } from "../args-decoder/argument-type.js";
+import { instructionArgumentTypeMap } from "../args-decoder/instruction-argument-type-map.js";
+import { Instruction } from "../instruction.js";
+import { InstructionResult } from "../instruction-result.js";
+import { Memory } from "../memory/index.js";
+import { BitOps, BitRotationOps, MemoryOps, MoveOps } from "../ops/index.js";
+import { Registers } from "../registers.js";
+import { TwoRegsDispatcher } from "./two-regs-dispatcher.js";
+describe("TwoRegsDispatcher", () => {
+    const instructionResult = new InstructionResult();
+    const regs = new Registers();
+    const memory = new Memory();
+    const memoryOps = new MemoryOps(regs, memory, instructionResult);
+    const moveOps = new MoveOps(regs);
+    const bitOps = new BitOps(regs);
+    const bitRotationOps = new BitRotationOps(regs);
+    const mockFn = mock.fn();
+    function mockAllMethods(obj) {
+        const methodNames = Object.getOwnPropertyNames(Object.getPrototypeOf(obj));
+        for (const method of methodNames) {
+            mock.method(obj, method, mockFn);
+        }
+    }
+    before(() => {
+        mockAllMethods(memoryOps);
+        mockAllMethods(moveOps);
+        mockAllMethods(bitOps);
+        mockAllMethods(bitRotationOps);
+    });
+    after(() => {
+        mock.restoreAll();
+    });
+    beforeEach(() => {
+        mockFn.mock.resetCalls();
+    });
+    const argsMock = {};
+    const relevantInstructions = Object.entries(Instruction)
+        .filter((entry) => typeof entry[0] === "string" && typeof entry[1] === "number")
+        .filter((entry) => instructionArgumentTypeMap[entry[1]] === ArgumentType.TWO_REGISTERS);
+    for (const [name, instruction] of relevantInstructions) {
+        it(`checks if instruction ${name} = ${instruction} is handled by OneRegTwoImmsDispatcher`, () => {
+            const dispatcher = new TwoRegsDispatcher(moveOps, memoryOps, bitOps, bitRotationOps);
+            dispatcher.dispatch(instruction, argsMock);
+            assert.strictEqual(mockFn.mock.calls.length, 1);
+        });
+    }
+    const otherInstructions = Object.entries(Instruction)
+        .filter((entry) => typeof entry[0] === "string" && typeof entry[1] === "number")
+        .filter((entry) => instructionArgumentTypeMap[entry[1]] !== ArgumentType.TWO_REGISTERS);
+    for (const [name, instruction] of otherInstructions) {
+        it(`checks if instruction ${name} = ${instruction} is not handled by TwoRegsDispatcher`, () => {
+            const dispatcher = new TwoRegsDispatcher(moveOps, memoryOps, bitOps, bitRotationOps);
+            dispatcher.dispatch(instruction, argsMock);
+            assert.strictEqual(mockFn.mock.calls.length, 0);
+        });
+    }
+});

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-imm-dispatcher.d.ts

@@ -0,0 +1,16 @@
+import type { TwoRegistersOneImmediateArgs } from "../args-decoder/args-decoder.js";
+import { Instruction } from "../instruction.js";
+import type { BitOps, BitRotationOps, BooleanOps, LoadOps, MathOps, MoveOps, ShiftOps, StoreOps } from "../ops/index.js";
+export declare class TwoRegsOneImmDispatcher {
+    private mathOps;
+    private shiftOps;
+    private bitOps;
+    private booleanOps;
+    private moveOps;
+    private storeOps;
+    private loadOps;
+    private bitRotationOps;
+    constructor(mathOps: MathOps, shiftOps: ShiftOps, bitOps: BitOps, booleanOps: BooleanOps, moveOps: MoveOps, storeOps: StoreOps, loadOps: LoadOps, bitRotationOps: BitRotationOps);
+    dispatch(instruction: Instruction, args: TwoRegistersOneImmediateArgs): void;
+}
+//# sourceMappingURL=two-regs-one-imm-dispatcher.d.ts.map

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-imm-dispatcher.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"two-regs-one-imm-dispatcher.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-imm-dispatcher.ts"],"names":[],"mappings":"AAAA,OAAO,KAAK,EAAE,4BAA4B,EAAE,MAAM,iCAAiC,CAAC;AACpF,OAAO,EAAE,WAAW,EAAE,MAAM,mBAAmB,CAAC;AAChD,OAAO,KAAK,EACV,MAAM,EACN,cAAc,EACd,UAAU,EACV,OAAO,EACP,OAAO,EACP,OAAO,EACP,QAAQ,EACR,QAAQ,EACT,MAAM,iBAAiB,CAAC;AAEzB,qBAAa,uBAAuB;IAEhC,OAAO,CAAC,OAAO;IACf,OAAO,CAAC,QAAQ;IAChB,OAAO,CAAC,MAAM;IACd,OAAO,CAAC,UAAU;IAClB,OAAO,CAAC,OAAO;IACf,OAAO,CAAC,QAAQ;IAChB,OAAO,CAAC,OAAO;IACf,OAAO,CAAC,cAAc;gBAPd,OAAO,EAAE,OAAO,EAChB,QAAQ,EAAE,QAAQ,EAClB,MAAM,EAAE,MAAM,EACd,UAAU,EAAE,UAAU,EACtB,OAAO,EAAE,OAAO,EAChB,QAAQ,EAAE,QAAQ,EAClB,OAAO,EAAE,OAAO,EAChB,cAAc,EAAE,cAAc;IAGxC,QAAQ,CAAC,WAAW,EAAE,WAAW,EAAE,IAAI,EAAE,4BAA4B;CA2OtE"}

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-imm-dispatcher.js

@@ -0,0 +1,151 @@
+import { Instruction } from "../instruction.js";
+export class TwoRegsOneImmDispatcher {
+    mathOps;
+    shiftOps;
+    bitOps;
+    booleanOps;
+    moveOps;
+    storeOps;
+    loadOps;
+    bitRotationOps;
+    constructor(mathOps, shiftOps, bitOps, booleanOps, moveOps, storeOps, loadOps, bitRotationOps) {
+        this.mathOps = mathOps;
+        this.shiftOps = shiftOps;
+        this.bitOps = bitOps;
+        this.booleanOps = booleanOps;
+        this.moveOps = moveOps;
+        this.storeOps = storeOps;
+        this.loadOps = loadOps;
+        this.bitRotationOps = bitRotationOps;
+    }
+    dispatch(instruction, args) {
+        switch (instruction) {
+            case Instruction.ADD_IMM_32:
+                this.mathOps.addImmediateU32(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.ADD_IMM_64:
+                this.mathOps.addImmediateU64(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.MUL_IMM_32:
+                this.mathOps.mulImmediateU32(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.MUL_IMM_64:
+                this.mathOps.mulImmediateU64(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.NEG_ADD_IMM_32:
+                this.mathOps.negAddImmediateU32(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.NEG_ADD_IMM_64:
+                this.mathOps.negAddImmediateU64(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHLO_L_IMM_32:
+                this.shiftOps.shiftLogicalLeftImmediateU32(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHLO_L_IMM_64:
+                this.shiftOps.shiftLogicalLeftImmediateU64(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHLO_L_IMM_ALT_32:
+                this.shiftOps.shiftLogicalLeftImmediateAlternativeU32(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHLO_L_IMM_ALT_64:
+                this.shiftOps.shiftLogicalLeftImmediateAlternativeU64(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHLO_R_IMM_32:
+                this.shiftOps.shiftLogicalRightImmediateU32(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHLO_R_IMM_64:
+                this.shiftOps.shiftLogicalRightImmediateU64(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHLO_R_IMM_ALT_32:
+                this.shiftOps.shiftLogicalRightImmediateAlternativeU32(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHLO_R_IMM_ALT_64:
+                this.shiftOps.shiftLogicalRightImmediateAlternativeU64(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHAR_R_IMM_32:
+                this.shiftOps.shiftArithmeticRightImmediateU32(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHAR_R_IMM_64:
+                this.shiftOps.shiftArithmeticRightImmediateU64(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHAR_R_IMM_ALT_32:
+                this.shiftOps.shiftArithmeticRightImmediateAlternativeU32(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SHAR_R_IMM_ALT_64:
+                this.shiftOps.shiftArithmeticRightImmediateAlternativeU64(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.OR_IMM:
+                this.bitOps.orImmediate(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.AND_IMM:
+                this.bitOps.andImmediate(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.XOR_IMM:
+                this.bitOps.xorImmediate(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SET_LT_S_IMM:
+                this.booleanOps.setLessThanSignedImmediate(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SET_LT_U_IMM:
+                this.booleanOps.setLessThanUnsignedImmediate(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SET_GT_S_IMM:
+                this.booleanOps.setGreaterThanSignedImmediate(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.SET_GT_U_IMM:
+                this.booleanOps.setGreaterThanUnsignedImmediate(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.CMOV_IZ_IMM:
+                this.moveOps.cmovIfZeroImmediate(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.CMOV_NZ_IMM:
+                this.moveOps.cmovIfNotZeroImmediate(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.STORE_IND_U8:
+                this.storeOps.storeIndU8(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.STORE_IND_U16:
+                this.storeOps.storeIndU16(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.STORE_IND_U32:
+                this.storeOps.storeIndU32(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.STORE_IND_U64:
+                this.storeOps.storeIndU64(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.LOAD_IND_U8:
+                this.loadOps.loadIndU8(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.LOAD_IND_U16:
+                this.loadOps.loadIndU16(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.LOAD_IND_U32:
+                this.loadOps.loadIndU32(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.LOAD_IND_U64:
+                this.loadOps.loadIndU64(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.LOAD_IND_I8:
+                this.loadOps.loadIndI8(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.LOAD_IND_I16:
+                this.loadOps.loadIndI16(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.LOAD_IND_I32:
+                this.loadOps.loadIndI32(args.firstRegisterIndex, args.secondRegisterIndex, args.immediateDecoder);
+                break;
+            case Instruction.ROT_R_64_IMM:
+                this.bitRotationOps.rotR64Imm(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.ROT_R_64_IMM_ALT:
+                this.bitRotationOps.rotR64ImmAlt(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.ROT_R_32_IMM:
+                this.bitRotationOps.rotR32Imm(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+            case Instruction.ROT_R_32_IMM_ALT:
+                this.bitRotationOps.rotR32ImmAlt(args.secondRegisterIndex, args.immediateDecoder, args.firstRegisterIndex);
+                break;
+        }
+    }
+}

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-imm-dispatcher.test.d.ts

@@ -0,0 +1,2 @@
+export {};
+//# sourceMappingURL=two-regs-one-imm-dispatcher.test.d.ts.map

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-imm-dispatcher.test.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"two-regs-one-imm-dispatcher.test.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-imm-dispatcher.test.ts"],"names":[],"mappings":""}

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-imm-dispatcher.test.js

@@ -0,0 +1,70 @@
+import assert from "node:assert";
+import { after, before, beforeEach, describe, it, mock } from "node:test";
+import { ArgumentType } from "../args-decoder/argument-type.js";
+import { ImmediateDecoder } from "../args-decoder/decoders/immediate-decoder.js";
+import { instructionArgumentTypeMap } from "../args-decoder/instruction-argument-type-map.js";
+import { Instruction } from "../instruction.js";
+import { InstructionResult } from "../instruction-result.js";
+import { Memory } from "../memory/index.js";
+import { BitOps, BitRotationOps, BooleanOps, LoadOps, MathOps, MoveOps, ShiftOps, StoreOps } from "../ops/index.js";
+import { Registers } from "../registers.js";
+import { TwoRegsOneImmDispatcher } from "./two-regs-one-imm-dispatcher.js";
+describe("TwoRegsOneImmDispatcher", () => {
+    const instructionResult = new InstructionResult();
+    const regs = new Registers();
+    const memory = new Memory();
+    const mathOps = new MathOps(regs);
+    const shiftOps = new ShiftOps(regs);
+    const bitOps = new BitOps(regs);
+    const booleanOps = new BooleanOps(regs);
+    const moveOps = new MoveOps(regs);
+    const storeOps = new StoreOps(regs, memory, instructionResult);
+    const loadOps = new LoadOps(regs, memory, instructionResult);
+    const bitRotationOps = new BitRotationOps(regs);
+    const mockFn = mock.fn();
+    function mockAllMethods(obj) {
+        const methodNames = Object.getOwnPropertyNames(Object.getPrototypeOf(obj));
+        for (const method of methodNames) {
+            mock.method(obj, method, mockFn);
+        }
+    }
+    before(() => {
+        mockAllMethods(mathOps);
+        mockAllMethods(shiftOps);
+        mockAllMethods(bitOps);
+        mockAllMethods(booleanOps);
+        mockAllMethods(moveOps);
+        mockAllMethods(storeOps);
+        mockAllMethods(loadOps);
+        mockAllMethods(bitRotationOps);
+    });
+    after(() => {
+        mock.restoreAll();
+    });
+    beforeEach(() => {
+        mockFn.mock.resetCalls();
+    });
+    const argsMock = {
+        immediateDecoder: new ImmediateDecoder(),
+    };
+    const relevantInstructions = Object.entries(Instruction)
+        .filter((entry) => typeof entry[0] === "string" && typeof entry[1] === "number")
+        .filter((entry) => instructionArgumentTypeMap[entry[1]] === ArgumentType.TWO_REGISTERS_ONE_IMMEDIATE);
+    for (const [name, instruction] of relevantInstructions) {
+        it(`checks if instruction ${name} = ${instruction} is handled by TwoRegsOneImmDispatcher`, () => {
+            const dispatcher = new TwoRegsOneImmDispatcher(mathOps, shiftOps, bitOps, booleanOps, moveOps, storeOps, loadOps, bitRotationOps);
+            dispatcher.dispatch(instruction, argsMock);
+            assert.strictEqual(mockFn.mock.calls.length, 1);
+        });
+    }
+    const otherInstructions = Object.entries(Instruction)
+        .filter((entry) => typeof entry[0] === "string" && typeof entry[1] === "number")
+        .filter((entry) => instructionArgumentTypeMap[entry[1]] !== ArgumentType.TWO_REGISTERS_ONE_IMMEDIATE);
+    for (const [name, instruction] of otherInstructions) {
+        it(`checks if instruction ${name} = ${instruction} is not handled by TwoRegsOneImmDispatcher`, () => {
+            const dispatcher = new TwoRegsOneImmDispatcher(mathOps, shiftOps, bitOps, booleanOps, moveOps, storeOps, loadOps, bitRotationOps);
+            dispatcher.dispatch(instruction, argsMock);
+            assert.strictEqual(mockFn.mock.calls.length, 0);
+        });
+    }
+});

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-offset-dispatcher.d.ts

@@ -0,0 +1,9 @@
+import type { TwoRegistersOneOffsetArgs } from "../args-decoder/args-decoder.js";
+import { Instruction } from "../instruction.js";
+import type { BranchOps } from "../ops/index.js";
+export declare class TwoRegsOneOffsetDispatcher {
+    private branchOps;
+    constructor(branchOps: BranchOps);
+    dispatch(instruction: Instruction, args: TwoRegistersOneOffsetArgs): void;
+}
+//# sourceMappingURL=two-regs-one-offset-dispatcher.d.ts.map

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-offset-dispatcher.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"two-regs-one-offset-dispatcher.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-offset-dispatcher.ts"],"names":[],"mappings":"AAAA,OAAO,KAAK,EAAE,yBAAyB,EAAE,MAAM,iCAAiC,CAAC;AACjF,OAAO,EAAE,WAAW,EAAE,MAAM,mBAAmB,CAAC;AAChD,OAAO,KAAK,EAAE,SAAS,EAAE,MAAM,iBAAiB,CAAC;AAEjD,qBAAa,0BAA0B;IACzB,OAAO,CAAC,SAAS;gBAAT,SAAS,EAAE,SAAS;IAExC,QAAQ,CAAC,WAAW,EAAE,WAAW,EAAE,IAAI,EAAE,yBAAyB;CAsBnE"}

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-offset-dispatcher.js

@@ -0,0 +1,29 @@
+import { Instruction } from "../instruction.js";
+export class TwoRegsOneOffsetDispatcher {
+    branchOps;
+    constructor(branchOps) {
+        this.branchOps = branchOps;
+    }
+    dispatch(instruction, args) {
+        switch (instruction) {
+            case Instruction.BRANCH_EQ:
+                this.branchOps.branchEq(args.firstRegisterIndex, args.secondRegisterIndex, args.nextPc);
+                break;
+            case Instruction.BRANCH_NE:
+                this.branchOps.branchNe(args.firstRegisterIndex, args.secondRegisterIndex, args.nextPc);
+                break;
+            case Instruction.BRANCH_LT_U:
+                this.branchOps.branchLtUnsigned(args.firstRegisterIndex, args.secondRegisterIndex, args.nextPc);
+                break;
+            case Instruction.BRANCH_LT_S:
+                this.branchOps.branchLtSigned(args.firstRegisterIndex, args.secondRegisterIndex, args.nextPc);
+                break;
+            case Instruction.BRANCH_GE_U:
+                this.branchOps.branchGeUnsigned(args.firstRegisterIndex, args.secondRegisterIndex, args.nextPc);
+                break;
+            case Instruction.BRANCH_GE_S:
+                this.branchOps.branchGeSigned(args.firstRegisterIndex, args.secondRegisterIndex, args.nextPc);
+                break;
+        }
+    }
+}

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-offset-dispatcher.test.d.ts

@@ -0,0 +1,2 @@
+export {};
+//# sourceMappingURL=two-regs-one-offset-dispatcher.test.d.ts.map

package/packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-offset-dispatcher.test.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"two-regs-one-offset-dispatcher.test.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops-dispatchers/two-regs-one-offset-dispatcher.test.ts"],"names":[],"mappings":""}