@typeberry/lib 0.5.1-aff8b4f → 0.5.1-eb84786

package/packages/core/pvm-interpreter/ops/bit-rotation-ops.test.js

@@ -0,0 +1,416 @@
+import assert from "node:assert";
+import { describe, it } from "node:test";
+import { ImmediateDecoder } from "../args-decoder/decoders/immediate-decoder.js";
+import { Registers } from "../registers.js";
+import { bigintToUint8ArrayLE } from "../test-utils.js";
+import { BitRotationOps } from "./bit-rotation-ops.js";
+describe("BitRotationOps", () => {
+    describe("reverseBytes", () => {
+        function prepareData(firstValue) {
+            const regs = new Registers();
+            const valueRegisterIndex = 0;
+            const resultRegisterIndex = 12;
+            regs.setU64(valueRegisterIndex, firstValue);
+            const bitRotationOps = new BitRotationOps(regs);
+            return { regs, bitRotationOps, valueRegisterIndex, resultRegisterIndex };
+        }
+        it("should reverse bytes in positive number", () => {
+            const value = 0x123456789abcdef0n;
+            const expectedValue = 0xf0debc9a78563412n;
+            const { bitRotationOps, regs, resultRegisterIndex, valueRegisterIndex } = prepareData(value);
+            bitRotationOps.reverseBytes(valueRegisterIndex, resultRegisterIndex);
+            assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+        });
+        it("should reverse bytes in negative number", () => {
+            const value = -0x123456789abcdef0n;
+            const expectedValue = 0x1021436587a9cbedn;
+            const { bitRotationOps, regs, resultRegisterIndex, valueRegisterIndex } = prepareData(value);
+            bitRotationOps.reverseBytes(valueRegisterIndex, resultRegisterIndex);
+            assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+        });
+    });
+    function prepareData(firstValue, secondValue) {
+        const regs = new Registers();
+        const firstRegisterIndex = 0;
+        const secondRegisterIndex = 1;
+        const resultRegisterIndex = 12;
+        regs.setU64(firstRegisterIndex, firstValue);
+        regs.setU64(secondRegisterIndex, secondValue);
+        const immediate = new ImmediateDecoder();
+        immediate.setBytes(bigintToUint8ArrayLE(secondValue));
+        const bitRotationOps = new BitRotationOps(regs);
+        return { regs, bitRotationOps, immediate, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex };
+    }
+    describe("rot left", () => {
+        describe("rotL64", () => {
+            it("should correctly rotate bits (positive number)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 28n;
+                const expectedValue = 0x89abcdef01234567n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL64(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (negative number)", () => {
+                const value = -0x123456789abcdef0n;
+                const shift = 28n;
+                const expectedValue = 0x765432110edcba98n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL64(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (no rotation)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 0n;
+                const expectedValue = 0x123456789abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL64(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (full rotation)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 64n;
+                const expectedValue = 0x123456789abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL64(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (shift overflow)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 128n;
+                const expectedValue = 0x123456789abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL64(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+        });
+        describe("rotL32", () => {
+            it("should correctly rotate bits (positive number)", () => {
+                const value = 0x12345678n;
+                const shift = 12n;
+                const expectedValue = 0x45678123n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (positive number, max value and max shift)", () => {
+                const value = 0x7ffffffen;
+                const shift = 31n;
+                const expectedValue = 0x3fffffffn;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (negative number)", () => {
+                const value = -0x12345678n;
+                const shift = 16n;
+                const expectedValue = 0xffffffffa988edcbn;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (no rotation)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 0n;
+                const expectedValue = 0xffffffff9abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (full rotation)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 32n;
+                const expectedValue = 0xffffffff9abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (shift overflow)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 128n;
+                const expectedValue = 0xffffffff9abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotL32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+        });
+    });
+    describe("rot right", () => {
+        describe("rotR64", () => {
+            it("should correctly rotate bits (positive number)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 28n;
+                const expectedValue = 0xabcdef0123456789n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR64(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (negative number)", () => {
+                const value = -0x123456789abcdef0n;
+                const shift = 28n;
+                const expectedValue = 0x5432110edcba9876n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR64(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (no rotation)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 0n;
+                const expectedValue = 0x123456789abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR64(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (full rotation)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 64n;
+                const expectedValue = 0x123456789abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR64(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (shift overflow)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 128n;
+                const expectedValue = 0x123456789abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR64(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+        });
+        describe("rotR32", () => {
+            it("should correctly rotate bits (positive number)", () => {
+                const value = 0x12345678n;
+                const shift = 12n;
+                const expectedValue = 0x67812345n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (positive number, max value and max shift)", () => {
+                const value = 0x7ffffffen;
+                const shift = 31n;
+                const expectedValue = 0xfffffffffffffffcn;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (negative number)", () => {
+                const value = -0x12345678n;
+                const shift = 16n;
+                const expectedValue = 0xffffffffa988edcbn;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (no rotation)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 0n;
+                const expectedValue = 0xffffffff9abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (full rotation)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 32n;
+                const expectedValue = 0xffffffff9abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (shift overflow)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 128n;
+                const expectedValue = 0xffffffff9abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, secondRegisterIndex, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32(firstRegisterIndex, secondRegisterIndex, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+        });
+        describe("rotR64Imm", () => {
+            it("should correctly rotate bits (positive number)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 28n;
+                const expectedValue = 0xabcdef0123456789n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR64Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (negative number)", () => {
+                const value = -0x123456789abcdef0n;
+                const shift = 28n;
+                const expectedValue = 0x5432110edcba9876n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR64Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (no rotation)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 0n;
+                const expectedValue = 0x123456789abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR64Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (full rotation)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 64n;
+                const expectedValue = 0x123456789abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR64Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (shift overflow)", () => {
+                const value = 0x123456789abcdef0n;
+                const shift = 128n;
+                const expectedValue = 0x123456789abcdef0n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR64Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+        });
+        describe("rotR64ImmAlt", () => {
+            it("should correctly rotate bits (positive number)", () => {
+                const value = 0x12345678n;
+                const shift = 28n;
+                const expectedValue = 0x2345678000000001n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR64ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (negative number)", () => {
+                const value = -0x12345678n;
+                const shift = 28n;
+                const expectedValue = 0xdcba988ffffffffen;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR64ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (no rotation)", () => {
+                const value = 0x12345678n;
+                const shift = 0n;
+                const expectedValue = 0x12345678n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR64ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (full rotation)", () => {
+                const value = 0x12345678n;
+                const shift = 64n;
+                const expectedValue = 0x12345678n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR64ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (shift overflow)", () => {
+                const value = 0x12345678n;
+                const shift = 128n;
+                const expectedValue = 0x12345678n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR64ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+        });
+        describe("rotR32Imm", () => {
+            it("should correctly rotate bits (positive number)", () => {
+                const value = 0x12345678n;
+                const shift = 12n;
+                const expectedValue = 0x67812345n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (positive number, max value and max shift)", () => {
+                const value = 0x7ffffffen;
+                const shift = 31n;
+                const expectedValue = 0xfffffffffffffffcn;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (negative number)", () => {
+                const value = -0x12345678n;
+                const shift = 16n;
+                const expectedValue = 0xffffffffa988edcbn;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (no rotation)", () => {
+                const value = 0x12345678n;
+                const shift = 0n;
+                const expectedValue = 0x12345678n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (full rotation)", () => {
+                const value = 0x12345678n;
+                const shift = 32n;
+                const expectedValue = 0x12345678n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (shift overflow)", () => {
+                const value = 0x12345678n;
+                const shift = 128n;
+                const expectedValue = 0x12345678n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(value, shift);
+                bitRotationOps.rotR32Imm(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+        });
+        describe("rotR32ImmAlt", () => {
+            it("should correctly rotate bits (positive number)", () => {
+                const value = 0x12345678n;
+                const shift = 12n;
+                const expectedValue = 0x67812345n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR32ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (positive number, max value and max shift)", () => {
+                const value = 0x7ffffffen;
+                const shift = 31n;
+                const expectedValue = 0xfffffffffffffffcn;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR32ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (negative number)", () => {
+                const value = -0x12345678n;
+                const shift = 16n;
+                const expectedValue = 0xffffffffa988edcbn;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR32ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (no rotation)", () => {
+                const value = 0x12345678n;
+                const shift = 0n;
+                const expectedValue = 0x12345678n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR32ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (full rotation)", () => {
+                const value = 0x12345678n;
+                const shift = 32n;
+                const expectedValue = 0x12345678n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR32ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+            it("should correctly rotate bits (shift overflow)", () => {
+                const value = 0x12345678n;
+                const shift = 128n;
+                const expectedValue = 0x12345678n;
+                const { bitRotationOps, regs, firstRegisterIndex, immediate, resultRegisterIndex } = prepareData(shift, value);
+                bitRotationOps.rotR32ImmAlt(firstRegisterIndex, immediate, resultRegisterIndex);
+                assert.strictEqual(regs.getU64(resultRegisterIndex), expectedValue);
+            });
+        });
+    });
+});

package/packages/core/pvm-interpreter/ops/bit-utils.d.ts

@@ -0,0 +1,6 @@
+export declare function countBits32(val: number): number;
+export declare function countBits64(val: bigint): number;
+export declare function clz64(bigintValue: bigint): number;
+export declare function ctz32(val: number): number;
+export declare function ctz64(val: bigint): number;
+//# sourceMappingURL=bit-utils.d.ts.map

package/packages/core/pvm-interpreter/ops/bit-utils.d.ts.map

@@ -0,0 +1 @@
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package/packages/core/pvm-interpreter/ops/bit-utils.js

@@ -0,0 +1,52 @@
+export function countBits32(val) {
+    let x = val;
+    x = x - ((x >> 1) & 0x55555555); // Subtract pairs of bits
+    x = (x & 0x33333333) + ((x >> 2) & 0x33333333); // Sum groups of 4 bits
+    x = (x + (x >> 4)) & 0x0f0f0f0f; // Sum groups of 8 bits
+    x = x + (x >> 8); // Sum groups of 16 bits
+    x = x + (x >> 16); // Sum groups of 32 bits
+    return x & 0x3f; // Mask out excess bits
+}
+export function countBits64(val) {
+    let x = val;
+    x = x - ((x >> 1n) & 0x5555555555555555n); // Subtract pairs of bits
+    x = (x & 0x3333333333333333n) + ((x >> 2n) & 0x3333333333333333n); // Sum groups of 4 bits
+    x = (x + (x >> 4n)) & 0x0f0f0f0f0f0f0f0fn; // Sum groups of 8 bits
+    x = x + (x >> 8n); // Sum groups of 16 bits
+    x = x + (x >> 16n); // Sum groups of 32 bits
+    x = x + (x >> 32n); // Sum groups of 64 bits
+    return Number(x & 0x7fn); // Mask and return result as a regular number (0–64)
+}
+export function clz64(bigintValue) {
+    const highNumber = Number(bigintValue >> 32n);
+    const lowNumber = Number(bigintValue & 0xffffffffn);
+    const highResult = Math.clz32(highNumber);
+    if (highResult < 32) {
+        return highResult;
+    }
+    return highResult + Math.clz32(lowNumber);
+}
+export function ctz32(val) {
+    if (val === 0) {
+        return 32;
+    }
+    let value = val;
+    let count = 0;
+    while ((value & 1) === 0) {
+        count++;
+        value >>>= 1;
+    }
+    return count;
+}
+export function ctz64(val) {
+    if (val === 0n) {
+        return 64;
+    }
+    let value = val;
+    let count = 0;
+    while ((value & 1n) === 0n) {
+        count++;
+        value >>= 1n;
+    }
+    return count;
+}

package/packages/core/pvm-interpreter/ops/bit-utils.test.d.ts

@@ -0,0 +1,2 @@
+export {};
+//# sourceMappingURL=bit-utils.test.d.ts.map

package/packages/core/pvm-interpreter/ops/bit-utils.test.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"bit-utils.test.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops/bit-utils.test.ts"],"names":[],"mappings":""}

package/packages/core/pvm-interpreter/ops/bit-utils.test.js

@@ -0,0 +1,93 @@
+import assert from "node:assert";
+import { describe, it } from "node:test";
+import { clz64, countBits32, countBits64, ctz32, ctz64 } from "./bit-utils.js";
+describe("bit-utils", () => {
+    describe("countBits32", () => {
+        it("should correctly count 1 in number", () => {
+            const value = 1;
+            const expectedResult = 1;
+            const result = countBits32(value);
+            assert.strictEqual(result, expectedResult);
+        });
+        it("should correctly count 1 in number (max value)", () => {
+            const value = 0xffffffff;
+            const expectedResult = 32;
+            const result = countBits32(value);
+            assert.strictEqual(result, expectedResult);
+        });
+    });
+    describe("countBits64", () => {
+        it("should correctly count 1 in bigint", () => {
+            const value = 1n;
+            const expectedResult = 1;
+            const result = countBits64(value);
+            assert.strictEqual(result, expectedResult);
+        });
+        it("should correctly count 1 in bigint (max value)", () => {
+            const value = 0xffffffffffffffffn;
+            const expectedResult = 64;
+            const result = countBits64(value);
+            assert.strictEqual(result, expectedResult);
+        });
+    });
+    describe("clzBigInt", () => {
+        it("should correctly count leading 0 in bigint (min value)", () => {
+            const value = 0n;
+            const expectedResult = 64;
+            const result = clz64(value);
+            assert.strictEqual(result, expectedResult);
+        });
+        it("should correctly count leading 0 in bigint (max value)", () => {
+            const value = 2n ** 64n - 1n;
+            const expectedResult = 0;
+            const result = clz64(value);
+            assert.strictEqual(result, expectedResult);
+        });
+        it("should correctly count leading 0 in bigint (negative value)", () => {
+            const value = -1n;
+            const expectedResult = 0;
+            const result = clz64(value);
+            assert.strictEqual(result, expectedResult);
+        });
+    });
+    describe("ctz32", () => {
+        it("should correctly count trailing 0 in number (min value)", () => {
+            const value = 0;
+            const expectedResult = 32;
+            const result = ctz32(value);
+            assert.strictEqual(result, expectedResult);
+        });
+        it("should correctly count trailing 0 in number (max value)", () => {
+            const value = 2 ** 32 - 1;
+            const expectedResult = 0;
+            const result = ctz32(value);
+            assert.strictEqual(result, expectedResult);
+        });
+        it("should correctly count trailing 0 in number", () => {
+            const value = 2 ** 31;
+            const expectedResult = 31;
+            const result = ctz32(value);
+            assert.strictEqual(result, expectedResult);
+        });
+    });
+    describe("ctz64", () => {
+        it("should correctly count trailing 0 in bigint (min value)", () => {
+            const value = 0n;
+            const expectedResult = 64;
+            const result = ctz64(value);
+            assert.strictEqual(result, expectedResult);
+        });
+        it("should correctly count trailing 0 in bigint (max value)", () => {
+            const value = 2n ** 64n - 1n;
+            const expectedResult = 0;
+            const result = ctz64(value);
+            assert.strictEqual(result, expectedResult);
+        });
+        it("should correctly count trailing 0 in bigint", () => {
+            const value = 2n ** 63n;
+            const expectedResult = 63;
+            const result = ctz64(value);
+            assert.strictEqual(result, expectedResult);
+        });
+    });
+});

package/packages/core/pvm-interpreter/ops/boolean-ops.d.ts

@@ -0,0 +1,13 @@
+import type { ImmediateDecoder } from "../args-decoder/decoders/immediate-decoder.js";
+import type { Registers } from "../registers.js";
+export declare class BooleanOps {
+    private regs;
+    constructor(regs: Registers);
+    setLessThanSignedImmediate(firstIndex: number, immediate: ImmediateDecoder, resultIndex: number): void;
+    setLessThanUnsignedImmediate(firstIndex: number, immediate: ImmediateDecoder, resultIndex: number): void;
+    setLessThanSigned(firstIndex: number, secondIndex: number, resultIndex: number): void;
+    setLessThanUnsigned(firstIndex: number, secondIndex: number, resultIndex: number): void;
+    setGreaterThanSignedImmediate(firstIndex: number, immediate: ImmediateDecoder, resultIndex: number): void;
+    setGreaterThanUnsignedImmediate(firstIndex: number, immediate: ImmediateDecoder, resultIndex: number): void;
+}
+//# sourceMappingURL=boolean-ops.d.ts.map

package/packages/core/pvm-interpreter/ops/boolean-ops.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"boolean-ops.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops/boolean-ops.ts"],"names":[],"mappings":"AAAA,OAAO,KAAK,EAAE,gBAAgB,EAAE,MAAM,+CAA+C,CAAC;AACtF,OAAO,KAAK,EAAE,SAAS,EAAE,MAAM,iBAAiB,CAAC;AAEjD,qBAAa,UAAU;IACT,OAAO,CAAC,IAAI;gBAAJ,IAAI,EAAE,SAAS;IAEnC,0BAA0B,CAAC,UAAU,EAAE,MAAM,EAAE,SAAS,EAAE,gBAAgB,EAAE,WAAW,EAAE,MAAM;IAI/F,4BAA4B,CAAC,UAAU,EAAE,MAAM,EAAE,SAAS,EAAE,gBAAgB,EAAE,WAAW,EAAE,MAAM;IAIjG,iBAAiB,CAAC,UAAU,EAAE,MAAM,EAAE,WAAW,EAAE,MAAM,EAAE,WAAW,EAAE,MAAM;IAI9E,mBAAmB,CAAC,UAAU,EAAE,MAAM,EAAE,WAAW,EAAE,MAAM,EAAE,WAAW,EAAE,MAAM;IAIhF,6BAA6B,CAAC,UAAU,EAAE,MAAM,EAAE,SAAS,EAAE,gBAAgB,EAAE,WAAW,EAAE,MAAM;IAIlG,+BAA+B,CAAC,UAAU,EAAE,MAAM,EAAE,SAAS,EAAE,gBAAgB,EAAE,WAAW,EAAE,MAAM;CAGrG"}

package/packages/core/pvm-interpreter/ops/boolean-ops.js

@@ -0,0 +1,24 @@
+export class BooleanOps {
+    regs;
+    constructor(regs) {
+        this.regs = regs;
+    }
+    setLessThanSignedImmediate(firstIndex, immediate, resultIndex) {
+        this.regs.setU64(resultIndex, this.regs.getI64(firstIndex) < immediate.getI64() ? 1n : 0n);
+    }
+    setLessThanUnsignedImmediate(firstIndex, immediate, resultIndex) {
+        this.regs.setU64(resultIndex, this.regs.getU64(firstIndex) < immediate.getU64() ? 1n : 0n);
+    }
+    setLessThanSigned(firstIndex, secondIndex, resultIndex) {
+        this.regs.setU64(resultIndex, this.regs.getI64(firstIndex) < this.regs.getI64(secondIndex) ? 1n : 0n);
+    }
+    setLessThanUnsigned(firstIndex, secondIndex, resultIndex) {
+        this.regs.setU64(resultIndex, this.regs.getU64(firstIndex) < this.regs.getU64(secondIndex) ? 1n : 0n);
+    }
+    setGreaterThanSignedImmediate(firstIndex, immediate, resultIndex) {
+        this.regs.setU64(resultIndex, this.regs.getI64(firstIndex) > immediate.getI64() ? 1n : 0n);
+    }
+    setGreaterThanUnsignedImmediate(firstIndex, immediate, resultIndex) {
+        this.regs.setU64(resultIndex, this.regs.getU64(firstIndex) > immediate.getU64() ? 1n : 0n);
+    }
+}

package/packages/core/pvm-interpreter/ops/boolean-ops.test.d.ts

@@ -0,0 +1,2 @@
+export {};
+//# sourceMappingURL=boolean-ops.test.d.ts.map

package/packages/core/pvm-interpreter/ops/boolean-ops.test.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"boolean-ops.test.d.ts","sourceRoot":"","sources":["../../../../../../packages/core/pvm-interpreter/ops/boolean-ops.test.ts"],"names":[],"mappings":""}