@nataliapc/mcp-openmsx 1.1.14 → 1.2.2

package/resources/audio/toc.json

@@ -4,27 +4,38 @@
     "toc": [
         {
             "title": "PSG Registers",
-            "uri": "https://www.msx.org/wiki/PSG_Registers",
+            "uri": "msxdocs://audio/psg_registers",
+            "external_url": "https://www.msx.org/wiki/PSG_Registers",
             "description": "Complete reference for MSX PSG (Programmable Sound Generator) registers covering all 16 registers including frequency control, white noise control, voice and I/O port control, amplitude and volume control, envelope form and period control, and I/O parallel port registers. Includes BIOS routines WRTPSG, RDPSG, and GICINI for PSG access and initialization."
         },
         {
             "title": "Konami SCC Sound Chip",
-            "uri": "http://bifi.msxnet.org/msxnet/tech/scc",
+            "uri": "msxdocs://audio/sound_cartridge_scc",
+            "external_url": "http://bifi.msxnet.org/msxnet/tech/scc",
             "description": "Technical documentation for Konami's SCC (Sound Creative Chip) used in MSX cartridges. The SCC provides 5-channel wavetable synthesis with custom waveforms, offering enhanced audio capabilities beyond the standard PSG. Commonly found in Konami game cartridges like Gradius series, providing richer sound effects and music."
         },
         {
-            "title": "Konami SCC+ Sound Chip",
-            "uri": "http://bifi.msxnet.org/msxnet/tech/soundcartridge",
+            "title": "Konami SCCI Sound Chip",
+            "uri": "msxdocs://audio/sound_cartridge_scci",
+            "external_url": "http://bifi.msxnet.org/msxnet/tech/soundcartridge",
             "description": "Technical documentation for Konami's enhanced SCC+ (Sound Creative Chip Plus) found in later MSX sound cartridges. Improved version of the original SCC providing enhanced wavetable synthesis capabilities, additional sound channels, and better audio quality. Used in advanced Konami cartridges and dedicated sound cartridges for expanded audio functionality."
         },
         {
             "title": "MSX-MIDI",
-            "uri": "https://map.grauw.nl/resources/midi/msx-midi.php",
+            "uri": "msxdocs://audio/msx-midi",
+            "external_url": "https://map.grauw.nl/resources/midi/msx-midi.php",
             "description": "Complete technical documentation for MSX-MIDI interface covering hardware configuration, MIDI data communication using 8251 IC, baud rate generator with 8253/8254 timer IC, I/O port assignments (0E8H, 0E9H), internal vs external cartridge implementations, and BASIC extensions. Available only for MSX turbo R and later systems with 16K ROM containing MIDI functionality."
         },
         {
-            "title": "MGSDRV MML 1.1",
-            "uri": "https://mus.msx.click/index.php?title=MGSDRV_MML_11",
+            "title": "Moonsound Technical Documentation",
+            "uri": "msxdocs://audio/opl4tech",
+            "external_url": "https://www.msxarchive.nl/pub/msx/docs/programming/opl4tech.txt",
+            "description": "Comprehensive technical documentation for the MoonSound MSX cartridge and its Yamaha OPL4 (YMF278B) chip. Covers hardware components, I/O ports, register maps, CPU interface, PCM and FM synthesis, memory access, envelopes, mixing, and status flags. Includes practical notes for MSX programmers, register tables, and usage tips for both Z80 and R800 CPUs. Useful for developers working with advanced MSX audio hardware and music software."
+        },
+        {
+            "title": "MGSDRV MML 1.11",
+            "uri": "msxdocs://audio/MGSC111",
+            "external_url": "https://www.gigamix.jp/mgsdrv/MGSC111.TXT",
             "description": "Complete documentation for MGSC MML compiler version 1.11 by Ain (1992-93) that converts MML (Music Macro Language) text files to MGS formatted play data for MGSDRV. Covers control functions, OPLL modes (FM 9 sound/FM 6+rhythm), machine vendor codes (SONY, Panasonic, SANYO), macro definitions, tone definitions, tempo control, and compilation options including real-time playback and debugging features."
         }
     ]

package/resources/book--msx2-technical-handbook/toc.json

@@ -75,7 +75,7 @@
         },
         {
             "title": "MSX Kun Basic compiler",
-            "uri": "msxdocs://book--msx2-technical-handbook/MSX_Kun_BASIC_compiler.md",
+            "uri": "msxdocs://book--msx2-technical-handbook/MSX_Kun_BASIC_Compiler.md",
             "description": "The document describes MSX-BASIC-KUN, a BASIC compiler for MSX computers that significantly accelerates program execution (15 to 100 times faster). It compiles most MSX-BASIC statements, supports strings and floating-point numbers, and introduces turbo blocks (_TURBO ON/OFF) for selective compilation. The compiler has limitations, such as unsupported commands (e.g., BLOAD, PRINT#) and restrictions on variable handling within turbo blocks. It adds new features like inline assembly (#I), clipping control (#C), and overflow checks (#N). The compiler operates within RAM and cannot save compiled programs independently. It is ideal for creating high-performance MSX applications without requiring Z80 assembly language expertise."
         }
     ]

package/resources/msx-unapi/toc.json

@@ -10,12 +10,12 @@
         },
         {
             "title": "MSX-UNAPI specification 1.1",
-            "uri": "msxdocs://msx-unapi/MSX_UNAPI_specification_1.1",
+            "uri": "msxdocs://msx-unapi/MSX_UNAPI_specification_1_1",
             "description": "The full core specification document, covering all the details on how to design an API, how to implement it, and how to discover and consume it from a client application."
         },
         {
             "title": "Ethernet UNAPI specification",
-            "uri": "msxdocs://msx-unapi/Ethernet_UNAPI_specification_1.1",
+            "uri": "msxdocs://msx-unapi/Ethernet_UNAPI_specification_1_1",
             "description": "The specification of an API for Ethernet cards. This describes an UNAPI compliant API specification for Ethernet hardware for MSX computers."
         },
         {

package/resources/processors/toc.json

@@ -3,19 +3,19 @@
     "description": "Technical Info about the Z80, R800, and others processors, including detailed instruction sets, undocumented instructions, and timing information.",
     "toc": [
         {
-            "title": "Z80 Detailed Instruction Set (Z80 Heaven)",
-            "uri": "msxdocs://processors/Z80_detailed_instruction_set",
+            "title": "Z80 Detailed Instruction Set",
+            "uri": "msxdocs://processors/z80_detailed_instruction_set",
             "external_url": "http://z80-heaven.wikidot.com/instructions-set",
             "description": "This document is a comprehensive reference for the Z80 processor instruction set, organized alphabetically from ADC to XOR, featuring over 80 different instructions with detailed syntax, allowed operands, flag effects (C, N, S, Z, P/V, H), practical use cases, and clock cycles (T-States) for each variant. Each instruction is documented with specific assembly code examples, describing arithmetic operations (ADD, SUB, ADC, SBC), logical operations (AND, OR, XOR), comparison operations (CP, CPI, CPD), bit manipulation (BIT, SET, RES), flow control (JP, JR, CALL, RET, DJNZ), data transfer (LD, LDD, LDI, PUSH, POP), rotation/shifting (RL, RR, SLA, SRA), and system control (HALT, DI, EI, NOP). Provides precise technical context about registers (A, B, C, D, E, H, L, IX, IY, SP), addressing modes (immediate, direct, indirect, indexed), and the exact semantics of each operation, being especially valuable for generating Z80 assembly code, debugging MSX programs, or explaining processor behavior in retro systems like MSX, Amstrad CPC, or ZX Spectrum."
         },
         {
             "title": "Z80 / R800 Instruction Set",
-            "uri": "msxdocs://processors/Z80_R800_instruction_set",
+            "uri": "msxdocs://processors/z80_r800_instruction_set",
             "external_url": "https://map.grauw.nl/resources/z80instr.php",
             "description": "This comprehensive instruction set reference provides a complete tabular listing of all Z80 processor instructions plus R800-specific extensions (MULUB/MULUW multiplication instructions), including documented and undocumented opcodes with precise timing data for MSX systems. It details instruction timing across four scenarios (Z80, Z80+M1 waits, R800, R800+waits), hexadecimal opcodes, instruction sizes, and MSX-specific timing considerations including M1 wait states, memory access patterns, I/O timing, and R800 internal/external memory performance characteristics. Essential for MSX assembly programming, emulator development, performance optimization, cycle-accurate timing calculations, and understanding the behavioral differences between Z80 and R800 processors in MSX environments."
         },
         {
-            "title": "The Undocumented Z80 Documented (Maintained by Jan Wilmans).",
+            "title": "The Undocumented Z80 Documented",
             "uri": "msxdocs://processors/z80-undocumented",
             "external_url": "http://bifi.msxnet.org/msxnet/tech/",
             "description": "Provides a comprehensive technical reference for Z80 microprocessor instructions, focusing on both officially documented and undocumented instruction sets. It serves as an authoritative guide for Z80 assembly programming, particularly relevant for MSX computer development."