@h2loop/autosar 1.0.1 → 1.2.0

package/python/ecuc_engine/codegen/mcal/tc4d.json

@@ -0,0 +1,60 @@
+{
+  "silicon": "tc4d",
+  "title": "Infineon AURIX TC4Dx: Port pad configuration (register level)",
+  "status": "skeleton",
+  "statusNote": "Only public AURIX TC4Dx user manual data is in this file. It is enough to compute the GPIO direction / level / MODE=0 (GPIO) pad settings of a pin whose port and pin number are given in the project pin map. It is NOT a replacement for the Infineon MCAL: alternate-function MODE numbers per pin and mode literal, pad driver/level defaults, access-protection handling and the MCAL's own Port_ConfigType layout come from Infineon's vendor param defs (VSMD) / BSWMD and MCAL static code, which are under NDA and not used here.",
+  "sources": [
+    {"id": "UM", "doc": "AURIX TC4Dx user manual v1.1 (2025-06-26), public", "file": "tc4d/docs/infineon-infineon-aurix-tc4dx-um-v1.1-public-en_us.pdf-usermanual-en.pdf"}
+  ],
+  "registers": {
+    "GPIO":   {"offset": "0x300", "stride": "0x10", "cite": "UM 47.4.2 Table 2432 (p. 8609) and 47.4.30 PADCFGp_GPIO (p. 8632-8633)"},
+    "DRVCFG": {"offset": "0x304", "stride": "0x10", "cite": "UM 47.4.2 Table 2432 (p. 8610) and 47.4.31 PADCFGp_DRVCFG (p. 8633-8637)"}
+  },
+  "fields": {
+    "DIR":  {"reg": "DRVCFG", "lsb": 0,  "width": 1, "cite": "UM p. 8634: 0B IN, 1B OUT"},
+    "OD":   {"reg": "DRVCFG", "lsb": 1,  "width": 1, "cite": "UM p. 8634: 0B push-pull, 1B open drain"},
+    "MODE": {"reg": "DRVCFG", "lsb": 4,  "width": 4, "cite": "UM p. 8634: output: 0 = GPIO, n = alternate output function n; input: 0 tristate, 1 pull-down, 2 pull-up, 3 tristate"},
+    "PD":   {"reg": "DRVCFG", "lsb": 8,  "width": 3, "cite": "UM p. 8635: pad driver strength / edge"},
+    "PL":   {"reg": "DRVCFG", "lsb": 12, "width": 3, "cite": "UM p. 8636: input level (AL / TTL)"},
+    "SET":  {"reg": "GPIO",   "lsb": 2,  "width": 1, "cite": "UM p. 8633: write 1 drives the pin high (OUT is read-only)"},
+    "CLR":  {"reg": "GPIO",   "lsb": 3,  "width": 1, "cite": "UM p. 8633: write 1 drives the pin low"}
+  },
+  "direction": {"PORT_PIN_IN": {"DIR": 0}, "PORT_PIN_OUT": {"DIR": 1}},
+  "level": {"PORT_PIN_LEVEL_HIGH": {"SET": 1}, "PORT_PIN_LEVEL_LOW": {"CLR": 1}},
+  "modes": {
+    "PORT_PIN_MODE_DIO": {"MODE": 0, "cite": "UM p. 8634: MODE 0 = GPIO (output) / tristate (input)"}
+  },
+  "modesNote": "Every other PortPinMode needs the alternate-function number of that pin (MODE = 1..15). Per-pin ALT numbers are listed in the TC4Dx data sheet pin tables, but the mapping from the vendor's PortPinMode literals to them is defined by Infineon's VSMD (NDA). Give them per pin in the project pin map ('modes': {'PORT_PIN_MODE_CAN': 2}).",
+  "ports": {
+    "P00": {"base": "0xF003A000", "pins": "0-15"},
+    "P01": {"base": "0xF003A400", "pins": "0-15"},
+    "P02": {"base": "0xF003A800", "pins": "0-15"},
+    "P03": {"base": "0xF003AC00", "pins": "0-15"},
+    "P04": {"base": "0xF003B000", "pins": "0-9"},
+    "P10": {"base": "0xF003C800", "pins": "0-11,13-15"},
+    "P13": {"base": "0xF003D400", "pins": "0-15"},
+    "P14": {"base": "0xF003D800", "pins": "0-15"},
+    "P15": {"base": "0xF003DC00", "pins": "0-8,10-15"},
+    "P16": {"base": "0xF003E000", "pins": "0-14"},
+    "P20": {"base": "0xF003F000", "pins": "0-3,6-14"},
+    "P21": {"base": "0xF003F400", "pins": "0-7"},
+    "P22": {"base": "0xF003F800", "pins": "0-11"},
+    "P23": {"base": "0xF003FC00", "pins": "0-7"},
+    "P25": {"base": "0xF0040400", "pins": "1"},
+    "P30": {"base": "0xF0041800", "pins": "0-15"},
+    "P31": {"base": "0xF0041C00", "pins": "6-7"},
+    "P32": {"base": "0xF0042000", "pins": "2,4-7"},
+    "P33": {"base": "0xF0042400", "pins": "0-15"},
+    "P34": {"base": "0xF0042800", "pins": "1-5"},
+    "P35": {"base": "0xF0042C00", "pins": "0-5"},
+    "P40": {"base": "0xF0044000", "pins": "0-14"}
+  },
+  "portsCite": "UM 47.8 Table 2448 'Registers address space - Pn' (p. 8650); available slices from Table 2446 'Port implementation in TC4DxAA-step' (p. 8645-8646)",
+  "needsVendorData": [
+    "Infineon MCAL Port/Dio vendor param defs (VSMD) and BSWMD: vendor PortPin parameters (driver strength, pad level, input select, alternate-function literals) and their config classes",
+    "the MCAL static code's Port_ConfigType / Dio config layout (what Port_Init actually consumes); without it only the register image below can be generated",
+    "per-pin alternate-function numbers for each PortPinMode literal (data sheet pin tables + the VSMD literal mapping)",
+    "write sequencing under the pad access protection (PADCFGp_ACCEN, ACCGRPy_*, PROTSE/Safety ENDINIT; UM 47.4.x) that the MCAL performs",
+    "PortPinId / DioChannelId encoding used by the Infineon MCAL (port*16+pin or otherwise); the project pin map gives port and pin explicitly instead"
+  ]
+}

package/python/ecuc_engine/codegen/model.py

@@ -0,0 +1,264 @@
+"""Generator view of the ECUC model: merged containers, effective config classes, refs, symbols.
+
+Everything here is derived from the engine's loader (`model.Project`) and the param defs
+(`defs.DefIndex`); nothing is module-specific. Container order is document order (files sorted by
+path, elements in file order), so every table built from it is deterministic.
+"""
+from __future__ import annotations
+
+import re
+from dataclasses import dataclass, field
+from typing import Iterable, Optional
+
+from .. import defs as D
+from ..model import Elem, ParamVal, Project
+from ..values import parse_float, parse_int
+
+CLASS_RANK = {"PUBLISHED-INFORMATION": 0, "PRE-COMPILE": 1, "LINK": 2, "POST-BUILD": 3}
+CLASS_FILE = {0: "Cfg.c", 1: "Cfg.c", 2: "Lcfg.c", 3: "PBcfg.c"}
+DEFAULT_VARIANT = "VARIANT-PRE-COMPILE"
+
+# AUTOSAR_CP_TR_ReleaseOverview R25-11, Table 1.2 "Mapping schema version to platform releases"
+# (and Table 1.1 for the R4.x schemas): schema AUTOSAR_000NN -> internal release number.
+SCHEMA_RELEASE = {
+    "00042": (4, 3, 0), "00043": (4, 3, 0), "00044": (4, 3, 1), "00045": (4, 3, 1), "00046": (4, 4, 0),
+    "00047": (4, 4, 0), "00048": (4, 5, 0), "00049": (4, 6, 0), "00050": (4, 7, 0), "00051": (4, 8, 0),
+    "00052": (4, 9, 0), "00053": (4, 10, 0), "00054": (4, 11, 0),
+}
+
+
+def snake(name: str) -> str:
+    """CamelCase -> UPPER_SNAKE (NvMDevErrorDetect -> NVM_DEV_ERROR_DETECT).
+
+    The AUTOSAR glossary terms I-PDU / N-PDU / L-PDU stay one word (ComSupportedIPduGroups ->
+    COM_SUPPORTED_IPDU_GROUPS), as the specifications spell them in identifiers (IPDUM, ..._IPDU_...).
+    """
+    s = re.sub(r"(?<=[a-z0-9])(?=[A-Z])|(?<=[A-Z])(?=[A-Z][a-z])", "_", name)
+    s = re.sub(r"(?<![A-Za-z])([INL])_(Pdu)", r"\1\2", s)
+    return re.sub(r"_+", "_", s).upper()
+
+
+@dataclass
+class Container:
+    """One container value, merged across file splits (all fragments with the same AUTOSAR path)."""
+    path: str
+    name: str
+    defn: Optional[D.DefNode]
+    frags: list
+    module: "ModuleCfg"
+    parent: Optional["Container"] = None
+    children: list = field(default_factory=list)
+
+    @property
+    def def_name(self) -> str:
+        return self.defn.name if self.defn else (self.frags[0].def_ref or "?").rsplit("/", 1)[-1]
+
+    def values(self, name: str) -> list:
+        return [pv for f in self.frags for pv in f.params if pv.name == name]
+
+    def value(self, name: str) -> Optional[ParamVal]:
+        v = self.values(name)
+        return v[0] if v else None
+
+    def text(self, name: str) -> Optional[str]:
+        v = self.value(name)
+        return v.value if v is not None else None
+
+    def sub(self, def_name: str) -> list:
+        return [c for c in self.children if c.def_name == def_name]
+
+
+@dataclass
+class ModuleCfg:
+    name: str  # def short name (the Mip unless overridden)
+    elem: Elem
+    defn: Optional[D.DefNode]
+    variant: str
+    containers: list  # all Containers, document order (pre-order)
+    top: list  # top-level Containers
+    mip: str = ""
+
+    @property
+    def MIP(self) -> str:
+        return self.mip.upper()
+
+
+class CgModel:
+    def __init__(self, project: Project, mip_overrides: Optional[dict] = None):
+        self.p = project
+        self.defs = project.defs
+        self.mip_overrides = mip_overrides or {}
+        self.modules: dict[str, ModuleCfg] = {}
+        self.by_path: dict[str, Container] = {}
+        self.order: dict[str, int] = {}
+        self._rev: Optional[dict] = None
+        self._sorted: dict = {}
+        for m in sorted(project.modules, key=lambda e: (e.file, e.line)):
+            self._add_module(m)
+
+    # ---------- construction ----------
+    def _def(self, def_ref: Optional[str]) -> Optional[D.DefNode]:
+        if not def_ref:
+            return None
+        d = self.defs.get(def_ref)
+        if d is not None:
+            return d
+        # vendor-relocated or other-release DEFINITION-REF: match by module-relative path
+        rel = self.defs.rel(def_ref)
+        for mp, md in self.defs.modules.items():
+            if rel.split("/", 1)[0] == md.name:
+                return self.defs.get(mp + rel[len(md.name):])
+        return None
+
+    def _add_module(self, m: Elem):
+        md = self._def(m.def_ref)
+        name = md.name if md else (m.def_ref or m.name).rsplit("/", 1)[-1]
+        if name in self.modules:  # split module configuration: merge into the first one
+            mc = self.modules[name]
+        else:
+            variant = m.node.child_text("IMPLEMENTATION-CONFIG-VARIANT") or DEFAULT_VARIANT
+            mc = ModuleCfg(name, m, md, variant, [], [], self.mip_overrides.get(name, name))
+            self.modules[name] = mc
+        for c in m.children:
+            self._add_container(mc, c, None)
+
+    def _add_container(self, mc: ModuleCfg, e: Elem, parent: Optional[Container]):
+        c = self.by_path.get(e.path)
+        if c is None:
+            c = Container(e.path, e.name, self._def(e.def_ref), [], mc, parent)
+            self.by_path[e.path] = c
+            self.order[e.path] = len(self.order)
+            mc.containers.append(c)
+            (parent.children if parent else mc.top).append(c)
+        c.frags.append(e)
+        for ch in e.children:
+            self._add_container(mc, ch, c)
+
+    # ---------- queries ----------
+    def by_path_index(self, c: Container) -> int:
+        return self.order.get(c.path, 0)
+
+    def module(self, name: str) -> Optional[ModuleCfg]:
+        return self.modules.get(name)
+
+    def instances(self, mc: ModuleCfg, def_name: str) -> list:
+        return [c for c in mc.containers if c.def_name == def_name]
+
+    def target(self, pv: Optional[ParamVal]) -> Optional[Container]:
+        if pv is None or not pv.value:
+            return None
+        return self.by_path.get(pv.value.strip())
+
+    def reverse(self) -> dict:
+        """target path -> [(Container, ref name)] for every ECUC reference value, document order."""
+        if self._rev is None:
+            self._rev = {}
+            for mc in self.modules.values():
+                for c in mc.containers:
+                    for f in c.frags:
+                        for pv in f.params:
+                            if pv.is_ref and pv.value:
+                                self._rev.setdefault(pv.value.strip(), []).append((c, pv.name))
+        return self._rev
+
+    def referrers(self, target: Container, module: Optional[str] = None, ref: Optional[str] = None) -> list:
+        out = []
+        for c, rname in self.reverse().get(target.path, []):
+            if module is not None and c.module.name != module:
+                continue
+            if ref is not None and rname != ref:
+                continue
+            out.append(c)
+        return out
+
+    def param_def(self, c: Container, name: str) -> Optional[D.DefNode]:
+        if c.defn is None:
+            return None
+        for p in c.defn.params + c.defn.refs:
+            if p.rsplit("/", 1)[-1] == name:
+                return self.defs.get(p)
+        return None
+
+    def eff_class(self, mc: ModuleCfg, d: Optional[D.DefNode]) -> int:
+        """Effective config class rank of a param/ref (or container multiplicity) for the module's variant."""
+        if d is None:
+            return CLASS_RANK["PRE-COMPILE"]
+        cc = d.config_classes or d.mult_classes
+        if not cc:
+            return CLASS_RANK["PRE-COMPILE"]
+        cls = cc.get(mc.variant)
+        if cls is None:  # variant not listed for this param: take the least dynamic class it supports
+            cls = min(cc.values(), key=lambda k: CLASS_RANK.get(k, 1))
+        return CLASS_RANK.get(cls, 1)
+
+    def symbolic_param(self, c: Container) -> Optional[D.DefNode]:
+        if c.defn is None:
+            return None
+        for p in c.defn.params:
+            d = self.defs.get(p)
+            if d is not None and d.symbolic_name:
+                return d
+        return None
+
+    def symbol(self, c: Container) -> Optional[str]:
+        """TPS_ECUC_02108: <Mip>Conf_<ContainerDefShortName>_<ContainerValueShortName>."""
+        if self.symbolic_param(c) is None:
+            return None
+        return f"{c.module.mip}Conf_{c.def_name}_{c.name}"
+
+    def symbol_value(self, c: Container) -> Optional[str]:
+        d = self.symbolic_param(c)
+        return c.text(d.name) if d is not None else None
+
+    def sorted_instances(self, mc: ModuleCfg, def_name: str) -> list:
+        """Instances of a container def, ordered by their symbolic handle when they have one, else document order."""
+        key = (mc.name, def_name)
+        if key not in self._sorted:
+            insts = self.instances(mc, def_name)
+            if insts and self.symbolic_param(insts[0]) is not None:
+                def k(c):
+                    v = parse_int(self.symbol_value(c) or "")
+                    return (v is None, v if v is not None else 0)
+                insts = sorted(insts, key=k)  # stable: ties stay in document order
+            self._sorted[key] = insts
+        return self._sorted[key]
+
+    def index_of(self, c: Container) -> int:
+        return self.sorted_instances(c.module, c.def_name).index(c)
+
+    def is_multi(self, c: Container) -> bool:
+        """True if this container, or any ancestor, is an instance of a def with upper multiplicity > 1."""
+        x: Optional[Container] = c
+        while x is not None:
+            if x.defn is None or x.defn.upper != 1:
+                return True
+            x = x.parent
+        return False
+
+    def release(self) -> tuple:
+        """AUTOSAR release of the configuration, from the schema version of its files."""
+        for f in sorted(self.p.files):
+            head = self.p.files[f].data[:2048]
+            m = re.search(rb"AUTOSAR_(\d{5})\.xsd", head)
+            if m and m.group(1).decode() in SCHEMA_RELEASE:
+                return SCHEMA_RELEASE[m.group(1).decode()]
+        return (4, 11, 0)
+
+    def rel_files(self, mc: ModuleCfg) -> list:
+        files = sorted({f.file for c in mc.containers for f in c.frags} | {mc.elem.file})
+        return [self.p.rel(f).replace("\\", "/") for f in files]
+
+
+def num(v: Optional[str]) -> Optional[int]:
+    return parse_int(v) if v is not None else None
+
+
+def flt(v: Optional[str]) -> Optional[float]:
+    return parse_float(v) if v is not None else None
+
+
+def iter_param_defs(defs: D.DefIndex, d: D.DefNode) -> Iterable[D.DefNode]:
+    for p in d.params + d.refs:
+        x = defs.get(p)
+        if x is not None:
+            yield x

package/python/ecuc_engine/codegen/modules/__init__.py

@@ -0,0 +1,7 @@
+"""Module generators. Every .py file here registers itself with @register("<ModuleDefName>")."""
+import importlib
+import os
+
+for _f in sorted(os.listdir(os.path.dirname(__file__))):
+    if _f.endswith(".py") and _f != "__init__.py":
+        importlib.import_module(f"{__name__}.{_f[:-3]}")

package/python/ecuc_engine/codegen/modules/com.py

@@ -0,0 +1,145 @@
+"""Com: Com_Cfg.h / Com_PBcfg.c.
+
+Def-driven (generic emitter): every ComGeneral switch, the TPS_ECUC_02108 symbols of ComSignal,
+ComSignalGroup, ComGroupSignal, ComIPdu and ComIPduGroup (handle IDs), and, without a static-code
+binding, one table per container def (I-PDUs, signals, signal groups, group signals with bit
+position / size / endianness / type / transfer property / timeouts / update bits).
+
+The static Com's own table layout (signal and I-PDU tables, buffers, Tx-mode ticks, deadline
+ticks) comes from its binding (bindings/*.json); this module only adds what neither the defs nor
+the binding path language can express:
+  * COM_DEV_ERROR_DETECT from ComConfigurationUseDet (ECUC_Com_00141 names that output macro);
+  * notification callouts, resolved for the binding through `call:` steps:
+      - `comUserCallback`: R25-11 Com users (SWS_Com 8.6.3.1, ECUC_Com_10034/10036): the ComUserModuleCnf
+        referenced by ComUserModule/ComUserModuleCnfRef, its ComUserSignal / ComUserSignalGroup with the
+        same system signal (group) as the ComSignal (Group), and the ComUserCallback of type COM_RX_ACK
+        (receiver) or COM_TX_ACK (sender). These callbacks take a ComUserCbkHandleId.
+      - `rteSignalCallback`: the per-signal RTE callback `Rte_COMCbk_<sn>()` (receiver) /
+        `Rte_COMCbkTAck_<sn>()` (sender), <sn> = ComSignal short name (SWS_Rte Figure 4.42), bound only
+        when the RTE's callback header (Rte_Cbk.h, from the project or the output dir) declares it with
+        a void(void) prototype; Com_PBcfg.c then includes that header;
+  * the headers named by ComGeneral/ComUserCbkHeaderFile (callback prototypes) in Com_PBcfg.c;
+  * notes for configuration a static Com may silently not implement.
+"""
+from __future__ import annotations
+
+import re
+
+from ..registry import Generator, register
+
+RX_ACK, TX_ACK = "COM_RX_ACK", "COM_TX_ACK"
+
+
+@register("Com")
+class Com(Generator):
+    std_header = "ComStack_Types.h"
+
+    def specific(self, mo):
+        gen = [c for c in self.mc.containers if c.def_name == "ComGeneral"]
+        g = gen[0] if gen else None
+        det = g.text("ComConfigurationUseDet") if g is not None else None
+        mo.group("Development error detection (ECUC_Com_00141: ComConfigurationUseDet -> COM_DEV_ERROR_DETECT)",
+                 [("COM_DEV_ERROR_DETECT", "STD_ON" if (det or "").strip().lower() in ("true", "1") else "STD_OFF")])
+        if g is not None:
+            for pv in g.values("ComUserCbkHeaderFile"):
+                h = (pv.value or "").strip().strip('"<>')
+                if h:
+                    mo.include(h)
+        self._dir = self._directions()
+        self._users = self._com_user_callbacks()
+        self._rte_text = self.ctx.header_text("Rte_Cbk.h")
+        self._limits(mo)
+
+    # ---------- call: resolvers for the binding ----------
+
+    def path_steps(self, mo) -> dict:
+        def com_user(c, ev):
+            hit = self._users.get((c.path, self._ack(c)))
+            if hit is None:
+                return None
+            name, header = hit
+            if header:
+                mo.include(header)
+            return name
+
+        def rte_signal(c, ev):
+            if c.def_name not in ("ComSignal", "ComSignalGroup") or not self._rte_text:
+                return None
+            name = ("Rte_COMCbk_" if self._ack(c) == RX_ACK else "Rte_COMCbkTAck_") + c.name
+            if not re.search(rf"\b{re.escape(name)}\s*\(\s*void\s*\)", self._rte_text):
+                if (c.path, self._ack(c)) in self._users:
+                    mo.notes.append(f"{c.path}: has a Com user callback ({self._users[(c.path, self._ack(c))][0]}), "
+                                    "which takes a ComUserCbkHandleId; the static code's notification type is "
+                                    "void(void), so it is not bound")
+                return None
+            mo.include("Rte_Cbk.h")
+            return name
+
+        return {"comUserCallback": com_user, "rteSignalCallback": rte_signal}
+
+    # ---------- helpers ----------
+
+    def _directions(self) -> dict:
+        """ComSignal / ComSignalGroup path -> ComIPduDirection of the I-PDU that carries it."""
+        out = {}
+        for ip in self.cg.instances(self.mc, "ComIPdu"):
+            d = (ip.text("ComIPduDirection") or "").strip()
+            for r in ("ComIPduSignalRef", "ComIPduSignalGroupRef"):
+                for pv in ip.values(r):
+                    if pv.value:
+                        out.setdefault(pv.value.strip(), d)
+        return out
+
+    def _ack(self, c) -> str:
+        return TX_ACK if self._dir.get(c.path) == "SEND" else RX_ACK
+
+    def _com_user_callbacks(self) -> dict:
+        """(ComSignal/ComSignalGroup path, callback type) -> (ComUserCallbackName, ComUserHeaderInclude)."""
+        by_sys: dict = {}
+        for c in self.mc.containers:
+            for p in ("ComSystemTemplateSystemSignalRef", "ComSystemTemplateSignalGroupRef"):
+                v = c.text(p)
+                if v and c.def_name in ("ComSignal", "ComSignalGroup"):
+                    by_sys.setdefault(v.strip(), c)
+        out: dict = {}
+        for um in self.cg.instances(self.mc, "ComUserModule"):
+            cnf = self.cg.target(um.value("ComUserModuleCnfRef"))
+            if cnf is None:
+                continue
+            header = (cnf.text("ComUserHeaderInclude") or "").strip().strip('"<>') or None
+            for u in cnf.children:
+                sysref = u.text("ComUserSystemTemplateSystemSignalRef") or u.text("ComUserSystemTemplateSignalGroupRef")
+                sig = by_sys.get((sysref or "").strip())
+                if sig is None:
+                    continue
+                for pv in u.values("ComUserCallbackRef"):
+                    cb = self.cg.target(pv)
+                    if cb is None:
+                        continue
+                    kind = (cb.text("ComUserCallbackType") or "").strip()
+                    name = (cb.text("ComUserCallbackName") or "").strip()
+                    if name:
+                        out.setdefault((sig.path, kind), (name, header))
+        return out
+
+    def _limits(self, mo):
+        """Configuration that is valid ECUC but that a static Com may not implement: say so, never drop it silently."""
+        if mo.binding is None:
+            return
+        cnt = lambda pred: sum(1 for c in self.mc.containers if pred(c))  # noqa: E731
+        notes = []
+        n = cnt(lambda c: c.def_name == "ComIPdu" and (c.text("ComIPduSignalProcessing") or "").strip() == "DEFERRED")
+        if n:
+            notes.append(f"{n} I-PDU(s) use ComIPduSignalProcessing=DEFERRED; the binding has no field for it "
+                         "(the static code decides when Rx notifications run)")
+        n = cnt(lambda c: c.def_name == "ComSignal" and (c.text("ComRxDataTimeoutAction") or "NONE").strip() != "NONE")
+        if n:
+            notes.append(f"{n} signal(s) configure ComRxDataTimeoutAction; the binding carries only the I-PDU "
+                         "deadline (TimeoutTicks), the action is up to the static code")
+        n = cnt(lambda c: c.def_name == "ComTxMode" and int(float(c.text("ComTxModeNumberOfRepetitions") or 0)) > 0)
+        if n:
+            notes.append(f"{n} Tx mode(s) configure ComTxModeNumberOfRepetitions > 0; the binding has no repetition field")
+        n = cnt(lambda c: c.def_name == "ComTxIPdu" and float(c.text("ComMinimumDelayTime") or 0) > 0)
+        if n:
+            notes.append(f"{n} Tx I-PDU(s) configure ComMinimumDelayTime > 0; the binding has no MDT field")
+        mo.notes += [f"{(mo.binding or {}).get('_binding')}: {x}" for x in notes]

package/python/ecuc_engine/codegen/modules/comstack.py

@@ -0,0 +1,14 @@
+"""PduR and CanIf. Handle IDs, routing and PDU tables are def-driven; the neighbour handles
+(PduR -> CanIf/Com, CanIf -> PduR) are found through the shared EcucPduCollection/Pdu
+(TPS_ECUC 3.4.1.3) by the binding path language (`peer:`). ComStack_Types.h is the base header."""
+from ..registry import Generator, register
+
+
+@register("PduR")
+class PduR(Generator):
+    std_header = "ComStack_Types.h"
+
+
+@register("CanIf")
+class CanIf(Generator):
+    std_header = "ComStack_Types.h"

package/python/ecuc_engine/codegen/modules/dem.py

@@ -0,0 +1,22 @@
+"""Dem: event IDs and the other symbolic IDs are generic (TPS_ECUC_02108). Module-specific:
+  * the DTC value of every DemDTC as DEM_DTC_<NAME> (DemDtcValue is not a symbolicNameValue param,
+    so TPS_ECUC_02108 does not name it; this generator's convention, <MIP>_<SN> per SWS_BSW_00124);
+  * Dem_MainFunction, scheduled with DemGeneral/DemTaskTime (ECUC_Dem_00715)."""
+from .. import cwriter as W
+from ..model import snake
+from ..registry import Generator, register
+from ...values import parse_int
+
+
+@register("Dem")
+class Dem(Generator):
+    def specific(self, mo):
+        lines = []
+        for c in self.cg.instances(self.mc, "DemDTC"):
+            v = parse_int(c.text("DemDtcValue") or "")
+            if v is not None:
+                lines.append((f"DEM_DTC_{snake(c.name)}", W.c_uint(v, hexa=True), "DemDtcValue"))
+        mo.group("DTC values (DemDTC/DemDtcValue)", lines)
+        gen = [c for c in self.mc.containers if c.def_name == "DemGeneral"]
+        if gen and gen[0].text("DemTaskTime") is not None:
+            mo.main_functions = ["Dem_MainFunction"]