@h2loop/autosar 0.1.2 → 1.1.0

package/python/ecuc_engine/codegen/schm_memmap.py

@@ -0,0 +1,159 @@
+"""SchM_<Mip>.h and <Mip>_MemMap.h (+ an aggregating MemMap.h when the project has none).
+
+SchM_<Mip>.h (SWS_Rte BSW scheduler part): exclusive-area enter/exit macros and the module's main
+function prototypes.
+  * Exclusive areas: the ones the module's static code actually uses (`SchM_Enter_<Mip>_<EA>` found
+    in the project's non-generated C), plus any configured for the module in the Rte ECUC.
+    Mechanism per RteExclusiveAreaImplMechanism when configured (RteBswExclusiveAreaImpl), else
+    ALL_INTERRUPT_BLOCKING (OS SuspendAllInterrupts/ResumeAllInterrupts).
+  * Main functions: <Mip>_MainFunction for a `...MainFunctionPeriod` parameter, and one per instance
+    of a `<Mip>MainFunction<X>` container (Com-style named main functions).
+<Mip>_MemMap.h: SWS_MemMap_00032 file name, keyword evaluation and START/STOP sequence checks in the
+shape of the SWS_MemMap example (chapter A.3); pragmas are left to the project's MemMapAllocation
+(`.hydron/autosar.json` codegen.memmap.pragmas), so the default build is compiler-neutral.
+"""
+from __future__ import annotations
+
+import re
+
+from . import cwriter as W
+
+DEFAULT_SECTIONS = ["CODE", "CONST_UNSPECIFIED", "CONFIG_DATA_UNSPECIFIED", "VAR_INIT_UNSPECIFIED",
+                    "VAR_NOINIT_UNSPECIFIED", "VAR_CLEARED_UNSPECIFIED"]
+
+MECHANISMS = {
+    "ALL_INTERRUPT_BLOCKING": ("SuspendAllInterrupts()", "ResumeAllInterrupts()"),
+    "OS_INTERRUPT_BLOCKING": ("SuspendOSInterrupts()", "ResumeOSInterrupts()"),
+}
+
+
+def _scan(ctx, rx) -> dict:
+    hits: dict = {}
+    for f in ctx.sources:
+        try:
+            with open(f, errors="replace") as fh:
+                text = fh.read()
+        except OSError:
+            continue
+        for m in rx.finditer(text):
+            hits.setdefault(m.group(1), set()).add(ctx.cg.p.rel(f))
+    return hits
+
+
+def _ea_mechanisms(cg) -> dict:
+    """EA short name -> (mechanism, os resource) from the Rte ECUC, when configured."""
+    out = {}
+    rte = cg.module("Rte")
+    if rte is None:
+        return out
+    for c in rte.containers:
+        if c.def_name != "RteBswExclusiveAreaImpl":
+            continue
+        ref = c.text("RteBswExclusiveAreaRef") or ""
+        mech = c.text("RteExclusiveAreaImplMechanism") or "ALL_INTERRUPT_BLOCKING"
+        res = (c.text("RteBswExclusiveAreaOsResourceRef") or "").rsplit("/", 1)[-1]
+        if ref:
+            out[ref.rsplit("/", 1)[-1]] = (mech, res)
+    return out
+
+
+def main_functions(cg, mo) -> list:
+    mc = mo.mc
+    out = list(getattr(mo, "main_functions", []))
+    for c in mc.containers:
+        if c.defn is None:
+            continue
+        m = re.match(rf"^{re.escape(mc.name)}MainFunction(\w*)$", c.def_name)
+        if m:
+            suffix = m.group(1)
+            fn = f"{mo.mip}_MainFunction{suffix}" + ("" if c.name == c.def_name else f"_{c.name}")
+            if fn not in out:
+                out.append(fn)
+            continue
+        if cg.is_multi(c):
+            continue
+        for p in c.defn.params:
+            if p.endswith("MainFunctionPeriod") and c.text(p.rsplit("/", 1)[-1]) is not None:
+                fn = f"{mo.mip}_MainFunction"
+                if fn not in out:
+                    out.append(fn)
+    return out
+
+
+def schm_header(ctx, mo) -> tuple:
+    mip, MIP = mo.mip, mo.MIP
+    eas = _scan(ctx, re.compile(rf"\bSchM_(?:Enter|Exit)_{re.escape(mip)}_(\w+)\s*\("))
+    mech = _ea_mechanisms(ctx.cg)
+    for ea in mech:
+        if ea.upper().startswith(MIP + "_") and ea not in eas:
+            eas[ea] = {"Rte ECUC"}
+    mfs = main_functions(ctx.cg, mo)
+    name = f"SchM_{mip}.h"
+    g = W.guard(name)
+    lines = [mo._banner(name), "", f"#ifndef {g}", f"#define {g}", "", '#include "Std_Types.h"']
+    if eas:
+        lines.append('#include "Os.h"')
+    if eas:
+        lines += ["", "/* Exclusive areas (SWS_Rte SchM_Enter/SchM_Exit); used in: "
+                  + ", ".join(sorted({f for s in eas.values() for f in s})) + " */"]
+        for ea in sorted(eas):
+            m, res = mech.get(ea, ("ALL_INTERRUPT_BLOCKING", ""))
+            if m == "OS_RESOURCE" and res:
+                enter, exit_ = f"(void)GetResource({res})", f"(void)ReleaseResource({res})"
+            else:
+                enter, exit_ = MECHANISMS.get(m, ("do { } while (0)", "do { } while (0)"))
+            lines += [W.define(f"SchM_Enter_{mip}_{ea}()", enter, m), W.define(f"SchM_Exit_{mip}_{ea}()", exit_)]
+    if mfs:
+        lines += ["", "/* Main functions called by the BSW scheduler */"]
+        lines += [f"extern FUNC(void, {MIP}_CODE) {fn}(void);" for fn in mfs]
+    lines += ["", f"#endif /* {g} */", ""]
+    return name, "\n".join(lines)
+
+
+def module_memmap(ctx, mo, pragmas: dict) -> tuple:
+    mip, MIP = mo.mip, mo.MIP
+    used = _scan(ctx, re.compile(rf"\b{re.escape(MIP)}_START_SEC_(\w+)"))
+    sections = list(DEFAULT_SECTIONS) + sorted(s for s in used if s not in DEFAULT_SECTIONS)
+    name = f"{mip}_MemMap.h"
+    lines = [mo._banner(name),
+             "/* Memory mapping of the module's sections (SWS_MemMap_00032). No include guard: it is included",
+             " * once per section switch. Pragmas come from codegen.memmap.pragmas (MemMapAllocation); none by default. */",
+             "", "#define MEMMAP_ERROR", ""]
+    for i, sec in enumerate(sections):
+        kw = f"{MIP}_SEC_{sec}"
+        start = pragmas.get(sec, {}).get("start", "") if isinstance(pragmas.get(sec), dict) else ""
+        stop = pragmas.get(sec, {}).get("stop", "") if isinstance(pragmas.get(sec), dict) else ""
+        lines += [
+            f"{'#if' if i == 0 else '#elif'} defined({MIP}_START_SEC_{sec})",
+            f"  #undef {MIP}_START_SEC_{sec}",
+            "  #undef MEMMAP_ERROR",
+            f"  #ifdef {MIP}_MEMMAP_SEQUENCE_OPEN",
+            f'    #error "{name}: {kw}: STOP the open section before starting a new one"',
+            "  #endif",
+            f"  #define {MIP}_MEMMAP_SEQUENCE_OPEN",
+            *( [f"  {start}"] if start else []),
+            f"#elif defined({MIP}_STOP_SEC_{sec})",
+            f"  #undef {MIP}_STOP_SEC_{sec}",
+            "  #undef MEMMAP_ERROR",
+            f"  #ifndef {MIP}_MEMMAP_SEQUENCE_OPEN",
+            f'    #error "{name}: {kw}: STOP without START"',
+            "  #endif",
+            f"  #undef {MIP}_MEMMAP_SEQUENCE_OPEN",
+            *( [f"  {stop}"] if stop else []),
+        ]
+    lines += ["#endif", "", "#if defined(MEMMAP_ERROR)", f'  #error "{name}: unknown memory section"', "#endif", ""]
+    return name, "\n".join(lines), sections
+
+
+def aggregate_memmap(ctx, entries: list) -> str:
+    """Legacy MemMap.h dispatching to the per-module files (only emitted when the project has none)."""
+    lines = [W.banner("MemMap.h", "MemMap", "-", ctx.release, [], "-"),
+             "/* Dispatches each <MIP>_START_SEC_/<MIP>_STOP_SEC_ keyword to <Mip>_MemMap.h. No include guard. */", ""]
+    first = True
+    for mip, sections in entries:
+        MIP = mip.upper()
+        cond = " || \\\n    ".join(f"defined({MIP}_{k}_SEC_{s})" for s in sections for k in ("START", "STOP"))
+        lines += [f"{'#if' if first else '#elif'} {cond}", f'  #include "{mip}_MemMap.h"']
+        first = False
+    lines += ["#else", '  #error "MemMap.h: unknown memory section"', "#endif", ""]
+    return "\n".join(lines)

package/python/ecuc_engine/context.py

@@ -0,0 +1,481 @@
+"""Deterministic context assembly for "implement / change a runnable" tasks (autosar_build_context).
+
+Fixed section order:
+  1 TASK                       the task text, verbatim
+  2 SWC DEFINITION             ports, interfaces, data types, runnables, events (from ARXML, by reference)
+  3 ALLOWED RTE API            for the runnable(s): exact declaration in Rte_<Swc>.h when present, else the
+                               SWS_RTE signature from the model; never dropped or truncated
+  4 RUNNABLE CODE              the entry function body from the C sources (local parse)
+  5 CALLEES                    functions it reaches: bodies of in-house ones, prototypes of the rest
+  6 RELATED CONFIG             Com signals / NvM blocks behind its ports and calls (ECUC values + file:line)
+  7 FUZZY: SIMILAR FUNCTIONS   in other SW-Cs, by lexical/structural similarity of RTE API + call names
+  8 FUZZY: SIMILAR PAST CHANGES git-history-lite (history.similar_changes)
+
+Budget (about 4 characters per token): drop 8, then 7, then reduce 5 to prototypes, truncate 4, truncate 6,
+reduce 5 to names, cut 4 to its head, compact 2. Sections 1 and 3 are never reduced. Same inputs -> byte-identical
+output: everything is sorted, paths are project-relative, nothing time- or environment-dependent is emitted.
+"""
+from __future__ import annotations
+
+import hashlib
+import json
+import os
+import re
+from typing import Optional
+
+from . import paths
+from .csrc import CIndex, Func
+from .history import similar_changes, terms_of
+from .rte_api import ArIndex, SwcModel, build_all, find_header, find_swc, header_entries
+
+CHARS_PER_TOKEN = 4
+SIM_TOP = 3
+CODE_TRUNC_LINES = 40
+CODE_HEAD_LINES = 12
+
+
+def _h(text: str) -> str:
+    return hashlib.sha1(text.encode("utf-8")).hexdigest()[:12]
+
+
+def _cut(text: str, n: int) -> str:
+    lines = text.split("\n")
+    if len(lines) <= n:
+        return text
+    return "\n".join(lines[:n] + [f"    /* … {len(lines) - n} more line(s) truncated by the context budget */", "}"])
+
+
+class Ctx:
+    def __init__(self, root: str):
+        self.root = root
+        self.ix = ArIndex(root)
+        self.models = build_all(root, self.ix)
+        self.cx = CIndex(root)
+        self._project = None
+        self._hdr_text: Optional[dict] = None
+
+    def rel(self, f: Optional[str]) -> str:
+        if not f:
+            return "?"
+        r = os.path.relpath(f, self.root)
+        return f if r.startswith("..") else r
+
+    def project(self):
+        if self._project is None:
+            try:
+                from .model import Project
+                self._project = Project(self.root)
+            except Exception:  # noqa: BLE001
+                self._project = False
+        return self._project or None
+
+    # ---- C helpers
+    def headers(self) -> dict:
+        if self._hdr_text is None:
+            self._hdr_text = {}
+            for f in paths.walk(self.root, paths.is_c).files:
+                if f.lower().endswith(".h"):
+                    try:
+                        self._hdr_text[f] = open(f, encoding="utf-8", errors="replace").read()
+                    except OSError:
+                        pass
+        return self._hdr_text
+
+    def prototype(self, name: str) -> Optional[tuple]:
+        rx = re.compile(rf"^[^\n#;{{}}]*\b{re.escape(name)}\s*\([^;{{}}]*\)\s*;", re.M)
+        for f in sorted(self.headers()):
+            m = rx.search(self.headers()[f])
+            if m:
+                return " ".join(m.group(0).split()), f"{self.rel(f)}:{self.headers()[f].count(chr(10), 0, m.start()) + 1}"
+        for name2, lst in self.cx.funcs.items():
+            if name2 == name:
+                return lst[0].signature + ";", f"{self.rel(lst[0].file)}:{lst[0].line}"
+        return None
+
+    def body(self, fn: Func) -> str:
+        return fn.text(self.cx.src[fn.file])
+
+    def swc_files(self, m: SwcModel) -> tuple:
+        """(ARXML files, C files) of a SW-C: its description + its interfaces; C reached from its runnables or
+        including Rte_<Swc>.h."""
+        ax = {os.path.join(self.root, m.file)}
+        for p in m.ports:
+            n = self.ix.get(p.get("interface"))
+            if n is not None:
+                ax.add(self.ix.where(n)[0])
+        cf = set()
+        for r in m.runnables:
+            fn = self.cx.get(r.symbol)
+            if fn is not None:
+                for g in self.cx.reachable(fn):
+                    cf.add(g.file)
+        want = f"rte_{m.name}.h".lower()
+        for f, incs in self.cx.includes.items():
+            if any(os.path.basename(i).lower() == want for i in incs):
+                cf.add(f)
+        return sorted(x for x in ax if x), sorted(cf)
+
+
+# ---------------------------------------------------------------- sections
+def sec_swc(c: Ctx, m: SwcModel, runs: list) -> list:
+    """-> [full, compact] renderings + sources."""
+    lines = [f"SW-C {m.name} ({m.tag}) {m.path} @ {m.file}:{m.line}"
+             + ("; supports multiple instantiation (Rte_Instance self first)" if m.multiple_instantiation else "")]
+    lines.append("Ports:")
+    for p in m.ports:
+        lines.append(f"  {p['direction']}-port {p['name']} : {p['interfaceKind']} {p['interface']} @ {p['at']}")
+        for e in p["elements"]:
+            extra = ", ".join(x for x in (e.get("type"), e.get("semantics") and f"{e['semantics']} semantics",
+                                         e.get("kind")) if x)
+            lines.append(f"    - {e['name']}" + (f" ({extra})" if extra else ""))
+    if m.types:
+        lines.append("Data types: " + "; ".join(f"{k}={v['kind']}" + (f"[{v['base']}]" if v.get("base") else "")
+                                               for k, v in sorted(m.types.items())))
+    lines.append("Runnables:")
+    for r in m.runnables:
+        ev = "; ".join(f"{e['kind']} {e['event']}" + (f" period {e['period']}s" if e.get("period") else "")
+                       + (f" on {e.get('port')}.{(e.get('target') or '').rsplit('/', 1)[-1]}" if e.get("port") else "")
+                       for e in r.events) or "no event (not scheduled)"
+        mark = "  <== target" if r in runs and len(runs) < len(m.runnables) else ""
+        lines.append(f"  {r.name} symbol {r.symbol} [{ev}] @ {r.file}:{r.line}{mark}")
+        lines.append(f"    entry: {r.signature}")
+        for pt in r.points:
+            lines.append(f"    {pt['role']}: {pt.get('port') or ''}{'.' if pt.get('port') else ''}"
+                         f"{(pt.get('target') or '').rsplit('/', 1)[-1]}" + (f"  !! {pt['unresolved']}" if pt.get("unresolved") else ""))
+    full = "\n".join(lines)
+    compact = "\n".join(l for l in lines if not l.startswith("    ") or "<== target" in l or l.startswith("    -"))
+    src = [{"kind": "arxml", "ref": m.path, "at": f"{m.file}:{m.line}"}]
+    return [full, compact], src
+
+
+def sec_api(c: Ctx, m: SwcModel, runs: list, header: Optional[str]) -> tuple:
+    decl = header_entries([header]) if header else {}
+    lines, src = [], []
+    if header:
+        lines.append(f"Generated contract header: {c.rel(header)}")
+    else:
+        lines.append(f"No Rte_{m.name}.h in the project: signatures below are derived from the ARXML (SWS_RTE 5.6).")
+    for r in runs:
+        allowed = sorted(m.allowed(r.name), key=lambda a: a.name)
+        lines.append(f"Runnable {r.name}: {len(allowed)} allowed API(s) — call ONLY these from {r.symbol} and the "
+                     "functions it calls:")
+        for a in allowed:
+            d = decl.get(a.name)
+            lines.append(f"  {a.signature};   [{a.cite}]")
+            if d:
+                lines.append(f"    declared {c.rel(d['file'])}:{d['line']}: {d['text']}")
+                src.append({"kind": "rte-decl", "ref": a.name, "at": f"{c.rel(d['file'])}:{d['line']}"})
+            else:
+                src.append({"kind": "rte-model", "ref": a.name, "at": a.target})
+        others = sorted(a.name for a in m.generated() if not a.allowed_for(r.name))
+        if others:
+            lines.append(f"  NOT allowed in {r.name} (other runnables' access points; adding a call is NOT-ALLOWED "
+                         f"until an access point is added): {', '.join(others)}")
+    return "\n".join(lines), src
+
+
+def sec_code(c: Ctx, runs: list) -> tuple:
+    full, trunc, head, src, missing = [], [], [], [], []
+    for r in runs:
+        fn = c.cx.get(r.symbol)
+        if fn is None:
+            missing.append(r.symbol)
+            msg = f"/* {r.symbol}: no definition found in the project C sources (new runnable?) */"
+            full.append(msg)
+            trunc.append(msg)
+            head.append(msg)
+            continue
+        b = c.body(fn)
+        hdr = f"/* {c.rel(fn.file)}:{fn.line}-{fn.end_line} */"
+        full.append(hdr + "\n" + b)
+        trunc.append(hdr + "\n" + _cut(b, CODE_TRUNC_LINES))
+        head.append(hdr + "\n" + _cut(b, CODE_HEAD_LINES))
+        src.append({"kind": "c-function", "ref": fn.name, "at": f"{c.rel(fn.file)}:{fn.line}-{fn.end_line}", "sha1": _h(b)})
+    return ["\n\n".join(full), "\n\n".join(trunc), "\n\n".join(head)], src, missing
+
+
+def sec_callees(c: Ctx, runs: list) -> tuple:
+    entries = [c.cx.get(r.symbol) for r in runs]
+    entries = [e for e in entries if e is not None]
+    entry_ids = {id(e) for e in entries}
+    own, ext = [], set()
+    seen = set()
+    for e in entries:
+        for g in c.cx.reachable(e):
+            if id(g) in entry_ids or id(g) in seen:
+                continue
+            seen.add(id(g))
+            own.append(g)
+        for g in [e] + own:
+            for name in g.calls:
+                if name.startswith("Rte_") or c.cx.callee(g, name) is not None:
+                    continue
+                ext.add(name)
+    own.sort(key=lambda g: (c.rel(g.file), g.line))
+    ext_l = []
+    for name in sorted(ext):
+        p = c.prototype(name)
+        if p:
+            ext_l.append((name, p))
+    bodies = [f"/* {c.rel(g.file)}:{g.line}-{g.end_line} */\n{c.body(g)}" for g in own]
+    sigs = [f"{g.signature};   /* {c.rel(g.file)}:{g.line} */" for g in own]
+    protos = [f"{p[0]}   /* {p[1]} */" for _n, p in ext_l]
+    names = ", ".join([g.name for g in own] + [n for n, _p in ext_l])
+    full = "\n\n".join(bodies + (["/* called, defined elsewhere: */\n" + "\n".join(protos)] if protos else []))
+    sig = "\n".join(sigs + protos)
+    src = [{"kind": "c-function", "ref": g.name, "at": f"{c.rel(g.file)}:{g.line}-{g.end_line}", "sha1": _h(c.body(g))}
+           for g in own] + [{"kind": "c-prototype", "ref": n, "at": p[1]} for n, p in ext_l]
+    return [full or "(no callees)", sig or "(no callees)", ("calls: " + names) if names else "(no callees)"], src
+
+
+def _sysmap(c: Ctx) -> dict:
+    """(port path, data element path) -> system signal path, from SENDER-RECEIVER-TO-SIGNAL-MAPPINGs."""
+    out = {}
+    for sysn in c.ix.of_tag("SYSTEM"):
+        for n in sysn.iter():
+            if n.tag == "SENDER-RECEIVER-TO-SIGNAL-MAPPING":
+                port = None
+                el = None
+                for x in n.iter():
+                    if x.tag == "CONTEXT-PORT-REF":
+                        port = x.text.strip()
+                    elif x.tag == "TARGET-DATA-PROTOTYPE-REF":
+                        el = x.text.strip()
+                sig = n.child_text("SYSTEM-SIGNAL-REF")
+                if port and el and sig:
+                    out.setdefault((port, el), sig)
+    return out
+
+
+def sec_config(c: Ctx, m: SwcModel, runs: list, header: Optional[str]) -> tuple:
+    p = c.project()
+    if p is None:
+        return ["(ECUC configuration not loadable)", "(ECUC configuration not loadable)"], [], []
+    from .audit import signal_owners
+    from .find import _own
+    decl = header_entries([header]) if header else {}
+    by_name: dict = {}
+    for path, group in p.by_path.items():
+        e = group[0]
+        if e.kind == "container":
+            by_name.setdefault(((e.def_ref or "").rsplit("/", 1)[-1], e.name), e)
+    sysmap = _sysmap(c)
+    sig_to_com: dict = {}
+    for (dname, _n), e in sorted(by_name.items()):
+        if dname in ("ComSignal", "ComGroupSignal"):
+            ref = (_own(p, e).get("ComSystemTemplateSystemSignalRef") or [None])[0]
+            mp = c.ix.get(ref)
+            if mp is not None:
+                isig = c.ix.get(mp.child_text("I-SIGNAL-REF"))
+                ssig = isig.child_text("SYSTEM-SIGNAL-REF") if isig is not None else None
+                if ssig:
+                    sig_to_com.setdefault(ssig, []).append(e)
+    lines, src, terms = [], [], []
+    want = []
+    for r in runs:
+        for a in sorted(m.allowed(r.name), key=lambda a: a.name):
+            if a.port and a not in want:
+                want.append(a)
+    for a in want:
+        hits = []
+        d = decl.get(a.name)
+        if d:
+            for mod, dname, short in re.findall(r"\b([A-Z][A-Za-z]+)Conf_([A-Za-z]+)_(\w+)", d["text"]):
+                e = by_name.get((dname, short))
+                if e is not None:
+                    hits.append((e, f"via {c.rel(d['file'])}:{d['line']}"))
+        if not hits:
+            ssig = sysmap.get((a.port_path, a.target))
+            for e in sig_to_com.get(ssig or "", []):
+                hits.append((e, f"via SenderReceiverToSignalMapping -> {ssig}"))
+        for e, how in hits:
+            own = _own(p, e)
+            vals = ", ".join(f"{k}={v[0] if len(v) == 1 else v}" for k, v in sorted(own.items())
+                             if k in ("ComBitPosition", "ComBitSize", "ComSignalType", "ComSignalEndianness",
+                                      "ComHandleId", "ComTransferProperty", "ComSignalInitValue"))
+            owners = signal_owners(p, [e.path]).get(e.path) or []
+            ip = "; ".join(f"I-PDU {o['ipdu']} {o.get('direction') or '?'}" for o in owners)
+            lines.append(f"{a.port}.{a.element} -> {e.path} [{vals}] {ip} @ {p.rel(e.file)}:{e.line} ({how})")
+            src.append({"kind": "ecuc", "ref": e.path, "at": f"{p.rel(e.file)}:{e.line}"})
+            terms.append(e.name)
+    # NvM blocks used by the runnable's code
+    blocks = set()
+    for r in runs:
+        fn = c.cx.get(r.symbol)
+        if fn is None:
+            continue
+        for g in c.cx.reachable(fn):
+            blocks.update(re.findall(r"\bNvMConf_NvMBlockDescriptor_(\w+)", c.body(g)))
+    for b in sorted(blocks):
+        e = by_name.get(("NvMBlockDescriptor", b))
+        if e is None:
+            lines.append(f"NvM block {b}: not configured (NvMConf_NvMBlockDescriptor_{b} has no NvMBlockDescriptor)")
+            continue
+        own = _own(p, e)
+        vals = ", ".join(f"{k}={v[0] if len(v) == 1 else v}" for k, v in sorted(own.items())
+                         if k in ("NvMNvBlockLength", "NvMRamBlockDataAddress", "NvMBlockUseCrc", "NvMBlockCrcType",
+                                  "NvMBlockManagementType", "NvMNvramBlockIdentifier", "NvMSelectBlockForReadAll"))
+        lines.append(f"NvM {e.path} [{vals}] @ {p.rel(e.file)}:{e.line}")
+        src.append({"kind": "ecuc", "ref": e.path, "at": f"{p.rel(e.file)}:{e.line}"})
+    if not lines:
+        lines.append("(no Com signal or NvM block found behind this runnable's ports and calls)")
+    full = "\n".join(lines)
+    return [full, _cut(full, 15)], src, terms
+
+
+def _features(c: Ctx, fn: Optional[Func], extra: set) -> set:
+    feats = set(extra)
+    if fn is None:
+        return feats
+    for g in c.cx.reachable(fn)[:20]:
+        for name, _l, _a in g.rte:
+            feats.add("api:" + name.split("_")[1] if "_" in name else name)
+            feats |= {t for t in terms_of(name)}
+        for n in g.calls:
+            if not n.startswith("Rte_"):
+                feats.add("call:" + n)
+        feats |= terms_of(c.body(g))
+    return feats
+
+
+def sec_similar(c: Ctx, m: SwcModel, runs: list, task: str) -> tuple:
+    target = set()
+    task_t = terms_of(task)
+    for r in runs:
+        target |= _features(c, c.cx.get(r.symbol), set())
+        for a in m.allowed(r.name):
+            target.add("api:" + a.api)
+            target |= terms_of(a.element or "")
+    target |= task_t
+    cands = []
+    for o in c.models:
+        if o is m:
+            continue
+        for r in o.runnables:
+            fn = c.cx.get(r.symbol)
+            if fn is None:
+                continue
+            f = _features(c, fn, {"api:" + a.api for a in o.allowed(r.name)})
+            inter, union = len(target & f), len(target | f) or 1
+            score = round(inter / union, 4)
+            if inter:
+                cands.append((-score, o.name, r.name, fn, sorted(target & f)))
+    cands.sort(key=lambda x: (x[0], x[1], x[2]))
+    top = cands[:SIM_TOP]
+    lines, src = [], []
+    for s, swc, rn, fn, common in top:
+        lines.append(f"[{swc}.{rn} similarity {-s:.3f}; shared: {', '.join(common[:12])}]\n"
+                     f"/* {c.rel(fn.file)}:{fn.line}-{fn.end_line} */\n" + _cut(c.body(fn), 30))
+        src.append({"kind": "c-function", "ref": f"{swc}.{rn}", "at": f"{c.rel(fn.file)}:{fn.line}", "score": -s,
+                    "sha1": _h(c.body(fn))})
+    return ("\n\n".join(lines) or "(no similar function in other SW-Cs)"), src, [x[1] for x in top]
+
+
+def sec_history(c: Ctx, m: SwcModel, runs: list, task: str, similar_swcs: list) -> tuple:
+    ax, cf = c.swc_files(m)
+    rel_files = []
+    for name in sorted(set(similar_swcs)):
+        o = find_swc(c.models, name)
+        if o is not None:
+            a2, c2 = c.swc_files(o)
+            rel_files += a2 + c2
+    terms = terms_of(task)
+    for r in runs:
+        for a in m.allowed(r.name):
+            terms |= terms_of(f"{a.port or ''} {a.element or ''}")
+        terms.add(r.name.lower())
+    res = similar_changes(c.root, ax + cf, sorted(set(rel_files) - set(ax + cf)), terms)
+    lines, src = [], []
+    for ch in res["changes"]:
+        lines.append(f"[commit {ch['commit']} score {ch['score']}: {ch['subject']}; overlap: {', '.join(ch['overlap'][:10])}]")
+        for d in ch["arxml"]:
+            lines.append(f"  ARXML {d['file']}: " + (d.get("status") or d.get("error") or json.dumps(d.get("summary"))))
+            lines.extend(f"    {x}" for x in d.get("items", []))
+        for h in ch["c"]:
+            lines.append(f"  C {h['file']}:\n" + "\n".join("    " + x for x in h["diff"].splitlines()))
+        src.append({"kind": "git-commit", "ref": ch["commit"], "score": ch["score"]})
+    if not lines:
+        lines = [f"(no similar past change: {'; '.join(res['notes']) or 'nothing matched'})"]
+    return "\n".join(lines), src
+
+
+# ---------------------------------------------------------------- assembly
+def build_context(root: str, swc: str, task: str, runnable: Optional[str] = None, budget_tokens: int = 24000,
+                  history: bool = True) -> dict:
+    c = Ctx(root)
+    m = find_swc(c.models, swc)
+    if m is None:
+        return {"error": f"no SW-COMPONENT-TYPE {swc!r}; known: {', '.join(x.name for x in c.models) or 'none'}"}
+    if runnable:
+        r = m.runnable(runnable)
+        if r is None:
+            return {"error": f"{m.name} has no runnable {runnable!r}; runnables: {', '.join(x.name for x in m.runnables)} "
+                             "(to add a runnable, add the RUNNABLE-ENTITY + event with arxml_edit first)"}
+        runs = [r]
+    else:
+        runs = list(m.runnables)
+    header = find_header(root, m.name, sorted(c.headers()))
+    s_swc, src_swc = sec_swc(c, m, runs)
+    s_api, src_api = sec_api(c, m, runs, header)
+    s_code, src_code, missing = sec_code(c, runs)
+    s_cal, src_cal = sec_callees(c, runs)
+    s_cfg, src_cfg, _t = sec_config(c, m, runs, header)
+    s_sim, src_sim, sim_swcs = sec_similar(c, m, runs, task)
+    if history:
+        s_hist, src_hist = sec_history(c, m, runs, task, sim_swcs)
+    else:
+        s_hist, src_hist = "(history disabled)", []
+    sections = [
+        {"id": "task", "title": "1. TASK", "variants": [task.strip()], "sources": []},
+        {"id": "swc", "title": f"2. SW-C DEFINITION ({m.name})", "variants": s_swc, "sources": src_swc},
+        {"id": "api", "title": "3. ALLOWED RTE API", "variants": [s_api], "sources": src_api},
+        {"id": "code", "title": "4. CURRENT RUNNABLE CODE", "variants": s_code, "sources": src_code},
+        {"id": "callees", "title": "5. FUNCTIONS IT CALLS", "variants": s_cal, "sources": src_cal},
+        {"id": "config", "title": "6. RELATED CONFIGURATION (Com signals / NvM blocks)", "variants": s_cfg, "sources": src_cfg},
+        {"id": "similar", "title": "7. FUZZY: SIMILAR FUNCTIONS IN OTHER SW-Cs", "variants": [s_sim, ""], "sources": src_sim},
+        {"id": "history", "title": "8. FUZZY: SIMILAR PAST CHANGES", "variants": [s_hist, ""], "sources": src_hist},
+    ]
+    mode_names = {"similar": ["full", "dropped"], "history": ["full", "dropped"],
+                  "callees": ["bodies", "prototypes", "names"], "code": ["full", "truncated", "head"],
+                  "config": ["full", "truncated"], "swc": ["full", "compact"]}
+    level = {s["id"]: 0 for s in sections}
+    steps = [("history", 1), ("similar", 1), ("callees", 1), ("code", 1), ("config", 1), ("callees", 2),
+             ("code", 2), ("swc", 1)]
+    budget = max(1, budget_tokens) * CHARS_PER_TOKEN
+    applied = []
+
+    def render() -> str:
+        parts = [f"# AUTOSAR context: {m.name}" + (f" / {runs[0].name}" if len(runs) == 1 else " (all runnables)")]
+        for s in sections:
+            v = s["variants"][min(level[s["id"]], len(s["variants"]) - 1)]
+            if v == "":
+                parts.append(f"## {s['title']}\n(dropped: context budget)")
+            else:
+                parts.append(f"## {s['title']}\n{v}")
+        return "\n\n".join(parts) + "\n"
+
+    text = render()
+    for sid, lv in steps:
+        if len(text) <= budget:
+            break
+        sec = next(s for s in sections if s["id"] == sid)
+        if lv < len(sec["variants"]) and level[sid] < lv:
+            level[sid] = lv
+            applied.append(f"{sid}->{mode_names[sid][lv]}")
+            text = render()
+    manifest = []
+    for s in sections:
+        mode = mode_names.get(s["id"], ["full"])[level[s["id"]]]
+        for x in s["sources"]:
+            manifest.append({"section": s["id"], **x, "included": mode})
+    out = {"text": text, "manifest": manifest,
+           "sections": [{"id": s["id"], "title": s["title"], "mode": mode_names.get(s["id"], ["full"])[level[s["id"]]],
+                         "chars": len(s["variants"][min(level[s["id"]], len(s["variants"]) - 1)])} for s in sections],
+           "swc": m.name, "runnables": [r.name for r in runs], "budgetTokens": budget_tokens,
+           "estimatedTokens": (len(text) + CHARS_PER_TOKEN - 1) // CHARS_PER_TOKEN, "reductions": applied,
+           "sha1": _h(text)}
+    if len(text) > budget:
+        out["overBudget"] = True
+    if missing:
+        out["codeMissing"] = missing
+    return out