wasmtime 20.0.2 → 22.0.0
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- checksums.yaml +4 -4
- data/Cargo.lock +137 -139
- data/ext/Cargo.toml +8 -6
- data/ext/cargo-vendor/cobs-0.2.3/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cobs-0.2.3/Cargo.toml +39 -0
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- data/ext/cargo-vendor/cobs-0.2.3/src/dec.rs +360 -0
- data/ext/cargo-vendor/cobs-0.2.3/src/enc.rs +216 -0
- data/ext/cargo-vendor/cobs-0.2.3/src/lib.rs +14 -0
- data/ext/cargo-vendor/cobs-0.2.3/tests/test.rs +265 -0
- data/ext/cargo-vendor/cranelift-bforest-0.109.0/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.109.0/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.109.0/build.rs +266 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/alias_analysis.rs +403 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/context.rs +384 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ctxhash.rs +167 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/dominator_tree.rs +727 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/egraph/elaborate.rs +835 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/egraph.rs +835 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/incremental_cache.rs +256 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/inst_predicates.rs +230 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/dfg.rs +1777 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/extfunc.rs +402 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/immediates.rs +1612 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/instructions.rs +1020 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/stackslot.rs +208 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/types.rs +627 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/abi.rs +1556 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/emit.rs +3584 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/emit_tests.rs +7901 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/imms.rs +1213 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/mod.rs +3060 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/regs.rs +269 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/unwind/systemv.rs +174 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/lower/isle.rs +810 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/pcc.rs +568 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/mod.rs +449 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/abi.rs +1029 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst/encode.rs +675 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/inst.isle +5289 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/lower/isle.rs +1064 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/lower.isle +4810 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/lower.rs +337 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/pcc.rs +1014 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isle_prelude.rs +986 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/lib.rs +106 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/abi.rs +2419 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/blockorder.rs +465 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/buffer.rs +2508 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/isle.rs +909 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/lower.rs +1432 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/mod.rs +551 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/reg.rs +479 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/valueregs.rs +138 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/vcode.rs +1741 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/nan_canonicalization.rs +130 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/opts/arithmetic.isle +240 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/opts/cprop.isle +297 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/opts/icmp.isle +215 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/opts/shifts.isle +307 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/prelude.isle +664 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/prelude_lower.isle +1073 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ranges.rs +131 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/remove_constant_phis.rs +419 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/scoped_hash_map.rs +310 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/settings.rs +590 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/timing.rs +296 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/traversals.rs +216 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/verifier/mod.rs +1957 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/write.rs +638 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/Cargo.toml +36 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/cdsl/types.rs +496 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/gen_inst.rs +1278 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/gen_isle.rs +519 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/gen_settings.rs +508 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/gen_types.rs +75 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/isa/riscv64.rs +174 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/isa/x86.rs +414 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/isle.rs +126 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/lib.rs +98 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/shared/settings.rs +348 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/srcgen.rs +464 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.109.0/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/cranelift-codegen-shared-0.109.0/src/constants.rs +28 -0
- data/ext/cargo-vendor/cranelift-control-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.109.0/Cargo.toml +30 -0
- data/ext/cargo-vendor/cranelift-entity-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.109.0/Cargo.toml +53 -0
- data/ext/cargo-vendor/cranelift-entity-0.109.0/src/lib.rs +381 -0
- data/ext/cargo-vendor/cranelift-entity-0.109.0/src/set.rs +290 -0
- data/ext/cargo-vendor/cranelift-frontend-0.109.0/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/cranelift-frontend-0.109.0/src/frontend.rs +1857 -0
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- data/ext/cargo-vendor/cranelift-frontend-0.109.0/src/ssa.rs +1328 -0
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- data/ext/cargo-vendor/cranelift-isle-0.109.0/src/codegen.rs +886 -0
- data/ext/cargo-vendor/cranelift-isle-0.109.0/src/disjointsets.rs +169 -0
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- data/ext/cargo-vendor/cranelift-isle-0.109.0/src/sema.rs +2492 -0
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(rule (simplify (ne (ty_int ty) x x)) (subsume (iconst_u ty 0)))
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(rule (simplify (ugt (ty_int ty) x x)) (subsume (iconst_u ty 0)))
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(rule (simplify (ult (ty_int ty) x x)) (subsume (iconst_u ty 0)))
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(rule (simplify (ule (ty_int ty) x x)) (subsume (iconst_u ty 1)))
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(rule (simplify (slt (ty_int ty) x x)) (subsume (iconst_u ty 0)))
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(rule (simplify (ugt (fits_in_64 (ty_int bty)) x umax @ (iconst_u cty y)))
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(subsume (iconst_u bty 0)))
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;; uge(x, UMAX) == eq(x, UMAX).
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(rule (simplify (uge (fits_in_64 (ty_int bty)) x umax @ (iconst_u cty y)))
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(if-let $true (u64_eq y (ty_umax cty)))
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(eq bty x umax))
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(rule (simplify (slt (fits_in_64 (ty_int bty)) x smin @ (iconst_u cty y)))
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;; sle(x, SMIN) == eq(x, SMIN).
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(rule (simplify (sgt (fits_in_64 (ty_int bty)) x smin @ (iconst_u cty y)))
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(if-let $true (u64_eq y (ty_smin cty)))
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(ne bty x smin))
|
101
|
-
|
102
|
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;; sge(x, SMIN) == true.
|
103
|
-
(rule (simplify (sge (fits_in_64 (ty_int bty)) x smin @ (iconst_u cty y)))
|
104
|
-
(if-let $true (u64_eq y (ty_smin cty)))
|
105
|
-
(subsume (iconst_u bty 1)))
|
106
|
-
|
107
|
-
;; slt(x, SMAX) == ne(x, SMAX).
|
108
|
-
(rule (simplify (slt (fits_in_64 (ty_int bty)) x smax @ (iconst_u cty y)))
|
109
|
-
(if-let $true (u64_eq y (ty_smax cty)))
|
110
|
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(ne bty x smax))
|
111
|
-
|
112
|
-
;; sle(x, SMAX) == true.
|
113
|
-
(rule (simplify (sle (fits_in_64 (ty_int bty)) x smax @ (iconst_u cty y)))
|
114
|
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(if-let $true (u64_eq y (ty_smax cty)))
|
115
|
-
(subsume (iconst_u bty 1)))
|
116
|
-
|
117
|
-
;; sgt(x, SMAX) == false.
|
118
|
-
(rule (simplify (sgt (fits_in_64 (ty_int bty)) x smax @ (iconst_u cty y)))
|
119
|
-
(if-let $true (u64_eq y (ty_smax cty)))
|
120
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-
(subsume (iconst_u bty 0)))
|
121
|
-
|
122
|
-
;; sge(x, SMAX) == eq(x, SMAX).
|
123
|
-
(rule (simplify (sge (fits_in_64 (ty_int bty)) x smax @ (iconst_u cty y)))
|
124
|
-
(if-let $true (u64_eq y (ty_smax cty)))
|
125
|
-
(eq bty x smax))
|
126
|
-
|
127
|
-
;; `band`/`bor` of 2 comparisons:
|
128
|
-
(rule (simplify (band (fits_in_64 ty) (icmp ty cc1 x y) (icmp ty cc2 x y)))
|
129
|
-
(if-let signed (intcc_comparable cc1 cc2))
|
130
|
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(compose_icmp ty (u64_and (decompose_intcc cc1) (decompose_intcc cc2)) signed x y))
|
131
|
-
|
132
|
-
(rule (simplify (bor (fits_in_64 ty) (icmp ty cc1 x y) (icmp ty cc2 x y)))
|
133
|
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(if-let signed (intcc_comparable cc1 cc2))
|
134
|
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(compose_icmp ty (u64_or (decompose_intcc cc1) (decompose_intcc cc2)) signed x y))
|
135
|
-
|
136
|
-
;; Prefer comparing against zero
|
137
|
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;; uge(x, 1) == ne(x, 0)
|
138
|
-
(rule (simplify (uge ty x (iconst_u cty 1)))
|
139
|
-
(ne ty x (iconst_u cty 0)))
|
140
|
-
;; ult(x, 1) == eq(x, 0)
|
141
|
-
(rule (simplify (ult ty x (iconst_u cty 1)))
|
142
|
-
(eq ty x (iconst_u cty 0)))
|
143
|
-
;; sge(x, 1) == sgt(x, 0)
|
144
|
-
(rule (simplify (sge ty x (iconst_s cty 1)))
|
145
|
-
(sgt ty x (iconst_s cty 0)))
|
146
|
-
;; slt(x, 1) == sle(x, 0)
|
147
|
-
(rule (simplify (slt ty x (iconst_s cty 1)))
|
148
|
-
(sle ty x (iconst_s cty 0)))
|
149
|
-
;; sgt(x, -1) == sge(x, 0)
|
150
|
-
(rule (simplify (sgt ty x (iconst_s cty -1)))
|
151
|
-
(sge ty x (iconst_s cty 0)))
|
152
|
-
;; sle(x, -1) == slt(x, 0)
|
153
|
-
(rule (simplify (sle ty x (iconst_s cty -1)))
|
154
|
-
(slt ty x (iconst_s cty 0)))
|
155
|
-
|
156
|
-
(decl pure partial intcc_comparable (IntCC IntCC) bool)
|
157
|
-
(rule (intcc_comparable x y)
|
158
|
-
(if-let (u64_nonzero class) (u64_and (intcc_class x) (intcc_class y)))
|
159
|
-
(u64_eq 2 class))
|
160
|
-
|
161
|
-
(decl pure decompose_intcc (IntCC) u64)
|
162
|
-
(rule (decompose_intcc (IntCC.Equal)) 1)
|
163
|
-
(rule (decompose_intcc (IntCC.UnsignedLessThan)) 2)
|
164
|
-
(rule (decompose_intcc (IntCC.SignedLessThan)) 2)
|
165
|
-
(rule (decompose_intcc (IntCC.UnsignedLessThanOrEqual)) 3)
|
166
|
-
(rule (decompose_intcc (IntCC.SignedLessThanOrEqual)) 3)
|
167
|
-
(rule (decompose_intcc (IntCC.UnsignedGreaterThan)) 4)
|
168
|
-
(rule (decompose_intcc (IntCC.SignedGreaterThan)) 4)
|
169
|
-
(rule (decompose_intcc (IntCC.UnsignedGreaterThanOrEqual)) 5)
|
170
|
-
(rule (decompose_intcc (IntCC.SignedGreaterThanOrEqual)) 5)
|
171
|
-
(rule (decompose_intcc (IntCC.NotEqual)) 6)
|
172
|
-
|
173
|
-
(decl compose_icmp (Type u64 bool Value Value) Value)
|
174
|
-
(rule (compose_icmp ty 0 _ _ _) (subsume (iconst_u ty 0)))
|
175
|
-
(rule (compose_icmp ty 1 _ x y) (icmp ty (IntCC.Equal) x y))
|
176
|
-
(rule (compose_icmp ty 2 $false x y) (icmp ty (IntCC.UnsignedLessThan) x y))
|
177
|
-
(rule (compose_icmp ty 2 $true x y) (icmp ty (IntCC.SignedLessThan) x y))
|
178
|
-
(rule (compose_icmp ty 3 $false x y) (icmp ty (IntCC.UnsignedLessThanOrEqual) x y))
|
179
|
-
(rule (compose_icmp ty 3 $true x y) (icmp ty (IntCC.SignedLessThanOrEqual) x y))
|
180
|
-
(rule (compose_icmp ty 4 $false x y) (icmp ty (IntCC.UnsignedGreaterThan) x y))
|
181
|
-
(rule (compose_icmp ty 4 $true x y) (icmp ty (IntCC.SignedGreaterThan) x y))
|
182
|
-
(rule (compose_icmp ty 5 $false x y) (icmp ty (IntCC.UnsignedGreaterThanOrEqual) x y))
|
183
|
-
(rule (compose_icmp ty 5 $true x y) (icmp ty (IntCC.SignedGreaterThanOrEqual) x y))
|
184
|
-
(rule (compose_icmp ty 6 _ x y) (icmp ty (IntCC.NotEqual) x y))
|
185
|
-
(rule (compose_icmp ty 7 _ _ _) (subsume (iconst_u ty 1)))
|
186
|
-
|
187
|
-
(decl pure intcc_class (IntCC) u64)
|
188
|
-
(rule (intcc_class (IntCC.UnsignedLessThan)) 1)
|
189
|
-
(rule (intcc_class (IntCC.UnsignedLessThanOrEqual)) 1)
|
190
|
-
(rule (intcc_class (IntCC.UnsignedGreaterThan)) 1)
|
191
|
-
(rule (intcc_class (IntCC.UnsignedGreaterThanOrEqual)) 1)
|
192
|
-
(rule (intcc_class (IntCC.SignedLessThan)) 2)
|
193
|
-
(rule (intcc_class (IntCC.SignedLessThanOrEqual)) 2)
|
194
|
-
(rule (intcc_class (IntCC.SignedGreaterThan)) 2)
|
195
|
-
(rule (intcc_class (IntCC.SignedGreaterThanOrEqual)) 2)
|
196
|
-
(rule (intcc_class (IntCC.Equal)) 3)
|
197
|
-
(rule (intcc_class (IntCC.NotEqual)) 3)
|
@@ -1,307 +0,0 @@
|
|
1
|
-
;; rewrites for shifts and rotates: `ishl, `ushr`, `sshr`, `rotl, `rotr`
|
2
|
-
|
3
|
-
;; x>>0 == x<<0 == x rotr 0 == x rotl 0 == x.
|
4
|
-
(rule (simplify (ishl ty
|
5
|
-
x
|
6
|
-
(iconst_u ty 0)))
|
7
|
-
(subsume x))
|
8
|
-
(rule (simplify (ushr ty
|
9
|
-
x
|
10
|
-
(iconst_u ty 0)))
|
11
|
-
(subsume x))
|
12
|
-
(rule (simplify (sshr ty
|
13
|
-
x
|
14
|
-
(iconst_u ty 0)))
|
15
|
-
(subsume x))
|
16
|
-
(rule (simplify (rotr ty
|
17
|
-
x
|
18
|
-
(iconst_u ty 0)))
|
19
|
-
(subsume x))
|
20
|
-
(rule (simplify (rotl ty
|
21
|
-
x
|
22
|
-
(iconst_u ty 0)))
|
23
|
-
(subsume x))
|
24
|
-
|
25
|
-
;; `(x >> k) << k` is the same as masking off the bottom `k` bits (regardless if
|
26
|
-
;; this is a signed or unsigned shift right).
|
27
|
-
(rule (simplify (ishl (fits_in_64 ty)
|
28
|
-
(ushr ty x (iconst _ k))
|
29
|
-
(iconst _ k)))
|
30
|
-
(let ((mask Imm64 (imm64_shl ty (imm64 0xFFFF_FFFF_FFFF_FFFF) k)))
|
31
|
-
(band ty x (iconst ty mask))))
|
32
|
-
(rule (simplify (ishl (fits_in_64 ty)
|
33
|
-
(sshr ty x (iconst _ k))
|
34
|
-
(iconst _ k)))
|
35
|
-
(let ((mask Imm64 (imm64_shl ty (imm64 0xFFFF_FFFF_FFFF_FFFF) k)))
|
36
|
-
(band ty x (iconst ty mask))))
|
37
|
-
|
38
|
-
;; For unsigned shifts, `(x << k) >> k` is the same as masking out the top
|
39
|
-
;; `k` bits. A similar rule is valid for vectors but this `iconst` mask only
|
40
|
-
;; works for scalar integers.
|
41
|
-
(rule (simplify (ushr (fits_in_64 (ty_int ty))
|
42
|
-
(ishl ty x (iconst _ k))
|
43
|
-
(iconst _ k)))
|
44
|
-
(band ty x (iconst ty (imm64_ushr ty (imm64 (ty_mask ty)) k))))
|
45
|
-
|
46
|
-
;; For signed shifts, `(x << k) >> k` does sign-extension from `n` bits to
|
47
|
-
;; `n+k` bits. In the special case where `x` is the result of either `sextend`
|
48
|
-
;; or `uextend` from `n` bits to `n+k` bits, we can implement this using
|
49
|
-
;; `sextend`.
|
50
|
-
(rule (simplify (sshr wide
|
51
|
-
(ishl wide
|
52
|
-
(uextend wide x @ (value_type narrow))
|
53
|
-
(iconst_u _ shift_u64))
|
54
|
-
(iconst_u _ shift_u64)))
|
55
|
-
(if-let $true (u64_eq shift_u64 (u64_sub (ty_bits_u64 wide) (ty_bits_u64 narrow))))
|
56
|
-
(sextend wide x))
|
57
|
-
|
58
|
-
;; If `k` is smaller than the difference in bit widths of the two types, then
|
59
|
-
;; the intermediate sign bit comes from the extend op, so the final result is
|
60
|
-
;; the same as the original extend op.
|
61
|
-
(rule (simplify (sshr wide
|
62
|
-
(ishl wide
|
63
|
-
x @ (uextend wide (value_type narrow))
|
64
|
-
(iconst_u _ shift_u64))
|
65
|
-
(iconst_u _ shift_u64)))
|
66
|
-
(if-let $true (u64_lt shift_u64 (u64_sub (ty_bits_u64 wide) (ty_bits_u64 narrow))))
|
67
|
-
x)
|
68
|
-
|
69
|
-
;; If the original extend op was `sextend`, then both of the above cases say
|
70
|
-
;; the result should also be `sextend`.
|
71
|
-
(rule (simplify (sshr wide
|
72
|
-
(ishl wide
|
73
|
-
x @ (sextend wide (value_type narrow))
|
74
|
-
(iconst_u _ shift_u64))
|
75
|
-
(iconst_u _ shift_u64)))
|
76
|
-
(if-let $true (u64_le shift_u64 (u64_sub (ty_bits_u64 wide) (ty_bits_u64 narrow))))
|
77
|
-
x)
|
78
|
-
|
79
|
-
;; (x << N) >> N == x as T_SMALL as T_LARGE
|
80
|
-
;; if N == bytesizeof(T_LARGE) - bytesizeof(T_SMALL)
|
81
|
-
;;
|
82
|
-
;; Note that the shift is required to be >0 to ensure this doesn't accidentally
|
83
|
-
;; try to `ireduce` a type to itself, which isn't a valid use of `ireduce`.
|
84
|
-
(rule (simplify (sshr ty (ishl ty x (iconst _ shift)) (iconst _ shift)))
|
85
|
-
(if-let (u64_from_imm64 (u64_nonzero shift_u64)) shift)
|
86
|
-
(if-let ty_small (shift_amt_to_type (u64_sub (ty_bits ty) shift_u64)))
|
87
|
-
(sextend ty (ireduce ty_small x)))
|
88
|
-
(rule (simplify (ushr ty (ishl ty x (iconst _ shift)) (iconst _ shift)))
|
89
|
-
(if-let (u64_from_imm64 (u64_nonzero shift_u64)) shift)
|
90
|
-
(if-let ty_small (shift_amt_to_type (u64_sub (ty_bits ty) shift_u64)))
|
91
|
-
(uextend ty (ireduce ty_small x)))
|
92
|
-
|
93
|
-
(decl pure partial shift_amt_to_type (u64) Type)
|
94
|
-
(rule (shift_amt_to_type 8) $I8)
|
95
|
-
(rule (shift_amt_to_type 16) $I16)
|
96
|
-
(rule (shift_amt_to_type 32) $I32)
|
97
|
-
|
98
|
-
;; ineg(ushr(x, k)) == sshr(x, k) when k == ty_bits - 1.
|
99
|
-
(rule (simplify (ineg ty (ushr ty x sconst @ (iconst_u ty shift_amt))))
|
100
|
-
(if-let $true (u64_eq shift_amt (ty_shift_mask ty)))
|
101
|
-
(sshr ty x sconst))
|
102
|
-
|
103
|
-
;; Shifts and rotates allow a different type for the shift amount, so we
|
104
|
-
;; can remove any extend/reduce operations on the shift amount.
|
105
|
-
;;
|
106
|
-
;; (op x (ireduce y)) == (op x y)
|
107
|
-
;; (op x (uextend y)) == (op x y)
|
108
|
-
;; (op x (sextend y)) == (op x y)
|
109
|
-
;;
|
110
|
-
;; where `op` is one of ishl, ushr, sshr, rotl, rotr
|
111
|
-
;;
|
112
|
-
;; TODO: This rule is restricted to <=64 bits for ireduce since the x86
|
113
|
-
;; backend doesn't support SIMD shifts with 128-bit shift amounts.
|
114
|
-
|
115
|
-
(rule (simplify (ishl ty x (ireduce _ y @ (value_type (fits_in_64 _))))) (ishl ty x y))
|
116
|
-
(rule (simplify (ishl ty x (uextend _ y))) (ishl ty x y))
|
117
|
-
(rule (simplify (ishl ty x (sextend _ y))) (ishl ty x y))
|
118
|
-
(rule (simplify (ushr ty x (ireduce _ y @ (value_type (fits_in_64 _))))) (ushr ty x y))
|
119
|
-
(rule (simplify (ushr ty x (uextend _ y))) (ushr ty x y))
|
120
|
-
(rule (simplify (ushr ty x (sextend _ y))) (ushr ty x y))
|
121
|
-
(rule (simplify (sshr ty x (ireduce _ y @ (value_type (fits_in_64 _))))) (sshr ty x y))
|
122
|
-
(rule (simplify (sshr ty x (uextend _ y))) (sshr ty x y))
|
123
|
-
(rule (simplify (sshr ty x (sextend _ y))) (sshr ty x y))
|
124
|
-
(rule (simplify (rotr ty x (ireduce _ y @ (value_type (fits_in_64 _))))) (rotr ty x y))
|
125
|
-
(rule (simplify (rotr ty x (uextend _ y))) (rotr ty x y))
|
126
|
-
(rule (simplify (rotr ty x (sextend _ y))) (rotr ty x y))
|
127
|
-
(rule (simplify (rotl ty x (ireduce _ y @ (value_type (fits_in_64 _))))) (rotl ty x y))
|
128
|
-
(rule (simplify (rotl ty x (uextend _ y))) (rotl ty x y))
|
129
|
-
(rule (simplify (rotl ty x (sextend _ y))) (rotl ty x y))
|
130
|
-
|
131
|
-
;; Remove iconcat from the shift amount input. This is correct even if the
|
132
|
-
;; the iconcat is i8 type, since it can represent the largest shift amount
|
133
|
-
;; for i128 types.
|
134
|
-
;;
|
135
|
-
;; (op x (iconcat y1 y2)) == (op x y1)
|
136
|
-
;;
|
137
|
-
;; where `op` is one of ishl, ushr, sshr, rotl, rotr
|
138
|
-
|
139
|
-
(rule (simplify (ishl ty x (iconcat _ y _))) (ishl ty x y))
|
140
|
-
(rule (simplify (ushr ty x (iconcat _ y _))) (ushr ty x y))
|
141
|
-
(rule (simplify (sshr ty x (iconcat _ y _))) (sshr ty x y))
|
142
|
-
(rule (simplify (rotr ty x (iconcat _ y _))) (rotr ty x y))
|
143
|
-
(rule (simplify (rotl ty x (iconcat _ y _))) (rotl ty x y))
|
144
|
-
|
145
|
-
;; Try to combine the shift amount from multiple consecutive shifts
|
146
|
-
;; This only works if the shift amount remains smaller than the bit
|
147
|
-
;; width of the type.
|
148
|
-
;;
|
149
|
-
;; (ishl (ishl x k1) k2) == (ishl x (add k1 k2)) if shift_mask(k1) + shift_mask(k2) < ty_bits
|
150
|
-
;; (ushr (ushr x k1) k2) == (ushr x (add k1 k2)) if shift_mask(k1) + shift_mask(k2) < ty_bits
|
151
|
-
;; (sshr (sshr x k1) k2) == (sshr x (add k1 k2)) if shift_mask(k1) + shift_mask(k2) < ty_bits
|
152
|
-
(rule (simplify (ishl ty
|
153
|
-
(ishl ty x (iconst_u kty k1))
|
154
|
-
(iconst_u _ k2)))
|
155
|
-
(if-let shift_amt (u64_add
|
156
|
-
(u64_and k1 (ty_shift_mask ty))
|
157
|
-
(u64_and k2 (ty_shift_mask ty))))
|
158
|
-
(if-let $true (u64_lt shift_amt (ty_bits_u64 (lane_type ty))))
|
159
|
-
(ishl ty x (iconst_u kty shift_amt)))
|
160
|
-
|
161
|
-
(rule (simplify (ushr ty
|
162
|
-
(ushr ty x (iconst_u kty k1))
|
163
|
-
(iconst_u _ k2)))
|
164
|
-
(if-let shift_amt (u64_add
|
165
|
-
(u64_and k1 (ty_shift_mask ty))
|
166
|
-
(u64_and k2 (ty_shift_mask ty))))
|
167
|
-
(if-let $true (u64_lt shift_amt (ty_bits_u64 (lane_type ty))))
|
168
|
-
(ushr ty x (iconst_u kty shift_amt)))
|
169
|
-
|
170
|
-
(rule (simplify (sshr ty
|
171
|
-
(sshr ty x (iconst_u kty k1))
|
172
|
-
(iconst_u _ k2)))
|
173
|
-
(if-let shift_amt (u64_add
|
174
|
-
(u64_and k1 (ty_shift_mask ty))
|
175
|
-
(u64_and k2 (ty_shift_mask ty))))
|
176
|
-
(if-let $true (u64_lt shift_amt (ty_bits_u64 (lane_type ty))))
|
177
|
-
(sshr ty x (iconst_u kty shift_amt)))
|
178
|
-
|
179
|
-
;; Simliarly, if the shift amount overflows the type, then we can turn
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180
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;; it into a 0
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181
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;;
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182
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;; (ishl (ishl x k1) k2) == 0 if shift_mask(k1) + shift_mask(k2) >= ty_bits
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183
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;; (ushr (ushr x k1) k2) == 0 if shift_mask(k1) + shift_mask(k2) >= ty_bits
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184
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(rule (simplify (ishl ty
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185
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(ishl ty x (iconst_u _ k1))
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186
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(iconst_u _ k2)))
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187
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(if-let shift_amt (u64_add
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188
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(u64_and k1 (ty_shift_mask ty))
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189
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(u64_and k2 (ty_shift_mask ty))))
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190
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(if-let $true (u64_le (ty_bits_u64 ty) shift_amt))
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191
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(subsume (iconst_u ty 0)))
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192
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-
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193
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-
(rule (simplify (ushr ty
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194
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(ushr ty x (iconst_u _ k1))
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195
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(iconst_u _ k2)))
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196
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-
(if-let shift_amt (u64_add
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197
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(u64_and k1 (ty_shift_mask ty))
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198
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(u64_and k2 (ty_shift_mask ty))))
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199
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(if-let $true (u64_le (ty_bits_u64 ty) shift_amt))
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200
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(subsume (iconst_u ty 0)))
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201
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-
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202
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;; (rotl (rotr x y) y) == x
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203
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;; (rotr (rotl x y) y) == x
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204
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(rule (simplify (rotl ty (rotr ty x y) y)) (subsume x))
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205
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(rule (simplify (rotr ty (rotl ty x y) y)) (subsume x))
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206
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-
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207
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;; Emits an iadd for two values. If they have different types
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208
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;; then the smaller type is zero extended to the larger type.
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209
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(decl iadd_uextend (Value Value) Value)
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210
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(rule 1 (iadd_uextend x @ (value_type ty) y @ (value_type ty))
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211
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(iadd ty x y))
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212
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(rule 2 (iadd_uextend x @ (value_type x_ty) y @ (value_type y_ty))
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213
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(if-let $true (u64_lt (ty_bits_u64 x_ty) (ty_bits_u64 y_ty)))
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214
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-
(iadd y_ty (uextend y_ty x) y))
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215
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(rule 3 (iadd_uextend x @ (value_type x_ty) y @ (value_type y_ty))
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216
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(if-let $true (u64_lt (ty_bits_u64 y_ty) (ty_bits_u64 x_ty)))
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217
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-
(iadd x_ty x (uextend x_ty y)))
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218
|
-
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219
|
-
;; Emits an isub for two values. If they have different types
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220
|
-
;; then the smaller type is zero extended to the larger type.
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221
|
-
(decl isub_uextend (Value Value) Value)
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222
|
-
(rule 1 (isub_uextend x @ (value_type ty) y @ (value_type ty))
|
223
|
-
(isub ty x y))
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224
|
-
(rule 2 (isub_uextend x @ (value_type x_ty) y @ (value_type y_ty))
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225
|
-
(if-let $true (u64_lt (ty_bits_u64 x_ty) (ty_bits_u64 y_ty)))
|
226
|
-
(isub y_ty (uextend y_ty x) y))
|
227
|
-
(rule 3 (isub_uextend x @ (value_type x_ty) y @ (value_type y_ty))
|
228
|
-
(if-let $true (u64_lt (ty_bits_u64 y_ty) (ty_bits_u64 x_ty)))
|
229
|
-
(isub x_ty x (uextend x_ty y)))
|
230
|
-
|
231
|
-
;; Try to group constants together so that other cprop rules can optimize them.
|
232
|
-
;;
|
233
|
-
;; (rotr (rotr x y) z) == (rotr x (iadd y z))
|
234
|
-
;; (rotl (rotl x y) z) == (rotl x (iadd y z))
|
235
|
-
;; (rotr (rotl x y) z) == (rotr x (isub y z))
|
236
|
-
;; (rotl (rotr x y) z) == (rotl x (isub y z))
|
237
|
-
;;
|
238
|
-
;; if x or z are constants
|
239
|
-
(rule (simplify (rotl ty (rotl ty x y @ (iconst _ _)) z)) (rotl ty x (iadd_uextend y z)))
|
240
|
-
(rule (simplify (rotl ty (rotl ty x y) z @ (iconst _ _))) (rotl ty x (iadd_uextend y z)))
|
241
|
-
(rule (simplify (rotr ty (rotr ty x y @ (iconst _ _)) z)) (rotr ty x (iadd_uextend y z)))
|
242
|
-
(rule (simplify (rotr ty (rotr ty x y) z @ (iconst _ _))) (rotr ty x (iadd_uextend y z)))
|
243
|
-
|
244
|
-
(rule (simplify (rotr ty (rotl ty x y @ (iconst _ _)) z)) (rotl ty x (isub_uextend y z)))
|
245
|
-
(rule (simplify (rotr ty (rotl ty x y) z @ (iconst _ _))) (rotl ty x (isub_uextend y z)))
|
246
|
-
(rule (simplify (rotl ty (rotr ty x y @ (iconst _ _)) z)) (rotr ty x (isub_uextend y z)))
|
247
|
-
(rule (simplify (rotl ty (rotr ty x y) z @ (iconst _ _))) (rotr ty x (isub_uextend y z)))
|
248
|
-
|
249
|
-
;; Similarly to the rules above, if y and z have the same type, we should emit
|
250
|
-
;; an iadd or isub instead. In some backends this is cheaper than a rotate.
|
251
|
-
;;
|
252
|
-
;; If they have different types we end up in a situation where we have to insert
|
253
|
-
;; and additional extend and that transformation is not universally beneficial.
|
254
|
-
;;
|
255
|
-
;; (rotr (rotr x y) z) == (rotr x (iadd y z))
|
256
|
-
;; (rotl (rotl x y) z) == (rotl x (iadd y z))
|
257
|
-
;; (rotr (rotl x y) z) == (rotl x (isub y z))
|
258
|
-
;; (rotl (rotr x y) z) == (rotr x (isub y z))
|
259
|
-
(rule (simplify (rotr ty (rotr ty x y @ (value_type kty)) z @ (value_type kty)))
|
260
|
-
(rotr ty x (iadd_uextend y z)))
|
261
|
-
(rule (simplify (rotl ty (rotl ty x y @ (value_type kty)) z @ (value_type kty)))
|
262
|
-
(rotl ty x (iadd_uextend y z)))
|
263
|
-
|
264
|
-
(rule (simplify (rotr ty (rotl ty x y @ (value_type kty)) z @ (value_type kty)))
|
265
|
-
(rotl ty x (isub_uextend y z)))
|
266
|
-
(rule (simplify (rotl ty (rotr ty x y @ (value_type kty)) z @ (value_type kty)))
|
267
|
-
(rotr ty x (isub_uextend y z)))
|
268
|
-
|
269
|
-
;; Convert shifts into rotates. We always normalize into a rotate left.
|
270
|
-
;;
|
271
|
-
;; (bor (ishl x k1) (ushr x k2)) == (rotl x k1) if k2 == ty_bits - k1
|
272
|
-
;; (bor (ushr x k2) (ishl x k1)) == (rotl x k1) if k2 == ty_bits - k1
|
273
|
-
;;
|
274
|
-
;; TODO: This rule is restricted to scalars since no backend currently
|
275
|
-
;; supports SIMD rotates.
|
276
|
-
(rule (simplify (bor (ty_int ty)
|
277
|
-
(ishl ty x k @ (iconst _ (u64_from_imm64 k1)))
|
278
|
-
(ushr ty x (iconst _ (u64_from_imm64 k2)))))
|
279
|
-
(if-let $true (u64_eq k2 (u64_sub (ty_bits_u64 (lane_type ty)) k1)))
|
280
|
-
(rotl ty x k))
|
281
|
-
(rule (simplify (bor (ty_int ty)
|
282
|
-
(ushr ty x (iconst _ (u64_from_imm64 k2)))
|
283
|
-
(ishl ty x k @ (iconst _ (u64_from_imm64 k1)))))
|
284
|
-
(if-let $true (u64_eq k2 (u64_sub (ty_bits_u64 (lane_type ty)) k1)))
|
285
|
-
(rotl ty x k))
|
286
|
-
|
287
|
-
;; Normalize the shift amount. Some rules can't fire unless the shift amount
|
288
|
-
;; is normalized. This also helps us materialize fewer and smaller constants.
|
289
|
-
;;
|
290
|
-
;; (op x k) == (op x (and k (ty_shift_mask ty)))
|
291
|
-
;;
|
292
|
-
;; where `op` is one of ishl, ushr, sshr, rotl, rotr
|
293
|
-
(rule (simplify (ishl ty x (iconst_u kty k)))
|
294
|
-
(if-let $false (u64_eq k (u64_and k (ty_shift_mask ty))))
|
295
|
-
(ishl ty x (iconst_u kty (u64_and k (ty_shift_mask ty)))))
|
296
|
-
(rule (simplify (ushr ty x (iconst_u kty k)))
|
297
|
-
(if-let $false (u64_eq k (u64_and k (ty_shift_mask ty))))
|
298
|
-
(ushr ty x (iconst_u kty (u64_and k (ty_shift_mask ty)))))
|
299
|
-
(rule (simplify (sshr ty x (iconst_u kty k)))
|
300
|
-
(if-let $false (u64_eq k (u64_and k (ty_shift_mask ty))))
|
301
|
-
(sshr ty x (iconst_u kty (u64_and k (ty_shift_mask ty)))))
|
302
|
-
(rule (simplify (rotr ty x (iconst_u kty k)))
|
303
|
-
(if-let $false (u64_eq k (u64_and k (ty_shift_mask ty))))
|
304
|
-
(rotr ty x (iconst_u kty (u64_and k (ty_shift_mask ty)))))
|
305
|
-
(rule (simplify (rotl ty x (iconst_u kty k)))
|
306
|
-
(if-let $false (u64_eq k (u64_and k (ty_shift_mask ty))))
|
307
|
-
(rotl ty x (iconst_u kty (u64_and k (ty_shift_mask ty)))))
|