wasmtime 10.0.0 → 11.0.0
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- checksums.yaml +4 -4
- data/Cargo.lock +146 -140
- data/ext/Cargo.toml +6 -6
- data/ext/cargo-vendor/addr2line-0.21.0/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/aho-corasick-1.0.4/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/aho-corasick-1.0.4/src/ahocorasick.rs +2789 -0
- data/ext/cargo-vendor/aho-corasick-1.0.4/src/dfa.rs +816 -0
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- data/ext/cargo-vendor/aho-corasick-1.0.4/src/nfa/contiguous.rs +1141 -0
- data/ext/cargo-vendor/aho-corasick-1.0.4/src/nfa/noncontiguous.rs +1710 -0
- data/ext/cargo-vendor/anyhow-1.0.75/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/anyhow-1.0.75/build.rs +131 -0
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- data/ext/cargo-vendor/anyhow-1.0.75/src/context.rs +193 -0
- data/ext/cargo-vendor/anyhow-1.0.75/src/error.rs +996 -0
- data/ext/cargo-vendor/anyhow-1.0.75/src/kind.rs +119 -0
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- data/ext/cargo-vendor/async-trait-0.1.73/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/async-trait-0.1.73/src/expand.rs +484 -0
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- data/ext/cargo-vendor/async-trait-0.1.73/tests/ui/consider-restricting.stderr +35 -0
- data/ext/cargo-vendor/async-trait-0.1.73/tests/ui/send-not-implemented.stderr +49 -0
- data/ext/cargo-vendor/backtrace-0.3.69/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/backtrace-0.3.69/build.rs +49 -0
- data/ext/cargo-vendor/backtrace-0.3.69/src/print/fuchsia.rs +441 -0
- data/ext/cargo-vendor/backtrace-0.3.69/src/print.rs +320 -0
- data/ext/cargo-vendor/backtrace-0.3.69/src/symbolize/gimli/parse_running_mmaps_unix.rs +295 -0
- data/ext/cargo-vendor/backtrace-0.3.69/src/symbolize/mod.rs +485 -0
- data/ext/cargo-vendor/backtrace-0.3.69/src/windows.rs +693 -0
- data/ext/cargo-vendor/cc-1.0.83/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/cc-1.0.83/Cargo.toml +43 -0
- data/ext/cargo-vendor/cc-1.0.83/src/lib.rs +4024 -0
- data/ext/cargo-vendor/cc-1.0.83/tests/test.rs +477 -0
- data/ext/cargo-vendor/cranelift-bforest-0.98.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bforest-0.98.1/Cargo.toml +31 -0
- data/ext/cargo-vendor/cranelift-codegen-0.98.1/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/isa/x64/inst/emit.rs +4298 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/isa/x64/inst.isle +5079 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/isle_prelude.rs +894 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/machinst/abi.rs +2605 -0
- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/machinst/buffer.rs +2255 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/machinst/reg.rs +556 -0
- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/machinst/vcode.rs +1580 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/prelude.isle +594 -0
- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/prelude_lower.isle +1024 -0
- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/settings.rs +601 -0
- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/timing.rs +271 -0
- data/ext/cargo-vendor/cranelift-codegen-0.98.1/src/unionfind.rs +74 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.98.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.98.1/Cargo.toml +23 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.98.1/src/cdsl/settings.rs +429 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.98.1/src/isa/x86.rs +409 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.98.1/src/shared/instructions.rs +3847 -0
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- data/ext/cargo-vendor/cranelift-codegen-shared-0.98.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.98.1/Cargo.toml +22 -0
- data/ext/cargo-vendor/cranelift-control-0.98.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.98.1/Cargo.toml +30 -0
- data/ext/cargo-vendor/cranelift-entity-0.98.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.98.1/Cargo.toml +35 -0
- data/ext/cargo-vendor/cranelift-frontend-0.98.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-frontend-0.98.1/Cargo.toml +53 -0
- data/ext/cargo-vendor/cranelift-isle-0.98.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-isle-0.98.1/Cargo.toml +37 -0
- data/ext/cargo-vendor/cranelift-native-0.98.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-native-0.98.1/Cargo.toml +38 -0
- data/ext/cargo-vendor/cranelift-native-0.98.1/src/lib.rs +204 -0
- data/ext/cargo-vendor/cranelift-wasm-0.98.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-wasm-0.98.1/Cargo.toml +85 -0
- data/ext/cargo-vendor/cranelift-wasm-0.98.1/src/code_translator.rs +3544 -0
- data/ext/cargo-vendor/cranelift-wasm-0.98.1/src/environ/spec.rs +852 -0
- data/ext/cargo-vendor/gimli-0.28.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/gimli-0.28.0/CHANGELOG.md +987 -0
- data/ext/cargo-vendor/gimli-0.28.0/Cargo.toml +109 -0
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- data/ext/cargo-vendor/gimli-0.28.0/src/arch.rs +768 -0
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- data/ext/cargo-vendor/gimli-0.28.0/src/constants.rs +1435 -0
- data/ext/cargo-vendor/gimli-0.28.0/src/endianity.rs +256 -0
- data/ext/cargo-vendor/gimli-0.28.0/src/leb128.rs +612 -0
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//! Implementation of a standard S390x ABI.
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//!
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//! This machine uses the "vanilla" ABI implementation from abi.rs,
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//! however a few details are different from the description there:
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//!
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//! bytes to any function it calls. The called function is free to use
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//! this space for any purpose; usually to save callee-saved GPRs.
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//! (Note that while this area is allocated by the caller, it is counted
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//! as part of the callee's stack frame; in particular, the callee's CFA
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//! is the top of the register save area, not the incoming SP value.)
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//!
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//! above the register save area. On s390x, this space is allocated
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//! only once directly in the prologue, using a size large enough to
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//! hold overflow arguments for every call in the function.
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//!
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//! - On s390x we do not use a frame pointer register; instead, every
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//! from the stack pointer. Note that due to the above (and because
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//! there are no variable-sized stack allocations in cranelift), the
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//!
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//!
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//!
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//! ```plain
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//! (high address)
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//!
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//! +---------------------------+
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//! | ... |
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//! CFA -----> | stack args |
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//! +---------------------------+
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//! | ... |
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//! | 160 bytes reg save area |
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//! | (used to save GPRs) |
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//! SP at function entry -----> | (incl. caller's backchain)|
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//! +---------------------------+
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//! | ... |
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//! | clobbered callee-saves |
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//! | (used to save FPRs) |
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//! +---------------------------+
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//! | ... |
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//! | spill slots |
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//! | ... |
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//! | stack slots |
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//! | (accessed via nominal SP) |
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//! +---------------------------+
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//! | ... |
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//! | args for call |
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//!
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//! (low address)
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//! ```
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use crate::ir;
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use crate::ir::condcodes::IntCC;
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use crate::isa;
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use crate::isa::s390x::{inst::*, settings as s390x_settings};
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use crate::machinst::*;
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/// This is the limit for the size of argument and return-value areas on the
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/// with 32-bit arithmetic: for now, 128 MB.
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static STACK_ARG_RET_SIZE_LIMIT: u32 = 128 * 1024 * 1024;
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|
-
/// The size of the register save area
|
190
|
-
pub static REG_SAVE_AREA_SIZE: u32 = 160;
|
191
|
-
|
192
|
-
impl Into<MemArg> for StackAMode {
|
193
|
-
fn into(self) -> MemArg {
|
194
|
-
match self {
|
195
|
-
StackAMode::FPOffset(off, _ty) => MemArg::InitialSPOffset { off },
|
196
|
-
StackAMode::NominalSPOffset(off, _ty) => MemArg::NominalSPOffset { off },
|
197
|
-
StackAMode::SPOffset(off, _ty) => {
|
198
|
-
MemArg::reg_plus_off(stack_reg(), off, MemFlags::trusted())
|
199
|
-
}
|
200
|
-
}
|
201
|
-
}
|
202
|
-
}
|
203
|
-
|
204
|
-
/// S390x-specific ABI behavior. This struct just serves as an implementation
|
205
|
-
/// point for the trait; it is never actually instantiated.
|
206
|
-
pub struct S390xMachineDeps;
|
207
|
-
|
208
|
-
impl IsaFlags for s390x_settings::Flags {}
|
209
|
-
|
210
|
-
impl ABIMachineSpec for S390xMachineDeps {
|
211
|
-
type I = Inst;
|
212
|
-
|
213
|
-
type F = s390x_settings::Flags;
|
214
|
-
|
215
|
-
fn word_bits() -> u32 {
|
216
|
-
64
|
217
|
-
}
|
218
|
-
|
219
|
-
/// Return required stack alignment in bytes.
|
220
|
-
fn stack_align(_call_conv: isa::CallConv) -> u32 {
|
221
|
-
8
|
222
|
-
}
|
223
|
-
|
224
|
-
fn compute_arg_locs<'a, I>(
|
225
|
-
call_conv: isa::CallConv,
|
226
|
-
_flags: &settings::Flags,
|
227
|
-
params: I,
|
228
|
-
args_or_rets: ArgsOrRets,
|
229
|
-
add_ret_area_ptr: bool,
|
230
|
-
mut args: ArgsAccumulator<'_>,
|
231
|
-
) -> CodegenResult<(u32, Option<usize>)>
|
232
|
-
where
|
233
|
-
I: IntoIterator<Item = &'a ir::AbiParam>,
|
234
|
-
{
|
235
|
-
let mut next_gpr = 0;
|
236
|
-
let mut next_fpr = 0;
|
237
|
-
let mut next_vr = 0;
|
238
|
-
let mut next_stack: u32 = 0;
|
239
|
-
|
240
|
-
if args_or_rets == ArgsOrRets::Args {
|
241
|
-
next_stack = REG_SAVE_AREA_SIZE;
|
242
|
-
}
|
243
|
-
|
244
|
-
// In the SystemV ABI, the return area pointer is the first argument,
|
245
|
-
// so we need to leave room for it if required. (In the Wasmtime ABI,
|
246
|
-
// the return area pointer is the last argument and is handled below.)
|
247
|
-
if add_ret_area_ptr && !call_conv.extends_wasmtime() {
|
248
|
-
next_gpr += 1;
|
249
|
-
}
|
250
|
-
|
251
|
-
for (i, mut param) in params.into_iter().copied().enumerate() {
|
252
|
-
let intreg = in_int_reg(param.value_type);
|
253
|
-
let fltreg = in_flt_reg(param.value_type);
|
254
|
-
let vecreg = in_vec_reg(param.value_type);
|
255
|
-
debug_assert!(intreg as i32 + fltreg as i32 + vecreg as i32 <= 1);
|
256
|
-
|
257
|
-
let (next_reg, candidate, implicit_ref) = if intreg {
|
258
|
-
let candidate = match args_or_rets {
|
259
|
-
ArgsOrRets::Args => get_intreg_for_arg(next_gpr),
|
260
|
-
ArgsOrRets::Rets => get_intreg_for_ret(next_gpr),
|
261
|
-
};
|
262
|
-
(&mut next_gpr, candidate, None)
|
263
|
-
} else if fltreg {
|
264
|
-
let candidate = match args_or_rets {
|
265
|
-
ArgsOrRets::Args => get_fltreg_for_arg(next_fpr),
|
266
|
-
ArgsOrRets::Rets => get_fltreg_for_ret(next_fpr),
|
267
|
-
};
|
268
|
-
(&mut next_fpr, candidate, None)
|
269
|
-
} else if vecreg {
|
270
|
-
let candidate = match args_or_rets {
|
271
|
-
ArgsOrRets::Args => get_vecreg_for_arg(next_vr),
|
272
|
-
ArgsOrRets::Rets => get_vecreg_for_ret(next_vr),
|
273
|
-
};
|
274
|
-
(&mut next_vr, candidate, None)
|
275
|
-
} else if call_conv.extends_wasmtime() {
|
276
|
-
panic!("i128 args/return values not supported in the Wasmtime ABI");
|
277
|
-
} else {
|
278
|
-
// We must pass this by implicit reference.
|
279
|
-
if args_or_rets == ArgsOrRets::Rets {
|
280
|
-
// For return values, just force them to memory.
|
281
|
-
(&mut next_gpr, None, None)
|
282
|
-
} else {
|
283
|
-
// For arguments, implicitly convert to pointer type.
|
284
|
-
let implicit_ref = Some(param.value_type);
|
285
|
-
param = ir::AbiParam::new(types::I64);
|
286
|
-
let candidate = get_intreg_for_arg(next_gpr);
|
287
|
-
(&mut next_gpr, candidate, implicit_ref)
|
288
|
-
}
|
289
|
-
};
|
290
|
-
|
291
|
-
// In the Wasmtime ABI only the first return value can be in a register.
|
292
|
-
let candidate =
|
293
|
-
if call_conv.extends_wasmtime() && args_or_rets == ArgsOrRets::Rets && i > 0 {
|
294
|
-
None
|
295
|
-
} else {
|
296
|
-
candidate
|
297
|
-
};
|
298
|
-
|
299
|
-
let slot = if let Some(reg) = candidate {
|
300
|
-
*next_reg += 1;
|
301
|
-
ABIArgSlot::Reg {
|
302
|
-
reg: reg.to_real_reg().unwrap(),
|
303
|
-
ty: param.value_type,
|
304
|
-
extension: param.extension,
|
305
|
-
}
|
306
|
-
} else {
|
307
|
-
// Compute size. Every argument or return value takes a slot of
|
308
|
-
// at least 8 bytes, except for return values in the Wasmtime ABI.
|
309
|
-
let size = (ty_bits(param.value_type) / 8) as u32;
|
310
|
-
let slot_size = if call_conv.extends_wasmtime() && args_or_rets == ArgsOrRets::Rets
|
311
|
-
{
|
312
|
-
size
|
313
|
-
} else {
|
314
|
-
std::cmp::max(size, 8)
|
315
|
-
};
|
316
|
-
|
317
|
-
// Align the stack slot.
|
318
|
-
debug_assert!(slot_size.is_power_of_two());
|
319
|
-
let slot_align = std::cmp::min(slot_size, 8);
|
320
|
-
next_stack = align_to(next_stack, slot_align);
|
321
|
-
|
322
|
-
// If the type is actually of smaller size (and the argument
|
323
|
-
// was not extended), it is passed right-aligned.
|
324
|
-
let offset = if size < slot_size && param.extension == ir::ArgumentExtension::None {
|
325
|
-
slot_size - size
|
326
|
-
} else {
|
327
|
-
0
|
328
|
-
};
|
329
|
-
let offset = (next_stack + offset) as i64;
|
330
|
-
next_stack += slot_size;
|
331
|
-
ABIArgSlot::Stack {
|
332
|
-
offset,
|
333
|
-
ty: param.value_type,
|
334
|
-
extension: param.extension,
|
335
|
-
}
|
336
|
-
};
|
337
|
-
|
338
|
-
if let ir::ArgumentPurpose::StructArgument(size) = param.purpose {
|
339
|
-
assert!(size % 8 == 0, "StructArgument size is not properly aligned");
|
340
|
-
args.push(ABIArg::StructArg {
|
341
|
-
pointer: Some(slot),
|
342
|
-
offset: 0,
|
343
|
-
size: size as u64,
|
344
|
-
purpose: param.purpose,
|
345
|
-
});
|
346
|
-
} else if let Some(ty) = implicit_ref {
|
347
|
-
assert!(
|
348
|
-
(ty_bits(ty) / 8) % 8 == 0,
|
349
|
-
"implicit argument size is not properly aligned"
|
350
|
-
);
|
351
|
-
args.push(ABIArg::ImplicitPtrArg {
|
352
|
-
pointer: slot,
|
353
|
-
offset: 0,
|
354
|
-
ty,
|
355
|
-
purpose: param.purpose,
|
356
|
-
});
|
357
|
-
} else {
|
358
|
-
args.push(ABIArg::Slots {
|
359
|
-
slots: smallvec![slot],
|
360
|
-
purpose: param.purpose,
|
361
|
-
});
|
362
|
-
}
|
363
|
-
}
|
364
|
-
|
365
|
-
next_stack = align_to(next_stack, 8);
|
366
|
-
|
367
|
-
let extra_arg = if add_ret_area_ptr {
|
368
|
-
debug_assert!(args_or_rets == ArgsOrRets::Args);
|
369
|
-
// The return pointer is passed either as first argument
|
370
|
-
// (in the SystemV ABI) or as last argument (Wasmtime ABI).
|
371
|
-
let next_gpr = if call_conv.extends_wasmtime() {
|
372
|
-
next_gpr
|
373
|
-
} else {
|
374
|
-
0
|
375
|
-
};
|
376
|
-
if let Some(reg) = get_intreg_for_arg(next_gpr) {
|
377
|
-
args.push(ABIArg::reg(
|
378
|
-
reg.to_real_reg().unwrap(),
|
379
|
-
types::I64,
|
380
|
-
ir::ArgumentExtension::None,
|
381
|
-
ir::ArgumentPurpose::Normal,
|
382
|
-
));
|
383
|
-
} else {
|
384
|
-
args.push(ABIArg::stack(
|
385
|
-
next_stack as i64,
|
386
|
-
types::I64,
|
387
|
-
ir::ArgumentExtension::None,
|
388
|
-
ir::ArgumentPurpose::Normal,
|
389
|
-
));
|
390
|
-
next_stack += 8;
|
391
|
-
}
|
392
|
-
Some(args.args().len() - 1)
|
393
|
-
} else {
|
394
|
-
None
|
395
|
-
};
|
396
|
-
|
397
|
-
// After all arguments are in their well-defined location,
|
398
|
-
// allocate buffers for all StructArg or ImplicitPtrArg arguments.
|
399
|
-
for arg in args.args_mut() {
|
400
|
-
match arg {
|
401
|
-
ABIArg::StructArg { offset, size, .. } => {
|
402
|
-
*offset = next_stack as i64;
|
403
|
-
next_stack += *size as u32;
|
404
|
-
}
|
405
|
-
ABIArg::ImplicitPtrArg { offset, ty, .. } => {
|
406
|
-
*offset = next_stack as i64;
|
407
|
-
next_stack += (ty_bits(*ty) / 8) as u32;
|
408
|
-
}
|
409
|
-
_ => {}
|
410
|
-
}
|
411
|
-
}
|
412
|
-
|
413
|
-
// To avoid overflow issues, limit the arg/return size to something
|
414
|
-
// reasonable -- here, 128 MB.
|
415
|
-
if next_stack > STACK_ARG_RET_SIZE_LIMIT {
|
416
|
-
return Err(CodegenError::ImplLimitExceeded);
|
417
|
-
}
|
418
|
-
|
419
|
-
Ok((next_stack, extra_arg))
|
420
|
-
}
|
421
|
-
|
422
|
-
fn fp_to_arg_offset(_call_conv: isa::CallConv, _flags: &settings::Flags) -> i64 {
|
423
|
-
0
|
424
|
-
}
|
425
|
-
|
426
|
-
fn gen_load_stack(mem: StackAMode, into_reg: Writable<Reg>, ty: Type) -> Inst {
|
427
|
-
Inst::gen_load(into_reg, mem.into(), ty)
|
428
|
-
}
|
429
|
-
|
430
|
-
fn gen_store_stack(mem: StackAMode, from_reg: Reg, ty: Type) -> Inst {
|
431
|
-
Inst::gen_store(mem.into(), from_reg, ty)
|
432
|
-
}
|
433
|
-
|
434
|
-
fn gen_move(to_reg: Writable<Reg>, from_reg: Reg, ty: Type) -> Inst {
|
435
|
-
Inst::gen_move(to_reg, from_reg, ty)
|
436
|
-
}
|
437
|
-
|
438
|
-
fn gen_extend(
|
439
|
-
to_reg: Writable<Reg>,
|
440
|
-
from_reg: Reg,
|
441
|
-
signed: bool,
|
442
|
-
from_bits: u8,
|
443
|
-
to_bits: u8,
|
444
|
-
) -> Inst {
|
445
|
-
assert!(from_bits < to_bits);
|
446
|
-
Inst::Extend {
|
447
|
-
rd: to_reg,
|
448
|
-
rn: from_reg,
|
449
|
-
signed,
|
450
|
-
from_bits,
|
451
|
-
to_bits,
|
452
|
-
}
|
453
|
-
}
|
454
|
-
|
455
|
-
fn gen_args(_isa_flags: &s390x_settings::Flags, args: Vec<ArgPair>) -> Inst {
|
456
|
-
Inst::Args { args }
|
457
|
-
}
|
458
|
-
|
459
|
-
fn gen_ret(
|
460
|
-
_setup_frame: bool,
|
461
|
-
_isa_flags: &s390x_settings::Flags,
|
462
|
-
rets: Vec<RetPair>,
|
463
|
-
stack_bytes_to_pop: u32,
|
464
|
-
) -> Inst {
|
465
|
-
Inst::Ret {
|
466
|
-
link: gpr(14),
|
467
|
-
rets,
|
468
|
-
stack_bytes_to_pop,
|
469
|
-
}
|
470
|
-
}
|
471
|
-
|
472
|
-
fn gen_add_imm(into_reg: Writable<Reg>, from_reg: Reg, imm: u32) -> SmallInstVec<Inst> {
|
473
|
-
let mut insts = SmallVec::new();
|
474
|
-
if let Some(imm) = UImm12::maybe_from_u64(imm as u64) {
|
475
|
-
insts.push(Inst::LoadAddr {
|
476
|
-
rd: into_reg,
|
477
|
-
mem: MemArg::BXD12 {
|
478
|
-
base: from_reg,
|
479
|
-
index: zero_reg(),
|
480
|
-
disp: imm,
|
481
|
-
flags: MemFlags::trusted(),
|
482
|
-
},
|
483
|
-
});
|
484
|
-
} else if let Some(imm) = SImm20::maybe_from_i64(imm as i64) {
|
485
|
-
insts.push(Inst::LoadAddr {
|
486
|
-
rd: into_reg,
|
487
|
-
mem: MemArg::BXD20 {
|
488
|
-
base: from_reg,
|
489
|
-
index: zero_reg(),
|
490
|
-
disp: imm,
|
491
|
-
flags: MemFlags::trusted(),
|
492
|
-
},
|
493
|
-
});
|
494
|
-
} else {
|
495
|
-
if from_reg != into_reg.to_reg() {
|
496
|
-
insts.push(Inst::mov64(into_reg, from_reg));
|
497
|
-
}
|
498
|
-
insts.push(Inst::AluRUImm32 {
|
499
|
-
alu_op: ALUOp::AddLogical64,
|
500
|
-
rd: into_reg,
|
501
|
-
ri: into_reg.to_reg(),
|
502
|
-
imm,
|
503
|
-
});
|
504
|
-
}
|
505
|
-
insts
|
506
|
-
}
|
507
|
-
|
508
|
-
fn gen_stack_lower_bound_trap(limit_reg: Reg) -> SmallInstVec<Inst> {
|
509
|
-
let mut insts = SmallVec::new();
|
510
|
-
insts.push(Inst::CmpTrapRR {
|
511
|
-
op: CmpOp::CmpL64,
|
512
|
-
rn: stack_reg(),
|
513
|
-
rm: limit_reg,
|
514
|
-
cond: Cond::from_intcc(IntCC::UnsignedLessThanOrEqual),
|
515
|
-
trap_code: ir::TrapCode::StackOverflow,
|
516
|
-
});
|
517
|
-
insts
|
518
|
-
}
|
519
|
-
|
520
|
-
fn gen_get_stack_addr(mem: StackAMode, into_reg: Writable<Reg>, _ty: Type) -> Inst {
|
521
|
-
let mem = mem.into();
|
522
|
-
Inst::LoadAddr { rd: into_reg, mem }
|
523
|
-
}
|
524
|
-
|
525
|
-
fn get_stacklimit_reg() -> Reg {
|
526
|
-
spilltmp_reg()
|
527
|
-
}
|
528
|
-
|
529
|
-
fn gen_load_base_offset(into_reg: Writable<Reg>, base: Reg, offset: i32, ty: Type) -> Inst {
|
530
|
-
let mem = MemArg::reg_plus_off(base, offset.into(), MemFlags::trusted());
|
531
|
-
Inst::gen_load(into_reg, mem, ty)
|
532
|
-
}
|
533
|
-
|
534
|
-
fn gen_store_base_offset(base: Reg, offset: i32, from_reg: Reg, ty: Type) -> Inst {
|
535
|
-
let mem = MemArg::reg_plus_off(base, offset.into(), MemFlags::trusted());
|
536
|
-
Inst::gen_store(mem, from_reg, ty)
|
537
|
-
}
|
538
|
-
|
539
|
-
fn gen_sp_reg_adjust(imm: i32) -> SmallInstVec<Inst> {
|
540
|
-
if imm == 0 {
|
541
|
-
return SmallVec::new();
|
542
|
-
}
|
543
|
-
|
544
|
-
let mut insts = SmallVec::new();
|
545
|
-
if let Ok(imm) = i16::try_from(imm) {
|
546
|
-
insts.push(Inst::AluRSImm16 {
|
547
|
-
alu_op: ALUOp::Add64,
|
548
|
-
rd: writable_stack_reg(),
|
549
|
-
ri: stack_reg(),
|
550
|
-
imm,
|
551
|
-
});
|
552
|
-
} else {
|
553
|
-
insts.push(Inst::AluRSImm32 {
|
554
|
-
alu_op: ALUOp::Add64,
|
555
|
-
rd: writable_stack_reg(),
|
556
|
-
ri: stack_reg(),
|
557
|
-
imm,
|
558
|
-
});
|
559
|
-
}
|
560
|
-
insts
|
561
|
-
}
|
562
|
-
|
563
|
-
fn gen_nominal_sp_adj(offset: i32) -> Inst {
|
564
|
-
Inst::VirtualSPOffsetAdj {
|
565
|
-
offset: offset.into(),
|
566
|
-
}
|
567
|
-
}
|
568
|
-
|
569
|
-
fn gen_prologue_frame_setup(_flags: &settings::Flags) -> SmallInstVec<Inst> {
|
570
|
-
SmallVec::new()
|
571
|
-
}
|
572
|
-
|
573
|
-
fn gen_epilogue_frame_restore(_flags: &settings::Flags) -> SmallInstVec<Inst> {
|
574
|
-
SmallVec::new()
|
575
|
-
}
|
576
|
-
|
577
|
-
fn gen_probestack(_insts: &mut SmallInstVec<Self::I>, _: u32) {
|
578
|
-
// TODO: implement if we ever require stack probes on an s390x host
|
579
|
-
// (unlikely unless Lucet is ported)
|
580
|
-
unimplemented!("Stack probing is unimplemented on S390x");
|
581
|
-
}
|
582
|
-
|
583
|
-
fn gen_inline_probestack(
|
584
|
-
_insts: &mut SmallInstVec<Self::I>,
|
585
|
-
_frame_size: u32,
|
586
|
-
_guard_size: u32,
|
587
|
-
) {
|
588
|
-
unimplemented!("Inline stack probing is unimplemented on S390x");
|
589
|
-
}
|
590
|
-
|
591
|
-
// Returns stack bytes used as well as instructions. Does not adjust
|
592
|
-
// nominal SP offset; abi generic code will do that.
|
593
|
-
fn gen_clobber_save(
|
594
|
-
_call_conv: isa::CallConv,
|
595
|
-
_setup_frame: bool,
|
596
|
-
flags: &settings::Flags,
|
597
|
-
clobbered_callee_saves: &[Writable<RealReg>],
|
598
|
-
fixed_frame_storage_size: u32,
|
599
|
-
mut outgoing_args_size: u32,
|
600
|
-
) -> (u64, SmallVec<[Inst; 16]>) {
|
601
|
-
let mut insts = SmallVec::new();
|
602
|
-
|
603
|
-
// Collect clobbered registers.
|
604
|
-
let (first_clobbered_gpr, clobbered_fpr) =
|
605
|
-
get_clobbered_gpr_fpr(flags, clobbered_callee_saves, &mut outgoing_args_size);
|
606
|
-
let clobber_size = clobbered_fpr.len() * 8;
|
607
|
-
if flags.unwind_info() {
|
608
|
-
insts.push(Inst::Unwind {
|
609
|
-
inst: UnwindInst::DefineNewFrame {
|
610
|
-
offset_upward_to_caller_sp: REG_SAVE_AREA_SIZE,
|
611
|
-
offset_downward_to_clobbers: clobber_size as u32,
|
612
|
-
},
|
613
|
-
});
|
614
|
-
}
|
615
|
-
|
616
|
-
// Use STMG to save clobbered GPRs into save area.
|
617
|
-
if first_clobbered_gpr < 16 {
|
618
|
-
let offset = 8 * first_clobbered_gpr as i64;
|
619
|
-
insts.push(Inst::StoreMultiple64 {
|
620
|
-
rt: gpr(first_clobbered_gpr),
|
621
|
-
rt2: gpr(15),
|
622
|
-
mem: MemArg::reg_plus_off(stack_reg(), offset, MemFlags::trusted()),
|
623
|
-
});
|
624
|
-
}
|
625
|
-
if flags.unwind_info() {
|
626
|
-
for i in first_clobbered_gpr..16 {
|
627
|
-
insts.push(Inst::Unwind {
|
628
|
-
inst: UnwindInst::SaveReg {
|
629
|
-
clobber_offset: clobber_size as u32 + (i * 8) as u32,
|
630
|
-
reg: gpr(i).to_real_reg().unwrap(),
|
631
|
-
},
|
632
|
-
});
|
633
|
-
}
|
634
|
-
}
|
635
|
-
|
636
|
-
// Save current stack pointer value if we need to write the backchain.
|
637
|
-
if flags.preserve_frame_pointers() {
|
638
|
-
insts.push(Inst::mov64(writable_gpr(1), stack_reg()));
|
639
|
-
}
|
640
|
-
|
641
|
-
// Decrement stack pointer.
|
642
|
-
let stack_size =
|
643
|
-
outgoing_args_size as i32 + clobber_size as i32 + fixed_frame_storage_size as i32;
|
644
|
-
insts.extend(Self::gen_sp_reg_adjust(-stack_size));
|
645
|
-
if flags.unwind_info() {
|
646
|
-
insts.push(Inst::Unwind {
|
647
|
-
inst: UnwindInst::StackAlloc {
|
648
|
-
size: stack_size as u32,
|
649
|
-
},
|
650
|
-
});
|
651
|
-
}
|
652
|
-
|
653
|
-
let sp_adj = outgoing_args_size as i32;
|
654
|
-
if sp_adj > 0 {
|
655
|
-
insts.push(Self::gen_nominal_sp_adj(sp_adj));
|
656
|
-
}
|
657
|
-
|
658
|
-
// Write the stack backchain if requested, using the value saved above.
|
659
|
-
if flags.preserve_frame_pointers() {
|
660
|
-
insts.push(Inst::Store64 {
|
661
|
-
rd: gpr(1),
|
662
|
-
mem: MemArg::reg_plus_off(stack_reg(), 0, MemFlags::trusted()),
|
663
|
-
});
|
664
|
-
}
|
665
|
-
|
666
|
-
// Save FPRs.
|
667
|
-
for (i, reg) in clobbered_fpr.iter().enumerate() {
|
668
|
-
insts.push(Inst::VecStoreLane {
|
669
|
-
size: 64,
|
670
|
-
rd: reg.to_reg().into(),
|
671
|
-
mem: MemArg::reg_plus_off(
|
672
|
-
stack_reg(),
|
673
|
-
(i * 8) as i64 + outgoing_args_size as i64 + fixed_frame_storage_size as i64,
|
674
|
-
MemFlags::trusted(),
|
675
|
-
),
|
676
|
-
lane_imm: 0,
|
677
|
-
});
|
678
|
-
if flags.unwind_info() {
|
679
|
-
insts.push(Inst::Unwind {
|
680
|
-
inst: UnwindInst::SaveReg {
|
681
|
-
clobber_offset: (i * 8) as u32,
|
682
|
-
reg: reg.to_reg(),
|
683
|
-
},
|
684
|
-
});
|
685
|
-
}
|
686
|
-
}
|
687
|
-
|
688
|
-
(clobber_size as u64, insts)
|
689
|
-
}
|
690
|
-
|
691
|
-
fn gen_clobber_restore(
|
692
|
-
call_conv: isa::CallConv,
|
693
|
-
sig: &Signature,
|
694
|
-
flags: &settings::Flags,
|
695
|
-
clobbers: &[Writable<RealReg>],
|
696
|
-
fixed_frame_storage_size: u32,
|
697
|
-
mut outgoing_args_size: u32,
|
698
|
-
) -> SmallVec<[Inst; 16]> {
|
699
|
-
let mut insts = SmallVec::new();
|
700
|
-
let clobbered_callee_saves =
|
701
|
-
Self::get_clobbered_callee_saves(call_conv, flags, sig, clobbers);
|
702
|
-
|
703
|
-
// Collect clobbered registers.
|
704
|
-
let (first_clobbered_gpr, clobbered_fpr) =
|
705
|
-
get_clobbered_gpr_fpr(flags, &clobbered_callee_saves, &mut outgoing_args_size);
|
706
|
-
let clobber_size = clobbered_fpr.len() * 8;
|
707
|
-
|
708
|
-
// Restore FPRs.
|
709
|
-
for (i, reg) in clobbered_fpr.iter().enumerate() {
|
710
|
-
insts.push(Inst::VecLoadLaneUndef {
|
711
|
-
size: 64,
|
712
|
-
rd: Writable::from_reg(reg.to_reg().into()),
|
713
|
-
mem: MemArg::reg_plus_off(
|
714
|
-
stack_reg(),
|
715
|
-
(i * 8) as i64 + outgoing_args_size as i64 + fixed_frame_storage_size as i64,
|
716
|
-
MemFlags::trusted(),
|
717
|
-
),
|
718
|
-
lane_imm: 0,
|
719
|
-
});
|
720
|
-
}
|
721
|
-
|
722
|
-
// Increment stack pointer unless it will be restored implicitly.
|
723
|
-
let stack_size =
|
724
|
-
outgoing_args_size as i32 + clobber_size as i32 + fixed_frame_storage_size as i32;
|
725
|
-
let implicit_sp_restore = first_clobbered_gpr < 16
|
726
|
-
&& SImm20::maybe_from_i64(8 * first_clobbered_gpr as i64 + stack_size as i64).is_some();
|
727
|
-
if !implicit_sp_restore {
|
728
|
-
insts.extend(Self::gen_sp_reg_adjust(stack_size));
|
729
|
-
}
|
730
|
-
|
731
|
-
// Use LMG to restore clobbered GPRs from save area.
|
732
|
-
if first_clobbered_gpr < 16 {
|
733
|
-
let mut offset = 8 * first_clobbered_gpr as i64;
|
734
|
-
if implicit_sp_restore {
|
735
|
-
offset += stack_size as i64;
|
736
|
-
}
|
737
|
-
insts.push(Inst::LoadMultiple64 {
|
738
|
-
rt: writable_gpr(first_clobbered_gpr),
|
739
|
-
rt2: writable_gpr(15),
|
740
|
-
mem: MemArg::reg_plus_off(stack_reg(), offset, MemFlags::trusted()),
|
741
|
-
});
|
742
|
-
}
|
743
|
-
|
744
|
-
insts
|
745
|
-
}
|
746
|
-
|
747
|
-
fn gen_call(
|
748
|
-
_dest: &CallDest,
|
749
|
-
_uses: CallArgList,
|
750
|
-
_defs: CallRetList,
|
751
|
-
_clobbers: PRegSet,
|
752
|
-
_opcode: ir::Opcode,
|
753
|
-
_tmp: Writable<Reg>,
|
754
|
-
_callee_conv: isa::CallConv,
|
755
|
-
_caller_conv: isa::CallConv,
|
756
|
-
) -> SmallVec<[Inst; 2]> {
|
757
|
-
unreachable!();
|
758
|
-
}
|
759
|
-
|
760
|
-
fn gen_memcpy<F: FnMut(Type) -> Writable<Reg>>(
|
761
|
-
_call_conv: isa::CallConv,
|
762
|
-
_dst: Reg,
|
763
|
-
_src: Reg,
|
764
|
-
_size: usize,
|
765
|
-
_alloc: F,
|
766
|
-
) -> SmallVec<[Self::I; 8]> {
|
767
|
-
unimplemented!("StructArgs not implemented for S390X yet");
|
768
|
-
}
|
769
|
-
|
770
|
-
fn get_number_of_spillslots_for_value(
|
771
|
-
rc: RegClass,
|
772
|
-
_vector_scale: u32,
|
773
|
-
_isa_flags: &Self::F,
|
774
|
-
) -> u32 {
|
775
|
-
// We allocate in terms of 8-byte slots.
|
776
|
-
match rc {
|
777
|
-
RegClass::Int => 1,
|
778
|
-
RegClass::Float => 2,
|
779
|
-
RegClass::Vector => unreachable!(),
|
780
|
-
}
|
781
|
-
}
|
782
|
-
|
783
|
-
/// Get the current virtual-SP offset from an instruction-emission state.
|
784
|
-
fn get_virtual_sp_offset_from_state(s: &EmitState) -> i64 {
|
785
|
-
s.virtual_sp_offset
|
786
|
-
}
|
787
|
-
|
788
|
-
/// Get the nominal-SP-to-FP offset from an instruction-emission state.
|
789
|
-
fn get_nominal_sp_to_fp(s: &EmitState) -> i64 {
|
790
|
-
s.initial_sp_offset
|
791
|
-
}
|
792
|
-
|
793
|
-
fn get_regs_clobbered_by_call(_call_conv_of_callee: isa::CallConv) -> PRegSet {
|
794
|
-
CLOBBERS
|
795
|
-
}
|
796
|
-
|
797
|
-
fn get_ext_mode(
|
798
|
-
_call_conv: isa::CallConv,
|
799
|
-
specified: ir::ArgumentExtension,
|
800
|
-
) -> ir::ArgumentExtension {
|
801
|
-
specified
|
802
|
-
}
|
803
|
-
|
804
|
-
fn get_clobbered_callee_saves(
|
805
|
-
call_conv: isa::CallConv,
|
806
|
-
flags: &settings::Flags,
|
807
|
-
_sig: &Signature,
|
808
|
-
regs: &[Writable<RealReg>],
|
809
|
-
) -> Vec<Writable<RealReg>> {
|
810
|
-
assert!(
|
811
|
-
!flags.enable_pinned_reg(),
|
812
|
-
"Pinned register not supported on s390x"
|
813
|
-
);
|
814
|
-
|
815
|
-
let mut regs: Vec<Writable<RealReg>> = regs
|
816
|
-
.iter()
|
817
|
-
.cloned()
|
818
|
-
.filter(|r| is_reg_saved_in_prologue(call_conv, r.to_reg()))
|
819
|
-
.collect();
|
820
|
-
|
821
|
-
// Sort registers for deterministic code output. We can do an unstable
|
822
|
-
// sort because the registers will be unique (there are no dups).
|
823
|
-
regs.sort_unstable_by_key(|r| PReg::from(r.to_reg()).index());
|
824
|
-
regs
|
825
|
-
}
|
826
|
-
|
827
|
-
fn is_frame_setup_needed(
|
828
|
-
_is_leaf: bool,
|
829
|
-
_stack_args_size: u32,
|
830
|
-
_num_clobbered_callee_saves: usize,
|
831
|
-
_frame_storage_size: u32,
|
832
|
-
) -> bool {
|
833
|
-
// The call frame set-up is handled by gen_clobber_save().
|
834
|
-
false
|
835
|
-
}
|
836
|
-
}
|
837
|
-
|
838
|
-
fn is_reg_saved_in_prologue(_call_conv: isa::CallConv, r: RealReg) -> bool {
|
839
|
-
match r.class() {
|
840
|
-
RegClass::Int => {
|
841
|
-
// r6 - r15 inclusive are callee-saves.
|
842
|
-
r.hw_enc() >= 6 && r.hw_enc() <= 15
|
843
|
-
}
|
844
|
-
RegClass::Float => {
|
845
|
-
// f8 - f15 inclusive are callee-saves.
|
846
|
-
r.hw_enc() >= 8 && r.hw_enc() <= 15
|
847
|
-
}
|
848
|
-
RegClass::Vector => unreachable!(),
|
849
|
-
}
|
850
|
-
}
|
851
|
-
|
852
|
-
fn get_clobbered_gpr_fpr(
|
853
|
-
flags: &settings::Flags,
|
854
|
-
clobbered_callee_saves: &[Writable<RealReg>],
|
855
|
-
outgoing_args_size: &mut u32,
|
856
|
-
) -> (u8, SmallVec<[Writable<RealReg>; 8]>) {
|
857
|
-
// Collect clobbered registers. Note we save/restore GPR always as
|
858
|
-
// a block of registers using LOAD MULTIPLE / STORE MULTIPLE, starting
|
859
|
-
// with the clobbered GPR with the lowest number up to %r15. We
|
860
|
-
// return the number of that first GPR (or 16 if none is to be saved).
|
861
|
-
let mut clobbered_fpr = SmallVec::new();
|
862
|
-
let mut first_clobbered_gpr = 16;
|
863
|
-
|
864
|
-
// If the front end asks to preserve frame pointers (which we do not
|
865
|
-
// really have in the s390x ABI), we use the stack backchain instead.
|
866
|
-
// For this to work in all cases, we must allocate a stack frame with
|
867
|
-
// at least the outgoing register save area even in leaf functions.
|
868
|
-
// Update out caller's outgoing_args_size to reflect this.
|
869
|
-
if flags.preserve_frame_pointers() {
|
870
|
-
if *outgoing_args_size < REG_SAVE_AREA_SIZE {
|
871
|
-
*outgoing_args_size = REG_SAVE_AREA_SIZE;
|
872
|
-
}
|
873
|
-
}
|
874
|
-
|
875
|
-
// We need to save/restore the link register in non-leaf functions.
|
876
|
-
// This is not included in the clobber list because we have excluded
|
877
|
-
// call instructions via the is_included_in_clobbers callback.
|
878
|
-
// We also want to enforce saving the link register in leaf functions
|
879
|
-
// for stack unwinding, if we're asked to preserve frame pointers.
|
880
|
-
if *outgoing_args_size > 0 {
|
881
|
-
first_clobbered_gpr = 14;
|
882
|
-
}
|
883
|
-
|
884
|
-
for ® in clobbered_callee_saves.iter() {
|
885
|
-
match reg.to_reg().class() {
|
886
|
-
RegClass::Int => {
|
887
|
-
let enc = reg.to_reg().hw_enc();
|
888
|
-
if enc < first_clobbered_gpr {
|
889
|
-
first_clobbered_gpr = enc;
|
890
|
-
}
|
891
|
-
}
|
892
|
-
RegClass::Float => clobbered_fpr.push(reg),
|
893
|
-
RegClass::Vector => unreachable!(),
|
894
|
-
}
|
895
|
-
}
|
896
|
-
|
897
|
-
(first_clobbered_gpr, clobbered_fpr)
|
898
|
-
}
|
899
|
-
|
900
|
-
const fn clobbers() -> PRegSet {
|
901
|
-
PRegSet::empty()
|
902
|
-
.with(gpr_preg(0))
|
903
|
-
.with(gpr_preg(1))
|
904
|
-
.with(gpr_preg(2))
|
905
|
-
.with(gpr_preg(3))
|
906
|
-
.with(gpr_preg(4))
|
907
|
-
.with(gpr_preg(5))
|
908
|
-
// v0 - v7 inclusive and v16 - v31 inclusive are
|
909
|
-
// caller-saves. The upper 64 bits of v8 - v15 inclusive are
|
910
|
-
// also caller-saves. However, because we cannot currently
|
911
|
-
// represent partial registers to regalloc2, we indicate here
|
912
|
-
// that every vector register is caller-save. Because this
|
913
|
-
// function is used at *callsites*, approximating in this
|
914
|
-
// direction (save more than necessary) is conservative and
|
915
|
-
// thus safe.
|
916
|
-
//
|
917
|
-
// Note that we exclude clobbers from a call instruction when
|
918
|
-
// a call instruction's callee has the same ABI as the caller
|
919
|
-
// (the current function body); this is safe (anything
|
920
|
-
// clobbered by callee can be clobbered by caller as well) and
|
921
|
-
// avoids unnecessary saves of v8-v15 in the prologue even
|
922
|
-
// though we include them as defs here.
|
923
|
-
.with(vr_preg(0))
|
924
|
-
.with(vr_preg(1))
|
925
|
-
.with(vr_preg(2))
|
926
|
-
.with(vr_preg(3))
|
927
|
-
.with(vr_preg(4))
|
928
|
-
.with(vr_preg(5))
|
929
|
-
.with(vr_preg(6))
|
930
|
-
.with(vr_preg(7))
|
931
|
-
.with(vr_preg(8))
|
932
|
-
.with(vr_preg(9))
|
933
|
-
.with(vr_preg(10))
|
934
|
-
.with(vr_preg(11))
|
935
|
-
.with(vr_preg(12))
|
936
|
-
.with(vr_preg(13))
|
937
|
-
.with(vr_preg(14))
|
938
|
-
.with(vr_preg(15))
|
939
|
-
.with(vr_preg(16))
|
940
|
-
.with(vr_preg(17))
|
941
|
-
.with(vr_preg(18))
|
942
|
-
.with(vr_preg(19))
|
943
|
-
.with(vr_preg(20))
|
944
|
-
.with(vr_preg(21))
|
945
|
-
.with(vr_preg(22))
|
946
|
-
.with(vr_preg(23))
|
947
|
-
.with(vr_preg(24))
|
948
|
-
.with(vr_preg(25))
|
949
|
-
.with(vr_preg(26))
|
950
|
-
.with(vr_preg(27))
|
951
|
-
.with(vr_preg(28))
|
952
|
-
.with(vr_preg(29))
|
953
|
-
.with(vr_preg(30))
|
954
|
-
.with(vr_preg(31))
|
955
|
-
}
|
956
|
-
|
957
|
-
const CLOBBERS: PRegSet = clobbers();
|