ruby-vpi 15.0.2 → 16.0.0
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- data/LICENSE +23 -340
- data/Rakefile +169 -192
- data/bin/generate_test.rb +26 -25
- data/bin/generate_test_tpl/runner.rake +4 -10
- data/bin/header_to_ruby.rb +3 -20
- data/doc/README +11 -0
- data/doc/Rakefile +8 -21
- data/doc/common.css +44 -10
- data/doc/common.tpl +5 -10
- data/doc/history.doc +8 -7
- data/doc/history.html +228 -560
- data/doc/history.rb +7 -11
- data/doc/{history.yml → history.yaml} +325 -128
- data/doc/images/{feed-icon.png → feed-icon-28x28.png} +0 -0
- data/doc/images/ruby/LICENSE +15 -0
- data/doc/images/ruby/logo-reflection.png +0 -0
- data/doc/images/ruby/logo-reflection.xcf +0 -0
- data/doc/images/ruby/logo.png +0 -0
- data/doc/images/{LICENSE → tango/LICENSE} +0 -0
- data/doc/images/{caution.png → tango/caution.png} +0 -0
- data/doc/images/{caution.svg → tango/caution.svg} +0 -0
- data/doc/images/{home.png → tango/home.png} +0 -0
- data/doc/images/{home.svg → tango/home.svg} +0 -0
- data/doc/images/{important.png → tango/important.png} +0 -0
- data/doc/images/{important.svg → tango/important.svg} +0 -0
- data/doc/images/{next.png → tango/next.png} +0 -0
- data/doc/images/{next.svg → tango/next.svg} +0 -0
- data/doc/images/{note.png → tango/note.png} +0 -0
- data/doc/images/{note.svg → tango/note.svg} +0 -0
- data/doc/images/{prev.png → tango/prev.png} +0 -0
- data/doc/images/{prev.svg → tango/prev.svg} +0 -0
- data/doc/images/{tip.png → tango/tip.png} +0 -0
- data/doc/images/{tip.svg → tango/tip.svg} +0 -0
- data/doc/images/{up.png → tango/up.png} +0 -0
- data/doc/images/{up.svg → tango/up.svg} +0 -0
- data/doc/images/{warning.png → tango/warning.png} +0 -0
- data/doc/images/{warning.svg → tango/warning.svg} +0 -0
- data/doc/intro.inc +105 -36
- data/doc/lib/doc_format.rb +151 -29
- data/doc/lib/doc_proxy.rb +28 -69
- data/doc/lib/erb_content.rb +10 -22
- data/doc/lib/erb_proxy.rb +13 -24
- data/doc/manual.doc +16 -60
- data/doc/manual.html +257 -340
- data/doc/memo.doc +2 -0
- data/doc/memo.html +11 -11
- data/doc/readme.doc +36 -2
- data/doc/readme.html +214 -51
- data/doc/rss.erb +3 -3
- data/doc/rss.xml +217 -269
- data/ext/Rakefile +7 -22
- data/ext/common.h +10 -21
- data/ext/extconf.rb +5 -0
- data/ext/main.c +2 -18
- data/ext/main.h +1 -16
- data/ext/relay.c +3 -17
- data/ext/relay.h +3 -17
- data/ext/verilog.h +6 -18
- data/ext/vlog.c +3 -21
- data/ext/vlog.h +3 -17
- data/lib/ruby-vpi/erb.rb +7 -20
- data/lib/ruby-vpi/float.rb +6 -20
- data/lib/ruby-vpi/integer.rb +27 -47
- data/lib/ruby-vpi/rake.rb +4 -19
- data/lib/ruby-vpi/rcov.rb +6 -21
- data/lib/ruby-vpi/rdoc.rb +3 -21
- data/lib/ruby-vpi/runner.rb +28 -29
- data/lib/ruby-vpi/runner_proxy.rb +5 -21
- data/lib/ruby-vpi/verilog_parser.rb +5 -20
- data/lib/ruby-vpi/vpi.rb +420 -376
- data/lib/ruby-vpi.rb +26 -32
- data/ref/c/annotated.html +1 -1
- data/ref/c/common_8h.html +1 -1
- data/ref/c/files.html +1 -1
- data/ref/c/functions.html +1 -1
- data/ref/c/functions_vars.html +1 -1
- data/ref/c/globals.html +1 -1
- data/ref/c/globals_0x63.html +1 -1
- data/ref/c/globals_0x65.html +1 -1
- data/ref/c/globals_0x66.html +1 -1
- data/ref/c/globals_0x6d.html +1 -1
- data/ref/c/globals_0x70.html +1 -1
- data/ref/c/globals_0x72.html +1 -1
- data/ref/c/globals_0x73.html +1 -1
- data/ref/c/globals_0x74.html +1 -1
- data/ref/c/globals_0x76.html +1 -1
- data/ref/c/globals_0x78.html +1 -1
- data/ref/c/globals_defs.html +1 -1
- data/ref/c/globals_defs_0x65.html +1 -1
- data/ref/c/globals_defs_0x70.html +1 -1
- data/ref/c/globals_defs_0x76.html +1 -1
- data/ref/c/globals_defs_0x78.html +1 -1
- data/ref/c/globals_enum.html +1 -1
- data/ref/c/globals_eval.html +1 -1
- data/ref/c/globals_func.html +1 -1
- data/ref/c/globals_type.html +1 -1
- data/ref/c/globals_vars.html +1 -1
- data/ref/c/index.html +1 -1
- data/ref/c/main_8c.html +1 -1
- data/ref/c/main_8h.html +1 -1
- data/ref/c/relay_8c.html +1 -1
- data/ref/c/relay_8h.html +1 -1
- data/ref/c/structt__cb__data.html +1 -1
- data/ref/c/structt__vpi__delay.html +1 -1
- data/ref/c/structt__vpi__error__info.html +1 -1
- data/ref/c/structt__vpi__strengthval.html +1 -1
- data/ref/c/structt__vpi__systf__data.html +1 -1
- data/ref/c/structt__vpi__time.html +1 -1
- data/ref/c/structt__vpi__value.html +1 -1
- data/ref/c/structt__vpi__vecval.html +1 -1
- data/ref/c/structt__vpi__vlog__info.html +1 -1
- data/ref/c/verilog_8h.html +1 -1
- data/ref/c/vlog_8c.html +1 -1
- data/ref/c/vlog_8h.html +1 -1
- data/ref/c/vpi__user_8h.html +1 -1
- data/ref/ruby/classes/ERB.html +5 -5
- data/ref/ruby/classes/ERB.src/{M000026.html → M000024.html} +15 -15
- data/ref/ruby/classes/FileUtils.html +10 -10
- data/ref/ruby/classes/FileUtils.src/{M000027.html → M000025.html} +4 -4
- data/ref/ruby/classes/FileUtils.src/{M000028.html → M000026.html} +4 -4
- data/ref/ruby/classes/Float.html +5 -5
- data/ref/ruby/classes/Float.src/{M000022.html → M000020.html} +5 -5
- data/ref/ruby/classes/Integer.html +20 -56
- data/ref/ruby/classes/Integer.src/M000008.html +11 -11
- data/ref/ruby/classes/Integer.src/M000009.html +4 -4
- data/ref/ruby/classes/Integer.src/M000010.html +4 -4
- data/ref/ruby/classes/Integer.src/M000011.html +4 -4
- data/ref/ruby/classes/Integer.src/M000012.html +4 -4
- data/ref/ruby/classes/Integer.src/M000013.html +4 -4
- data/ref/ruby/classes/Integer.src/M000016.html +12 -9
- data/ref/ruby/classes/Integer.src/M000017.html +18 -9
- data/ref/ruby/classes/Integer.src/M000018.html +12 -12
- data/ref/ruby/classes/Integer.src/M000019.html +17 -18
- data/ref/ruby/classes/RDoc.src/M000053.html +25 -25
- data/ref/ruby/classes/RubyVpi/Config.html +3 -3
- data/ref/ruby/classes/RubyVpi.html +11 -5
- data/ref/ruby/classes/RubyVpi.src/{M000029.html → M000027.html} +103 -101
- data/ref/ruby/classes/String.html +21 -15
- data/ref/ruby/classes/String.src/M000021.html +36 -0
- data/ref/ruby/classes/String.src/{M000024.html → M000022.html} +24 -24
- data/ref/ruby/classes/String.src/M000023.html +5 -23
- data/ref/ruby/classes/VerilogParser/Module/Parameter.src/M000007.html +5 -5
- data/ref/ruby/classes/VerilogParser/Module/Port.src/M000003.html +7 -7
- data/ref/ruby/classes/VerilogParser/Module/Port.src/M000004.html +4 -4
- data/ref/ruby/classes/VerilogParser/Module/Port.src/M000005.html +4 -4
- data/ref/ruby/classes/VerilogParser/Module/Port.src/M000006.html +4 -4
- data/ref/ruby/classes/VerilogParser/Module.src/M000002.html +20 -20
- data/ref/ruby/classes/VerilogParser.html +6 -0
- data/ref/ruby/classes/VerilogParser.src/M000001.html +20 -20
- data/ref/ruby/classes/Vpi/Handle.html +89 -88
- data/ref/ruby/classes/Vpi/Handle.src/M000036.html +18 -0
- data/ref/ruby/classes/Vpi/Handle.src/M000037.html +5 -5
- data/ref/ruby/classes/Vpi/Handle.src/M000038.html +5 -5
- data/ref/ruby/classes/Vpi/Handle.src/M000039.html +5 -5
- data/ref/ruby/classes/Vpi/Handle.src/M000040.html +8 -5
- data/ref/ruby/classes/Vpi/Handle.src/M000041.html +8 -8
- data/ref/ruby/classes/Vpi/Handle.src/M000042.html +7 -6
- data/ref/ruby/classes/Vpi/Handle.src/M000043.html +31 -9
- data/ref/ruby/classes/Vpi/Handle.src/M000044.html +74 -31
- data/ref/ruby/classes/Vpi/Handle.src/M000045.html +17 -74
- data/ref/ruby/classes/Vpi/Handle.src/M000046.html +11 -17
- data/ref/ruby/classes/Vpi/Handle.src/M000048.html +31 -0
- data/ref/ruby/classes/Vpi/Handle.src/M000049.html +53 -52
- data/ref/ruby/classes/Vpi/S_vpi_time.src/M000050.html +4 -4
- data/ref/ruby/classes/Vpi/S_vpi_time.src/M000051.html +5 -5
- data/ref/ruby/classes/Vpi/S_vpi_value.html +15 -15
- data/ref/ruby/classes/Vpi/S_vpi_value.src/{M000036.html → M000033.html} +5 -5
- data/ref/ruby/classes/Vpi/S_vpi_value.src/M000034.html +5 -5
- data/ref/ruby/classes/Vpi/S_vpi_value.src/M000035.html +5 -5
- data/ref/ruby/classes/Vpi.html +48 -19
- data/ref/ruby/classes/Vpi.src/M000028.html +28 -0
- data/ref/ruby/classes/Vpi.src/M000029.html +18 -0
- data/ref/ruby/classes/Vpi.src/M000030.html +25 -15
- data/ref/ruby/classes/Vpi.src/M000031.html +9 -5
- data/ref/ruby/classes/Vpi.src/M000032.html +9 -25
- data/ref/ruby/created.rid +1 -1
- data/ref/ruby/files/bin/generate_test_rb.html +2 -1
- data/ref/ruby/files/bin/header_to_ruby_rb.html +1 -1
- data/ref/ruby/files/lib/ruby-vpi/erb_rb.html +7 -1
- data/ref/ruby/files/lib/ruby-vpi/float_rb.html +7 -1
- data/ref/ruby/files/lib/ruby-vpi/integer_rb.html +7 -1
- data/ref/ruby/files/lib/ruby-vpi/rake_rb.html +7 -1
- data/ref/ruby/files/lib/ruby-vpi/rcov_rb.html +7 -1
- data/ref/ruby/files/lib/ruby-vpi/rdoc_rb.html +1 -1
- data/ref/ruby/files/lib/ruby-vpi/runner_proxy_rb.html +1 -1
- data/ref/ruby/files/lib/ruby-vpi/runner_rb.html +1 -1
- data/ref/ruby/files/lib/ruby-vpi/verilog_parser_rb.html +1 -1
- data/ref/ruby/files/lib/ruby-vpi/vpi_rb.html +1 -1
- data/ref/ruby/files/lib/ruby-vpi_rb.html +7 -1
- data/ref/ruby/fr_method_index.html +34 -34
- data/samp/counter/counter_rspec_runner.rake +4 -0
- data/samp/counter/counter_xunit_runner.rake +4 -0
- data/samp/pipelined_alu/Hw5UnitModel.rb +3 -19
- data/samp/pipelined_alu/README +38 -13
- data/samp/pipelined_alu/TestHw5UnitModel.rb +9 -20
- data/samp/pipelined_alu/hw5_unit.v +1 -16
- data/samp/pipelined_alu/hw5_unit_test_runner.rake +4 -0
- data/samp/pipelined_alu/hw5_unit_test_spec.rb +3 -20
- data/samp/pipelined_alu/int_gen.rb +6 -20
- metadata +47 -43
- data/doc/LICENSE +0 -397
- data/doc/images/feed-icon.LICENSE +0 -2
- data/doc/images/feed-icon.svg +0 -18
- data/ref/ruby/classes/Integer.src/M000020.html +0 -25
- data/ref/ruby/classes/Integer.src/M000021.html +0 -30
- data/ref/ruby/classes/String.src/M000025.html +0 -18
- data/ref/ruby/classes/Vpi/Handle.src/M000047.html +0 -24
- data/ref/ruby/classes/Vpi.src/M000033.html +0 -22
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Version: 16.0.0
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This release adds support for the "Cadence NC-Sim / NC-Verilog":http://www.cadence.com/products/functional_ver/nc-verilog/ simulator, improves the project website and documentation, simplifies interaction with VPI, and comes with a more permissive license.
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* The @Integer.ensure_min@ and @Integer.ensure_max@ methods have been removed from the <tt>ruby-vpi/integer.rb</tt> library because Ruby already has idioms for these operations: <pre>
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</pre>
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* Ruby-VPI is now developed under a "more permissive license":readme.html#intro.license that better reflects my ethical beliefs than "the previous license":http://www.gnu.org/copyleft/gpl.html.
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h2. New features
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* The "Cadence NC-Sim / NC-Verilog":http://www.cadence.com/products/functional_ver/nc-verilog/ (ncsim) simulator is now supported.
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* VPI structures (whose names begin with "S_") now allow initialization of their members through their constructor, in the style of Ruby on Rails. For example, the expression @time = S_vpi_time.new :type => VpiSuppressTime@ is equivalent to: <code>
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time = S_vpi_time.new
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time.type = VpiSuppressTime
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</code>
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* Added the @Vpi::Handle.cbValueChange@ method which simplifies the registration of a value-change callback for a particular VPI handle. For instance, the user manual's "example of setting up a value-change callback":manual.html#ex..callback can now be written as follows: <code>
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Counter.count.cbValueChange do |s_cb_data|
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puts "hello from callback! time=#{s_cb_data.time.to_i} count=#{s_cb_data.obj.intVal}"
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</code>
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h2. Details
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* Revised the project website according to the "Producing OSS":http://producingoss.com guidelines.
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* Added instructions for checking out source code and generating documentation.
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Version: 15.0.2
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This release fixes problems with linking of the C extension and installation of the gem.
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* Added checks for POSIX threads & Ruby libraries before creating makefile. Otherwise the <tt>.so</tt> files were not being linked to those libraries on the MASC machine!
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* The *make* program on the MASC machine does not like an empty Makefile. It was causing gem installation to fail.
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This release fixes another problem with compilation of the C extension and improves the user documentation's appearance.
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Thanks to Derek Graham for reporting the problem.
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* Restored the monkey patch, which was removed in release 14.0.0, for the SWIG @va_list@ problem.
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This release fixes a problem with compilation of the C extension, and makes clock generation code correctly affect Ruby prototypes.
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* The @Vpi::advance_time@ method (instead of the @Vpi::simulate@ method) now invokes the design's @simulate!@ method when prototyping is enabled.
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This makes clock generation code (passed to the @RubyVpi::init_bench@ method) affect Ruby prototypes, just as it affects a real Verilog design.
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* Fixed problem with incorrect Ruby library flag in <tt>ext/extconf.rb</tt>. It happens that the @mkmf@ library determines the correct library flag all by itself!
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* Added new "prototyping section":manual.html#usage.prototyping to user manual.
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This release adds support for simulation callbacks, renders Verilog benches _fully simplified_, and revises the user manual to reflect major changes.
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* The @Vpi::relay_verilog@ method has been replaced by @Vpi::simulate@.
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Please update you tests accordingly, because invoking the @Vpi::relay_verilog@ method directly will cause your tests to freeze/hang.
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This release fixes a _major_ instability bug, simplifies generated Verilog benches, and purifies the API reference documentation.
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* The @$ruby_init@ and @$ruby_relay@ system task/functions have been removed. Generated Verilog benches no longer use them.
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** To pass your own command-line options to Ruby, set the @RUBYOPT@ environment variable before running a test.
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* You can now choose when @Vpi::relay_verilog@ is triggered: upon positive/negative edge of the clock signal, or any other criteria. This is done by passing a block to the @RubyVpi::init_bench@ method (see "the API reference documentation":../ref/ruby/classes/RubyVpi.html for details).
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This release fixes a bug in the automated test generator, unifies the user manual and the website into a single documentation system, and adds support for rSpec 0.7.2.
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This release fixes a bug in generated benches, improves the "the @Vpi::Handle@ class":../ref/ruby/classes/Vpi/Handle.html, and improves performance by roughly 20%.
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This release shortens generated Ruby benches and uses the less confusing notation for defining "singleton methods":http://wiki.rubygarden.org/Ruby/page/show/SingletonTutorial in generated designs and prototypes.
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* The way in which Ruby-VPI and generated tests interact has changed: the design is now a VPI handle object and the <tt>design.rb</tt> and <tt>proto.rb</tt> files define "singleton methods":http://wiki.rubygarden.org/Ruby/page/show/SingletonTutorial for that object.
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* Generated Verilog benches no longer divert compilation errors from Verilog design files. That is, if the Verilog simulator finds compilation errors in a Verilog design file, it will report that the Verilog design file is at fault (instead of reporting that the generated Verilog bench is at fault).
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This release improves the automated test generator and adds new content to the user manual.
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This release simplifies configuration of generated tests.
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Thanks to "students in CMPE-126":http://www.soe.ucsc.edu/classes/cmpe126/Fall06/ for their comments.
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This release adds an integer library and renames the vpi_util library.
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* The *vpi_util* library has been renamed to *vpi*. This change should not affect your code unless you explicitly imported this library via @require 'ruby-vpi/vpi_util'@. In which case, you should update your code to use @require 'ruby-vpi/vpi'@ accordingly.
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* An integer library has been added to simplify common tasks related to hardware and the binary number system. You can import this library for use via @require 'ruby-vpi/integer'@.
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This release renames some identifiers for consistency, updates the documentation, and improves integration with RubyGems.
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* We now use "Darcs":http://darcs.net for revision control, instead of Subversion. The source repository can now be accessed at "http://ruby-vpi.rubyforge.org/src/ruby-vpi":http://ruby-vpi.rubyforge.org/src/ruby-vpi.
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This release fixes a bug in generated Verilog benches, includes parsed constants in generated tests, and adds new methods to handles.
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* Module instantiation code in generated Verilog benches has been fixed. Whitespace between the module type and instance variable was missing.
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This release adds initial support for code coverage analysis via the "rcov library":http://eigenclass.org/hiki.rb?rcov.
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Acknowledgment: |
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Thanks to Mauricio Fernandez for helping me use rcov without its runner.
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* Added initial support (full capabilites of the rcov library, such as its various analysis modes, are not yet utilized) for code coverage analysis, which can be enabled by setting the @COVERAGE@ environment variable to a non-empty value before running a test.
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** For example, you can run a test with the GPL Cver simulator while enabling the generation of code coverage reports as follows: <pre>export COVERAGE=1; rake cver</pre>
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This release simplifies running of multiple tests, restores compatibility with Synopsys VCS, and better integrates with RubyGems.
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* Added <tt>lib/ruby-vpi/runner_proxy.rb</tt> library which, when embedded into a Rakefile, runs all generated tests in the working directory with any specified arguments. For example, have a look at the <tt>samp/counter/Rakefile</tt> file.
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This release distributes Ruby-VPI as a gem, improves portability of generated tests, and fixes a bug.
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* The <tt>src/</tt> directory has been renamed to <tt>ext/</tt> to follow RubyGems convention.
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h2. Details
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* Ruby-VPI is now distributed only as a "source gem":http://www.rubygems.org. You can decompress the gem without installing it onto your system by running the command <pre>gem install -i output_directory ruby-vpi-7.0.0.gem</pre>. In addition, you can still obtain the source code directly from the Subversion repository.
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* The tools in <tt>bin/</tt> become available in your system's <tt>bin/</tt> directory when the gem is installed.
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Date: 2006-08-27
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Record: |
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This release adds support for the GPL Cver simulator, provides both binary and source packages, and explicitly defines the version numbering system.
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-
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+
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h2. Caution
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+
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* Ruby-VPI now only needs to be built once.
|
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** You can run tests with different Verilog simulators without having to re-compile Ruby-VPI.
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h2. Details
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* The GPL Cver simulator is now supported.
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* Release packages are now available in both source and binary form.
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Date: 2006-08-26
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-
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+
Record: |
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This release beautifies generated tests, adds checks to find signal width bugs, and includes a new tool.
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-
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+
h2. Caution
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* @put_value()@ now returns the value it puts. Therefore, it is easier to chain together a series of assignments: @foo.intVal = bar.intVal = baz.intVal = 10@
|
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* @put_value()@ now verifies that the value it puts was written correctly. This helps to find bugs regarding invalid assumptions about the number of bits supported by a signal.
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h2. Details
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* The test generator now uses ERB templates which ensures nice indentation of generated output.
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* The test generator now decouples Ruby-VPI paths from Verilog benches via the RUBYLIB environment variable.
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Date: 2006-08-09
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Record: |
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This release simplifies generated tests and fixes a bug.
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h2. Details
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* The test generator now produces simpler Ruby benches and specifications.
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** A template used by generated specifications has been added.
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** The counter example and tutorial have also been simplified accordingly.
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Date: 2006-08-07
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Record: |
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This release adds support and documentation for rapid prototyping of Verilog designs in Ruby.
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h2. Caution
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* The directory structure has been reorganized as follows:
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** <tt>ext</tt> → <tt>src</tt>
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** <tt>tools</tt> → <tt>bin</tt>
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* All template files have been moved into the <tt>tpl</tt> directory.
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h2. Details
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797
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* Support for prototyping designs in Ruby, before they are implemented in Verilog, has been added.
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** The _same_ specification can be used to verify both prototype _and_ design! :-)
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** The tutorial in the user manual has been updated to discuss prototyping.
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Date: 2006-08-04
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Record: |
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This release fixes unreadable syntax coloring in the user manual.
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Acknowledgment: |
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* Thanks to Todd Nagengast and Matt Fischler for notifying me about unreadable text in the user manual.
|
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+
h2. Thanks
|
816
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+
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+
* Todd Nagengast and Matt Fischler notified me about unreadable text in the user manual.
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h2. Details
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* Source code comments in the user manual are now readable.
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* The <tt>README</tt> and <tt>HISTORY</tt> files have been converted to "textile":http://www.textism.com/tools/textile/ format.
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Date: 2006-07-29
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Record: |
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This release adds a tutorial to the user manual, and improves the tools and examples.
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-
Acknowledgment: |
|
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-
* Thanks to Phil Tomson for correcting the URL of the RHDL website, in the user manual.
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-
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+
h2. Thanks
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837
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+
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+
* Phil Tomson corrected the URL of the RHDL website in the user manual.
|
839
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+
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h2. Details
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842
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h3. User manual
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* A tutorial, based on the counter example, has been added to the user manual.
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Date: 2006-07-22
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Record: |
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This release enhances the VPI utility layer and adds new content to the user manual.
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|
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-
Acknowledgment: |
|
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-
* Thanks to Jan Decaluwe for correcting the description of MyHDL in the user manual.
|
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-
|
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+
h2. Thanks
|
876
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+
|
877
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+
* Jan Decaluwe corrected the description of MyHDL in the user manual.
|
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+
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h2. Caution
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* SWIG is no longer required for users because its output is included in the release package.
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* The @handle.value@ and @handle.value=@ methods have been removed.
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h2. Details
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* The VPI utility layer provides access to VPI properties of handles in a "simpler, more powerful way":manual.html#background.org.vpi.
|
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** All VPI properties, except delay values, are now accessible from a handle.
|
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Date: 2006-05-25
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Record: |
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This release adds a comprehensive user manual, upgrades from make to "Rake":http://rake.rubyforge.org, and improves the test generation tool.
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Acknowledgment: |
|
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-
* Thanks to Jose Renau for solving the problem of strange delays that occurred whenever a design was reset.
|
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908
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-
|
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+
h2. Thanks
|
910
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+
|
911
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+
* Jose Renau solved the problem of strange delays that occurred whenever a design was reset.
|
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|
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|
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h2. Caution
|
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* Rake has replaced the role of *make*. All makefiles have been converted accordingly.
|
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* The test generation tool now generates multiple files (runner, bench, design, spec) and makes backups of existing files. See its help information for details.
|
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h2. Details
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* A comprehensive user manual, written in DocBook-XML, has been added.
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* Support for RSpec 0.5.4 has been added.
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Date: 2006-05-13
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Record: |
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This release adds a tool which generates test benches, and adds support for "Behavior Driven Development":http://behaviour-driven.org via the "RSpec":http://rspec.rubyforge.org library.
|
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-
Acknowledgment: |
|
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-
* Thanks to Scott L Holmes for helping me "use the RSpec library without its runner":http://article.gmane.org/gmane.comp.lang.ruby.general/150087 program.
|
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h2. Thanks
|
943
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+
|
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+
* Scott L Holmes helped me "use the RSpec library without its runner":http://article.gmane.org/gmane.comp.lang.ruby.general/150087 program.
|
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+
h2. Details
|
948
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774
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* A tool, which generates most of a Ruby-VPI test bench from a Verilog 2001 module declaration, has been added.
|
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* Ability to use RSpec in a test bench has been added.
|
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Date: 2006-04-28
|
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Record: |
|
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This release adds simple ways of reading and writing values to VPI handles, adds documentation for the VPI utility layer, and fixes the pipelined ALU example.
|
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967
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|
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-
|
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h2. Caution
|
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|
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* The *msim* Makefile target for Mentor Modelsim has been renamed back to *vsim*.
|
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h2. Details
|
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797
976
|
* Simple, consistent ways of reading and writing values to handles have been added to the VPI utility layer. These ways are described in the @SWIG::TYPE_p_unsigned_int@ class' documentation.
|
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* The makefiles now use the *rbconfig* library to determine the default compiler and linker flags for Ruby.
|
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Date: 2006-04-23
|
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-
|
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+
Record: |
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997
|
This release adds support for the _entire_ "IEEE Std. 1364-2005":http://ieeexplore.ieee.org/xpl/standardstoc.jsp?isnumber=33945 VPI interface, and updates the examples into unit tests.
|
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|
820
|
-
Acknowledgment: |
|
821
|
-
* Thanks to the "SWIG developers":http://www.swig.org/guilty.html for making this project _much_ easier! ;-)
|
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823
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-
|
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+
h2. Thanks
|
1001
|
+
|
1002
|
+
* The "SWIG developers":http://www.swig.org/guilty.html made this project _much_ easier! ;-)
|
1003
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+
|
1004
|
+
|
1005
|
+
h2. Caution
|
1006
|
+
|
824
1007
|
* The *vsim* Makefile target for Mentor Modelsim has been renamed to *msim*.
|
825
1008
|
|
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-
|
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|
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|
+
h2. Details
|
1011
|
+
|
827
1012
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* The Ruby interface to VPI is now generated by "SWIG":http://www.swig.org.
|
828
1013
|
** The main @VPI@ module has been renamed to @Vpi@.
|
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|
** The @VPI::Handle@ class has been removed.
|
@@ -847,16 +1032,22 @@
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Date: 2006-04-17
|
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-
|
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Record: |
|
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1036
|
This release fixes major bugs, adds support for Mentor Modelsim, and removes the @$ruby_task@ callback.
|
852
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|
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|
-
Acknowledgment: |
|
854
|
-
* Thanks to Nobu Nakada for explaining the "cross-thread violation on rb_gc()":http://article.gmane.org/gmane.comp.lang.ruby.general/146653 error.
|
855
1038
|
|
856
|
-
|
1039
|
+
h2. Thanks
|
1040
|
+
|
1041
|
+
* Nobu Nakada explained the "cross-thread violation on rb_gc()":http://article.gmane.org/gmane.comp.lang.ruby.general/146653 error.
|
1042
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+
|
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|
+
|
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|
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h2. Caution
|
1045
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+
|
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|
* Removed @$ruby_task@ callback and ability to dynamically register system tasks from Ruby because inter-process communication is complicated at present.
|
858
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|
859
|
-
|
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|
+
|
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+
h2. Details
|
1050
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+
|
860
1051
|
* The "cross-thread violation on rb_gc()" error has been fixed.
|
861
1052
|
** The "stack level too deep (SystemStackError)" error has been fixed.
|
862
1053
|
** The test/unit library can be used in Ruby test bench.
|
@@ -875,18 +1066,22 @@
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Date: 2006-02-26
|
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|
-
|
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|
+
Record: |
|
879
1070
|
This release adds enough Verilog VPI functionality to make Ruby-VPI usable for simple test benches:
|
880
1071
|
* access Verilog objects through VPI handles
|
881
1072
|
* read and change VPI handle values
|
882
1073
|
* stop, finish, restart the simulation
|
883
1074
|
|
884
|
-
Acknowledgment: |
|
885
|
-
* Thanks to Jose Renau for helping me debug how Synopsys VCS works with Verilog VPI. The problem was that VCS required calltf signatures to be @void (*)(void)@, whereas the Verilog standard defines a calltf signature as @PLI_INT32 (*)(PLI_BYTE8*)@.
|
886
1075
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|
887
|
-
|
1076
|
+
h2. Thanks
|
1077
|
+
|
1078
|
+
* Jose Renau helped me debug how Synopsys VCS works with Verilog VPI. The problem was that VCS required calltf signatures to be @void (*)(void)@, whereas the Verilog standard defines a calltf signature as @PLI_INT32 (*)(PLI_BYTE8*)@.
|
1079
|
+
|
1080
|
+
* Ross Bamford, Eric Hodel, and Yukihiro Matsumoto "helped me discover":http://blade.nagaokaut.ac.jp/cgi-bin/scat.rb/ruby/ruby-talk/180662 why the @SystemStackError@ was happening.
|
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|
+
|
1082
|
+
|
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|
+
h2. Details
|
888
1084
|
|
889
|
-
Details: |
|
890
1085
|
* Implemented some Verilog VPI functionality:
|
891
1086
|
** @VPI::handle_by_name(string, VPI::Handle)@ → @VPI::Handle@
|
892
1087
|
** @VPI::handle_by_name(string)@ → @VPI::Handle@
|
@@ -917,10 +1112,12 @@
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Date: 1999-10-31
|
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1114
|
|
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|
-
|
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|
+
Record: |
|
921
1116
|
This is Kazuhiro HIWADA's initial testing release of Ruby-VPI. See its "original announcement":http://blade.nagaokaut.ac.jp/cgi-bin/scat.rb/ruby/ruby-list/18193 and "source code":http://rubyforge.org/frs/?group_id=1339&release_id=8852.
|
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|
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|
-
|
1118
|
+
|
1119
|
+
h2. Details
|
1120
|
+
|
924
1121
|
* Added ability to relay control from Verilog test bench to Ruby (using @$ruby_callback@) and vice versa (using @PLI::relay_Verilog@).
|
925
1122
|
|
926
1123
|
* Tested and developed using Ruby 1.4 and Verilog-XL from Cadence systems, on a SPARC machine running Solaris 2.6.
|