ruby-vpi 15.0.2 → 16.0.0

data/lib/ruby-vpi/runner.rb

@@ -1,29 +1,19 @@
-# A template to simplify building and running examples. This file is meant to be embedded in another Rakefile, which bears the responsibility of defining the following variables.
+# A template to simplify building and running examples. This file is meant to be
+# embedded in another Rakefile, which bears the responsibility of defining the
+# following variables.
 #
 # = Required variables
-# SIMULATOR_SOURCES:: Array of paths to source files needed by the simulator.
-# SIMULATOR_TARGET:: Name of the Verilog module to be simulated.
-# SIMULATOR_ARGUMENTS:: A hash containing keys for each simulator task (same as Rakefile task names) and values containing command-line arguments for each simulator.
-
-=begin
-  Copyright 2006 Suraj N. Kurapati
-
-  This file is part of Ruby-VPI.
-
-  Ruby-VPI is free software; you can redistribute it and/or
-  modify it under the terms of the GNU General Public License
-  as published by the Free Software Foundation; either version 2
-  of the License, or (at your option) any later version.
-
-  Ruby-VPI is distributed in the hope that it will be useful,
-  but WITHOUT ANY WARRANTY; without even the implied warranty of
-  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-  GNU General Public License for more details.
-
-  You should have received a copy of the GNU General Public License
-  along with Ruby-VPI; if not, write to the Free Software Foundation,
-  Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-=end
+#
+# SIMULATOR_SOURCES::   Array of paths to source files needed by the simulator.
+#
+# SIMULATOR_TARGET::    Name of the Verilog module to be simulated.
+#
+# SIMULATOR_ARGUMENTS:: A hash containing keys for each simulator task (same as
+#                       Rakefile task names) and values containing command-line
+#                       arguments for each simulator.
+#--
+# Copyright 2006-2007 Suraj N. Kurapati
+# See the file named LICENSE for details.
 
 # check for required variables
   raise ArgumentError, "All required variables must be defined." unless
@@ -52,7 +42,7 @@
   end
 
 # prepare hook for rb_load_file() in main.c
-  ENV['RUBY_VPI__RUBY_BENCH_FILE'] = SIMULATOR_TARGET + '.rb'
+  ENV['RUBYVPI_BOOTSTRAP'] = SIMULATOR_TARGET + '.rb'
 
 
 require 'rake/clean'
@@ -97,7 +87,7 @@ task :default do
 end
 
 
-desc "Simulate with GPL Cver."
+desc "Simulate with #{SIMULATORS[:cver].name}."
 task :cver => :setup do
   sh 'cver', SIMULATOR_ARGUMENTS[:cver], "+loadvpi=#{object_file_path(:cver)}:#{BOOTSTAP_FUNC}", expand_include_dir_options(:cver), SIMULATOR_SOURCES
 end
@@ -105,7 +95,7 @@ end
 CLOBBER.include 'verilog.log'
 
 
-desc "Simulate with Icarus Verilog."
+desc "Simulate with #{SIMULATORS[:ivl].name}."
 task :ivl => :setup do
   cp object_file_path(:ivl), 'ruby-vpi.vpi'
   sh 'iverilog', SIMULATOR_ARGUMENTS[:ivl], '-mruby-vpi', expand_include_dir_options(:ivl), SIMULATOR_SOURCES
@@ -115,7 +105,7 @@ end
 CLEAN.include 'ruby-vpi.vpi', 'a.out'
 
 
-desc "Simulate with Synopsys VCS."
+desc "Simulate with #{SIMULATORS[:vcs].name}."
 task :vcs => :setup do
   sh %w(vcs -R +v2k +vpi), SIMULATOR_ARGUMENTS[:vcs], '-load', "#{object_file_path(:vcs)}:#{BOOTSTAP_FUNC}", expand_include_dir_options(:vcs), SIMULATOR_SOURCES
 end
@@ -123,7 +113,7 @@ end
 CLEAN.include 'csrc', 'simv*'
 
 
-desc "Simulate with Mentor Modelsim."
+desc "Simulate with #{SIMULATORS[:vsim].name}."
 task :vsim => :setup do
   sh 'vlib work'
   sh 'vlog', expand_include_dir_options(:vsim), SIMULATOR_SOURCES
@@ -132,3 +122,12 @@ end
 
 CLEAN.include 'work'
 CLOBBER.include 'transcript'
+
+
+desc "Simulate with #{SIMULATORS[:ncsim].name}."
+task :ncsim => :setup do
+  sh 'ncverilog', SIMULATOR_ARGUMENTS[:ncsim], "+loadvpi=#{object_file_path(:ncsim)}:#{BOOTSTAP_FUNC}", '+access+rwc', expand_include_dir_options(:ncsim), SIMULATOR_SOURCES
+end
+
+CLEAN.include 'INCA_libs'
+CLOBBER.include 'ncverilog.log', 'ncsim.log'

data/lib/ruby-vpi/runner_proxy.rb

@@ -1,24 +1,8 @@
-# A template to simplify running multiple tests for an examples. This file is meant to be embedded in another Rakefile.
-
-=begin
-  Copyright 2006 Suraj N. Kurapati
-
-  This file is part of Ruby-VPI.
-
-  Ruby-VPI is free software; you can redistribute it and/or
-  modify it under the terms of the GNU General Public License
-  as published by the Free Software Foundation; either version 2
-  of the License, or (at your option) any later version.
-
-  Ruby-VPI is distributed in the hope that it will be useful,
-  but WITHOUT ANY WARRANTY; without even the implied warranty of
-  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-  GNU General Public License for more details.
-
-  You should have received a copy of the GNU General Public License
-  along with Ruby-VPI; if not, write to the Free Software Foundation,
-  Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-=end
+# A template to simplify running multiple tests for an examples. This file is
+# meant to be embedded in another Rakefile.
+#--
+# Copyright 2006-2007 Suraj N. Kurapati
+# See the file named LICENSE for details.
 
 # supress errors about nonexistent tasks
   task :default

data/lib/ruby-vpi/verilog_parser.rb

@@ -1,23 +1,7 @@
 # A library for parsing Verilog source code.
-=begin
-  Copyright 2006 Suraj N. Kurapati
-
-  This file is part of Ruby-VPI.
-
-  Ruby-VPI is free software; you can redistribute it and/or
-  modify it under the terms of the GNU General Public License
-  as published by the Free Software Foundation; either version 2
-  of the License, or (at your option) any later version.
-
-  Ruby-VPI is distributed in the hope that it will be useful,
-  but WITHOUT ANY WARRANTY; without even the implied warranty of
-  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-  GNU General Public License for more details.
-
-  You should have received a copy of the GNU General Public License
-  along with Ruby-VPI; if not, write to the Free Software Foundation,
-  Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-=end
+#--
+# Copyright 2006-2007 Suraj N. Kurapati
+# See the file named LICENSE for details.
 
 class VerilogParser
   attr_reader :modules, :constants, :includes
@@ -104,7 +88,8 @@ class VerilogParser
 end
 
 class String
-  # Converts this string containing Verilog code into syntactically correct Ruby code.
+  # Converts this string containing Verilog code into syntactically correct Ruby
+  # code.
   def verilog_to_ruby
     content = self.dup