rpi_gpio 0.1.5 → 0.2.0
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- checksums.yaml +4 -4
- data/Gemfile.lock +36 -0
- data/README.md +137 -122
- data/ext/new/c_gpio.c +237 -0
- data/ext/new/c_gpio.h +49 -0
- data/ext/new/common.c +87 -0
- data/ext/new/common.h +43 -0
- data/ext/new/constants.c +84 -0
- data/ext/new/constants.h +45 -0
- data/ext/new/cpuinfo.c +149 -0
- data/ext/new/cpuinfo.h +36 -0
- data/ext/new/event_gpio.c +550 -0
- data/ext/new/event_gpio.h +36 -0
- data/ext/new/py_gpio.c +1048 -0
- data/ext/new/py_pwm.c +199 -0
- data/ext/new/py_pwm.h +24 -0
- data/ext/new/soft_pwm.c +214 -0
- data/ext/new/soft_pwm.h +28 -0
- data/ext/rpi_gpio/c_gpio.c +253 -233
- data/ext/rpi_gpio/c_gpio.h +53 -50
- data/ext/rpi_gpio/common.c +101 -100
- data/ext/rpi_gpio/common.h +47 -46
- data/ext/rpi_gpio/cpuinfo.c +159 -88
- data/ext/rpi_gpio/cpuinfo.h +40 -27
- data/ext/rpi_gpio/event_gpio.c +561 -561
- data/ext/rpi_gpio/rb_gpio.c +399 -389
- data/ext/rpi_gpio/rb_gpio.h +48 -47
- data/ext/rpi_gpio/rb_pwm.c +141 -131
- data/ext/rpi_gpio/rb_pwm.h +41 -40
- data/lib/rpi_gpio.so +0 -0
- metadata +34 -3
checksums.yaml
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---
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SHA1:
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metadata.gz:
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data.tar.gz:
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metadata.gz: a0e5676feb3143ba7430bcfced058ac5e986c2ee
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data.tar.gz: b916d55ecf73e17325cc630324c035dd7b6fa85b
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SHA512:
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metadata.gz:
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data.tar.gz:
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metadata.gz: 15364745c0cf985293b27ab07f6bbbad9566a7c5c20de7c4bdf496c61419a860171bbacfe3153666d3f91e9587a5031562376ecba7606bd245d01b1f61e4a5c4
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data.tar.gz: e904851064c95e2268815255b30b821be6e9a7b8565b7b704001bc6a41f7280df9aae0e91d97b1917e71335896dc756e8bce423cb671166ca19b25823859e139
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data/Gemfile.lock
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PATH
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remote: .
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specs:
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rpi_gpio (0.2.0)
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GEM
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remote: https://rubygems.org/
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specs:
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diff-lcs (1.2.5)
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rake (10.4.2)
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rake-compiler (0.9.5)
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rake
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rspec (3.3.0)
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rspec-core (~> 3.3.0)
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rspec-expectations (~> 3.3.0)
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rspec-mocks (~> 3.3.0)
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rspec-core (3.3.2)
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rspec-support (~> 3.3.0)
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rspec-expectations (3.3.1)
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diff-lcs (>= 1.2.0, < 2.0)
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rspec-support (~> 3.3.0)
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rspec-mocks (3.3.2)
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diff-lcs (>= 1.2.0, < 2.0)
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rspec-support (~> 3.3.0)
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rspec-support (3.3.0)
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PLATFORMS
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ruby
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DEPENDENCIES
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rake-compiler
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rpi_gpio!
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rspec
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BUNDLED WITH
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1.10.6
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data/README.md
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#rpi_gpio v0.
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Ruby conversion of [RPi.GPIO Python module](https://pypi.python.org/pypi/RPi.GPIO)
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##Features
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Manipulate your Raspberry Pi's GPIO pins from Ruby!
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```
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```
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1
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# rpi_gpio v0.2.0
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2
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|
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Ruby conversion of [RPi.GPIO Python module](https://pypi.python.org/pypi/RPi.GPIO)
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4
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|
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## Features
|
6
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|
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Manipulate your Raspberry Pi's GPIO pins from Ruby!
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- Boolean input/output
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- Software-driven PWM (written in C for speed)
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Up-to-date with RPi.GPIO Python module version 0.5.11, so it works on all Raspberry Pi models!
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|
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## Sample Usage
|
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|
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I aimed to make the gem's usage exactly the same as its Python counterpart -- only with a few semantic differences to utilize Ruby's readability. If anything is confusing, you can always check [here](http://sourceforge.net/p/raspberry-gpio-python/wiki/Examples/) for the original Python module's documentation.
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#### Download the gem
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|
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The easiest way to download the gem is to use [Bundler](http://bundler.io/) with a Gemfile. In your Gemfile, include the line
|
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```
|
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gem 'rpi_gpio'
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```
|
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Then you can run `bundle install` to automatically download and compile the gem for your system. To include the gem in a Ruby file, use the line `require 'rpi_gpio'`.
|
25
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|
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#### Pin numbering
|
27
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+
|
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Before you can do anything with the GPIO pins, you need to specify how you want to number them.
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29
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```
|
30
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RPi::GPIO.set_numbering :board
|
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# or
|
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RPi::GPIO.set_numbering :bcm
|
33
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````
|
34
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`:board` numbering refers to the physical pin numbers on the Pi, whereas `:bcm` numbering refers to the Broadcom SOC channel numbering. Note that `:bcm` numbering differs between Pi models, while `:board` numbering does not.
|
35
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+
|
36
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#### Input
|
37
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+
|
38
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To receive input from a GPIO pin, you must first initialize it as an input pin:
|
39
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+
```
|
40
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RPi::GPIO.setup PIN_NUM, as: :input
|
41
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```
|
42
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The pin number will differ based on your selected numbering system and which pin you want to use.
|
43
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+
|
44
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Now you can use the calls
|
45
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```
|
46
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RPi::GPIO.high? PIN_NUM
|
47
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RPi::GPIO.low? PIN_NUM
|
48
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+
```
|
49
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to receive either `true` or `false`.
|
50
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+
|
51
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You can use the additional hash argument `:pull` to apply a pull-up or pull-down resistor to the input pin like so:
|
52
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```
|
53
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RPi::GPIO.setup PIN_NUM, as: :input, pull: :down
|
54
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# or
|
55
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RPi::GPIO.setup PIN_NUM, as: :input, pull: :up
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56
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# or (not necessary; :off is the default value)
|
57
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RPi::GPIO.setup PIN_NUM, as: :input, pull: :off
|
58
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+
```
|
59
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+
|
60
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#### Output
|
61
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+
|
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To send output to a GPIO pin, you must first initialize it as an output pin:
|
63
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```
|
64
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RPi::GPIO.setup PIN_NUM, as: :output
|
65
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```
|
66
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Now you can use the calls
|
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```
|
68
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RPi::GPIO.set_high PIN_NUM
|
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RPi::GPIO.set_low PIN_NUM
|
70
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```
|
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to set the pin either high or low.
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|
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#### PWM (pulse-width modulation)
|
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|
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Pulse-width modulation is a useful tool for controlling things like LED brightness or motor speed. To utilize PWM, first create a PWM object for an [output pin](#output).
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```ruby
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pwm = RPi::GPIO::PWM.new(PIN_NUM, PWM_FREQ)
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```
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The `PWM_FREQ` is a value in hertz that specifies the amount of pulse cycles per second.
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Now you can call the following method to start PWM:
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```
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pwm.start DUTY_CYCLE
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```
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`DUTY_CYCLE` is a value from `0.0` to `100.0` indicating the percent of the time that the signal will be high.
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Once running, you can get/set the PWM duty cycle with
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```
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pwm.duty_cycle # get
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pwm.duty_cycle = NEW_DUTY_CYCLE # set
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```
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get/set the PWM frequency with
|
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```
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pwm.frequency # get
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pwm.frequency = NEW_FREQUENCY # set
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```
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and get the PWM GPIO number with
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```ruby
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pwm.gpio
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```
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Note that this number corresponds to `:bcm` numbering of the GPIO pins, so it will be different than pin number you used if you created the PWM with `:board` numbering.
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|
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To stop PWM, use
|
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```
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pwm.stop
|
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```
|
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To check if a PWM object is currently running, use
|
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```ruby
|
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pwm.running?
|
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```
|
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|
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#### Cleaning up
|
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|
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After your program is finished using the GPIO pins, it's a good idea to release them so other programs can use them later. Simply call
|
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```
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RPi::GPIO.clean_up PIN_NUM
|
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```
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to release a specific pin, or
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```
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RPi::GPIO.clean_up
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```
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to release all allocated pins.
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Alternatively, you can call
|
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```ruby
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RPi::GPIO.reset
|
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```
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to clean up all pins and to also reset the selected numbering mode.
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## Credits
|
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Original Python code by Ben Croston modified for Ruby by Nick Lowery
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Copyright (c) 2014-2015 [Nick Lowery](https://github.com/ClockVapor)
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View LICENSE for full license.
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data/ext/new/c_gpio.c
ADDED
@@ -0,0 +1,237 @@
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/*
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Copyright (c) 2012-2015 Ben Croston
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Permission is hereby granted, free of charge, to any person obtaining a copy of
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this software and associated documentation files (the "Software"), to deal in
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the Software without restriction, including without limitation the rights to
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use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
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of the Software, and to permit persons to whom the Software is furnished to do
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so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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*/
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#include <stdio.h>
|
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#include <stdint.h>
|
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#include <stdlib.h>
|
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#include <fcntl.h>
|
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#include <sys/mman.h>
|
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#include "c_gpio.h"
|
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|
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#define BCM2708_PERI_BASE_DEFAULT 0x20000000
|
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#define GPIO_BASE_OFFSET 0x200000
|
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#define FSEL_OFFSET 0 // 0x0000
|
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#define SET_OFFSET 7 // 0x001c / 4
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#define CLR_OFFSET 10 // 0x0028 / 4
|
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#define PINLEVEL_OFFSET 13 // 0x0034 / 4
|
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#define EVENT_DETECT_OFFSET 16 // 0x0040 / 4
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#define RISING_ED_OFFSET 19 // 0x004c / 4
|
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#define FALLING_ED_OFFSET 22 // 0x0058 / 4
|
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#define HIGH_DETECT_OFFSET 25 // 0x0064 / 4
|
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#define LOW_DETECT_OFFSET 28 // 0x0070 / 4
|
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#define PULLUPDN_OFFSET 37 // 0x0094 / 4
|
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#define PULLUPDNCLK_OFFSET 38 // 0x0098 / 4
|
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+
|
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#define PAGE_SIZE (4*1024)
|
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#define BLOCK_SIZE (4*1024)
|
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|
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static volatile uint32_t *gpio_map;
|
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|
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void short_wait(void)
|
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{
|
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int i;
|
52
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+
|
53
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for (i=0; i<150; i++) { // wait 150 cycles
|
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asm volatile("nop");
|
55
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}
|
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}
|
57
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+
|
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int setup(void)
|
59
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{
|
60
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int mem_fd;
|
61
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uint8_t *gpio_mem;
|
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uint32_t peri_base = BCM2708_PERI_BASE_DEFAULT;
|
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uint32_t gpio_base;
|
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unsigned char buf[4];
|
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FILE *fp;
|
66
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+
|
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// get peri base from device tree
|
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if ((fp = fopen("/proc/device-tree/soc/ranges", "rb")) != NULL) {
|
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+
fseek(fp, 4, SEEK_SET);
|
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if (fread(buf, 1, sizeof buf, fp) == sizeof buf) {
|
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peri_base = buf[0] << 24 | buf[1] << 16 | buf[2] << 8 | buf[3] << 0;
|
72
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+
}
|
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+
fclose(fp);
|
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+
}
|
75
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+
|
76
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+
gpio_base = peri_base + GPIO_BASE_OFFSET;
|
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+
|
78
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// mmap the GPIO memory registers
|
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|
+
if ((mem_fd = open("/dev/mem", O_RDWR|O_SYNC) ) < 0)
|
80
|
+
return SETUP_DEVMEM_FAIL;
|
81
|
+
|
82
|
+
if ((gpio_mem = malloc(BLOCK_SIZE + (PAGE_SIZE-1))) == NULL)
|
83
|
+
return SETUP_MALLOC_FAIL;
|
84
|
+
|
85
|
+
if ((uint32_t)gpio_mem % PAGE_SIZE)
|
86
|
+
gpio_mem += PAGE_SIZE - ((uint32_t)gpio_mem % PAGE_SIZE);
|
87
|
+
|
88
|
+
gpio_map = (uint32_t *)mmap( (caddr_t)gpio_mem, BLOCK_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED|MAP_FIXED, mem_fd, gpio_base);
|
89
|
+
|
90
|
+
if ((uint32_t)gpio_map < 0)
|
91
|
+
return SETUP_MMAP_FAIL;
|
92
|
+
|
93
|
+
return SETUP_OK;
|
94
|
+
}
|
95
|
+
|
96
|
+
void clear_event_detect(int gpio)
|
97
|
+
{
|
98
|
+
int offset = EVENT_DETECT_OFFSET + (gpio/32);
|
99
|
+
int shift = (gpio%32);
|
100
|
+
|
101
|
+
*(gpio_map+offset) |= (1 << shift);
|
102
|
+
short_wait();
|
103
|
+
*(gpio_map+offset) = 0;
|
104
|
+
}
|
105
|
+
|
106
|
+
int eventdetected(int gpio)
|
107
|
+
{
|
108
|
+
int offset, value, bit;
|
109
|
+
|
110
|
+
offset = EVENT_DETECT_OFFSET + (gpio/32);
|
111
|
+
bit = (1 << (gpio%32));
|
112
|
+
value = *(gpio_map+offset) & bit;
|
113
|
+
if (value)
|
114
|
+
clear_event_detect(gpio);
|
115
|
+
return value;
|
116
|
+
}
|
117
|
+
|
118
|
+
void set_rising_event(int gpio, int enable)
|
119
|
+
{
|
120
|
+
int offset = RISING_ED_OFFSET + (gpio/32);
|
121
|
+
int shift = (gpio%32);
|
122
|
+
|
123
|
+
if (enable)
|
124
|
+
*(gpio_map+offset) |= 1 << shift;
|
125
|
+
else
|
126
|
+
*(gpio_map+offset) &= ~(1 << shift);
|
127
|
+
clear_event_detect(gpio);
|
128
|
+
}
|
129
|
+
|
130
|
+
void set_falling_event(int gpio, int enable)
|
131
|
+
{
|
132
|
+
int offset = FALLING_ED_OFFSET + (gpio/32);
|
133
|
+
int shift = (gpio%32);
|
134
|
+
|
135
|
+
if (enable) {
|
136
|
+
*(gpio_map+offset) |= (1 << shift);
|
137
|
+
*(gpio_map+offset) = (1 << shift);
|
138
|
+
} else {
|
139
|
+
*(gpio_map+offset) &= ~(1 << shift);
|
140
|
+
}
|
141
|
+
clear_event_detect(gpio);
|
142
|
+
}
|
143
|
+
|
144
|
+
void set_high_event(int gpio, int enable)
|
145
|
+
{
|
146
|
+
int offset = HIGH_DETECT_OFFSET + (gpio/32);
|
147
|
+
int shift = (gpio%32);
|
148
|
+
|
149
|
+
if (enable)
|
150
|
+
*(gpio_map+offset) |= (1 << shift);
|
151
|
+
else
|
152
|
+
*(gpio_map+offset) &= ~(1 << shift);
|
153
|
+
clear_event_detect(gpio);
|
154
|
+
}
|
155
|
+
|
156
|
+
void set_low_event(int gpio, int enable)
|
157
|
+
{
|
158
|
+
int offset = LOW_DETECT_OFFSET + (gpio/32);
|
159
|
+
int shift = (gpio%32);
|
160
|
+
|
161
|
+
if (enable)
|
162
|
+
*(gpio_map+offset) |= 1 << shift;
|
163
|
+
else
|
164
|
+
*(gpio_map+offset) &= ~(1 << shift);
|
165
|
+
clear_event_detect(gpio);
|
166
|
+
}
|
167
|
+
|
168
|
+
void set_pullupdn(int gpio, int pud)
|
169
|
+
{
|
170
|
+
int clk_offset = PULLUPDNCLK_OFFSET + (gpio/32);
|
171
|
+
int shift = (gpio%32);
|
172
|
+
|
173
|
+
if (pud == PUD_DOWN)
|
174
|
+
*(gpio_map+PULLUPDN_OFFSET) = (*(gpio_map+PULLUPDN_OFFSET) & ~3) | PUD_DOWN;
|
175
|
+
else if (pud == PUD_UP)
|
176
|
+
*(gpio_map+PULLUPDN_OFFSET) = (*(gpio_map+PULLUPDN_OFFSET) & ~3) | PUD_UP;
|
177
|
+
else // pud == PUD_OFF
|
178
|
+
*(gpio_map+PULLUPDN_OFFSET) &= ~3;
|
179
|
+
|
180
|
+
short_wait();
|
181
|
+
*(gpio_map+clk_offset) = 1 << shift;
|
182
|
+
short_wait();
|
183
|
+
*(gpio_map+PULLUPDN_OFFSET) &= ~3;
|
184
|
+
*(gpio_map+clk_offset) = 0;
|
185
|
+
}
|
186
|
+
|
187
|
+
void setup_gpio(int gpio, int direction, int pud)
|
188
|
+
{
|
189
|
+
int offset = FSEL_OFFSET + (gpio/10);
|
190
|
+
int shift = (gpio%10)*3;
|
191
|
+
|
192
|
+
set_pullupdn(gpio, pud);
|
193
|
+
if (direction == OUTPUT)
|
194
|
+
*(gpio_map+offset) = (*(gpio_map+offset) & ~(7<<shift)) | (1<<shift);
|
195
|
+
else // direction == INPUT
|
196
|
+
*(gpio_map+offset) = (*(gpio_map+offset) & ~(7<<shift));
|
197
|
+
}
|
198
|
+
|
199
|
+
// Contribution by Eric Ptak <trouch@trouch.com>
|
200
|
+
int gpio_function(int gpio)
|
201
|
+
{
|
202
|
+
int offset = FSEL_OFFSET + (gpio/10);
|
203
|
+
int shift = (gpio%10)*3;
|
204
|
+
int value = *(gpio_map+offset);
|
205
|
+
value >>= shift;
|
206
|
+
value &= 7;
|
207
|
+
return value; // 0=input, 1=output, 4=alt0
|
208
|
+
}
|
209
|
+
|
210
|
+
void output_gpio(int gpio, int value)
|
211
|
+
{
|
212
|
+
int offset, shift;
|
213
|
+
|
214
|
+
if (value) // value == HIGH
|
215
|
+
offset = SET_OFFSET + (gpio/32);
|
216
|
+
else // value == LOW
|
217
|
+
offset = CLR_OFFSET + (gpio/32);
|
218
|
+
|
219
|
+
shift = (gpio%32);
|
220
|
+
|
221
|
+
*(gpio_map+offset) = 1 << shift;
|
222
|
+
}
|
223
|
+
|
224
|
+
int input_gpio(int gpio)
|
225
|
+
{
|
226
|
+
int offset, value, mask;
|
227
|
+
|
228
|
+
offset = PINLEVEL_OFFSET + (gpio/32);
|
229
|
+
mask = (1 << gpio%32);
|
230
|
+
value = *(gpio_map+offset) & mask;
|
231
|
+
return value;
|
232
|
+
}
|
233
|
+
|
234
|
+
void cleanup(void)
|
235
|
+
{
|
236
|
+
munmap((caddr_t)gpio_map, BLOCK_SIZE);
|
237
|
+
}
|