rggen 0.3.3 → 0.4.0

data/sample/sample_0_ral_pkg.sv

@@ -70,17 +70,20 @@ package sample_0_ral_pkg;
       set_shadow_index("register_0", "bit_field_0_1", indexes[1]);
     endfunction
   endclass
-  class sample_0_block_model extends rggen_ral_block;
+  class sample_0_block_model#(
+    type REGISTER_6 = rggen_ral_block
+  ) extends rggen_ral_block;
     rand register_0_reg_model register_0;
     rand register_1_reg_model register_1;
     rand register_2_reg_model register_2;
     rand register_3_reg_model register_3;
     rand register_4_reg_model register_4[4];
     rand register_5_reg_model register_5[2][4];
+    rand REGISTER_6 register_6;
     function new(string name = "sample_0");
       super.new(name);
     endfunction
-    function void create_registers();
+    function void create_sub_models();
       `rggen_ral_create_reg_model(register_0, "register_0", '{}, 8'h00, "RW", 0)
       `rggen_ral_create_reg_model(register_1, "register_1", '{}, 8'h04, "RW", 0)
       `rggen_ral_create_reg_model(register_2, "register_2", '{}, 8'h08, "RW", 0)
@@ -91,6 +94,7 @@ package sample_0_ral_pkg;
       foreach (register_5[i, j]) begin
         `rggen_ral_create_reg_model(register_5[i][j], "register_5", '{i, j}, 8'h20, "RW", 1)
       end
+      `rggen_ral_create_block_model(register_6, "register_6", 8'h80)
     endfunction
     function uvm_reg_map create_default_map();
       return create_map("default_map", 0, 4, UVM_LITTLE_ENDIAN, 1);

data/sample/sample_1.sv

@@ -21,6 +21,7 @@ module sample_1 (
   logic write;
   logic read;
   logic [6:0] address;
+  logic [3:0] strobe;
   logic [31:0] write_data;
   logic [31:0] write_mask;
   logic response_ready;
@@ -54,6 +55,7 @@ module sample_1 (
     .o_write          (write),
     .o_read           (read),
     .o_address        (address),
+    .o_strobe         (strobe),
     .o_write_data     (write_data),
     .o_write_mask     (write_mask),
     .i_response_ready (response_ready),
@@ -61,18 +63,22 @@ module sample_1 (
     .i_status         (status)
   );
   rggen_response_mux #(
-    .DATA_WIDTH       (32),
-    .TOTAL_REGISTERS  (3)
+    .DATA_WIDTH               (32),
+    .TOTAL_REGISTERS          (3),
+    .TOTAL_EXTERNAL_REGISTERS (0)
   ) u_response_mux (
-    .clk                  (clk),
-    .rst_n                (rst_n),
-    .i_command_valid      (command_valid),
-    .i_read               (read),
-    .o_response_ready     (response_ready),
-    .o_read_data          (read_data),
-    .o_status             (status),
-    .i_register_select    (register_select),
-    .i_register_read_data (register_read_data)
+    .clk                        (clk),
+    .rst_n                      (rst_n),
+    .i_command_valid            (command_valid),
+    .i_read                     (read),
+    .o_response_ready           (response_ready),
+    .o_read_data                (read_data),
+    .o_status                   (status),
+    .i_register_select          (register_select),
+    .i_register_read_data       (register_read_data),
+    .i_external_register_select (1'b0),
+    .i_external_register_ready  (1'b0),
+    .i_external_register_status ('{2'b00})
   );
   rggen_address_decoder #(
     .READABLE           (1),

data/sample/sample_1_ral_pkg.sv

@@ -41,7 +41,7 @@ package sample_1_ral_pkg;
     function new(string name = "sample_1");
       super.new(name);
     endfunction
-    function void create_registers();
+    function void create_sub_models();
       `rggen_ral_create_reg_model(register_0, "register_0", '{}, 7'h00, "RW", 0)
       `rggen_ral_create_reg_model(register_1, "register_1", '{}, 7'h04, "RW", 0)
       `rggen_ral_create_reg_model(register_2, "register_2", '{}, 7'h08, "RW", 0)

data/sample/sample_setup.rb

@@ -10,12 +10,12 @@ end
 
 enable :global        , [:data_width, :address_width]
 enable :register_block, [:name, :base_address]
-enable :register      , [:offset_address, :name, :array, :shadow, :accessibility, :uniquness_validator]
+enable :register      , [:offset_address, :name, :array, :shadow, :external, :accessibility, :uniquness_validator]
 enable :bit_field     , [:bit_assignment, :name, :type, :initial_value, :reference]
 enable :bit_field     , :type, [:rw, :ro, :foo, :reserved]
-enable :register_block, [:module_definition, :signal_declarations, :clock_reset, :host_if, :response_mux]
+enable :register_block, [:top_module, :clock_reset, :host_if, :response_mux]
 enable :register_block, :host_if, [:apb, :bar]
-enable :register      , [:address_decoder, :read_data]
-enable :register_block, [:ral_package_definition, :block_model_definition, :reg_model_declarations, :block_model_constructor, :reg_model_creator, :block_model_default_map_creator]
-enable :register      , [:reg_model_definition, :field_model_declarations, :reg_model_constructor, :field_model_creator, :shadow_index_configurator, :reg_model_declaration, :reg_model_creation]
-enable :bit_field     , [:field_model_declaration, :field_model_creation]
+enable :register      , [:address_decoder, :read_data, :bus_exporter]
+enable :register_block, [:ral_package, :block_model, :constructor, :sub_model_creator, :default_map_creator]
+enable :register      , [:reg_model, :constructor, :field_model_creator, :shadow_index_configurator, :sub_block_model]
+enable :bit_field     , :field_model

data/setup/default.rb

@@ -1,11 +1,11 @@
 enable :global        , [:data_width, :address_width]
 enable :register_block, [:name, :byte_size]
-enable :register      , [:offset_address, :name, :array, :shadow, :accessibility, :uniquness_validator]
+enable :register      , [:offset_address, :name, :array, :shadow, :external, :accessibility, :uniquness_validator]
 enable :bit_field     , [:bit_assignment, :name, :type, :initial_value, :reference]
 enable :bit_field     , :type, [:rw, :ro, :reserved]
-enable :register_block, [:module_definition, :signal_declarations, :clock_reset, :host_if, :response_mux]
+enable :register_block, [:top_module, :clock_reset, :host_if, :response_mux]
 enable :register_block, :host_if, [:apb, :axi4lite]
-enable :register      , [:address_decoder, :read_data]
-enable :register_block, [:ral_package_definition, :block_model_definition, :reg_model_declarations, :block_model_constructor, :reg_model_creator, :block_model_default_map_creator]
-enable :register      , [:reg_model_definition, :field_model_declarations, :reg_model_constructor, :field_model_creator, :shadow_index_configurator, :reg_model_declaration, :reg_model_creation]
-enable :bit_field     , [:field_model_declaration, :field_model_creation]
+enable :register      , [:address_decoder, :read_data, :bus_exporter]
+enable :register_block, [:ral_package, :block_model, :constructor, :sub_model_creator, :default_map_creator]
+enable :register      , [:reg_model, :constructor, :field_model_creator, :shadow_index_configurator, :sub_block_model]
+enable :bit_field     , :field_model

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: rggen
 version: !ruby/object:Gem::Version
-  version: 0.3.3
+  version: 0.4.0
 platform: ruby
 authors:
 - Taichi Ishitani
 autorequire: 
 bindir: bin
 cert_chain: []
-date: 2016-04-20 00:00:00.000000000 Z
+date: 2016-05-24 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: baby_erubis
@@ -70,14 +70,14 @@ dependencies:
   name: rake
   requirement: !ruby/object:Gem::Requirement
     requirements:
-    - - "~>"
+    - - ">="
       - !ruby/object:Gem::Version
         version: '10.0'
   type: :development
   prerelease: false
   version_requirements: !ruby/object:Gem::Requirement
     requirements:
-    - - "~>"
+    - - ">="
       - !ruby/object:Gem::Version
         version: '10.0'
 - !ruby/object:Gem::Dependency
@@ -141,8 +141,7 @@ files:
 - lib/rggen/builder/simple_item_entry.rb
 - lib/rggen/builtins.rb
 - lib/rggen/builtins/bit_field/bit_assignment.rb
-- lib/rggen/builtins/bit_field/field_model_creation.rb
-- lib/rggen/builtins/bit_field/field_model_declaration.rb
+- lib/rggen/builtins/bit_field/field_model.rb
 - lib/rggen/builtins/bit_field/initial_value.rb
 - lib/rggen/builtins/bit_field/name.rb
 - lib/rggen/builtins/bit_field/reference.rb
@@ -163,37 +162,36 @@ files:
 - lib/rggen/builtins/register/address_decoder.erb
 - lib/rggen/builtins/register/address_decoder.rb
 - lib/rggen/builtins/register/array.rb
+- lib/rggen/builtins/register/bus_exporter.erb
+- lib/rggen/builtins/register/bus_exporter.rb
+- lib/rggen/builtins/register/constructor.rb
+- lib/rggen/builtins/register/external.rb
 - lib/rggen/builtins/register/field_model_creator.rb
-- lib/rggen/builtins/register/field_model_declarations.rb
 - lib/rggen/builtins/register/name.rb
 - lib/rggen/builtins/register/offset_address.rb
 - lib/rggen/builtins/register/read_data.rb
-- lib/rggen/builtins/register/reg_model_constructor.rb
-- lib/rggen/builtins/register/reg_model_creation.rb
-- lib/rggen/builtins/register/reg_model_declaration.rb
-- lib/rggen/builtins/register/reg_model_definition.rb
+- lib/rggen/builtins/register/reg_model.rb
 - lib/rggen/builtins/register/shadow.rb
 - lib/rggen/builtins/register/shadow_index_configurator.rb
+- lib/rggen/builtins/register/sub_block_model.rb
 - lib/rggen/builtins/register/uniqueness_validator.rb
 - lib/rggen/builtins/register_block/apb.erb
 - lib/rggen/builtins/register_block/apb.rb
 - lib/rggen/builtins/register_block/axi4lite.erb
 - lib/rggen/builtins/register_block/axi4lite.rb
 - lib/rggen/builtins/register_block/base_address.rb
-- lib/rggen/builtins/register_block/block_model_constructor.rb
-- lib/rggen/builtins/register_block/block_model_default_map_creator.rb
-- lib/rggen/builtins/register_block/block_model_definition.rb
+- lib/rggen/builtins/register_block/block_model.rb
 - lib/rggen/builtins/register_block/byte_size.rb
 - lib/rggen/builtins/register_block/clock_reset.rb
+- lib/rggen/builtins/register_block/constructor.rb
+- lib/rggen/builtins/register_block/default_map_creator.rb
 - lib/rggen/builtins/register_block/host_if.rb
-- lib/rggen/builtins/register_block/module_definition.rb
 - lib/rggen/builtins/register_block/name.rb
-- lib/rggen/builtins/register_block/ral_package_definition.rb
-- lib/rggen/builtins/register_block/reg_model_creator.rb
-- lib/rggen/builtins/register_block/reg_model_declarations.rb
+- lib/rggen/builtins/register_block/ral_package.rb
 - lib/rggen/builtins/register_block/response_mux.erb
 - lib/rggen/builtins/register_block/response_mux.rb
-- lib/rggen/builtins/register_block/signal_declarations.rb
+- lib/rggen/builtins/register_block/sub_model_creator.rb
+- lib/rggen/builtins/register_block/top_module.rb
 - lib/rggen/commands.rb
 - lib/rggen/core_components.rb
 - lib/rggen/core_components/configuration/configuration_factory.rb
@@ -201,10 +199,12 @@ files:
 - lib/rggen/core_components/configuration/item_factory.rb
 - lib/rggen/core_components/configuration/raise_error.rb
 - lib/rggen/core_components/configuration/setup.rb
+- lib/rggen/core_components/ral/component.rb
 - lib/rggen/core_components/ral/item.rb
 - lib/rggen/core_components/ral/setup.rb
 - lib/rggen/core_components/register_map/bit_field_factory.rb
 - lib/rggen/core_components/register_map/component.rb
+- lib/rggen/core_components/register_map/component_factory.rb
 - lib/rggen/core_components/register_map/generic_map.rb
 - lib/rggen/core_components/register_map/item.rb
 - lib/rggen/core_components/register_map/item_factory.rb
@@ -257,6 +257,7 @@ files:
 - rtl/bit_field/rggen_bit_field_rw.sv
 - rtl/compile.f
 - rtl/register/rggen_address_decoder.sv
+- rtl/register/rggen_bus_exporter.sv
 - rtl/register_block/rggen_host_if_apb.sv
 - rtl/register_block/rggen_host_if_axi4lite.sv
 - rtl/register_block/rggen_host_if_common.svh

data/lib/rggen/builtins/bit_field/field_model_declaration.rb

@@ -1,9 +0,0 @@
-simple_item :bit_field, :field_model_declaration do
-  ral do
-    delegate [:name] => :bit_field
-
-    generate_code :field_model_declaration do |buffer|
-      buffer << model_declaration(:rggen_ral_field, name) << semicolon << nl
-    end
-  end
-end

data/lib/rggen/builtins/register/field_model_declarations.rb

@@ -1,7 +0,0 @@
-simple_item :register, :field_model_declarations do
-  ral do
-    generate_code :reg_model_item do |buffer|
-      register.generate_code(:field_model_declaration, :top_down, buffer)
-    end
-  end
-end

data/lib/rggen/builtins/register/reg_model_creation.rb

@@ -1,64 +0,0 @@
-simple_item :register, :reg_model_creation do
-  ral do
-    delegate [:byte_width] => :configuration
-    delegate [:local_address_width] => :register_block
-    delegate [:name, :dimensions, :array?, :shadow?] => :register
-
-    generate_code :reg_model_creation  do |buffer|
-      foreach_header(buffer) if array?
-      model_creation(buffer)
-      foreach_footer(buffer) if array?
-    end
-
-    def foreach_header(buffer)
-      buffer << "foreach (#{name}[#{loop_varibles.join(', ')}]) begin" << nl
-      buffer.indent += 2
-    end
-
-    def model_creation(buffer)
-      buffer << "`rggen_ral_create_reg_model(#{arguments.join(', ')})" << nl
-    end
-
-    def foreach_footer(buffer)
-      buffer.indent -= 2
-      buffer << 'end' << nl
-    end
-
-    def arguments
-      [handle, string(name), array_index, offset_address, rights, unmapped]
-    end
-
-    def handle
-      create_identifier(name)[loop_varibles]
-    end
-
-    def array_index
-      return '\'{}' unless array?
-      array(*loop_varibles)
-    end
-
-    def offset_address
-      base  = hex(register.start_address, local_address_width)
-      if !array? || shadow?
-        base
-      else
-        "#{base} + #{byte_width} * #{loop_varibles.first}"
-      end
-    end
-
-    def rights
-      return string(:RO) if register.read_only?
-      return string(:WO) if register.write_only?
-      string(:RW)
-    end
-
-    def unmapped
-      (shadow? && 1) || 0
-    end
-
-    def loop_varibles
-      return nil unless array?
-      @loop_varibles ||= Array.new(dimensions.size, &method(:loop_index))
-    end
-  end
-end

data/lib/rggen/builtins/register/reg_model_declaration.rb

@@ -1,13 +0,0 @@
-simple_item :register, :reg_model_declaration do
-  ral do
-    delegate [:model_name, :name, :dimensions] => :register
-
-    generate_code :reg_model_declaration do |buffer|
-      buffer << declaration << semicolon << nl
-    end
-
-    def declaration
-      model_declaration(model_name, name, dimensions: dimensions)
-    end
-  end
-end

data/lib/rggen/builtins/register/reg_model_definition.rb

@@ -1,22 +0,0 @@
-simple_item :register, :reg_model_definition do
-  ral do
-    export :model_name
-
-    generate_code :package_item do
-      class_definition model_name do |c|
-        c.base base_model
-        c.body do |buffer|
-          register.generate_code(:reg_model_item, :top_down, buffer)
-        end
-      end
-    end
-
-    def model_name
-      "#{register.name}_reg_model"
-    end
-
-    def base_model
-      (register.shadow? && :rggen_ral_shadow_reg) || :rggen_ral_reg
-    end
-  end
-end

data/lib/rggen/builtins/register_block/module_definition.rb

@@ -1,13 +0,0 @@
-define_simple_item :register_block, :module_definition do
-  rtl do
-    write_file '<%= register_block.name %>.sv' do
-      module_definition register_block.name do |m|
-        m.parameters register_block.parameter_declarations
-        m.ports      register_block.port_declarations
-        m.body do |code|
-          register_block.generate_code(:module_item, :top_down, code)
-        end
-      end
-    end
-  end
-end

data/lib/rggen/builtins/register_block/reg_model_creator.rb

@@ -1,14 +0,0 @@
-simple_item :register_block, :reg_model_creator do
-  ral do
-    generate_code :block_model_item do
-      function_definition :create_registers do |f|
-        f.return_type :void
-        f.body { |buffer| function_body(buffer) }
-      end
-    end
-
-    def function_body(buffer)
-      register_block.generate_code(:reg_model_creation, :top_down, buffer)
-    end
-  end
-end

data/lib/rggen/builtins/register_block/reg_model_declarations.rb

@@ -1,7 +0,0 @@
-simple_item :register_block, :reg_model_declarations do
-  ral do
-    generate_code :block_model_item do |buffer|
-      register_block.generate_code(:reg_model_declaration, :top_down, buffer)
-    end
-  end
-end

data/lib/rggen/builtins/register_block/signal_declarations.rb

@@ -1,9 +0,0 @@
-define_simple_item :register_block, :signal_declarations do
-  rtl do
-    generate_code :module_item do |buffer|
-      register_block.signal_declarations.each do |declaration|
-        buffer << declaration << semicolon << nl
-      end
-    end
-  end
-end