passenger 6.0.7 → 6.0.8

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/{ops_gcc_ppc.hpp → core_arch_ops_gcc_ppc.hpp}

@@ -8,21 +8,22 @@
  * Copyright (c) 2014 Andrey Semashev
  */
 /*!
- * \file   atomic/detail/ops_gcc_ppc.hpp
+ * \file   atomic/detail/core_arch_ops_gcc_ppc.hpp
  *
- * This header contains implementation of the \c operations template.
+ * This header contains implementation of the \c core_arch_operations template.
  */
 
-#ifndef BOOST_ATOMIC_DETAIL_OPS_GCC_PPC_HPP_INCLUDED_
-#define BOOST_ATOMIC_DETAIL_OPS_GCC_PPC_HPP_INCLUDED_
+#ifndef BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_
+#define BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_
 
 #include <cstddef>
 #include <boost/memory_order.hpp>
 #include <boost/atomic/detail/config.hpp>
-#include <boost/atomic/detail/storage_type.hpp>
-#include <boost/atomic/detail/operations_fwd.hpp>
+#include <boost/atomic/detail/storage_traits.hpp>
+#include <boost/atomic/detail/core_arch_operations_fwd.hpp>
 #include <boost/atomic/detail/ops_gcc_ppc_common.hpp>
-#include <boost/atomic/capabilities.hpp>
+#include <boost/atomic/detail/capabilities.hpp>
+#include <boost/atomic/detail/header.hpp>
 
 #ifdef BOOST_HAS_PRAGMA_ONCE
 #pragma once
@@ -79,15 +80,16 @@ namespace detail {
     to pose a problem.
 */
 
-template< bool Signed >
-struct operations< 4u, Signed > :
-    public gcc_ppc_operations_base
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 4u, Signed, Interprocess > :
+    public core_arch_operations_gcc_ppc_base
 {
-    typedef typename make_storage_type< 4u >::type storage_type;
-    typedef typename make_storage_type< 4u >::aligned aligned_storage_type;
+    typedef typename storage_traits< 4u >::type storage_type;
 
     static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 4u;
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 4u;
     static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
+    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -303,21 +305,22 @@ struct operations< 4u, Signed > :
 
     static BOOST_FORCEINLINE void clear(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
     {
-        store(storage, 0, order);
+        store(storage, (storage_type)0, order);
     }
 };
 
 #if defined(BOOST_ATOMIC_DETAIL_PPC_HAS_LBARX_STBCX)
 
-template< bool Signed >
-struct operations< 1u, Signed > :
-    public gcc_ppc_operations_base
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 1u, Signed, Interprocess > :
+    public core_arch_operations_gcc_ppc_base
 {
-    typedef typename make_storage_type< 1u >::type storage_type;
-    typedef typename make_storage_type< 1u >::aligned aligned_storage_type;
+    typedef typename storage_traits< 1u >::type storage_type;
 
     static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 1u;
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 1u;
     static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
+    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -533,23 +536,23 @@ struct operations< 1u, Signed > :
 
     static BOOST_FORCEINLINE void clear(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
     {
-        store(storage, 0, order);
+        store(storage, (storage_type)0, order);
     }
 };
 
 #else // defined(BOOST_ATOMIC_DETAIL_PPC_HAS_LBARX_STBCX)
 
-template< >
-struct operations< 1u, false > :
-    public operations< 4u, false >
+template< bool Interprocess >
+struct core_arch_operations< 1u, false, Interprocess > :
+    public core_arch_operations< 4u, false, Interprocess >
 {
-    typedef operations< 4u, false > base_type;
-    typedef base_type::storage_type storage_type;
+    typedef core_arch_operations< 4u, false, Interprocess > base_type;
+    typedef typename base_type::storage_type storage_type;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
         storage_type original, result;
-        fence_before(order);
+        base_type::fence_before(order);
         __asm__ __volatile__
         (
             "1:\n\t"
@@ -562,14 +565,14 @@ struct operations< 1u, false > :
             : "b" (v)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
         storage_type original, result;
-        fence_before(order);
+        base_type::fence_before(order);
         __asm__ __volatile__
         (
             "1:\n\t"
@@ -582,22 +585,22 @@ struct operations< 1u, false > :
             : "b" (v)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 };
 
-template< >
-struct operations< 1u, true > :
-    public operations< 4u, true >
+template< bool Interprocess >
+struct core_arch_operations< 1u, true, Interprocess > :
+    public core_arch_operations< 4u, true, Interprocess >
 {
-    typedef operations< 4u, true > base_type;
-    typedef base_type::storage_type storage_type;
+    typedef core_arch_operations< 4u, true, Interprocess > base_type;
+    typedef typename base_type::storage_type storage_type;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
         storage_type original, result;
-        fence_before(order);
+        base_type::fence_before(order);
         __asm__ __volatile__
         (
             "1:\n\t"
@@ -610,14 +613,14 @@ struct operations< 1u, true > :
             : "b" (v)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
         storage_type original, result;
-        fence_before(order);
+        base_type::fence_before(order);
         __asm__ __volatile__
         (
             "1:\n\t"
@@ -630,7 +633,7 @@ struct operations< 1u, true > :
             : "b" (v)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 };
@@ -639,15 +642,16 @@ struct operations< 1u, true > :
 
 #if defined(BOOST_ATOMIC_DETAIL_PPC_HAS_LHARX_STHCX)
 
-template< bool Signed >
-struct operations< 2u, Signed > :
-    public gcc_ppc_operations_base
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 2u, Signed, Interprocess > :
+    public core_arch_operations_gcc_ppc_base
 {
-    typedef typename make_storage_type< 2u >::type storage_type;
-    typedef typename make_storage_type< 2u >::aligned aligned_storage_type;
+    typedef typename storage_traits< 2u >::type storage_type;
 
     static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 2u;
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 2u;
     static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
+    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -863,23 +867,23 @@ struct operations< 2u, Signed > :
 
     static BOOST_FORCEINLINE void clear(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
     {
-        store(storage, 0, order);
+        store(storage, (storage_type)0, order);
     }
 };
 
 #else // defined(BOOST_ATOMIC_DETAIL_PPC_HAS_LHARX_STHCX)
 
-template< >
-struct operations< 2u, false > :
-    public operations< 4u, false >
+template< bool Interprocess >
+struct core_arch_operations< 2u, false, Interprocess > :
+    public core_arch_operations< 4u, false, Interprocess >
 {
-    typedef operations< 4u, false > base_type;
-    typedef base_type::storage_type storage_type;
+    typedef core_arch_operations< 4u, false, Interprocess > base_type;
+    typedef typename base_type::storage_type storage_type;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
         storage_type original, result;
-        fence_before(order);
+        base_type::fence_before(order);
         __asm__ __volatile__
         (
             "1:\n\t"
@@ -892,14 +896,14 @@ struct operations< 2u, false > :
             : "b" (v)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
         storage_type original, result;
-        fence_before(order);
+        base_type::fence_before(order);
         __asm__ __volatile__
         (
             "1:\n\t"
@@ -912,22 +916,22 @@ struct operations< 2u, false > :
             : "b" (v)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 };
 
-template< >
-struct operations< 2u, true > :
-    public operations< 4u, true >
+template< bool Interprocess >
+struct core_arch_operations< 2u, true, Interprocess > :
+    public core_arch_operations< 4u, true, Interprocess >
 {
-    typedef operations< 4u, true > base_type;
-    typedef base_type::storage_type storage_type;
+    typedef core_arch_operations< 4u, true, Interprocess > base_type;
+    typedef typename base_type::storage_type storage_type;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
         storage_type original, result;
-        fence_before(order);
+        base_type::fence_before(order);
         __asm__ __volatile__
         (
             "1:\n\t"
@@ -940,14 +944,14 @@ struct operations< 2u, true > :
             : "b" (v)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
         storage_type original, result;
-        fence_before(order);
+        base_type::fence_before(order);
         __asm__ __volatile__
         (
             "1:\n\t"
@@ -960,7 +964,7 @@ struct operations< 2u, true > :
             : "b" (v)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 };
@@ -969,15 +973,16 @@ struct operations< 2u, true > :
 
 #if defined(BOOST_ATOMIC_DETAIL_PPC_HAS_LDARX_STDCX)
 
-template< bool Signed >
-struct operations< 8u, Signed > :
-    public gcc_ppc_operations_base
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 8u, Signed, Interprocess > :
+    public core_arch_operations_gcc_ppc_base
 {
-    typedef typename make_storage_type< 8u >::type storage_type;
-    typedef typename make_storage_type< 8u >::aligned aligned_storage_type;
+    typedef typename storage_traits< 8u >::type storage_type;
 
     static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 8u;
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 8u;
     static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
+    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -1193,40 +1198,16 @@ struct operations< 8u, Signed > :
 
     static BOOST_FORCEINLINE void clear(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
     {
-        store(storage, 0, order);
+        store(storage, (storage_type)0, order);
     }
 };
 
 #endif // defined(BOOST_ATOMIC_DETAIL_PPC_HAS_LDARX_STDCX)
 
-
-BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
-{
-    if (order != memory_order_relaxed)
-    {
-#if defined(__powerpc64__) || defined(__PPC64__)
-        if (order != memory_order_seq_cst)
-            __asm__ __volatile__ ("lwsync" ::: "memory");
-        else
-            __asm__ __volatile__ ("sync" ::: "memory");
-#else
-        __asm__ __volatile__ ("sync" ::: "memory");
-#endif
-    }
-}
-
-BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
-{
-    if (order != memory_order_relaxed)
-#if defined(__ibmxl__) || defined(__IBMCPP__)
-        __fence();
-#else
-        __asm__ __volatile__ ("" ::: "memory");
-#endif
-}
-
 } // namespace detail
 } // namespace atomics
 } // namespace boost
 
-#endif // BOOST_ATOMIC_DETAIL_OPS_GCC_PPC_HPP_INCLUDED_
+#include <boost/atomic/detail/footer.hpp>
+
+#endif // BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/{ops_gcc_sparc.hpp → core_arch_ops_gcc_sparc.hpp}

@@ -8,22 +8,23 @@
  * Copyright (c) 2014 Andrey Semashev
  */
 /*!
- * \file   atomic/detail/ops_gcc_sparc.hpp
+ * \file   atomic/detail/core_arch_ops_gcc_sparc.hpp
  *
- * This header contains implementation of the \c operations template.
+ * This header contains implementation of the \c core_arch_operations template.
  */
 
-#ifndef BOOST_ATOMIC_DETAIL_OPS_GCC_SPARC_HPP_INCLUDED_
-#define BOOST_ATOMIC_DETAIL_OPS_GCC_SPARC_HPP_INCLUDED_
+#ifndef BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_
+#define BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_
 
 #include <cstddef>
 #include <boost/memory_order.hpp>
 #include <boost/atomic/detail/config.hpp>
-#include <boost/atomic/detail/storage_type.hpp>
-#include <boost/atomic/detail/operations_fwd.hpp>
-#include <boost/atomic/capabilities.hpp>
-#include <boost/atomic/detail/ops_cas_based.hpp>
-#include <boost/atomic/detail/ops_extending_cas_based.hpp>
+#include <boost/atomic/detail/storage_traits.hpp>
+#include <boost/atomic/detail/core_arch_operations_fwd.hpp>
+#include <boost/atomic/detail/core_ops_cas_based.hpp>
+#include <boost/atomic/detail/cas_based_exchange.hpp>
+#include <boost/atomic/detail/extending_cas_based_arithmetic.hpp>
+#include <boost/atomic/detail/header.hpp>
 
 #ifdef BOOST_HAS_PRAGMA_ONCE
 #pragma once
@@ -61,15 +62,16 @@ struct gcc_sparc_cas_base
     }
 };
 
-template< bool Signed >
+template< bool Signed, bool Interprocess >
 struct gcc_sparc_cas32 :
     public gcc_sparc_cas_base
 {
-    typedef typename make_storage_type< 4u >::type storage_type;
-    typedef typename make_storage_type< 4u >::aligned aligned_storage_type;
+    typedef typename storage_traits< 4u >::type storage_type;
 
     static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 4u;
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 4u;
     static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
+    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -127,33 +129,34 @@ struct gcc_sparc_cas32 :
     }
 };
 
-template< bool Signed >
-struct operations< 4u, Signed > :
-    public cas_based_operations< gcc_sparc_cas32< Signed > >
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 4u, Signed, Interprocess > :
+    public core_operations_cas_based< gcc_sparc_cas32< Signed, Interprocess > >
 {
 };
 
-template< bool Signed >
-struct operations< 1u, Signed > :
-    public extending_cas_based_operations< operations< 4u, Signed >, 1u, Signed >
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 1u, Signed, Interprocess > :
+    public extending_cas_based_arithmetic< core_arch_operations< 4u, Signed, Interprocess >, 1u, Signed >
 {
 };
 
-template< bool Signed >
-struct operations< 2u, Signed > :
-    public extending_cas_based_operations< operations< 4u, Signed >, 2u, Signed >
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 2u, Signed, Interprocess > :
+    public extending_cas_based_arithmetic< core_arch_operations< 4u, Signed, Interprocess >, 2u, Signed >
 {
 };
 
-template< bool Signed >
+template< bool Signed, bool Interprocess >
 struct gcc_sparc_cas64 :
     public gcc_sparc_cas_base
 {
-    typedef typename make_storage_type< 8u >::type storage_type;
-    typedef typename make_storage_type< 8u >::aligned aligned_storage_type;
+    typedef typename storage_traits< 8u >::type storage_type;
 
     static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 8u;
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 8u;
     static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
+    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -197,44 +200,16 @@ struct gcc_sparc_cas64 :
     }
 };
 
-template< bool Signed >
-struct operations< 8u, Signed > :
-    public cas_based_operations< cas_based_exchange< gcc_sparc_cas64< Signed > > >
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 8u, Signed, Interprocess > :
+    public core_operations_cas_based< cas_based_exchange< gcc_sparc_cas64< Signed, Interprocess > > >
 {
 };
 
-
-BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
-{
-    switch (order)
-    {
-    case memory_order_release:
-        __asm__ __volatile__ ("membar #StoreStore | #LoadStore" ::: "memory");
-        break;
-    case memory_order_consume:
-    case memory_order_acquire:
-        __asm__ __volatile__ ("membar #LoadLoad | #LoadStore" ::: "memory");
-        break;
-    case memory_order_acq_rel:
-        __asm__ __volatile__ ("membar #LoadLoad | #LoadStore | #StoreStore" ::: "memory");
-        break;
-    case memory_order_seq_cst:
-        __asm__ __volatile__ ("membar #Sync" ::: "memory");
-        break;
-    case memory_order_relaxed:
-    default:
-        break;
-    }
-}
-
-BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
-{
-    if (order != memory_order_relaxed)
-        __asm__ __volatile__ ("" ::: "memory");
-}
-
 } // namespace detail
 } // namespace atomics
 } // namespace boost
 
-#endif // BOOST_ATOMIC_DETAIL_OPS_GCC_SPARC_HPP_INCLUDED_
+#include <boost/atomic/detail/footer.hpp>
+
+#endif // BOOST_ATOMIC_DETAIL_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_