passenger 6.0.7 → 6.0.8

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/{ops_gcc_arm.hpp → core_arch_ops_gcc_arm.hpp}

@@ -5,26 +5,28 @@
  *
  * Copyright (c) 2009 Helge Bahmann
  * Copyright (c) 2013 Tim Blechmann
- * Copyright (c) 2014 Andrey Semashev
+ * Copyright (c) 2014, 2020 Andrey Semashev
  */
 /*!
- * \file   atomic/detail/ops_gcc_arm.hpp
+ * \file   atomic/detail/core_arch_ops_gcc_arm.hpp
  *
- * This header contains implementation of the \c operations template.
+ * This header contains implementation of the \c core_arch_operations template.
  */
 
-#ifndef BOOST_ATOMIC_DETAIL_OPS_GCC_ARM_HPP_INCLUDED_
-#define BOOST_ATOMIC_DETAIL_OPS_GCC_ARM_HPP_INCLUDED_
+#ifndef BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_ARM_HPP_INCLUDED_
+#define BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_ARM_HPP_INCLUDED_
 
 #include <cstddef>
 #include <boost/cstdint.hpp>
 #include <boost/memory_order.hpp>
 #include <boost/atomic/detail/config.hpp>
-#include <boost/atomic/detail/storage_type.hpp>
-#include <boost/atomic/detail/integral_extend.hpp>
-#include <boost/atomic/detail/operations_fwd.hpp>
+#include <boost/atomic/detail/storage_traits.hpp>
+#include <boost/atomic/detail/integral_conversions.hpp>
+#include <boost/atomic/detail/core_arch_operations_fwd.hpp>
 #include <boost/atomic/detail/ops_gcc_arm_common.hpp>
-#include <boost/atomic/capabilities.hpp>
+#include <boost/atomic/detail/gcc_arm_asm_common.hpp>
+#include <boost/atomic/detail/capabilities.hpp>
+#include <boost/atomic/detail/header.hpp>
 
 #ifdef BOOST_HAS_PRAGMA_ONCE
 #pragma once
@@ -53,18 +55,17 @@ namespace detail {
 // LDREXH, LDREXB, STREXH and STREXB.
 // There are also double-word versions, LDREXD and STREXD.
 // (Actually it looks like these are available from version 6k onwards.)
-// FIXME these are not yet used; should be mostly a matter of copy-and-paste.
-// I think you can supply an immediate offset to the address.
 
-template< bool Signed >
-struct operations< 4u, Signed > :
-    public gcc_arm_operations_base
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 4u, Signed, Interprocess > :
+    public core_arch_operations_gcc_arm_base
 {
-    typedef typename make_storage_type< 4u >::type storage_type;
-    typedef typename make_storage_type< 4u >::aligned aligned_storage_type;
+    typedef typename storage_traits< 4u >::type storage_type;
 
     static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 4u;
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 4u;
     static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
+    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -82,17 +83,17 @@ struct operations< 4u, Signed > :
 
     static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        storage_type original;
         fence_before(order);
+        storage_type original;
         uint32_t tmp;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex %[original], %[storage]\n"          // load the original value
-            "strex %[tmp], %[value], %[storage]\n"     // store the replacement, tmp = store failed
-            "teq   %[tmp], #0\n"                       // check if store succeeded
-            "bne   1b\n"
+            "1:\n\t"
+            "ldrex %[original], %[storage]\n\t"          // load the original value
+            "strex %[tmp], %[value], %[storage]\n\t"     // store the replacement, tmp = store failed
+            "teq   %[tmp], #0\n\t"                       // check if store succeeded
+            "bne   1b\n\t"
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [tmp] "=&l" (tmp), [original] "=&r" (original), [storage] "+Q" (storage)
             : [value] "r" (v)
@@ -106,25 +107,28 @@ struct operations< 4u, Signed > :
         storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
     {
         fence_before(success_order);
-        uint32_t success;
+        bool success = false;
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
         uint32_t tmp;
+#endif
         storage_type original;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "mov     %[success], #0\n"                      // success = 0
-            "ldrex   %[original], %[storage]\n"             // original = *(&storage)
-            "cmp     %[original], %[expected]\n"            // flags = original==expected
-            "itt     eq\n"                                  // [hint that the following 2 instructions are conditional on flags.equal]
-            "strexeq %[success], %[desired], %[storage]\n"  // if (flags.equal) *(&storage) = desired, success = store failed
-            "eoreq   %[success], %[success], #1\n"          // if (flags.equal) success ^= 1 (i.e. make it 1 if store succeeded)
+            "ldrex   %[original], %[storage]\n\t"             // original = *(&storage)
+            "cmp     %[original], %[expected]\n\t"            // flags = original==expected
+            "itt     eq\n\t"                                  // [hint that the following 2 instructions are conditional on flags.equal]
+            "strexeq %[success], %[desired], %[storage]\n\t"  // if (flags.equal) *(&storage) = desired, success = store failed
+            "eoreq   %[success], %[success], #1\n\t"          // if (flags.equal) success ^= 1 (i.e. make it 1 if store succeeded)
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
-            : [original] "=&r" (original),  // %0
-              [success] "=&r" (success),    // %1
-              [tmp] "=&l" (tmp),            // %2
-              [storage] "+Q" (storage)      // %3
-            : [expected] "Ir" (expected),   // %4
-              [desired] "r" (desired)       // %5
+            : [original] "=&r" (original),
+              [success] "+r" (success),
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
+              [tmp] "=&l" (tmp),
+#endif
+              [storage] "+Q" (storage)
+            : [expected] "Ir" (expected),
+              [desired] "r" (desired)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         if (success)
@@ -132,35 +136,38 @@ struct operations< 4u, Signed > :
         else
             fence_after(failure_order);
         expected = original;
-        return !!success;
+        return success;
     }
 
     static BOOST_FORCEINLINE bool compare_exchange_strong(
         storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
     {
         fence_before(success_order);
-        uint32_t success;
+        bool success = false;
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
         uint32_t tmp;
+#endif
         storage_type original;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "mov     %[success], #0\n"                      // success = 0
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"             // original = *(&storage)
-            "cmp     %[original], %[expected]\n"            // flags = original==expected
-            "bne     2f\n"                                  // if (!flags.equal) goto end
-            "strex   %[success], %[desired], %[storage]\n"  // *(&storage) = desired, success = store failed
-            "eors    %[success], %[success], #1\n"          // success ^= 1 (i.e. make it 1 if store succeeded); flags.equal = success == 0
-            "beq     1b\n"                                  // if (flags.equal) goto retry
-            "2:\n"
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"             // original = *(&storage)
+            "cmp     %[original], %[expected]\n\t"            // flags = original==expected
+            "bne     2f\n\t"                                  // if (!flags.equal) goto end
+            "strex   %[success], %[desired], %[storage]\n\t"  // *(&storage) = desired, success = store failed
+            "eors    %[success], %[success], #1\n\t"          // success ^= 1 (i.e. make it 1 if store succeeded); flags.equal = success == 0
+            "beq     1b\n\t"                                  // if (flags.equal) goto retry
+            "2:\n\t"
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
-            : [original] "=&r" (original),  // %0
-              [success] "=&r" (success),    // %1
-              [tmp] "=&l" (tmp),            // %2
-              [storage] "+Q" (storage)      // %3
-            : [expected] "Ir" (expected),   // %4
-              [desired] "r" (desired)       // %5
+            : [original] "=&r" (original),
+              [success] "+r" (success),
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
+              [tmp] "=&l" (tmp),
+#endif
+              [storage] "+Q" (storage)
+            : [expected] "Ir" (expected),
+              [desired] "r" (desired)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         if (success)
@@ -168,7 +175,7 @@ struct operations< 4u, Signed > :
         else
             fence_after(failure_order);
         expected = original;
-        return !!success;
+        return success;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
@@ -179,12 +186,12 @@ struct operations< 4u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "add     %[result], %[original], %[value]\n"  // result = original + value
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "add     %[result], %[original], %[value]\n\t"  // result = original + value
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -205,12 +212,12 @@ struct operations< 4u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "sub     %[result], %[original], %[value]\n"  // result = original - value
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "sub     %[result], %[original], %[value]\n\t"  // result = original - value
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -231,12 +238,12 @@ struct operations< 4u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "and     %[result], %[original], %[value]\n"  // result = original & value
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "and     %[result], %[original], %[value]\n\t"  // result = original & value
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -257,12 +264,12 @@ struct operations< 4u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "orr     %[result], %[original], %[value]\n"  // result = original | value
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "orr     %[result], %[original], %[value]\n\t"  // result = original | value
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -283,12 +290,12 @@ struct operations< 4u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "eor     %[result], %[original], %[value]\n"  // result = original ^ value
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "eor     %[result], %[original], %[value]\n\t"  // result = original ^ value
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -308,22 +315,23 @@ struct operations< 4u, Signed > :
 
     static BOOST_FORCEINLINE void clear(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
     {
-        store(storage, 0, order);
+        store(storage, (storage_type)0, order);
     }
 };
 
 #if defined(BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXB_STREXB)
 
-template< bool Signed >
-struct operations< 1u, Signed > :
-    public gcc_arm_operations_base
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 1u, Signed, Interprocess > :
+    public core_arch_operations_gcc_arm_base
 {
-    typedef typename make_storage_type< 1u >::type storage_type;
-    typedef typename make_storage_type< 1u >::aligned aligned_storage_type;
-    typedef typename make_storage_type< 4u >::type extended_storage_type;
+    typedef typename storage_traits< 1u >::type storage_type;
+    typedef typename storage_traits< 4u >::type extended_storage_type;
 
     static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 1u;
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 1u;
     static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
+    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -341,17 +349,17 @@ struct operations< 1u, Signed > :
 
     static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        extended_storage_type original;
         fence_before(order);
+        extended_storage_type original;
         uint32_t tmp;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexb %[original], %[storage]\n"          // load the original value and zero-extend to 32 bits
-            "strexb %[tmp], %[value], %[storage]\n"     // store the replacement, tmp = store failed
-            "teq    %[tmp], #0\n"                       // check if store succeeded
-            "bne    1b\n"
+            "1:\n\t"
+            "ldrexb %[original], %[storage]\n\t"          // load the original value and zero-extend to 32 bits
+            "strexb %[tmp], %[value], %[storage]\n\t"     // store the replacement, tmp = store failed
+            "teq    %[tmp], #0\n\t"                       // check if store succeeded
+            "bne    1b\n\t"
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [tmp] "=&l" (tmp), [original] "=&r" (original), [storage] "+Q" (storage)
             : [value] "r" (v)
@@ -365,25 +373,28 @@ struct operations< 1u, Signed > :
         storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
     {
         fence_before(success_order);
-        uint32_t success;
+        bool success = false;
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
         uint32_t tmp;
+#endif
         extended_storage_type original;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "mov      %[success], #0\n"                      // success = 0
-            "ldrexb   %[original], %[storage]\n"             // original = zero_extend(*(&storage))
-            "cmp      %[original], %[expected]\n"            // flags = original==expected
-            "itt      eq\n"                                  // [hint that the following 2 instructions are conditional on flags.equal]
-            "strexbeq %[success], %[desired], %[storage]\n"  // if (flags.equal) *(&storage) = desired, success = store failed
-            "eoreq    %[success], %[success], #1\n"          // if (flags.equal) success ^= 1 (i.e. make it 1 if store succeeded)
+            "ldrexb   %[original], %[storage]\n\t"             // original = zero_extend(*(&storage))
+            "cmp      %[original], %[expected]\n\t"            // flags = original==expected
+            "itt      eq\n\t"                                  // [hint that the following 2 instructions are conditional on flags.equal]
+            "strexbeq %[success], %[desired], %[storage]\n\t"  // if (flags.equal) *(&storage) = desired, success = store failed
+            "eoreq    %[success], %[success], #1\n\t"          // if (flags.equal) success ^= 1 (i.e. make it 1 if store succeeded)
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
-            : [original] "=&r" (original),  // %0
-              [success] "=&r" (success),    // %1
-              [tmp] "=&l" (tmp),            // %2
-              [storage] "+Q" (storage)      // %3
-            : [expected] "Ir" (atomics::detail::zero_extend< extended_storage_type >(expected)),   // %4
-              [desired] "r" (desired)       // %5
+            : [original] "=&r" (original),
+              [success] "+r" (success),
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
+              [tmp] "=&l" (tmp),
+#endif
+              [storage] "+Q" (storage)
+            : [expected] "Ir" (atomics::detail::zero_extend< extended_storage_type >(expected)),
+              [desired] "r" (desired)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         if (success)
@@ -391,35 +402,38 @@ struct operations< 1u, Signed > :
         else
             fence_after(failure_order);
         expected = static_cast< storage_type >(original);
-        return !!success;
+        return success;
     }
 
     static BOOST_FORCEINLINE bool compare_exchange_strong(
         storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
     {
         fence_before(success_order);
-        uint32_t success;
+        bool success = false;
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
         uint32_t tmp;
+#endif
         extended_storage_type original;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "mov      %[success], #0\n"                      // success = 0
-            "1:\n"
-            "ldrexb   %[original], %[storage]\n"             // original = zero_extend(*(&storage))
-            "cmp      %[original], %[expected]\n"            // flags = original==expected
-            "bne      2f\n"                                  // if (!flags.equal) goto end
-            "strexb   %[success], %[desired], %[storage]\n"  // *(&storage) = desired, success = store failed
-            "eors     %[success], %[success], #1\n"          // success ^= 1 (i.e. make it 1 if store succeeded); flags.equal = success == 0
-            "beq      1b\n"                                  // if (flags.equal) goto retry
-            "2:\n"
+            "1:\n\t"
+            "ldrexb   %[original], %[storage]\n\t"             // original = zero_extend(*(&storage))
+            "cmp      %[original], %[expected]\n\t"            // flags = original==expected
+            "bne      2f\n\t"                                  // if (!flags.equal) goto end
+            "strexb   %[success], %[desired], %[storage]\n\t"  // *(&storage) = desired, success = store failed
+            "eors     %[success], %[success], #1\n\t"          // success ^= 1 (i.e. make it 1 if store succeeded); flags.equal = success == 0
+            "beq      1b\n\t"                                  // if (flags.equal) goto retry
+            "2:\n\t"
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
-            : [original] "=&r" (original),  // %0
-              [success] "=&r" (success),    // %1
-              [tmp] "=&l" (tmp),            // %2
-              [storage] "+Q" (storage)      // %3
-            : [expected] "Ir" (atomics::detail::zero_extend< extended_storage_type >(expected)),   // %4
-              [desired] "r" (desired)       // %5
+            : [original] "=&r" (original),
+              [success] "+r" (success),
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
+              [tmp] "=&l" (tmp),
+#endif
+              [storage] "+Q" (storage)
+            : [expected] "Ir" (atomics::detail::zero_extend< extended_storage_type >(expected)),
+              [desired] "r" (desired)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         if (success)
@@ -427,7 +441,7 @@ struct operations< 1u, Signed > :
         else
             fence_after(failure_order);
         expected = static_cast< storage_type >(original);
-        return !!success;
+        return success;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
@@ -438,12 +452,12 @@ struct operations< 1u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexb   %[original], %[storage]\n"           // original = zero_extend(*(&storage))
-            "add      %[result], %[original], %[value]\n"  // result = original + value
-            "strexb   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq      %[tmp], #0\n"                        // flags = tmp==0
-            "bne      1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexb   %[original], %[storage]\n\t"           // original = zero_extend(*(&storage))
+            "add      %[result], %[original], %[value]\n\t"  // result = original + value
+            "strexb   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq      %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne      1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -464,12 +478,12 @@ struct operations< 1u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexb   %[original], %[storage]\n"           // original = zero_extend(*(&storage))
-            "sub      %[result], %[original], %[value]\n"  // result = original - value
-            "strexb   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq      %[tmp], #0\n"                        // flags = tmp==0
-            "bne      1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexb   %[original], %[storage]\n\t"           // original = zero_extend(*(&storage))
+            "sub      %[result], %[original], %[value]\n\t"  // result = original - value
+            "strexb   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq      %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne      1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -490,12 +504,12 @@ struct operations< 1u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexb   %[original], %[storage]\n"           // original = zero_extend(*(&storage))
-            "and      %[result], %[original], %[value]\n"  // result = original & value
-            "strexb   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq      %[tmp], #0\n"                        // flags = tmp==0
-            "bne      1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexb   %[original], %[storage]\n\t"           // original = zero_extend(*(&storage))
+            "and      %[result], %[original], %[value]\n\t"  // result = original & value
+            "strexb   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq      %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne      1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -516,12 +530,12 @@ struct operations< 1u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexb   %[original], %[storage]\n"           // original = zero_extend(*(&storage))
-            "orr      %[result], %[original], %[value]\n"  // result = original | value
-            "strexb   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq      %[tmp], #0\n"                        // flags = tmp==0
-            "bne      1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexb   %[original], %[storage]\n\t"           // original = zero_extend(*(&storage))
+            "orr      %[result], %[original], %[value]\n\t"  // result = original | value
+            "strexb   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq      %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne      1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -542,12 +556,12 @@ struct operations< 1u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexb   %[original], %[storage]\n"           // original = zero_extend(*(&storage))
-            "eor      %[result], %[original], %[value]\n"  // result = original ^ value
-            "strexb   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq      %[tmp], #0\n"                        // flags = tmp==0
-            "bne      1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexb   %[original], %[storage]\n\t"           // original = zero_extend(*(&storage))
+            "eor      %[result], %[original], %[value]\n\t"  // result = original ^ value
+            "strexb   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq      %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne      1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -567,34 +581,34 @@ struct operations< 1u, Signed > :
 
     static BOOST_FORCEINLINE void clear(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
     {
-        store(storage, 0, order);
+        store(storage, (storage_type)0, order);
     }
 };
 
 #else // defined(BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXB_STREXB)
 
-template< >
-struct operations< 1u, false > :
-    public operations< 4u, false >
+template< bool Interprocess >
+struct core_arch_operations< 1u, false, Interprocess > :
+    public core_arch_operations< 4u, false, Interprocess >
 {
-    typedef operations< 4u, false > base_type;
-    typedef base_type::storage_type storage_type;
+    typedef core_arch_operations< 4u, false, Interprocess > base_type;
+    typedef typename base_type::storage_type storage_type;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        fence_before(order);
+        base_type::fence_before(order);
         uint32_t tmp;
         storage_type original, result;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "add     %[result], %[original], %[value]\n"  // result = original + value
-            "uxtb    %[result], %[result]\n"              // zero extend result from 8 to 32 bits
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "add     %[result], %[original], %[value]\n\t"  // result = original + value
+            "uxtb    %[result], %[result]\n\t"              // zero extend result from 8 to 32 bits
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -603,25 +617,25 @@ struct operations< 1u, false > :
             : [value] "Ir" (v)              // %4
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        fence_before(order);
+        base_type::fence_before(order);
         uint32_t tmp;
         storage_type original, result;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "sub     %[result], %[original], %[value]\n"  // result = original - value
-            "uxtb    %[result], %[result]\n"              // zero extend result from 8 to 32 bits
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "sub     %[result], %[original], %[value]\n\t"  // result = original - value
+            "uxtb    %[result], %[result]\n\t"              // zero extend result from 8 to 32 bits
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -630,33 +644,33 @@ struct operations< 1u, false > :
             : [value] "Ir" (v)              // %4
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 };
 
-template< >
-struct operations< 1u, true > :
-    public operations< 4u, true >
+template< bool Interprocess >
+struct core_arch_operations< 1u, true, Interprocess > :
+    public core_arch_operations< 4u, true, Interprocess >
 {
-    typedef operations< 4u, true > base_type;
-    typedef base_type::storage_type storage_type;
+    typedef core_arch_operations< 4u, true, Interprocess > base_type;
+    typedef typename base_type::storage_type storage_type;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        fence_before(order);
+        base_type::fence_before(order);
         uint32_t tmp;
         storage_type original, result;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "add     %[result], %[original], %[value]\n"  // result = original + value
-            "sxtb    %[result], %[result]\n"              // sign extend result from 8 to 32 bits
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "add     %[result], %[original], %[value]\n\t"  // result = original + value
+            "sxtb    %[result], %[result]\n\t"              // sign extend result from 8 to 32 bits
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -665,25 +679,25 @@ struct operations< 1u, true > :
             : [value] "Ir" (v)              // %4
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        fence_before(order);
+        base_type::fence_before(order);
         uint32_t tmp;
         storage_type original, result;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "sub     %[result], %[original], %[value]\n"  // result = original - value
-            "sxtb    %[result], %[result]\n"              // sign extend result from 8 to 32 bits
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "sub     %[result], %[original], %[value]\n\t"  // result = original - value
+            "sxtb    %[result], %[result]\n\t"              // sign extend result from 8 to 32 bits
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -692,7 +706,7 @@ struct operations< 1u, true > :
             : [value] "Ir" (v)              // %4
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 };
@@ -701,16 +715,17 @@ struct operations< 1u, true > :
 
 #if defined(BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXH_STREXH)
 
-template< bool Signed >
-struct operations< 2u, Signed > :
-    public gcc_arm_operations_base
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 2u, Signed, Interprocess > :
+    public core_arch_operations_gcc_arm_base
 {
-    typedef typename make_storage_type< 2u >::type storage_type;
-    typedef typename make_storage_type< 2u >::aligned aligned_storage_type;
-    typedef typename make_storage_type< 4u >::type extended_storage_type;
+    typedef typename storage_traits< 2u >::type storage_type;
+    typedef typename storage_traits< 4u >::type extended_storage_type;
 
     static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 2u;
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 2u;
     static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
+    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -728,17 +743,17 @@ struct operations< 2u, Signed > :
 
     static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        extended_storage_type original;
         fence_before(order);
+        extended_storage_type original;
         uint32_t tmp;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexh %[original], %[storage]\n"          // load the original value and zero-extend to 32 bits
-            "strexh %[tmp], %[value], %[storage]\n"     // store the replacement, tmp = store failed
-            "teq    %[tmp], #0\n"                       // check if store succeeded
-            "bne    1b\n"
+            "1:\n\t"
+            "ldrexh %[original], %[storage]\n\t"          // load the original value and zero-extend to 32 bits
+            "strexh %[tmp], %[value], %[storage]\n\t"     // store the replacement, tmp = store failed
+            "teq    %[tmp], #0\n\t"                       // check if store succeeded
+            "bne    1b\n\t"
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [tmp] "=&l" (tmp), [original] "=&r" (original), [storage] "+Q" (storage)
             : [value] "r" (v)
@@ -752,25 +767,28 @@ struct operations< 2u, Signed > :
         storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
     {
         fence_before(success_order);
-        uint32_t success;
+        bool success = false;
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
         uint32_t tmp;
+#endif
         extended_storage_type original;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "mov      %[success], #0\n"                      // success = 0
-            "ldrexh   %[original], %[storage]\n"             // original = zero_extend(*(&storage))
-            "cmp      %[original], %[expected]\n"            // flags = original==expected
-            "itt      eq\n"                                  // [hint that the following 2 instructions are conditional on flags.equal]
-            "strexheq %[success], %[desired], %[storage]\n"  // if (flags.equal) *(&storage) = desired, success = store failed
-            "eoreq    %[success], %[success], #1\n"          // if (flags.equal) success ^= 1 (i.e. make it 1 if store succeeded)
+            "ldrexh   %[original], %[storage]\n\t"             // original = zero_extend(*(&storage))
+            "cmp      %[original], %[expected]\n\t"            // flags = original==expected
+            "itt      eq\n\t"                                  // [hint that the following 2 instructions are conditional on flags.equal]
+            "strexheq %[success], %[desired], %[storage]\n\t"  // if (flags.equal) *(&storage) = desired, success = store failed
+            "eoreq    %[success], %[success], #1\n\t"          // if (flags.equal) success ^= 1 (i.e. make it 1 if store succeeded)
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
-            : [original] "=&r" (original),  // %0
-              [success] "=&r" (success),    // %1
-              [tmp] "=&l" (tmp),            // %2
-              [storage] "+Q" (storage)      // %3
-            : [expected] "Ir" (atomics::detail::zero_extend< extended_storage_type >(expected)),   // %4
-              [desired] "r" (desired)       // %5
+            : [original] "=&r" (original),
+              [success] "+r" (success),
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
+              [tmp] "=&l" (tmp),
+#endif
+              [storage] "+Q" (storage)
+            : [expected] "Ir" (atomics::detail::zero_extend< extended_storage_type >(expected)),
+              [desired] "r" (desired)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         if (success)
@@ -778,35 +796,38 @@ struct operations< 2u, Signed > :
         else
             fence_after(failure_order);
         expected = static_cast< storage_type >(original);
-        return !!success;
+        return success;
     }
 
     static BOOST_FORCEINLINE bool compare_exchange_strong(
         storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
     {
         fence_before(success_order);
-        uint32_t success;
+        bool success = false;
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
         uint32_t tmp;
+#endif
         extended_storage_type original;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "mov      %[success], #0\n"                      // success = 0
-            "1:\n"
-            "ldrexh   %[original], %[storage]\n"             // original = zero_extend(*(&storage))
-            "cmp      %[original], %[expected]\n"            // flags = original==expected
-            "bne      2f\n"                                  // if (!flags.equal) goto end
-            "strexh   %[success], %[desired], %[storage]\n"  // *(&storage) = desired, success = store failed
-            "eors     %[success], %[success], #1\n"          // success ^= 1 (i.e. make it 1 if store succeeded); flags.equal = success == 0
-            "beq      1b\n"                                  // if (flags.equal) goto retry
-            "2:\n"
+            "1:\n\t"
+            "ldrexh   %[original], %[storage]\n\t"             // original = zero_extend(*(&storage))
+            "cmp      %[original], %[expected]\n\t"            // flags = original==expected
+            "bne      2f\n\t"                                  // if (!flags.equal) goto end
+            "strexh   %[success], %[desired], %[storage]\n\t"  // *(&storage) = desired, success = store failed
+            "eors     %[success], %[success], #1\n\t"          // success ^= 1 (i.e. make it 1 if store succeeded); flags.equal = success == 0
+            "beq      1b\n\t"                                  // if (flags.equal) goto retry
+            "2:\n\t"
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
-            : [original] "=&r" (original),  // %0
-              [success] "=&r" (success),    // %1
-              [tmp] "=&l" (tmp),            // %2
-              [storage] "+Q" (storage)      // %3
-            : [expected] "Ir" (atomics::detail::zero_extend< extended_storage_type >(expected)),   // %4
-              [desired] "r" (desired)       // %5
+            : [original] "=&r" (original),
+              [success] "+r" (success),
+#if !defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
+              [tmp] "=&l" (tmp),
+#endif
+              [storage] "+Q" (storage)
+            : [expected] "Ir" (atomics::detail::zero_extend< extended_storage_type >(expected)),
+              [desired] "r" (desired)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         if (success)
@@ -814,7 +835,7 @@ struct operations< 2u, Signed > :
         else
             fence_after(failure_order);
         expected = static_cast< storage_type >(original);
-        return !!success;
+        return success;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
@@ -825,12 +846,12 @@ struct operations< 2u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexh   %[original], %[storage]\n"           // original = zero_extend(*(&storage))
-            "add      %[result], %[original], %[value]\n"  // result = original + value
-            "strexh   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq      %[tmp], #0\n"                        // flags = tmp==0
-            "bne      1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexh   %[original], %[storage]\n\t"           // original = zero_extend(*(&storage))
+            "add      %[result], %[original], %[value]\n\t"  // result = original + value
+            "strexh   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq      %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne      1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -851,12 +872,12 @@ struct operations< 2u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexh   %[original], %[storage]\n"           // original = zero_extend(*(&storage))
-            "sub      %[result], %[original], %[value]\n"  // result = original - value
-            "strexh   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq      %[tmp], #0\n"                        // flags = tmp==0
-            "bne      1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexh   %[original], %[storage]\n\t"           // original = zero_extend(*(&storage))
+            "sub      %[result], %[original], %[value]\n\t"  // result = original - value
+            "strexh   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq      %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne      1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -877,12 +898,12 @@ struct operations< 2u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexh   %[original], %[storage]\n"           // original = zero_extend(*(&storage))
-            "and      %[result], %[original], %[value]\n"  // result = original & value
-            "strexh   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq      %[tmp], #0\n"                        // flags = tmp==0
-            "bne      1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexh   %[original], %[storage]\n\t"           // original = zero_extend(*(&storage))
+            "and      %[result], %[original], %[value]\n\t"  // result = original & value
+            "strexh   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq      %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne      1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -903,12 +924,12 @@ struct operations< 2u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexh   %[original], %[storage]\n"           // original = zero_extend(*(&storage))
-            "orr      %[result], %[original], %[value]\n"  // result = original | value
-            "strexh   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq      %[tmp], #0\n"                        // flags = tmp==0
-            "bne      1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexh   %[original], %[storage]\n\t"           // original = zero_extend(*(&storage))
+            "orr      %[result], %[original], %[value]\n\t"  // result = original | value
+            "strexh   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq      %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne      1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -929,12 +950,12 @@ struct operations< 2u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrexh   %[original], %[storage]\n"           // original = zero_extend(*(&storage))
-            "eor      %[result], %[original], %[value]\n"  // result = original ^ value
-            "strexh   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq      %[tmp], #0\n"                        // flags = tmp==0
-            "bne      1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexh   %[original], %[storage]\n\t"           // original = zero_extend(*(&storage))
+            "eor      %[result], %[original], %[value]\n\t"  // result = original ^ value
+            "strexh   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq      %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne      1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -954,34 +975,34 @@ struct operations< 2u, Signed > :
 
     static BOOST_FORCEINLINE void clear(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
     {
-        store(storage, 0, order);
+        store(storage, (storage_type)0, order);
     }
 };
 
 #else // defined(BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXH_STREXH)
 
-template< >
-struct operations< 2u, false > :
-    public operations< 4u, false >
+template< bool Interprocess >
+struct core_arch_operations< 2u, false, Interprocess > :
+    public core_arch_operations< 4u, false, Interprocess >
 {
-    typedef operations< 4u, false > base_type;
-    typedef base_type::storage_type storage_type;
+    typedef core_arch_operations< 4u, false, Interprocess > base_type;
+    typedef typename base_type::storage_type storage_type;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        fence_before(order);
+        base_type::fence_before(order);
         uint32_t tmp;
         storage_type original, result;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "add     %[result], %[original], %[value]\n"  // result = original + value
-            "uxth    %[result], %[result]\n"              // zero extend result from 16 to 32 bits
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "add     %[result], %[original], %[value]\n\t"  // result = original + value
+            "uxth    %[result], %[result]\n\t"              // zero extend result from 16 to 32 bits
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -990,25 +1011,25 @@ struct operations< 2u, false > :
             : [value] "Ir" (v)              // %4
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        fence_before(order);
+        base_type::fence_before(order);
         uint32_t tmp;
         storage_type original, result;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "sub     %[result], %[original], %[value]\n"  // result = original - value
-            "uxth    %[result], %[result]\n"              // zero extend result from 16 to 32 bits
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "sub     %[result], %[original], %[value]\n\t"  // result = original - value
+            "uxth    %[result], %[result]\n\t"              // zero extend result from 16 to 32 bits
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -1017,33 +1038,33 @@ struct operations< 2u, false > :
             : [value] "Ir" (v)              // %4
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 };
 
-template< >
-struct operations< 2u, true > :
-    public operations< 4u, true >
+template< bool Interprocess >
+struct core_arch_operations< 2u, true, Interprocess > :
+    public core_arch_operations< 4u, true, Interprocess >
 {
-    typedef operations< 4u, true > base_type;
-    typedef base_type::storage_type storage_type;
+    typedef core_arch_operations< 4u, true, Interprocess > base_type;
+    typedef typename base_type::storage_type storage_type;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        fence_before(order);
+        base_type::fence_before(order);
         uint32_t tmp;
         storage_type original, result;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "add     %[result], %[original], %[value]\n"  // result = original + value
-            "sxth    %[result], %[result]\n"              // sign extend result from 16 to 32 bits
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "add     %[result], %[original], %[value]\n\t"  // result = original + value
+            "sxth    %[result], %[result]\n\t"              // sign extend result from 16 to 32 bits
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -1052,25 +1073,25 @@ struct operations< 2u, true > :
             : [value] "Ir" (v)              // %4
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        fence_before(order);
+        base_type::fence_before(order);
         uint32_t tmp;
         storage_type original, result;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%[tmp])
-            "1:\n"
-            "ldrex   %[original], %[storage]\n"           // original = *(&storage)
-            "sub     %[result], %[original], %[value]\n"  // result = original - value
-            "sxth    %[result], %[result]\n"              // sign extend result from 16 to 32 bits
-            "strex   %[tmp], %[result], %[storage]\n"     // *(&storage) = result, tmp = store failed
-            "teq     %[tmp], #0\n"                        // flags = tmp==0
-            "bne     1b\n"                                // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrex   %[original], %[storage]\n\t"           // original = *(&storage)
+            "sub     %[result], %[original], %[value]\n\t"  // result = original - value
+            "sxth    %[result], %[result]\n\t"              // sign extend result from 16 to 32 bits
+            "strex   %[tmp], %[result], %[storage]\n\t"     // *(&storage) = result, tmp = store failed
+            "teq     %[tmp], #0\n\t"                        // flags = tmp==0
+            "bne     1b\n\t"                                // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%[tmp])
             : [original] "=&r" (original),  // %0
               [result] "=&r" (result),      // %1
@@ -1079,7 +1100,7 @@ struct operations< 2u, true > :
             : [value] "Ir" (v)              // %4
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        fence_after(order);
+        base_type::fence_after(order);
         return original;
     }
 };
@@ -1099,15 +1120,16 @@ struct operations< 2u, true > :
 // and the upper half (Rt2) - via the same placeholder with an 'H' after the '%' sign (e.g. %H0).
 // See: http://hardwarebug.org/2010/07/06/arm-inline-asm-secrets/
 
-template< bool Signed >
-struct operations< 8u, Signed > :
-    public gcc_arm_operations_base
+template< bool Signed, bool Interprocess >
+struct core_arch_operations< 8u, Signed, Interprocess > :
+    public core_arch_operations_gcc_arm_base
 {
-    typedef typename make_storage_type< 8u >::type storage_type;
-    typedef typename make_storage_type< 8u >::aligned aligned_storage_type;
+    typedef typename storage_traits< 8u >::type storage_type;
 
     static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 8u;
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 8u;
     static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
+    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -1116,40 +1138,51 @@ struct operations< 8u, Signed > :
 
     static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order order) BOOST_NOEXCEPT
     {
+        // ARMv7 says ldrex (and other load-exclusive instructions) can be used without a matching strex, see
+        // "ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition", Section A3.4.5 "Load-Exclusive and Store-Exclusive usage restrictions".
         storage_type original;
+#if defined(BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED)
+        __asm__ __volatile__
+        (
+            "ldrexd %0, %H0, %1\n\t"
+            : "=&r" (original)   // %0
+            : "Q" (storage)      // %1
+        );
+#else
         uint32_t tmp;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%0)
-            "ldrexd %1, %H1, [%2]\n"
+            "ldrexd %1, %H1, %2\n\t"
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%0)
             : BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(tmp), // %0
               "=&r" (original)   // %1
-            : "r" (&storage)     // %2
+            : "Q" (storage)      // %2
         );
+#endif
         fence_after(order);
         return original;
     }
 
     static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
-        storage_type original;
         fence_before(order);
+        storage_type original;
         uint32_t tmp;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%0)
-            "1:\n"
-            "ldrexd %1, %H1, [%3]\n"        // load the original value
-            "strexd %0, %2, %H2, [%3]\n"    // store the replacement, tmp = store failed
-            "teq    %0, #0\n"               // check if store succeeded
-            "bne    1b\n"
+            "1:\n\t"
+            "ldrexd %1, %H1, %2\n\t"        // load the original value
+            "strexd %0, %3, %H3, %2\n\t"    // store the replacement, tmp = store failed
+            "teq    %0, #0\n\t"               // check if store succeeded
+            "bne    1b\n\t"
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%0)
             : BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(tmp), // %0
-              "=&r" (original)   // %1
-            : "r" (v),           // %2
-              "r" (&storage)     // %3
-            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+              "=&r" (original),  // %1
+              "+Q" (storage)     // %2
+            : "r" (v)            // %3
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         fence_after(order);
         return original;
@@ -1159,74 +1192,72 @@ struct operations< 8u, Signed > :
         storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
     {
         fence_before(success_order);
+        storage_type original;
+        bool success = false;
         uint32_t tmp;
-        storage_type original, old_val = expected;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%0)
-            "ldrexd   %1, %H1, [%3]\n"               // original = *(&storage)
-            "cmp      %1, %2\n"                      // flags = original.lo==old_val.lo
-            "ittt     eq\n"                          // [hint that the following 3 instructions are conditional on flags.equal]
-            "cmpeq    %H1, %H2\n"                    // if (flags.equal) flags = original.hi==old_val.hi
-            "strexdeq %0, %4, %H4, [%3]\n"           // if (flags.equal) *(&storage) = desired, tmp = store failed
-            "teqeq    %0, #0\n"                      // if (flags.equal) flags = tmp==0
-            "ite      eq\n"                          // [hint that the following 2 instructions are conditional on flags.equal]
-            "moveq    %2, #1\n"                      // if (flags.equal) old_val.lo = 1
-            "movne    %2, #0\n"                      // if (!flags.equal) old_val.lo = 0
+            "ldrexd   %1, %H1, %3\n\t"               // original = *(&storage)
+            "cmp      %1, %4\n\t"                    // flags = original.lo==expected.lo
+            "it       eq\n\t"                        // [hint that the following 1 instruction is conditional on flags.equal]
+            "cmpeq    %H1, %H4\n\t"                  // if (flags.equal) flags = original.hi==expected.hi
+            "bne      1f\n\t"
+            "strexd   %2, %5, %H5, %3\n\t"           // *(&storage) = desired, success = store failed
+            "eor      %2, %2, #1\n\t"                // success ^= 1 (i.e. make it 1 if store succeeded)
+            "1:\n\t"
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%0)
             : BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(tmp), // %0
               "=&r" (original),  // %1
-              "+r" (old_val)     // %2
-            : "r" (&storage),    // %3
-              "r" (desired)      // %4
-            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+              "+r" (success),    // %2
+              "+Q" (storage)     // %3
+            : "r" (expected),    // %4
+              "r" (desired)      // %5
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        const uint32_t success = (uint32_t)old_val;
         if (success)
             fence_after(success_order);
         else
             fence_after(failure_order);
         expected = original;
-        return !!success;
+        return success;
     }
 
     static BOOST_FORCEINLINE bool compare_exchange_strong(
         storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
     {
         fence_before(success_order);
+        storage_type original;
+        bool success = false;
         uint32_t tmp;
-        storage_type original, old_val = expected;
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%0)
-            "1:\n"
-            "ldrexd  %1, %H1, [%3]\n"               // original = *(&storage)
-            "cmp     %1, %2\n"                      // flags = original.lo==old_val.lo
-            "it      eq\n"                          // [hint that the following instruction is conditional on flags.equal]
-            "cmpeq   %H1, %H2\n"                    // if (flags.equal) flags = original.hi==old_val.hi
-            "bne     2f\n"                          // if (!flags.equal) goto end
-            "strexd  %0, %4, %H4, [%3]\n"           // *(&storage) = desired, tmp = store failed
-            "teq     %0, #0\n"                      // flags.equal = tmp == 0
-            "bne     1b\n"                          // if (flags.equal) goto retry
-            "2:\n"
-            "ite      eq\n"                         // [hint that the following 2 instructions are conditional on flags.equal]
-            "moveq    %2, #1\n"                     // if (flags.equal) old_val.lo = 1
-            "movne    %2, #0\n"                     // if (!flags.equal) old_val.lo = 0
+            "1:\n\t"
+            "ldrexd   %1, %H1, %3\n\t"               // original = *(&storage)
+            "cmp      %1, %4\n\t"                    // flags = original.lo==expected.lo
+            "it       eq\n\t"                        // [hint that the following 1 instruction is conditional on flags.equal]
+            "cmpeq    %H1, %H4\n\t"                  // if (flags.equal) flags = original.hi==expected.hi
+            "bne      2f\n\t"
+            "strexd   %2, %5, %H5, %3\n\t"           // *(&storage) = desired, success = store failed
+            "eors     %2, %2, #1\n\t"                // success ^= 1 (i.e. make it 1 if store succeeded), flags.equal = success == 0
+            "beq      1b\n\t"                        // if (flags.equal) goto retry
+            "2:\n\t"
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%0)
             : BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(tmp), // %0
               "=&r" (original),  // %1
-              "+r" (old_val)     // %2
-            : "r" (&storage),    // %3
-              "r" (desired)      // %4
-            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+              "+r" (success),    // %2
+              "+Q" (storage)     // %3
+            : "r" (expected),    // %4
+              "r" (desired)      // %5
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
-        const uint32_t success = (uint32_t)old_val;
         if (success)
             fence_after(success_order);
         else
             fence_after(failure_order);
         expected = original;
-        return !!success;
+        return success;
     }
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
@@ -1237,20 +1268,20 @@ struct operations< 8u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%0)
-            "1:\n"
-            "ldrexd  %1, %H1, [%3]\n"               // original = *(&storage)
-            "adds    %2, %1, %4\n"                  // result = original + value
-            "adc     %H2, %H1, %H4\n"
-            "strexd  %0, %2, %H2, [%3]\n"           // *(&storage) = result, tmp = store failed
-            "teq     %0, #0\n"                      // flags = tmp==0
-            "bne     1b\n"                          // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexd  %1, %H1, %3\n\t"                 // original = *(&storage)
+            "adds   " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_LO(2) ", " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_LO(1) ", " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_LO(4) "\n\t" // result = original + value
+            "adc    " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_HI(2) ", " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_HI(1) ", " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_HI(4) "\n\t"
+            "strexd  %0, %2, %H2, %3\n\t"             // *(&storage) = result, tmp = store failed
+            "teq     %0, #0\n\t"                      // flags = tmp==0
+            "bne     1b\n\t"                          // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%0)
             : BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(tmp), // %0
               "=&r" (original),  // %1
-              "=&r" (result)     // %2
-            : "r" (&storage),    // %3
-              "r" (v)            // %4
-            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+              "=&r" (result),    // %2
+              "+Q" (storage)     // %3
+            : "r" (v)            // %4
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         fence_after(order);
         return original;
@@ -1264,20 +1295,20 @@ struct operations< 8u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%0)
-            "1:\n"
-            "ldrexd  %1, %H1, [%3]\n"               // original = *(&storage)
-            "subs    %2, %1, %4\n"                  // result = original - value
-            "sbc     %H2, %H1, %H4\n"
-            "strexd  %0, %2, %H2, [%3]\n"           // *(&storage) = result, tmp = store failed
-            "teq     %0, #0\n"                      // flags = tmp==0
-            "bne     1b\n"                          // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexd  %1, %H1, %3\n\t"                 // original = *(&storage)
+            "subs   " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_LO(2) ", " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_LO(1) ", " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_LO(4) "\n\t" // result = original - value
+            "sbc    " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_HI(2) ", " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_HI(1) ", " BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_HI(4) "\n\t"
+            "strexd  %0, %2, %H2, %3\n\t"             // *(&storage) = result, tmp = store failed
+            "teq     %0, #0\n\t"                      // flags = tmp==0
+            "bne     1b\n\t"                          // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%0)
             : BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(tmp), // %0
               "=&r" (original),  // %1
-              "=&r" (result)     // %2
-            : "r" (&storage),    // %3
-              "r" (v)            // %4
-            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+              "=&r" (result),    // %2
+              "+Q" (storage)     // %3
+            : "r" (v)            // %4
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         fence_after(order);
         return original;
@@ -1291,20 +1322,20 @@ struct operations< 8u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%0)
-            "1:\n"
-            "ldrexd  %1, %H1, [%3]\n"               // original = *(&storage)
-            "and     %2, %1, %4\n"                  // result = original & value
-            "and     %H2, %H1, %H4\n"
-            "strexd  %0, %2, %H2, [%3]\n"           // *(&storage) = result, tmp = store failed
-            "teq     %0, #0\n"                      // flags = tmp==0
-            "bne     1b\n"                          // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexd  %1, %H1, %3\n\t"                 // original = *(&storage)
+            "and     %2, %1, %4\n\t"                  // result = original & value
+            "and     %H2, %H1, %H4\n\t"
+            "strexd  %0, %2, %H2, %3\n\t"             // *(&storage) = result, tmp = store failed
+            "teq     %0, #0\n\t"                      // flags = tmp==0
+            "bne     1b\n\t"                          // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%0)
             : BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(tmp), // %0
               "=&r" (original),  // %1
-              "=&r" (result)     // %2
-            : "r" (&storage),    // %3
-              "r" (v)            // %4
-            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+              "=&r" (result),    // %2
+              "+Q" (storage)     // %3
+            : "r" (v)            // %4
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         fence_after(order);
         return original;
@@ -1318,20 +1349,20 @@ struct operations< 8u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%0)
-            "1:\n"
-            "ldrexd  %1, %H1, [%3]\n"               // original = *(&storage)
-            "orr     %2, %1, %4\n"                  // result = original | value
-            "orr     %H2, %H1, %H4\n"
-            "strexd  %0, %2, %H2, [%3]\n"           // *(&storage) = result, tmp = store failed
-            "teq     %0, #0\n"                      // flags = tmp==0
-            "bne     1b\n"                          // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexd  %1, %H1, %3\n\t"                 // original = *(&storage)
+            "orr     %2, %1, %4\n\t"                  // result = original | value
+            "orr     %H2, %H1, %H4\n\t"
+            "strexd  %0, %2, %H2, %3\n\t"             // *(&storage) = result, tmp = store failed
+            "teq     %0, #0\n\t"                      // flags = tmp==0
+            "bne     1b\n\t"                          // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%0)
             : BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(tmp), // %0
               "=&r" (original),  // %1
-              "=&r" (result)     // %2
-            : "r" (&storage),    // %3
-              "r" (v)            // %4
-            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+              "=&r" (result),    // %2
+              "+Q" (storage)     // %3
+            : "r" (v)            // %4
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         fence_after(order);
         return original;
@@ -1345,20 +1376,20 @@ struct operations< 8u, Signed > :
         __asm__ __volatile__
         (
             BOOST_ATOMIC_DETAIL_ARM_ASM_START(%0)
-            "1:\n"
-            "ldrexd  %1, %H1, [%3]\n"               // original = *(&storage)
-            "eor     %2, %1, %4\n"                  // result = original ^ value
-            "eor     %H2, %H1, %H4\n"
-            "strexd  %0, %2, %H2, [%3]\n"           // *(&storage) = result, tmp = store failed
-            "teq     %0, #0\n"                      // flags = tmp==0
-            "bne     1b\n"                          // if (!flags.equal) goto retry
+            "1:\n\t"
+            "ldrexd  %1, %H1, %3\n\t"                 // original = *(&storage)
+            "eor     %2, %1, %4\n\t"                  // result = original ^ value
+            "eor     %H2, %H1, %H4\n\t"
+            "strexd  %0, %2, %H2, %3\n\t"             // *(&storage) = result, tmp = store failed
+            "teq     %0, #0\n\t"                      // flags = tmp==0
+            "bne     1b\n\t"                          // if (!flags.equal) goto retry
             BOOST_ATOMIC_DETAIL_ARM_ASM_END(%0)
             : BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(tmp), // %0
               "=&r" (original),  // %1
-              "=&r" (result)     // %2
-            : "r" (&storage),    // %3
-              "r" (v)            // %4
-            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+              "=&r" (result),    // %2
+              "+Q" (storage)     // %3
+            : "r" (v)            // %4
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC
         );
         fence_after(order);
         return original;
@@ -1371,27 +1402,16 @@ struct operations< 8u, Signed > :
 
     static BOOST_FORCEINLINE void clear(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
     {
-        store(storage, 0, order);
+        store(storage, (storage_type)0, order);
     }
 };
 
 #endif // defined(BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXD_STREXD)
 
-
-BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
-{
-    if (order != memory_order_relaxed)
-        gcc_arm_operations_base::hardware_full_fence();
-}
-
-BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
-{
-    if (order != memory_order_relaxed)
-        __asm__ __volatile__ ("" ::: "memory");
-}
-
 } // namespace detail
 } // namespace atomics
 } // namespace boost
 
-#endif // BOOST_ATOMIC_DETAIL_OPS_GCC_ARM_HPP_INCLUDED_
+#include <boost/atomic/detail/footer.hpp>
+
+#endif // BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_ARM_HPP_INCLUDED_