origen_sim 0.16.1 → 0.20.0

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@@ -1,7 +1,17 @@
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  %#`include "<%= options[:top] %>"
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+ // To create the big fonts - http://patorjk.com/software/taag/#p=display&f=Big
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+
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  `timescale 1ns/1ns
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+ // _____ _ _ _ _ _____ _ _____ _
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+ // | __ \(_) (_) | | | | __ (_) | __ \ (_)
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+ // | | | |_ __ _ _| |_ __ _| | | |__) | _ __ | | | |_ __ ___ _____ _ __
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+ // | | | | |/ _` | | __/ _` | | | ___/ | '_ \ | | | | '__| \ \ / / _ \ '__|
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+ // | |__| | | (_| | | || (_| | | | | | | | | | | |__| | | | |\ V / __/ |
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+ // |_____/|_|\__, |_|\__\__,_|_| |_| |_|_| |_| |_____/|_| |_| \_/ \___|_|
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+ // __/ |
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+ // |___/
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  // 0 - Data
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  // 1 - Reserved
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  //
@@ -87,21 +97,85 @@ module pin_driver(pin, sync);
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  endmodule
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+
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+ `ifdef ORIGEN_WREAL
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+ // _ _____ _ _____ _
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+ // /\ | | | __ (_) | __ \ (_)
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+ // / \ _ __ __ _| | ___ __ _ | |__) | _ __ | | | |_ __ ___ _____ _ __
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+ // / /\ \ | '_ \ / _` | |/ _ \ / _` | | ___/ | '_ \ | | | | '__| \ \ / / _ \ '__|
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+ // / ____ \| | | | (_| | | (_) | (_| | | | | | | | | | |__| | | | |\ V / __/ |
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+ // /_/ \_\_| |_|\__,_|_|\___/ \__, | |_| |_|_| |_| |_____/|_| |_| \_/ \___|_|
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+ // __/ |
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+ // |___/
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+
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+ // A simple WREAL pin driver that can drive real value on a pin or else hi-Z, when the driver is in
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+ // hi-Z mode the value applied by any other driver connected to the pin can be measured by peeking
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+ // the value on pin
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+ module ana_pin_driver(pin);
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+ inout pin;
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+
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+ wreal pin;
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+
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+ reg drive_en = 0;
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+ real drive = 0.0; // Value that will be driven on pin when drive is enabled
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+
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+ assign pin = drive_en ? drive : `wrealZState;
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+ endmodule
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+ `endif
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+
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+
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+ // _____ _ __ __ _ _
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+ // | __ (_) | \/ | | | | |
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+ // | |__) | _ __ ___ | \ / | ___ __| |_ _| | ___
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+ // | ___/ | '_ \/ __| | |\/| |/ _ \ / _` | | | | |/ _ \
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+ // | | | | | | \__ \ | | | | (_) | (_| | |_| | | __/
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+ // |_| |_|_| |_|___/ |_| |_|\___/ \__,_|\__,_|_|\___|
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+
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+ // This module groups all pin drivers together and will be instantiated as origen.pins, individual pin
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+ // drivers are therefore accessible via origen.pins.my_pin_name
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  module pin_drivers(<%= dut.rtl_pins.map { |n, p, o| "#{p.id}_o" }.join(', ') %>);
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  % dut.rtl_pins.each do |name, pin, options|
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+ % if pin.type == :analog
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+ `ifdef ORIGEN_WREAL
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+ inout <%= pin.id %>_o;
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+ `else
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  output <%= pin.id %>_o;
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+ `endif
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+ % else
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+ output <%= pin.id %>_o;
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+ % end
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  % end
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+ `ifdef ORIGEN_WREAL
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+ % dut.rtl_pins(type: :analog).each do |name, pin, options|
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+ wreal <%= pin.id %>_o;
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+ % end
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+ `endif
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+
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  reg sync = 0;
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  % dut.rtl_pins.each do |name, pin, options|
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+ % if pin.type == :analog
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+ `ifdef ORIGEN_WREAL
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+ ana_pin_driver <%= pin.id %>(.pin(<%= pin.id %>_o));
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+ `else
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  pin_driver #(<%= pin.meta[:origen_sim_init_pin_state].nil? ? '' : ".init_drive(#{pin.meta[:origen_sim_init_pin_state]}), "%>.pin_name("<%= pin.id %>")) <%= pin.id %>(.pin(<%= pin.id %>_o), .sync(sync));
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+ `endif
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+ % else
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+ pin_driver #(<%= pin.meta[:origen_sim_init_pin_state].nil? ? '' : ".init_drive(#{pin.meta[:origen_sim_init_pin_state]}), "%>.pin_name("<%= pin.id %>")) <%= pin.id %>(.pin(<%= pin.id %>_o), .sync(sync));
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+ % end
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  % end
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-
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  endmodule
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+ // __ __ _ _ _
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+ // | \/ | | | | | | |
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+ // | \ / | ___| |_ __ _ __| | __ _| |_ __ _
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+ // | |\/| |/ _ \ __/ _` |/ _` |/ _` | __/ _` |
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+ // | | | | __/ || (_| | (_| | (_| | || (_| |
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+ // |_| |_|\___|\__\__,_|\__,_|\__,_|\__\__,_|
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+
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  // Placeholder for user notes. This will be an empty module if no notes were given
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  module user_details;
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  parameter _AVAILABLE_DETAILS_ = "<%= options[:user_details].empty? ? "" : options[:user_details].keys.join(',') %>";
@@ -132,6 +206,17 @@ module snapshot_details;
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  endmodule
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+ // _____ _
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+ // | __ \ | |
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+ // | | | | ___| |__ _ _ __ _
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+ // | | | |/ _ \ '_ \| | | |/ _` |
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+ // | |__| | __/ |_) | |_| | (_| |
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+ // |_____/ \___|_.__/ \__,_|\__, |
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+ // __/ |
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+ // |___/
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+
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+ // Instantiated as origen.debug, this module contains the error count, current pattern name and comments,
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+ // metadata associated with the snapshot build, and other debug information
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  module debug;
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  reg [31:0] errors = 0;
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  reg [15:0] marker = 0;
@@ -145,15 +230,38 @@ module debug;
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  reg handshake;
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  snapshot_details snapshot_details();
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+
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+ `ifdef ORIGEN_WREAL
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+ reg wreal_enabled = 1;
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+ `else
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+ reg wreal_enabled = 0;
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+ `endif
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  endmodule
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+ // _______ _ _ _______ ____
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+ // |__ __| | | | | |__ __| _ \
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+ // | | ___ _ __ ______| | _____ _____| | | | | |_) |
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+ // | |/ _ \| '_ \______| | / _ \ \ / / _ \ | | | | _ <
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+ // | | (_) | |_) | | |___| __/\ V / __/ | | | | |_) |
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+ // |_|\___/| .__/ |______\___| \_/ \___|_| |_| |____/
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+ // | |
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+ // |_|
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+
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  module origen;
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  reg finish = 0;
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  % dut.rtl_pins.each do |name, pin, options|
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+ % if pin.type == :analog
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+ `ifdef ORIGEN_WREAL
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+ wreal <%= pin.id %>;
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+ `else
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  wire <%= pin.id %>;
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+ `endif
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+ % else
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+ wire <%= pin.id %>;
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+ % end
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  % end
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  pin_drivers pins (
@@ -190,30 +298,24 @@ module origen;
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  debug debug ();
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- `ifdef ORIGEN_VCD
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  initial
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  begin
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+ `ifdef ORIGEN_VCS
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+ $origen_vcs_init;
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+ `endif
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+ `ifdef ORIGEN_VCD
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  $dumpvars(0,origen);
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- end
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  `endif
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-
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  `ifdef ORIGEN_VPD
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- initial
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- begin
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  $vcdplusfile("origen.vpd");
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  $vcdpluson;
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  $vcdplusmemon;
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- end
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  `endif
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-
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  `ifdef ORIGEN_FSDB
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- initial
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- begin
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  $fsdbDumpfile("origen.fsdb");
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  $fsdbDumpvars(0, "+all");
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- end
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  `endif
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-
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+ end
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  always @(posedge finish) begin
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  $finish(2);
metadata CHANGED
@@ -1,14 +1,14 @@
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  --- !ruby/object:Gem::Specification
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  name: origen_sim
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  version: !ruby/object:Gem::Version
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- version: 0.16.1
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+ version: 0.20.0
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  platform: ruby
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  authors:
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  - Stephen McGinty
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  autorequire:
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  bindir: bin
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  cert_chain: []
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- date: 2019-04-25 00:00:00.000000000 Z
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+ date: 2019-05-27 00:00:00.000000000 Z
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  dependencies:
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  - !ruby/object:Gem::Dependency
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  name: origen
@@ -16,42 +16,42 @@ dependencies:
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  requirements:
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  - - ">="
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  - !ruby/object:Gem::Version
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- version: 0.43.0
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+ version: 0.44.0
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  type: :runtime
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  prerelease: false
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  version_requirements: !ruby/object:Gem::Requirement
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  requirements:
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  - - ">="
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  - !ruby/object:Gem::Version
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- version: 0.43.0
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+ version: 0.44.0
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  - !ruby/object:Gem::Dependency
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  name: origen_testers
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  requirement: !ruby/object:Gem::Requirement
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  requirements:
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  - - ">="
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  - !ruby/object:Gem::Version
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- version: '0'
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+ version: 0.21.0
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  type: :runtime
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  prerelease: false
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  version_requirements: !ruby/object:Gem::Requirement
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  requirements:
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  - - ">="
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  - !ruby/object:Gem::Version
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- version: '0'
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+ version: 0.21.0
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  - !ruby/object:Gem::Dependency
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  name: origen_verilog
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  requirement: !ruby/object:Gem::Requirement
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  requirements:
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  - - ">="
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  - !ruby/object:Gem::Version
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- version: 0.5.2
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+ version: 0.6.0
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  type: :runtime
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  prerelease: false
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  version_requirements: !ruby/object:Gem::Requirement
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  requirements:
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  - - ">="
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  - !ruby/object:Gem::Version
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- version: 0.5.2
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+ version: 0.6.0
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  description:
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  email:
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  - stephen.f.mcginty@gmail.com
@@ -73,6 +73,7 @@ files:
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  - ext/defines.h.erb
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  - ext/origen.c
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  - ext/origen.h
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+ - ext/origen_tasks.tab
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  - ext/vpi_user.h
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  - lib/origen_sim.rb
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  - lib/origen_sim/commands/build.rb
@@ -97,6 +98,7 @@ files:
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  - lib/origen_sim_dev/dut.rb
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  - lib/origen_sim_dev/ip.rb
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  - lib/tasks/origen_sim.rake
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+ - pattern/concurrent_ip.rb
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  - pattern/ip1_test.rb
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  - pattern/ip2_test.rb
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  - pattern/test.rb
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  - templates/empty.rc
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  - templates/empty.svcf
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  - templates/empty.tcl
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+ - templates/origen_guides/simulation/ams.md.erb
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  - templates/origen_guides/simulation/app.md.erb
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  - templates/origen_guides/simulation/artifacts.md.erb
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  - templates/origen_guides/simulation/compiling.md.erb
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  - templates/origen_guides/simulation/debugging.md.erb
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+ - templates/origen_guides/simulation/direct.md.erb
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  - templates/origen_guides/simulation/environment.md.erb
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  - templates/origen_guides/simulation/flows.md.erb
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  - templates/origen_guides/simulation/howitworks.md.erb
@@ -143,7 +147,7 @@ required_rubygems_version: !ruby/object:Gem::Requirement
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  version: 1.8.11
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  requirements: []
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  rubyforge_project:
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- rubygems_version: 2.7.6
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+ rubygems_version: 2.7.7
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  signing_key:
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  specification_version: 4
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  summary: Plugin that provides a testbench environment to simulate Origen test patterns