origen_arm_debug 0.10.1 → 1.0.0.pre1

data/lib/origen_arm_debug/sw_dp_controller.rb

@@ -0,0 +1,47 @@
+require 'origen_arm_debug/dp_controller'
+module OrigenARMDebug
+  class SW_DPController
+    include Origen::Controller
+    include Helpers
+    include DPController
+
+    def write_register(reg, options = {})
+      unless reg.writable?
+        fail "The :#{reg.name} register is not writeable!"
+      end
+
+      if reg.owner == model
+        log "Write SW-DP register #{reg.name.to_s.upcase}: #{reg.data.to_hex}" do
+          dut.swd.write_dp(reg)
+        end
+      else
+        unless reg.owner.is_a?(AP)
+          fail 'The SW-DP can only write to DP or AP registers!'
+        end
+
+        select_ap_reg(reg)
+        dut.swd.write_ap(reg, options)
+      end
+    end
+
+    def read_register(reg, options = {})
+      unless reg.readable?
+        fail "The :#{reg.name} register is not readable!"
+      end
+
+      if reg.owner == model
+        log "Read SW-DP register #{reg.name.to_s.upcase}: #{Origen::Utility.read_hex(reg)}" do
+          dut.swd.read_dp(reg)
+        end
+      else
+        unless reg.owner.is_a?(AP)
+          fail 'The SW-DP can only write to DP or AP registers!'
+        end
+
+        select_ap_reg(reg)
+        dut.swd.read_ap(address: reg.address)
+        dut.swd.read_dp(reg, options.merge(address: rdbuff.address))
+      end
+    end
+  end
+end

data/lib/{origen_arm_debug → origen_arm_debug_dev}/dut.rb

@@ -1,4 +1,4 @@
-module OrigenARMDebug
+module OrigenARMDebugDev
   # This is a dummy DUT model which is used
   # to instantiate and test the ARMDebug locally
   # during development.
@@ -11,27 +11,23 @@ module OrigenARMDebug
     # Initializes simple dut model with test register and required jtag/swd pins
     #
     # @example
-    #   $dut = OrigenARMDebug::DUT.new
+    #   $dut = OrigenARMDebugDev::DUT.new
     #
     def initialize
-      add_reg :dap,  0x0, 35, data: { pos: 0, bits: 35 }
+      add_reg :test, 0
 
-      add_reg :test, 0x0, 32, data: { pos: 0, bits: 32 },
-                              bit:  { pos: 0 }
-
-      sub_block :arm_debug, class_name: 'OrigenARMDebug::Driver', aps: { mem_ap: 0x00000000, mdm_ap: 0x01000000 }, latency: 2
-      arm_debug.add_mem_ap('alt_ahbapi', 0x02000000)
-
-      # arm_debug.add_mem_ap('mem_ap', 0x00000000)
-      # arm_debug.add_mem_ap('mdm_ap', 0x01000000)
-      # arm_debug.add_mem_ap('alt_ahbapi', 0x02000000)
+      reg :test2, 0 do |reg|
+        reg.bit 31, :msb
+        reg.bit 30..1, :data
+        reg.bit 0, :lsb
+      end
     end
 
     # Add any custom startup business here.
     #
     # @param [Hash] options Options to customize the operation
     def startup(options)
-      $tester.set_timeset('arm_debug', 40)
+      tester.set_timeset('arm_debug', 40)
     end
 
     # Read data from a register
@@ -39,7 +35,7 @@ module OrigenARMDebug
     # @param [Register] reg Register name or address value
     # @param [Hash] options Options to customize the operation
     def read_register(reg, options = {})
-      arm_debug.read_register(reg, options)
+      arm_debug.mem_ap.read_register(reg, options)
     end
 
     # Write data to a register
@@ -47,7 +43,7 @@ module OrigenARMDebug
     # @param [Register] reg Register name or address value
     # @param [Hash] options Options to customize the operation
     def write_register(reg, options = {})
-      arm_debug.write_register(reg, options)
+      arm_debug.mem_ap.write_register(reg, options)
     end
   end
 end

data/lib/origen_arm_debug_dev/dut_jtag.rb

@@ -0,0 +1,32 @@
+module OrigenARMDebugDev
+  # Simple JTAG-specific dut model that inherits from protocol-agnostic DUT model
+  class JTAG_DUT < DUT
+    include OrigenJTAG
+
+    # Adds jtag-required pins to the simple dut model
+    # Returns nothing.
+    def initialize
+      super
+      add_pin :tclk
+      add_pin :tdi
+      add_pin :tdo
+      add_pin :tms
+      add_pin :trst
+      add_pin :swd_clk
+      add_pin :swd_dio
+
+      # Specify (customize) ARM Debug implementation details
+      sub_block :arm_debug, class_name: 'OrigenARMDebug::DAP',
+                            mem_aps:    {
+                              mem_ap: {
+                                base_address:      0x00000000,
+                                latency:           16,
+                                apreg_access_wait: 8,
+                                apmem_access_wait: 8,
+                                csw_reset:         0x23000040
+                              },
+                              mdm_ap: 0x01000000
+                            }
+    end
+  end
+end

data/lib/{origen_arm_debug → origen_arm_debug_dev}/dut_swd.rb

@@ -1,4 +1,4 @@
-module OrigenARMDebug
+module OrigenARMDebugDev
   # Simple SWD-specific dut model that inherits from protocol-agnostic DUT model
   class SWD_DUT < DUT
     include OrigenSWD
@@ -14,6 +14,12 @@ module OrigenARMDebug
       add_pin :trst
       add_pin :swd_clk
       add_pin :swd_dio
+
+      sub_block :arm_debug, class_name: 'OrigenARMDebug::DAP',
+                            mem_aps:    {
+                              mem_ap: { base_address: 0x00000000, csw_reset: 0x23000042 },
+                              mdm_ap: 0x01000000
+                            }
     end
   end
 end

data/pattern/workout.rb

@@ -0,0 +1,61 @@
+Pattern.create name: "workout_#{dut.arm_debug.dp.name}" do
+
+  ss "Tests of direct DP API"
+  dp = dut.arm_debug.dp
+
+  dp.idcode.partno.read!(0x12)
+
+  dp.ctrlstat.write!(0x50000000)
+  dp.ctrlstat.read!(0xF0000000)
+
+  dp.select.apbanksel.write!(0xF)
+
+  dp.abort.dapabort.write!(1)
+
+  ss "Tests of direct AP API"
+  ap = dut.arm_debug.mem_ap
+
+  ap.tar.write!(0x1234_0000)
+
+  ap.tar.read!
+
+  ss "Tests of high-level register API"
+
+  ss "Test write register, should write value 0xFF01"
+  dut.reg(:test).write!(0x0000FF01)
+
+  ss "Test write register with overlay, no subroutine"
+  dut.reg(:test).overlay('write_overlay')
+  dut.reg(:test).write!(0x0000FF01, no_subr: true)
+  dut.reg(:test).overlay(nil)
+
+  ss "Test write register with overlay, use subroutine if available"
+  dut.reg(:test).overlay('write_overlay_subr')
+  dut.reg(:test).write!(0x0000FF01)
+  dut.reg(:test).overlay(nil)
+
+  ss "Test read register, should read value 0x0000FF01"
+  dut.reg(:test).read!
+ 
+  ss "Test read register, with overlay, no subroutine, should read value 0x0000FF01"
+  dut.reg(:test).overlay('read_overlay')
+  dut.reg(:test).read!(no_subr: true)
+  dut.reg(:test).overlay(nil)
+
+  ss "Test read register, with overlay, use subroutine if available"
+  dut.reg(:test).overlay('read_overlay_subr')
+  dut.reg(:test).read!
+  dut.reg(:test).overlay(nil)
+  
+  ss "Test read register with mask, should read value 0xXXXxxx1"
+  dut.reg(:test).read!(mask: 0x0000_000F)
+
+  ss "Test read register with store"
+  dut.reg(:test).store!
+
+  ss "Test bit level read, should read value 0xXXXxxx1"
+  dut.reg(:test).reset
+  dut.reg(:test).data = 0x0000FF01
+  dut.reg(:test)[0].read!
+
+end

data/templates/web/index.md.erb

@@ -6,7 +6,7 @@
 
 ### Purpose
 
-This library provides register and memory read/write and debug control capability via the ARM debug protocol. 
+This library provides register and memory read/write and debug control capability via the ARM Debug Interface v5 Spec. 
 
 ### How To Import
 
@@ -57,24 +57,36 @@ class DUT
       reg.bits 7..0,  :lower_byte
     end
     
-    sub_block :arm_debug, class_name: "OrigenARMDebug::Driver", aps: { mem_ap: 0x00000000, mdmap: 0x01000000 }                           
+    sub_block :arm_debug, class_name: "OrigenARMDebug::DAP", mem_aps: { mem_ap: 0x00000000, mem2_ap: 0x01000000 }                           
   end
 
   # Hook the ARMDebug module into the register API, any register read
   # requests will use the ARM Debug protocol by default
   def read_register(reg, options={})
-    arm_debug.read_register(reg, options)
+    arm_debug.mem_ap.read_register(reg, options)
   end
 
   # As above for write requests
   def write_register(reg, options={})
-    arm_debug.write_register(reg, options)
+    arm_debug.mem_apwrite_register(reg, options)
   end
 end
 
 DUT.new.myreg.write!(0x55AA)  # => Will generate the required vectors using the ARM debug protocol
 ~~~
 
+You can also access the lower-level API using conventional Origen register transactions:
+
+~~~ruby
+arm_debug.sw_dp.idcode.read!(0x2BA01477)
+arm_debug.sw_dp.ctrlstat.write!(0x5000_0000)  # Power-up
+arm_debug.sw_dp.ctrlstat.read!(0xF0000000)    # Verify
+arm_debug.ahb_ap.idr.read!(0x24770011)
+arm_debug.sw_dp.select.write!(0)              # Select AHB-AP, bank 0       
+
+# Set the SIZE field of CSW to 0x2 (32-bit transfers) + AddrInc=1
+arm_debug.ahb_ap.csw.write!(0x23000052)
+~~~
 
 ### How To Setup a Development Environment
 

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: origen_arm_debug
 version: !ruby/object:Gem::Version
-  version: 0.10.1
+  version: 1.0.0.pre1
 platform: ruby
 authors:
 - Ronnie Lajaunie
 autorequire: 
 bindir: bin
 cert_chain: []
-date: 2016-04-13 00:00:00.000000000 Z
+date: 2017-05-12 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: origen
@@ -17,6 +17,9 @@ dependencies:
     - - "~>"
       - !ruby/object:Gem::Version
         version: '0.7'
+    - - ">="
+      - !ruby/object:Gem::Version
+        version: 0.7.36
   type: :runtime
   prerelease: false
   version_requirements: !ruby/object:Gem::Requirement
@@ -24,62 +27,43 @@ dependencies:
     - - "~>"
       - !ruby/object:Gem::Version
         version: '0.7'
+    - - ">="
+      - !ruby/object:Gem::Version
+        version: 0.7.36
 - !ruby/object:Gem::Dependency
   name: origen_jtag
   requirement: !ruby/object:Gem::Requirement
     requirements:
     - - ">="
       - !ruby/object:Gem::Version
-        version: 0.12.0
+        version: 0.15.0
   type: :runtime
   prerelease: false
   version_requirements: !ruby/object:Gem::Requirement
     requirements:
     - - ">="
       - !ruby/object:Gem::Version
-        version: 0.12.0
+        version: 0.15.0
 - !ruby/object:Gem::Dependency
   name: origen_swd
   requirement: !ruby/object:Gem::Requirement
     requirements:
-    - - ">="
-      - !ruby/object:Gem::Version
-        version: 0.5.0
-  type: :runtime
-  prerelease: false
-  version_requirements: !ruby/object:Gem::Requirement
-    requirements:
-    - - ">="
+    - - "~>"
       - !ruby/object:Gem::Version
-        version: 0.5.0
-- !ruby/object:Gem::Dependency
-  name: origen_doc_helpers
-  requirement: !ruby/object:Gem::Requirement
-    requirements:
+        version: '1'
     - - ">="
       - !ruby/object:Gem::Version
-        version: 0.2.0
-  type: :development
+        version: 1.1.0
+  type: :runtime
   prerelease: false
   version_requirements: !ruby/object:Gem::Requirement
     requirements:
-    - - ">="
-      - !ruby/object:Gem::Version
-        version: 0.2.0
-- !ruby/object:Gem::Dependency
-  name: origen_testers
-  requirement: !ruby/object:Gem::Requirement
-    requirements:
-    - - ">="
+    - - "~>"
       - !ruby/object:Gem::Version
-        version: '0'
-  type: :development
-  prerelease: false
-  version_requirements: !ruby/object:Gem::Requirement
-    requirements:
+        version: '1'
     - - ">="
       - !ruby/object:Gem::Version
-        version: '0'
+        version: 1.1.0
 description: 
 email:
 - ronnie.lajaunie@nxp.com
@@ -88,21 +72,28 @@ extensions: []
 extra_rdoc_files: []
 files:
 - config/application.rb
+- config/boot.rb
 - config/commands.rb
-- config/development.rb
-- config/environment.rb
-- config/users.rb
 - config/version.rb
 - lib/origen_arm_debug.rb
-- lib/origen_arm_debug/driver.rb
-- lib/origen_arm_debug/dut.rb
-- lib/origen_arm_debug/dut_jtag.rb
-- lib/origen_arm_debug/dut_swd.rb
+- lib/origen_arm_debug/ap.rb
+- lib/origen_arm_debug/ap_controller.rb
+- lib/origen_arm_debug/dap.rb
+- lib/origen_arm_debug/dap_controller.rb
+- lib/origen_arm_debug/dp_controller.rb
+- lib/origen_arm_debug/helpers.rb
+- lib/origen_arm_debug/jtag_ap.rb
+- lib/origen_arm_debug/jtag_ap_controller.rb
+- lib/origen_arm_debug/jtag_dp.rb
+- lib/origen_arm_debug/jtag_dp_controller.rb
 - lib/origen_arm_debug/mem_ap.rb
-- lib/origen_arm_debug/swj_dp.rb
-- pattern/read_write_reg.rb
-- pattern/read_write_reg_jtag.rb
-- pattern/read_write_reg_swd.rb
+- lib/origen_arm_debug/mem_ap_controller.rb
+- lib/origen_arm_debug/sw_dp.rb
+- lib/origen_arm_debug/sw_dp_controller.rb
+- lib/origen_arm_debug_dev/dut.rb
+- lib/origen_arm_debug_dev/dut_jtag.rb
+- lib/origen_arm_debug_dev/dut_swd.rb
+- pattern/workout.rb
 - templates/web/index.md.erb
 - templates/web/layouts/_basic.html.erb
 - templates/web/partials/_navbar.html.erb
@@ -127,10 +118,9 @@ required_rubygems_version: !ruby/object:Gem::Requirement
       version: 1.8.11
 requirements: []
 rubyforge_project: 
-rubygems_version: 2.6.2
+rubygems_version: 2.6.7
 signing_key: 
 specification_version: 4
-summary: Provides a Origen API to perform register read and write operations via the
-  ARM_DEBUG protocol.
+summary: Provides an Origen API to perform register read and write operations via
+  the ARM_DEBUG protocol.
 test_files: []
-has_rdoc: 

data/config/development.rb

@@ -1,17 +0,0 @@
-# This file is similar to environment.rb and will be loaded
-# automatically at the start of each invocation of Origen.
-#
-# However the major difference is that it will not be loaded
-# if the application is imported by a 3rd party app - in that
-# case only environment.rb is loaded.
-#
-# Therefore this file should be used to load anything you need
-# to setup a development environment for this app, normally
-# this would be used to define some dummy classes to instantiate
-# your objects so that they can be tested and/or interacted with
-# in the console.
-module OrigenARMDebug
-  autoload :DUT, "origen_arm_debug/dut"
-  autoload :JTAG_DUT, "origen_arm_debug/dut_jtag"
-  autoload :SWD_DUT, "origen_arm_debug/dut_swd"
-end

data/config/environment.rb

@@ -1,3 +0,0 @@
-require "origen_arm_debug"
-
-