origen_arm_debug 0.10.1 → 1.0.0.pre1

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@@ -0,0 +1,47 @@
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+ require 'origen_arm_debug/dp_controller'
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+ module OrigenARMDebug
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+ class SW_DPController
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+ include Origen::Controller
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+ include Helpers
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+ include DPController
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+
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+ def write_register(reg, options = {})
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+ unless reg.writable?
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+ fail "The :#{reg.name} register is not writeable!"
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+ end
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+
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+ if reg.owner == model
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+ log "Write SW-DP register #{reg.name.to_s.upcase}: #{reg.data.to_hex}" do
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+ dut.swd.write_dp(reg)
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+ end
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+ else
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+ unless reg.owner.is_a?(AP)
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+ fail 'The SW-DP can only write to DP or AP registers!'
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+ end
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+
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+ select_ap_reg(reg)
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+ dut.swd.write_ap(reg, options)
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+ end
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+ end
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+
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+ def read_register(reg, options = {})
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+ unless reg.readable?
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+ fail "The :#{reg.name} register is not readable!"
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+ end
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+
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+ if reg.owner == model
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+ log "Read SW-DP register #{reg.name.to_s.upcase}: #{Origen::Utility.read_hex(reg)}" do
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+ dut.swd.read_dp(reg)
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+ end
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+ else
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+ unless reg.owner.is_a?(AP)
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+ fail 'The SW-DP can only write to DP or AP registers!'
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+ end
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+
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+ select_ap_reg(reg)
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+ dut.swd.read_ap(address: reg.address)
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+ dut.swd.read_dp(reg, options.merge(address: rdbuff.address))
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+ end
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+ end
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+ end
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+ end
@@ -1,4 +1,4 @@
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- module OrigenARMDebug
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+ module OrigenARMDebugDev
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  # This is a dummy DUT model which is used
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  # to instantiate and test the ARMDebug locally
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  # during development.
@@ -11,27 +11,23 @@ module OrigenARMDebug
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  # Initializes simple dut model with test register and required jtag/swd pins
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  #
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  # @example
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- # $dut = OrigenARMDebug::DUT.new
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+ # $dut = OrigenARMDebugDev::DUT.new
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  #
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  def initialize
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- add_reg :dap, 0x0, 35, data: { pos: 0, bits: 35 }
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+ add_reg :test, 0
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- add_reg :test, 0x0, 32, data: { pos: 0, bits: 32 },
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- bit: { pos: 0 }
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-
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- sub_block :arm_debug, class_name: 'OrigenARMDebug::Driver', aps: { mem_ap: 0x00000000, mdm_ap: 0x01000000 }, latency: 2
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- arm_debug.add_mem_ap('alt_ahbapi', 0x02000000)
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-
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- # arm_debug.add_mem_ap('mem_ap', 0x00000000)
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- # arm_debug.add_mem_ap('mdm_ap', 0x01000000)
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- # arm_debug.add_mem_ap('alt_ahbapi', 0x02000000)
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+ reg :test2, 0 do |reg|
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+ reg.bit 31, :msb
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+ reg.bit 30..1, :data
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+ reg.bit 0, :lsb
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+ end
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  end
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  # Add any custom startup business here.
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  #
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  # @param [Hash] options Options to customize the operation
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  def startup(options)
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- $tester.set_timeset('arm_debug', 40)
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+ tester.set_timeset('arm_debug', 40)
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  end
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  # Read data from a register
@@ -39,7 +35,7 @@ module OrigenARMDebug
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  # @param [Register] reg Register name or address value
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  # @param [Hash] options Options to customize the operation
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  def read_register(reg, options = {})
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- arm_debug.read_register(reg, options)
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+ arm_debug.mem_ap.read_register(reg, options)
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  end
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40
 
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  # Write data to a register
@@ -47,7 +43,7 @@ module OrigenARMDebug
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  # @param [Register] reg Register name or address value
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  # @param [Hash] options Options to customize the operation
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  def write_register(reg, options = {})
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- arm_debug.write_register(reg, options)
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+ arm_debug.mem_ap.write_register(reg, options)
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  end
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  end
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  end
@@ -0,0 +1,32 @@
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+ module OrigenARMDebugDev
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+ # Simple JTAG-specific dut model that inherits from protocol-agnostic DUT model
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+ class JTAG_DUT < DUT
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+ include OrigenJTAG
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+
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+ # Adds jtag-required pins to the simple dut model
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+ # Returns nothing.
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+ def initialize
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+ super
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+ add_pin :tclk
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+ add_pin :tdi
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+ add_pin :tdo
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+ add_pin :tms
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+ add_pin :trst
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+ add_pin :swd_clk
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+ add_pin :swd_dio
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+
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+ # Specify (customize) ARM Debug implementation details
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+ sub_block :arm_debug, class_name: 'OrigenARMDebug::DAP',
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+ mem_aps: {
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+ mem_ap: {
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+ base_address: 0x00000000,
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+ latency: 16,
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+ apreg_access_wait: 8,
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+ apmem_access_wait: 8,
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+ csw_reset: 0x23000040
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+ },
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+ mdm_ap: 0x01000000
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+ }
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+ end
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+ end
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+ end
@@ -1,4 +1,4 @@
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- module OrigenARMDebug
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+ module OrigenARMDebugDev
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  # Simple SWD-specific dut model that inherits from protocol-agnostic DUT model
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  class SWD_DUT < DUT
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  include OrigenSWD
@@ -14,6 +14,12 @@ module OrigenARMDebug
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  add_pin :trst
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  add_pin :swd_clk
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  add_pin :swd_dio
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+
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+ sub_block :arm_debug, class_name: 'OrigenARMDebug::DAP',
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+ mem_aps: {
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+ mem_ap: { base_address: 0x00000000, csw_reset: 0x23000042 },
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+ mdm_ap: 0x01000000
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+ }
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  end
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  end
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  end
@@ -0,0 +1,61 @@
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+ Pattern.create name: "workout_#{dut.arm_debug.dp.name}" do
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+
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+ ss "Tests of direct DP API"
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+ dp = dut.arm_debug.dp
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+
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+ dp.idcode.partno.read!(0x12)
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+
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+ dp.ctrlstat.write!(0x50000000)
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+ dp.ctrlstat.read!(0xF0000000)
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+
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+ dp.select.apbanksel.write!(0xF)
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+
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+ dp.abort.dapabort.write!(1)
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+
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+ ss "Tests of direct AP API"
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+ ap = dut.arm_debug.mem_ap
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+
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+ ap.tar.write!(0x1234_0000)
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+
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+ ap.tar.read!
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+
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+ ss "Tests of high-level register API"
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+
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+ ss "Test write register, should write value 0xFF01"
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+ dut.reg(:test).write!(0x0000FF01)
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+
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+ ss "Test write register with overlay, no subroutine"
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+ dut.reg(:test).overlay('write_overlay')
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+ dut.reg(:test).write!(0x0000FF01, no_subr: true)
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+ dut.reg(:test).overlay(nil)
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+
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+ ss "Test write register with overlay, use subroutine if available"
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+ dut.reg(:test).overlay('write_overlay_subr')
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+ dut.reg(:test).write!(0x0000FF01)
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+ dut.reg(:test).overlay(nil)
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+
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+ ss "Test read register, should read value 0x0000FF01"
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+ dut.reg(:test).read!
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+
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+ ss "Test read register, with overlay, no subroutine, should read value 0x0000FF01"
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+ dut.reg(:test).overlay('read_overlay')
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+ dut.reg(:test).read!(no_subr: true)
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+ dut.reg(:test).overlay(nil)
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+
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+ ss "Test read register, with overlay, use subroutine if available"
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+ dut.reg(:test).overlay('read_overlay_subr')
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+ dut.reg(:test).read!
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+ dut.reg(:test).overlay(nil)
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+
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+ ss "Test read register with mask, should read value 0xXXXxxx1"
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+ dut.reg(:test).read!(mask: 0x0000_000F)
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+
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+ ss "Test read register with store"
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+ dut.reg(:test).store!
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+
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+ ss "Test bit level read, should read value 0xXXXxxx1"
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+ dut.reg(:test).reset
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+ dut.reg(:test).data = 0x0000FF01
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+ dut.reg(:test)[0].read!
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+
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+ end
@@ -6,7 +6,7 @@
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6
 
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  ### Purpose
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8
 
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- This library provides register and memory read/write and debug control capability via the ARM debug protocol.
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+ This library provides register and memory read/write and debug control capability via the ARM Debug Interface v5 Spec.
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11
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  ### How To Import
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12
 
@@ -57,24 +57,36 @@ class DUT
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57
  reg.bits 7..0, :lower_byte
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  end
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59
 
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- sub_block :arm_debug, class_name: "OrigenARMDebug::Driver", aps: { mem_ap: 0x00000000, mdmap: 0x01000000 }
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+ sub_block :arm_debug, class_name: "OrigenARMDebug::DAP", mem_aps: { mem_ap: 0x00000000, mem2_ap: 0x01000000 }
61
61
  end
62
62
 
63
63
  # Hook the ARMDebug module into the register API, any register read
64
64
  # requests will use the ARM Debug protocol by default
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65
  def read_register(reg, options={})
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- arm_debug.read_register(reg, options)
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+ arm_debug.mem_ap.read_register(reg, options)
67
67
  end
68
68
 
69
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  # As above for write requests
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  def write_register(reg, options={})
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- arm_debug.write_register(reg, options)
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+ arm_debug.mem_apwrite_register(reg, options)
72
72
  end
73
73
  end
74
74
 
75
75
  DUT.new.myreg.write!(0x55AA) # => Will generate the required vectors using the ARM debug protocol
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76
  ~~~
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77
 
78
+ You can also access the lower-level API using conventional Origen register transactions:
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+
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+ ~~~ruby
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+ arm_debug.sw_dp.idcode.read!(0x2BA01477)
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+ arm_debug.sw_dp.ctrlstat.write!(0x5000_0000) # Power-up
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+ arm_debug.sw_dp.ctrlstat.read!(0xF0000000) # Verify
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+ arm_debug.ahb_ap.idr.read!(0x24770011)
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+ arm_debug.sw_dp.select.write!(0) # Select AHB-AP, bank 0
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+
87
+ # Set the SIZE field of CSW to 0x2 (32-bit transfers) + AddrInc=1
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+ arm_debug.ahb_ap.csw.write!(0x23000052)
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+ ~~~
78
90
 
79
91
  ### How To Setup a Development Environment
80
92
 
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: origen_arm_debug
3
3
  version: !ruby/object:Gem::Version
4
- version: 0.10.1
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+ version: 1.0.0.pre1
5
5
  platform: ruby
6
6
  authors:
7
7
  - Ronnie Lajaunie
8
8
  autorequire:
9
9
  bindir: bin
10
10
  cert_chain: []
11
- date: 2016-04-13 00:00:00.000000000 Z
11
+ date: 2017-05-12 00:00:00.000000000 Z
12
12
  dependencies:
13
13
  - !ruby/object:Gem::Dependency
14
14
  name: origen
@@ -17,6 +17,9 @@ dependencies:
17
17
  - - "~>"
18
18
  - !ruby/object:Gem::Version
19
19
  version: '0.7'
20
+ - - ">="
21
+ - !ruby/object:Gem::Version
22
+ version: 0.7.36
20
23
  type: :runtime
21
24
  prerelease: false
22
25
  version_requirements: !ruby/object:Gem::Requirement
@@ -24,62 +27,43 @@ dependencies:
24
27
  - - "~>"
25
28
  - !ruby/object:Gem::Version
26
29
  version: '0.7'
30
+ - - ">="
31
+ - !ruby/object:Gem::Version
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+ version: 0.7.36
27
33
  - !ruby/object:Gem::Dependency
28
34
  name: origen_jtag
29
35
  requirement: !ruby/object:Gem::Requirement
30
36
  requirements:
31
37
  - - ">="
32
38
  - !ruby/object:Gem::Version
33
- version: 0.12.0
39
+ version: 0.15.0
34
40
  type: :runtime
35
41
  prerelease: false
36
42
  version_requirements: !ruby/object:Gem::Requirement
37
43
  requirements:
38
44
  - - ">="
39
45
  - !ruby/object:Gem::Version
40
- version: 0.12.0
46
+ version: 0.15.0
41
47
  - !ruby/object:Gem::Dependency
42
48
  name: origen_swd
43
49
  requirement: !ruby/object:Gem::Requirement
44
50
  requirements:
45
- - - ">="
46
- - !ruby/object:Gem::Version
47
- version: 0.5.0
48
- type: :runtime
49
- prerelease: false
50
- version_requirements: !ruby/object:Gem::Requirement
51
- requirements:
52
- - - ">="
51
+ - - "~>"
53
52
  - !ruby/object:Gem::Version
54
- version: 0.5.0
55
- - !ruby/object:Gem::Dependency
56
- name: origen_doc_helpers
57
- requirement: !ruby/object:Gem::Requirement
58
- requirements:
53
+ version: '1'
59
54
  - - ">="
60
55
  - !ruby/object:Gem::Version
61
- version: 0.2.0
62
- type: :development
56
+ version: 1.1.0
57
+ type: :runtime
63
58
  prerelease: false
64
59
  version_requirements: !ruby/object:Gem::Requirement
65
60
  requirements:
66
- - - ">="
67
- - !ruby/object:Gem::Version
68
- version: 0.2.0
69
- - !ruby/object:Gem::Dependency
70
- name: origen_testers
71
- requirement: !ruby/object:Gem::Requirement
72
- requirements:
73
- - - ">="
61
+ - - "~>"
74
62
  - !ruby/object:Gem::Version
75
- version: '0'
76
- type: :development
77
- prerelease: false
78
- version_requirements: !ruby/object:Gem::Requirement
79
- requirements:
63
+ version: '1'
80
64
  - - ">="
81
65
  - !ruby/object:Gem::Version
82
- version: '0'
66
+ version: 1.1.0
83
67
  description:
84
68
  email:
85
69
  - ronnie.lajaunie@nxp.com
@@ -88,21 +72,28 @@ extensions: []
88
72
  extra_rdoc_files: []
89
73
  files:
90
74
  - config/application.rb
75
+ - config/boot.rb
91
76
  - config/commands.rb
92
- - config/development.rb
93
- - config/environment.rb
94
- - config/users.rb
95
77
  - config/version.rb
96
78
  - lib/origen_arm_debug.rb
97
- - lib/origen_arm_debug/driver.rb
98
- - lib/origen_arm_debug/dut.rb
99
- - lib/origen_arm_debug/dut_jtag.rb
100
- - lib/origen_arm_debug/dut_swd.rb
79
+ - lib/origen_arm_debug/ap.rb
80
+ - lib/origen_arm_debug/ap_controller.rb
81
+ - lib/origen_arm_debug/dap.rb
82
+ - lib/origen_arm_debug/dap_controller.rb
83
+ - lib/origen_arm_debug/dp_controller.rb
84
+ - lib/origen_arm_debug/helpers.rb
85
+ - lib/origen_arm_debug/jtag_ap.rb
86
+ - lib/origen_arm_debug/jtag_ap_controller.rb
87
+ - lib/origen_arm_debug/jtag_dp.rb
88
+ - lib/origen_arm_debug/jtag_dp_controller.rb
101
89
  - lib/origen_arm_debug/mem_ap.rb
102
- - lib/origen_arm_debug/swj_dp.rb
103
- - pattern/read_write_reg.rb
104
- - pattern/read_write_reg_jtag.rb
105
- - pattern/read_write_reg_swd.rb
90
+ - lib/origen_arm_debug/mem_ap_controller.rb
91
+ - lib/origen_arm_debug/sw_dp.rb
92
+ - lib/origen_arm_debug/sw_dp_controller.rb
93
+ - lib/origen_arm_debug_dev/dut.rb
94
+ - lib/origen_arm_debug_dev/dut_jtag.rb
95
+ - lib/origen_arm_debug_dev/dut_swd.rb
96
+ - pattern/workout.rb
106
97
  - templates/web/index.md.erb
107
98
  - templates/web/layouts/_basic.html.erb
108
99
  - templates/web/partials/_navbar.html.erb
@@ -127,10 +118,9 @@ required_rubygems_version: !ruby/object:Gem::Requirement
127
118
  version: 1.8.11
128
119
  requirements: []
129
120
  rubyforge_project:
130
- rubygems_version: 2.6.2
121
+ rubygems_version: 2.6.7
131
122
  signing_key:
132
123
  specification_version: 4
133
- summary: Provides a Origen API to perform register read and write operations via the
134
- ARM_DEBUG protocol.
124
+ summary: Provides an Origen API to perform register read and write operations via
125
+ the ARM_DEBUG protocol.
135
126
  test_files: []
136
- has_rdoc:
@@ -1,17 +0,0 @@
1
- # This file is similar to environment.rb and will be loaded
2
- # automatically at the start of each invocation of Origen.
3
- #
4
- # However the major difference is that it will not be loaded
5
- # if the application is imported by a 3rd party app - in that
6
- # case only environment.rb is loaded.
7
- #
8
- # Therefore this file should be used to load anything you need
9
- # to setup a development environment for this app, normally
10
- # this would be used to define some dummy classes to instantiate
11
- # your objects so that they can be tested and/or interacted with
12
- # in the console.
13
- module OrigenARMDebug
14
- autoload :DUT, "origen_arm_debug/dut"
15
- autoload :JTAG_DUT, "origen_arm_debug/dut_jtag"
16
- autoload :SWD_DUT, "origen_arm_debug/dut_swd"
17
- end
@@ -1,3 +0,0 @@
1
- require "origen_arm_debug"
2
-
3
-