mldsa_gh 0.1.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (128) hide show
  1. checksums.yaml +7 -0
  2. data/LICENSE +21 -0
  3. data/README.md +88 -0
  4. data/ext/mldsa_gh_native/extconf.rb +14 -0
  5. data/ext/mldsa_gh_native/mldsa_gh_native.c +222 -0
  6. data/ext/mldsa_gh_native/mldsa_gh_native_all.c +24 -0
  7. data/ext/mldsa_gh_native/mldsa_gh_native_all.h +26 -0
  8. data/ext/mldsa_gh_native/vendor/mldsa-native/BUILDING.md +108 -0
  9. data/ext/mldsa_gh_native/vendor/mldsa-native/LICENSE +305 -0
  10. data/ext/mldsa_gh_native/vendor/mldsa-native/README.md +247 -0
  11. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/README.md +23 -0
  12. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/mldsa_native.c +803 -0
  13. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/mldsa_native.h +956 -0
  14. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/mldsa_native_asm.S +830 -0
  15. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/mldsa_native_config.h +855 -0
  16. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/cbmc.h +233 -0
  17. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/common.h +301 -0
  18. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/context.h +152 -0
  19. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/ct.c +21 -0
  20. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/ct.h +373 -0
  21. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/debug.c +75 -0
  22. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/debug.h +125 -0
  23. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/fips202.c +270 -0
  24. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/fips202.h +224 -0
  25. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/fips202x4.c +187 -0
  26. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/fips202x4.h +125 -0
  27. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/keccakf1600.c +510 -0
  28. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/keccakf1600.h +110 -0
  29. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/auto.h +85 -0
  30. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/fips202_native_aarch64.h +69 -0
  31. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x1_scalar_aarch64_asm.S +378 -0
  32. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x1_v84a_aarch64_asm.S +207 -0
  33. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x2_v84a_aarch64_asm.S +262 -0
  34. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_scalar_hybrid_aarch64_asm.S +1080 -0
  35. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_v84a_scalar_hybrid_aarch64_asm.S +990 -0
  36. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccakf1600_round_constants.c +47 -0
  37. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x1_scalar.h +27 -0
  38. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x1_v84a.h +36 -0
  39. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x2_v84a.h +40 -0
  40. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x4_v8a_scalar.h +32 -0
  41. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x4_v8a_v84a_scalar.h +37 -0
  42. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/api.h +129 -0
  43. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/README.md +10 -0
  44. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/mve.h +67 -0
  45. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/fips202_native_armv81m.h +37 -0
  46. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_mve.S +717 -0
  47. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_mve.c +42 -0
  48. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_state_extract_bytes_mve.S +334 -0
  49. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_state_xor_bytes_mve.S +355 -0
  50. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccakf1600_round_constants.c +53 -0
  51. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/auto.h +35 -0
  52. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/keccak_f1600_x4_avx2.h +34 -0
  53. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/fips202_native_x86_64.h +45 -0
  54. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/keccak_f1600_x4_avx2_asm.S +488 -0
  55. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/keccakf1600_constants.c +52 -0
  56. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/meta.h +314 -0
  57. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/aarch64_zetas.c +248 -0
  58. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/arith_native_aarch64.h +367 -0
  59. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_intt_aarch64_asm.S +786 -0
  60. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_ntt_aarch64_asm.S +686 -0
  61. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_pointwise_montgomery_aarch64_asm.S +106 -0
  62. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_caddq_aarch64_asm.S +69 -0
  63. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_chknorm_aarch64_asm.S +76 -0
  64. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_decompose_32_aarch64_asm.S +108 -0
  65. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_decompose_88_aarch64_asm.S +108 -0
  66. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_use_hint_32_aarch64_asm.S +125 -0
  67. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_use_hint_88_aarch64_asm.S +133 -0
  68. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_polyvecl_pointwise_acc_montgomery_l4_aarch64_asm.S +157 -0
  69. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_polyvecl_pointwise_acc_montgomery_l5_aarch64_asm.S +173 -0
  70. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_polyvecl_pointwise_acc_montgomery_l7_aarch64_asm.S +205 -0
  71. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_polyz_unpack_17_aarch64_asm.S +103 -0
  72. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_polyz_unpack_19_aarch64_asm.S +100 -0
  73. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_rej_uniform_aarch64_asm.S +222 -0
  74. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_rej_uniform_eta2_aarch64_asm.S +170 -0
  75. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_rej_uniform_eta4_aarch64_asm.S +163 -0
  76. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/polyz_unpack_table.c +52 -0
  77. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_eta_table.c +547 -0
  78. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_table.c +63 -0
  79. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/api.h +617 -0
  80. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/meta.h +24 -0
  81. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/meta.h +323 -0
  82. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/arith_native_x86_64.h +330 -0
  83. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/consts.c +157 -0
  84. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/consts.h +27 -0
  85. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_intt_avx2_asm.S +2333 -0
  86. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_ntt_avx2_asm.S +2405 -0
  87. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_nttunpack_avx2_asm.S +254 -0
  88. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_pointwise_acc_l4_avx2_asm.S +173 -0
  89. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_pointwise_acc_l5_avx2_asm.S +189 -0
  90. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_pointwise_acc_l7_avx2_asm.S +221 -0
  91. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_pointwise_avx2_asm.S +158 -0
  92. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_caddq_avx2_asm.S +199 -0
  93. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_chknorm_avx2_asm.S +176 -0
  94. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_decompose_32_avx2_asm.S +490 -0
  95. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_decompose_88_avx2_asm.S +489 -0
  96. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_use_hint_32_avx2_asm.S +123 -0
  97. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_use_hint_88_avx2_asm.S +125 -0
  98. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_polyz_unpack_17_avx2_asm.S +355 -0
  99. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_polyz_unpack_19_avx2_asm.S +355 -0
  100. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_rej_uniform_avx2_asm.S +132 -0
  101. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_rej_uniform_eta2_avx2_asm.S +205 -0
  102. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_rej_uniform_eta4_avx2_asm.S +176 -0
  103. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/rej_uniform_table.c +161 -0
  104. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/packing.c +213 -0
  105. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/packing.h +277 -0
  106. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/params.h +153 -0
  107. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/poly.c +1066 -0
  108. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/poly.h +464 -0
  109. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/poly_kl.c +910 -0
  110. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/poly_kl.h +367 -0
  111. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/polyvec.c +509 -0
  112. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/polyvec.h +435 -0
  113. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/polyvec_lazy.c +311 -0
  114. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/polyvec_lazy.h +652 -0
  115. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/randombytes.h +26 -0
  116. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/reduce.h +144 -0
  117. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/rounding.h +265 -0
  118. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/sign.c +1720 -0
  119. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/sign.h +850 -0
  120. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/symmetric.h +68 -0
  121. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/sys.h +327 -0
  122. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/zetas.inc +55 -0
  123. data/lib/mldsa/parameter_set.rb +82 -0
  124. data/lib/mldsa/signing_key.rb +147 -0
  125. data/lib/mldsa/verify_key.rb +72 -0
  126. data/lib/mldsa/version.rb +7 -0
  127. data/lib/mldsa_gh.rb +93 -0
  128. metadata +225 -0
@@ -0,0 +1,176 @@
1
+ /*
2
+ * Copyright (c) The mldsa-native project authors
3
+ * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
4
+ */
5
+
6
+ /* References
7
+ * ==========
8
+ *
9
+ * - [REF_AVX2]
10
+ * CRYSTALS-Dilithium optimized AVX2 implementation
11
+ * Bai, Ducas, Kiltz, Lepoint, Lyubashevsky, Schwabe, Seiler, Stehlé
12
+ * https://github.com/pq-crystals/dilithium/tree/master/avx2
13
+ */
14
+
15
+ /*
16
+ * This file is derived from the public domain
17
+ * AVX2 Dilithium implementation @[REF_AVX2].
18
+ */
19
+
20
+ /*yaml
21
+ Name: rej_uniform_eta4_avx2_asm
22
+ Description: x86_64 AVX2 rejection sampling of eta=4 secret coefficients.
23
+ Extracts 4-bit nibbles from the input byte buffer, accepts those < 9,
24
+ and maps an accepted nibble n to the coefficient 4 - n, producing
25
+ values in [-4, 4].
26
+ Signature: unsigned mld_rej_uniform_eta4_avx2_asm(int32_t *r, const uint8_t *buf, const uint8_t table[256][8])
27
+ ABI:
28
+ Architecture: x86_64
29
+ CallingConvention: SysV
30
+ Features: [AVX2]
31
+ rdi:
32
+ type: buffer
33
+ size_bytes: 1024
34
+ permissions: write-only
35
+ c_parameter: int32_t *r
36
+ description: Output coefficient buffer (256 x int32_t)
37
+ rsi:
38
+ type: buffer
39
+ size_bytes: 272
40
+ permissions: read-only
41
+ c_parameter: const uint8_t *buf
42
+ description: Input byte buffer (MLD_AVX2_REJ_UNIFORM_ETA4_BUFLEN = 272)
43
+ rdx:
44
+ type: buffer
45
+ size_bytes: 2048
46
+ permissions: read-only
47
+ c_parameter: const uint8_t *table
48
+ description: Lookup table (256 x 8 uint8_t = mld_rej_uniform_table)
49
+ */
50
+
51
+ #include "../../../common.h"
52
+ #if defined(MLD_ARITH_BACKEND_X86_64_DEFAULT) && !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED)
53
+
54
+ /*
55
+ * WARNING: This file is auto-derived from the mldsa-native source file
56
+ * dev/x86_64/src/mldsa_rej_uniform_eta4_avx2_asm.S using scripts/simpasm. Do not modify it directly.
57
+ */
58
+
59
+ .text
60
+ .balign 4
61
+ .global MLD_ASM_NAMESPACE(rej_uniform_eta4_avx2_asm)
62
+ MLD_ASM_FN_SYMBOL(rej_uniform_eta4_avx2_asm)
63
+
64
+ .cfi_startproc
65
+ movl $0xf0f0f0f, %r8d # imm = 0xF0F0F0F
66
+ vmovd %r8d, %xmm2
67
+ vpbroadcastd %xmm2, %ymm2
68
+ movl $0x4040404, %r8d # imm = 0x4040404
69
+ vmovd %r8d, %xmm3
70
+ vpbroadcastd %xmm3, %ymm3
71
+ movl $0x9090909, %r8d # imm = 0x9090909
72
+ vmovd %r8d, %xmm4
73
+ vpbroadcastd %xmm4, %ymm4
74
+ xorl %eax, %eax
75
+ xorl %ecx, %ecx
76
+
77
+ Lmld_rej_uniform_eta4_avx2_asm_loop:
78
+ cmpl $0xf8, %eax
79
+ ja Lmld_rej_uniform_eta4_avx2_asm_scalar
80
+ cmpl $0x100, %ecx # imm = 0x100
81
+ ja Lmld_rej_uniform_eta4_avx2_asm_scalar
82
+ vpmovzxbw (%rsi,%rcx), %ymm0
83
+ vpsllw $0x4, %ymm0, %ymm1
84
+ vpor %ymm1, %ymm0, %ymm0
85
+ vpand %ymm2, %ymm0, %ymm0
86
+ vpsubb %ymm4, %ymm0, %ymm1
87
+ vpsubb %ymm0, %ymm3, %ymm0
88
+ vpmovmskb %ymm1, %r8d
89
+ vextracti128 $0x0, %ymm0, %xmm5
90
+ movzbl %r8b, %r10d
91
+ vmovq (%rdx,%r10,8), %xmm6
92
+ vpshufb %xmm6, %xmm5, %xmm6
93
+ vpmovsxbd %xmm6, %ymm1
94
+ vmovdqu %ymm1, (%rdi,%rax,4)
95
+ popcntl %r10d, %r9d
96
+ addl %r9d, %eax
97
+ shrl $0x8, %r8d
98
+ addl $0x4, %ecx
99
+ cmpl $0xf8, %eax
100
+ ja Lmld_rej_uniform_eta4_avx2_asm_scalar
101
+ vpsrldq $0x8, %xmm5, %xmm5 # xmm5 = xmm5[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
102
+ movzbl %r8b, %r10d
103
+ vmovq (%rdx,%r10,8), %xmm6
104
+ vpshufb %xmm6, %xmm5, %xmm6
105
+ vpmovsxbd %xmm6, %ymm1
106
+ vmovdqu %ymm1, (%rdi,%rax,4)
107
+ popcntl %r10d, %r9d
108
+ addl %r9d, %eax
109
+ shrl $0x8, %r8d
110
+ addl $0x4, %ecx
111
+ cmpl $0xf8, %eax
112
+ ja Lmld_rej_uniform_eta4_avx2_asm_scalar
113
+ vextracti128 $0x1, %ymm0, %xmm5
114
+ movzbl %r8b, %r10d
115
+ vmovq (%rdx,%r10,8), %xmm6
116
+ vpshufb %xmm6, %xmm5, %xmm6
117
+ vpmovsxbd %xmm6, %ymm1
118
+ vmovdqu %ymm1, (%rdi,%rax,4)
119
+ popcntl %r10d, %r9d
120
+ addl %r9d, %eax
121
+ shrl $0x8, %r8d
122
+ addl $0x4, %ecx
123
+ cmpl $0xf8, %eax
124
+ ja Lmld_rej_uniform_eta4_avx2_asm_scalar
125
+ vpsrldq $0x8, %xmm5, %xmm5 # xmm5 = xmm5[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
126
+ movzbl %r8b, %r10d
127
+ vmovq (%rdx,%r10,8), %xmm6
128
+ vpshufb %xmm6, %xmm5, %xmm6
129
+ vpmovsxbd %xmm6, %ymm1
130
+ vmovdqu %ymm1, (%rdi,%rax,4)
131
+ popcntl %r10d, %r9d
132
+ addl %r9d, %eax
133
+ addl $0x4, %ecx
134
+ jmp Lmld_rej_uniform_eta4_avx2_asm_loop
135
+
136
+ Lmld_rej_uniform_eta4_avx2_asm_scalar:
137
+ cmpl $0x100, %eax # imm = 0x100
138
+ jae Lmld_rej_uniform_eta4_avx2_asm_done
139
+ cmpl $0x110, %ecx # imm = 0x110
140
+ jae Lmld_rej_uniform_eta4_avx2_asm_done
141
+ movzbl (%rsi,%rcx), %r11d
142
+ incl %ecx
143
+ movl %r11d, %r10d
144
+ andl $0xf, %r10d
145
+ cmpl $0x9, %r10d
146
+ jae Lmld_rej_uniform_eta4_avx2_asm_high_nibble
147
+ movl $0x4, %r9d
148
+ subl %r10d, %r9d
149
+ movl %r9d, (%rdi,%rax,4)
150
+ incl %eax
151
+ cmpl $0x100, %eax # imm = 0x100
152
+ jae Lmld_rej_uniform_eta4_avx2_asm_done
153
+
154
+ Lmld_rej_uniform_eta4_avx2_asm_high_nibble:
155
+ shrl $0x4, %r11d
156
+ andl $0xf, %r11d
157
+ cmpl $0x9, %r11d
158
+ jae Lmld_rej_uniform_eta4_avx2_asm_scalar
159
+ movl $0x4, %r10d
160
+ subl %r11d, %r10d
161
+ movl %r10d, (%rdi,%rax,4)
162
+ incl %eax
163
+ jmp Lmld_rej_uniform_eta4_avx2_asm_scalar
164
+
165
+ Lmld_rej_uniform_eta4_avx2_asm_done:
166
+ retq
167
+ .cfi_endproc
168
+
169
+ MLD_ASM_FN_SIZE(rej_uniform_eta4_avx2_asm)
170
+
171
+ #endif /* MLD_ARITH_BACKEND_X86_64_DEFAULT && !MLD_CONFIG_MULTILEVEL_NO_SHARED \
172
+ */
173
+
174
+ #if defined(__ELF__)
175
+ .section .note.GNU-stack,"",%progbits
176
+ #endif
@@ -0,0 +1,161 @@
1
+ /*
2
+ * Copyright (c) The mldsa-native project authors
3
+ * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
4
+ */
5
+
6
+ /*
7
+ * WARNING: This file is auto-generated from scripts/autogen
8
+ * in the mldsa-native repository.
9
+ * Do not modify it directly.
10
+ */
11
+
12
+ #include "../../../common.h"
13
+
14
+ #if defined(MLD_ARITH_BACKEND_X86_64_DEFAULT) && \
15
+ !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED)
16
+
17
+ #include "arith_native_x86_64.h"
18
+
19
+ /*
20
+ * Lookup table used by rejection sampling.
21
+ * See autogen for details.
22
+ */
23
+ MLD_ALIGN MLD_INTERNAL_DATA_DEFINITION const uint8_t
24
+ mld_rej_uniform_table[256][8] = {
25
+ {0, 0, 0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0, 0, 0},
26
+ {1, 0, 0, 0, 0, 0, 0, 0}, {0, 1, 0, 0, 0, 0, 0, 0},
27
+ {2, 0, 0, 0, 0, 0, 0, 0}, {0, 2, 0, 0, 0, 0, 0, 0},
28
+ {1, 2, 0, 0, 0, 0, 0, 0}, {0, 1, 2, 0, 0, 0, 0, 0},
29
+ {3, 0, 0, 0, 0, 0, 0, 0}, {0, 3, 0, 0, 0, 0, 0, 0},
30
+ {1, 3, 0, 0, 0, 0, 0, 0}, {0, 1, 3, 0, 0, 0, 0, 0},
31
+ {2, 3, 0, 0, 0, 0, 0, 0}, {0, 2, 3, 0, 0, 0, 0, 0},
32
+ {1, 2, 3, 0, 0, 0, 0, 0}, {0, 1, 2, 3, 0, 0, 0, 0},
33
+ {4, 0, 0, 0, 0, 0, 0, 0}, {0, 4, 0, 0, 0, 0, 0, 0},
34
+ {1, 4, 0, 0, 0, 0, 0, 0}, {0, 1, 4, 0, 0, 0, 0, 0},
35
+ {2, 4, 0, 0, 0, 0, 0, 0}, {0, 2, 4, 0, 0, 0, 0, 0},
36
+ {1, 2, 4, 0, 0, 0, 0, 0}, {0, 1, 2, 4, 0, 0, 0, 0},
37
+ {3, 4, 0, 0, 0, 0, 0, 0}, {0, 3, 4, 0, 0, 0, 0, 0},
38
+ {1, 3, 4, 0, 0, 0, 0, 0}, {0, 1, 3, 4, 0, 0, 0, 0},
39
+ {2, 3, 4, 0, 0, 0, 0, 0}, {0, 2, 3, 4, 0, 0, 0, 0},
40
+ {1, 2, 3, 4, 0, 0, 0, 0}, {0, 1, 2, 3, 4, 0, 0, 0},
41
+ {5, 0, 0, 0, 0, 0, 0, 0}, {0, 5, 0, 0, 0, 0, 0, 0},
42
+ {1, 5, 0, 0, 0, 0, 0, 0}, {0, 1, 5, 0, 0, 0, 0, 0},
43
+ {2, 5, 0, 0, 0, 0, 0, 0}, {0, 2, 5, 0, 0, 0, 0, 0},
44
+ {1, 2, 5, 0, 0, 0, 0, 0}, {0, 1, 2, 5, 0, 0, 0, 0},
45
+ {3, 5, 0, 0, 0, 0, 0, 0}, {0, 3, 5, 0, 0, 0, 0, 0},
46
+ {1, 3, 5, 0, 0, 0, 0, 0}, {0, 1, 3, 5, 0, 0, 0, 0},
47
+ {2, 3, 5, 0, 0, 0, 0, 0}, {0, 2, 3, 5, 0, 0, 0, 0},
48
+ {1, 2, 3, 5, 0, 0, 0, 0}, {0, 1, 2, 3, 5, 0, 0, 0},
49
+ {4, 5, 0, 0, 0, 0, 0, 0}, {0, 4, 5, 0, 0, 0, 0, 0},
50
+ {1, 4, 5, 0, 0, 0, 0, 0}, {0, 1, 4, 5, 0, 0, 0, 0},
51
+ {2, 4, 5, 0, 0, 0, 0, 0}, {0, 2, 4, 5, 0, 0, 0, 0},
52
+ {1, 2, 4, 5, 0, 0, 0, 0}, {0, 1, 2, 4, 5, 0, 0, 0},
53
+ {3, 4, 5, 0, 0, 0, 0, 0}, {0, 3, 4, 5, 0, 0, 0, 0},
54
+ {1, 3, 4, 5, 0, 0, 0, 0}, {0, 1, 3, 4, 5, 0, 0, 0},
55
+ {2, 3, 4, 5, 0, 0, 0, 0}, {0, 2, 3, 4, 5, 0, 0, 0},
56
+ {1, 2, 3, 4, 5, 0, 0, 0}, {0, 1, 2, 3, 4, 5, 0, 0},
57
+ {6, 0, 0, 0, 0, 0, 0, 0}, {0, 6, 0, 0, 0, 0, 0, 0},
58
+ {1, 6, 0, 0, 0, 0, 0, 0}, {0, 1, 6, 0, 0, 0, 0, 0},
59
+ {2, 6, 0, 0, 0, 0, 0, 0}, {0, 2, 6, 0, 0, 0, 0, 0},
60
+ {1, 2, 6, 0, 0, 0, 0, 0}, {0, 1, 2, 6, 0, 0, 0, 0},
61
+ {3, 6, 0, 0, 0, 0, 0, 0}, {0, 3, 6, 0, 0, 0, 0, 0},
62
+ {1, 3, 6, 0, 0, 0, 0, 0}, {0, 1, 3, 6, 0, 0, 0, 0},
63
+ {2, 3, 6, 0, 0, 0, 0, 0}, {0, 2, 3, 6, 0, 0, 0, 0},
64
+ {1, 2, 3, 6, 0, 0, 0, 0}, {0, 1, 2, 3, 6, 0, 0, 0},
65
+ {4, 6, 0, 0, 0, 0, 0, 0}, {0, 4, 6, 0, 0, 0, 0, 0},
66
+ {1, 4, 6, 0, 0, 0, 0, 0}, {0, 1, 4, 6, 0, 0, 0, 0},
67
+ {2, 4, 6, 0, 0, 0, 0, 0}, {0, 2, 4, 6, 0, 0, 0, 0},
68
+ {1, 2, 4, 6, 0, 0, 0, 0}, {0, 1, 2, 4, 6, 0, 0, 0},
69
+ {3, 4, 6, 0, 0, 0, 0, 0}, {0, 3, 4, 6, 0, 0, 0, 0},
70
+ {1, 3, 4, 6, 0, 0, 0, 0}, {0, 1, 3, 4, 6, 0, 0, 0},
71
+ {2, 3, 4, 6, 0, 0, 0, 0}, {0, 2, 3, 4, 6, 0, 0, 0},
72
+ {1, 2, 3, 4, 6, 0, 0, 0}, {0, 1, 2, 3, 4, 6, 0, 0},
73
+ {5, 6, 0, 0, 0, 0, 0, 0}, {0, 5, 6, 0, 0, 0, 0, 0},
74
+ {1, 5, 6, 0, 0, 0, 0, 0}, {0, 1, 5, 6, 0, 0, 0, 0},
75
+ {2, 5, 6, 0, 0, 0, 0, 0}, {0, 2, 5, 6, 0, 0, 0, 0},
76
+ {1, 2, 5, 6, 0, 0, 0, 0}, {0, 1, 2, 5, 6, 0, 0, 0},
77
+ {3, 5, 6, 0, 0, 0, 0, 0}, {0, 3, 5, 6, 0, 0, 0, 0},
78
+ {1, 3, 5, 6, 0, 0, 0, 0}, {0, 1, 3, 5, 6, 0, 0, 0},
79
+ {2, 3, 5, 6, 0, 0, 0, 0}, {0, 2, 3, 5, 6, 0, 0, 0},
80
+ {1, 2, 3, 5, 6, 0, 0, 0}, {0, 1, 2, 3, 5, 6, 0, 0},
81
+ {4, 5, 6, 0, 0, 0, 0, 0}, {0, 4, 5, 6, 0, 0, 0, 0},
82
+ {1, 4, 5, 6, 0, 0, 0, 0}, {0, 1, 4, 5, 6, 0, 0, 0},
83
+ {2, 4, 5, 6, 0, 0, 0, 0}, {0, 2, 4, 5, 6, 0, 0, 0},
84
+ {1, 2, 4, 5, 6, 0, 0, 0}, {0, 1, 2, 4, 5, 6, 0, 0},
85
+ {3, 4, 5, 6, 0, 0, 0, 0}, {0, 3, 4, 5, 6, 0, 0, 0},
86
+ {1, 3, 4, 5, 6, 0, 0, 0}, {0, 1, 3, 4, 5, 6, 0, 0},
87
+ {2, 3, 4, 5, 6, 0, 0, 0}, {0, 2, 3, 4, 5, 6, 0, 0},
88
+ {1, 2, 3, 4, 5, 6, 0, 0}, {0, 1, 2, 3, 4, 5, 6, 0},
89
+ {7, 0, 0, 0, 0, 0, 0, 0}, {0, 7, 0, 0, 0, 0, 0, 0},
90
+ {1, 7, 0, 0, 0, 0, 0, 0}, {0, 1, 7, 0, 0, 0, 0, 0},
91
+ {2, 7, 0, 0, 0, 0, 0, 0}, {0, 2, 7, 0, 0, 0, 0, 0},
92
+ {1, 2, 7, 0, 0, 0, 0, 0}, {0, 1, 2, 7, 0, 0, 0, 0},
93
+ {3, 7, 0, 0, 0, 0, 0, 0}, {0, 3, 7, 0, 0, 0, 0, 0},
94
+ {1, 3, 7, 0, 0, 0, 0, 0}, {0, 1, 3, 7, 0, 0, 0, 0},
95
+ {2, 3, 7, 0, 0, 0, 0, 0}, {0, 2, 3, 7, 0, 0, 0, 0},
96
+ {1, 2, 3, 7, 0, 0, 0, 0}, {0, 1, 2, 3, 7, 0, 0, 0},
97
+ {4, 7, 0, 0, 0, 0, 0, 0}, {0, 4, 7, 0, 0, 0, 0, 0},
98
+ {1, 4, 7, 0, 0, 0, 0, 0}, {0, 1, 4, 7, 0, 0, 0, 0},
99
+ {2, 4, 7, 0, 0, 0, 0, 0}, {0, 2, 4, 7, 0, 0, 0, 0},
100
+ {1, 2, 4, 7, 0, 0, 0, 0}, {0, 1, 2, 4, 7, 0, 0, 0},
101
+ {3, 4, 7, 0, 0, 0, 0, 0}, {0, 3, 4, 7, 0, 0, 0, 0},
102
+ {1, 3, 4, 7, 0, 0, 0, 0}, {0, 1, 3, 4, 7, 0, 0, 0},
103
+ {2, 3, 4, 7, 0, 0, 0, 0}, {0, 2, 3, 4, 7, 0, 0, 0},
104
+ {1, 2, 3, 4, 7, 0, 0, 0}, {0, 1, 2, 3, 4, 7, 0, 0},
105
+ {5, 7, 0, 0, 0, 0, 0, 0}, {0, 5, 7, 0, 0, 0, 0, 0},
106
+ {1, 5, 7, 0, 0, 0, 0, 0}, {0, 1, 5, 7, 0, 0, 0, 0},
107
+ {2, 5, 7, 0, 0, 0, 0, 0}, {0, 2, 5, 7, 0, 0, 0, 0},
108
+ {1, 2, 5, 7, 0, 0, 0, 0}, {0, 1, 2, 5, 7, 0, 0, 0},
109
+ {3, 5, 7, 0, 0, 0, 0, 0}, {0, 3, 5, 7, 0, 0, 0, 0},
110
+ {1, 3, 5, 7, 0, 0, 0, 0}, {0, 1, 3, 5, 7, 0, 0, 0},
111
+ {2, 3, 5, 7, 0, 0, 0, 0}, {0, 2, 3, 5, 7, 0, 0, 0},
112
+ {1, 2, 3, 5, 7, 0, 0, 0}, {0, 1, 2, 3, 5, 7, 0, 0},
113
+ {4, 5, 7, 0, 0, 0, 0, 0}, {0, 4, 5, 7, 0, 0, 0, 0},
114
+ {1, 4, 5, 7, 0, 0, 0, 0}, {0, 1, 4, 5, 7, 0, 0, 0},
115
+ {2, 4, 5, 7, 0, 0, 0, 0}, {0, 2, 4, 5, 7, 0, 0, 0},
116
+ {1, 2, 4, 5, 7, 0, 0, 0}, {0, 1, 2, 4, 5, 7, 0, 0},
117
+ {3, 4, 5, 7, 0, 0, 0, 0}, {0, 3, 4, 5, 7, 0, 0, 0},
118
+ {1, 3, 4, 5, 7, 0, 0, 0}, {0, 1, 3, 4, 5, 7, 0, 0},
119
+ {2, 3, 4, 5, 7, 0, 0, 0}, {0, 2, 3, 4, 5, 7, 0, 0},
120
+ {1, 2, 3, 4, 5, 7, 0, 0}, {0, 1, 2, 3, 4, 5, 7, 0},
121
+ {6, 7, 0, 0, 0, 0, 0, 0}, {0, 6, 7, 0, 0, 0, 0, 0},
122
+ {1, 6, 7, 0, 0, 0, 0, 0}, {0, 1, 6, 7, 0, 0, 0, 0},
123
+ {2, 6, 7, 0, 0, 0, 0, 0}, {0, 2, 6, 7, 0, 0, 0, 0},
124
+ {1, 2, 6, 7, 0, 0, 0, 0}, {0, 1, 2, 6, 7, 0, 0, 0},
125
+ {3, 6, 7, 0, 0, 0, 0, 0}, {0, 3, 6, 7, 0, 0, 0, 0},
126
+ {1, 3, 6, 7, 0, 0, 0, 0}, {0, 1, 3, 6, 7, 0, 0, 0},
127
+ {2, 3, 6, 7, 0, 0, 0, 0}, {0, 2, 3, 6, 7, 0, 0, 0},
128
+ {1, 2, 3, 6, 7, 0, 0, 0}, {0, 1, 2, 3, 6, 7, 0, 0},
129
+ {4, 6, 7, 0, 0, 0, 0, 0}, {0, 4, 6, 7, 0, 0, 0, 0},
130
+ {1, 4, 6, 7, 0, 0, 0, 0}, {0, 1, 4, 6, 7, 0, 0, 0},
131
+ {2, 4, 6, 7, 0, 0, 0, 0}, {0, 2, 4, 6, 7, 0, 0, 0},
132
+ {1, 2, 4, 6, 7, 0, 0, 0}, {0, 1, 2, 4, 6, 7, 0, 0},
133
+ {3, 4, 6, 7, 0, 0, 0, 0}, {0, 3, 4, 6, 7, 0, 0, 0},
134
+ {1, 3, 4, 6, 7, 0, 0, 0}, {0, 1, 3, 4, 6, 7, 0, 0},
135
+ {2, 3, 4, 6, 7, 0, 0, 0}, {0, 2, 3, 4, 6, 7, 0, 0},
136
+ {1, 2, 3, 4, 6, 7, 0, 0}, {0, 1, 2, 3, 4, 6, 7, 0},
137
+ {5, 6, 7, 0, 0, 0, 0, 0}, {0, 5, 6, 7, 0, 0, 0, 0},
138
+ {1, 5, 6, 7, 0, 0, 0, 0}, {0, 1, 5, 6, 7, 0, 0, 0},
139
+ {2, 5, 6, 7, 0, 0, 0, 0}, {0, 2, 5, 6, 7, 0, 0, 0},
140
+ {1, 2, 5, 6, 7, 0, 0, 0}, {0, 1, 2, 5, 6, 7, 0, 0},
141
+ {3, 5, 6, 7, 0, 0, 0, 0}, {0, 3, 5, 6, 7, 0, 0, 0},
142
+ {1, 3, 5, 6, 7, 0, 0, 0}, {0, 1, 3, 5, 6, 7, 0, 0},
143
+ {2, 3, 5, 6, 7, 0, 0, 0}, {0, 2, 3, 5, 6, 7, 0, 0},
144
+ {1, 2, 3, 5, 6, 7, 0, 0}, {0, 1, 2, 3, 5, 6, 7, 0},
145
+ {4, 5, 6, 7, 0, 0, 0, 0}, {0, 4, 5, 6, 7, 0, 0, 0},
146
+ {1, 4, 5, 6, 7, 0, 0, 0}, {0, 1, 4, 5, 6, 7, 0, 0},
147
+ {2, 4, 5, 6, 7, 0, 0, 0}, {0, 2, 4, 5, 6, 7, 0, 0},
148
+ {1, 2, 4, 5, 6, 7, 0, 0}, {0, 1, 2, 4, 5, 6, 7, 0},
149
+ {3, 4, 5, 6, 7, 0, 0, 0}, {0, 3, 4, 5, 6, 7, 0, 0},
150
+ {1, 3, 4, 5, 6, 7, 0, 0}, {0, 1, 3, 4, 5, 6, 7, 0},
151
+ {2, 3, 4, 5, 6, 7, 0, 0}, {0, 2, 3, 4, 5, 6, 7, 0},
152
+ {1, 2, 3, 4, 5, 6, 7, 0}, {0, 1, 2, 3, 4, 5, 6, 7},
153
+ };
154
+
155
+ #else /* MLD_ARITH_BACKEND_X86_64_DEFAULT && !MLD_CONFIG_MULTILEVEL_NO_SHARED \
156
+ */
157
+
158
+ MLD_EMPTY_CU(avx2_rej_uniform_table)
159
+
160
+ #endif /* !(MLD_ARITH_BACKEND_X86_64_DEFAULT && \
161
+ !MLD_CONFIG_MULTILEVEL_NO_SHARED) */
@@ -0,0 +1,213 @@
1
+ /*
2
+ * Copyright (c) The mldsa-native project authors
3
+ * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
4
+ */
5
+ #include <string.h>
6
+
7
+ #include "common.h"
8
+ #include "packing.h"
9
+ #include "poly.h"
10
+ #include "polyvec.h"
11
+ #include "rounding.h"
12
+
13
+ /* Parameter set namespacing
14
+ * This is to facilitate building multiple instances
15
+ * of mldsa-native (e.g. with varying parameter sets)
16
+ * within a single compilation unit. */
17
+ /* End of parameter set namespacing */
18
+
19
+ #if !defined(MLD_CONFIG_NO_VERIFY_API)
20
+ MLD_INTERNAL_API
21
+ void mld_unpack_pk_t1(mld_poly *t1,
22
+ const uint8_t pk[MLDSA_CRYPTO_PUBLICKEYBYTES],
23
+ unsigned int i)
24
+ {
25
+ mld_polyt1_unpack(t1, pk + MLDSA_PK_T1_OFFSET + i * MLDSA_POLYT1_PACKEDBYTES);
26
+ }
27
+ #endif /* !MLD_CONFIG_NO_VERIFY_API */
28
+
29
+ #if !defined(MLD_CONFIG_NO_KEYPAIR_API)
30
+ MLD_INTERNAL_API
31
+ void mld_pack_sk_s1(uint8_t sk[MLDSA_CRYPTO_SECRETKEYBYTES],
32
+ const mld_polyvecl *s1)
33
+ {
34
+ mld_polyvecl_pack_eta(sk + MLDSA_SK_S1_OFFSET, s1);
35
+ }
36
+
37
+ MLD_INTERNAL_API
38
+ void mld_pack_sk_rho_key_tr_s2(uint8_t sk[MLDSA_CRYPTO_SECRETKEYBYTES],
39
+ const uint8_t rho[MLDSA_SEEDBYTES],
40
+ const uint8_t tr[MLDSA_TRBYTES],
41
+ const uint8_t key[MLDSA_SEEDBYTES],
42
+ const mld_polyveck *s2)
43
+ {
44
+ mld_memcpy(sk + MLDSA_SK_RHO_OFFSET, rho, MLDSA_SEEDBYTES);
45
+ mld_memcpy(sk + MLDSA_SK_KEY_OFFSET, key, MLDSA_SEEDBYTES);
46
+ mld_memcpy(sk + MLDSA_SK_TR_OFFSET, tr, MLDSA_TRBYTES);
47
+ /* s1 already packed via mld_pack_sk_s1 */
48
+ mld_polyveck_pack_eta(sk + MLDSA_SK_S2_OFFSET, s2);
49
+ /* t0 already packed via mld_compute_pack_t0_t1 */
50
+ }
51
+ #endif /* !MLD_CONFIG_NO_KEYPAIR_API */
52
+
53
+ #if !defined(MLD_CONFIG_NO_SIGN_API)
54
+ MLD_INTERNAL_API
55
+ void mld_unpack_sk(uint8_t rho[MLDSA_SEEDBYTES], uint8_t tr[MLDSA_TRBYTES],
56
+ uint8_t key[MLDSA_SEEDBYTES], mld_sk_t0hat *t0,
57
+ mld_sk_s1hat *s1, mld_sk_s2hat *s2,
58
+ const uint8_t sk[MLDSA_CRYPTO_SECRETKEYBYTES])
59
+ {
60
+ mld_memcpy(rho, sk + MLDSA_SK_RHO_OFFSET, MLDSA_SEEDBYTES);
61
+ mld_memcpy(key, sk + MLDSA_SK_KEY_OFFSET, MLDSA_SEEDBYTES);
62
+ mld_memcpy(tr, sk + MLDSA_SK_TR_OFFSET, MLDSA_TRBYTES);
63
+ mld_unpack_sk_s1hat(s1, sk + MLDSA_SK_S1_OFFSET);
64
+ mld_unpack_sk_s2hat(s2, sk + MLDSA_SK_S2_OFFSET);
65
+ mld_unpack_sk_t0hat(t0, sk + MLDSA_SK_T0_OFFSET);
66
+ }
67
+
68
+ MLD_INTERNAL_API
69
+ void mld_pack_sig_c(uint8_t sig[MLDSA_CRYPTO_BYTES],
70
+ const uint8_t c[MLDSA_CTILDEBYTES])
71
+ {
72
+ mld_memcpy(sig, c, MLDSA_CTILDEBYTES);
73
+ }
74
+
75
+ MLD_INTERNAL_API
76
+ int mld_pack_sig_h(uint8_t sig[MLDSA_CRYPTO_BYTES], const mld_polyveck *w0,
77
+ const mld_polyveck *w1)
78
+ {
79
+ unsigned int j, k, n;
80
+
81
+ /* The hint section of sig[] is MLDSA_POLYVECH_PACKEDBYTES long, where
82
+ * MLDSA_POLYVECH_PACKEDBYTES = MLDSA_OMEGA + MLDSA_K.
83
+ *
84
+ * The first OMEGA bytes record the index numbers of the coefficients
85
+ * that are not equal to 0.
86
+ *
87
+ * The final K bytes record a running tally of the number of hints
88
+ * coming from each of the K polynomials. */
89
+ uint8_t *sig_h = sig + MLDSA_SIG_H_OFFSET;
90
+
91
+ mld_memset(sig_h, 0, MLDSA_POLYVECH_PACKEDBYTES);
92
+ n = 0;
93
+
94
+ /* For each coefficient of each polynomial, compute its hint bit and, if
95
+ * non-zero, record the index in the hint section of sig. If recording the
96
+ * hint would overflow the OMEGA-sized index array, abort early and return
97
+ * MLD_ERR_FAIL. The caller is expected to reject the signature in that case.
98
+ *
99
+ * Constant time: At this point w0/w1 are public (see comment in sign.c
100
+ * before the call), so a data-dependent early return is fine. */
101
+ for (k = 0; k < MLDSA_K; k++)
102
+ __loop__(
103
+ assigns(k, j, n, memory_slice(sig_h, MLDSA_POLYVECH_PACKEDBYTES))
104
+ invariant(k <= MLDSA_K && n <= MLDSA_OMEGA)
105
+ decreases(MLDSA_K - k)
106
+ )
107
+ {
108
+ for (j = 0; j < MLDSA_N; j++)
109
+ __loop__(
110
+ assigns(j, n, memory_slice(sig_h, MLDSA_POLYVECH_PACKEDBYTES))
111
+ invariant(j <= MLDSA_N && n <= MLDSA_OMEGA)
112
+ decreases(MLDSA_N - j)
113
+ )
114
+ {
115
+ const unsigned int hint_bit =
116
+ mld_make_hint(w0->vec[k].coeffs[j], w1->vec[k].coeffs[j]);
117
+ if (hint_bit)
118
+ {
119
+ if (n == MLDSA_OMEGA)
120
+ {
121
+ return MLD_ERR_FAIL;
122
+ }
123
+ /* Safety: branch above ensures n < MLDSA_OMEGA so n is a valid index
124
+ * into the OMEGA-sized index array; j < MLDSA_N <= 256 fits in
125
+ * uint8_t. */
126
+ sig_h[n] = (uint8_t)j;
127
+ n++;
128
+ }
129
+ }
130
+ /* Record the running tally into the correct slot for this polynomial.
131
+ * Safety: k < MLDSA_K, so MLDSA_OMEGA + k is a valid index into the
132
+ * K-byte tally tail; n <= MLDSA_OMEGA fits in uint8_t. */
133
+ sig_h[MLDSA_OMEGA + k] = (uint8_t)n;
134
+ }
135
+ return 0;
136
+ }
137
+
138
+ MLD_INTERNAL_API
139
+ void mld_pack_sig_z(uint8_t sig[MLDSA_CRYPTO_BYTES], const mld_poly *zi,
140
+ unsigned i)
141
+ {
142
+ mld_polyz_pack(sig + MLDSA_SIG_Z_OFFSET + i * MLDSA_POLYZ_PACKEDBYTES, zi);
143
+ }
144
+ #endif /* !MLD_CONFIG_NO_SIGN_API */
145
+
146
+ #if !defined(MLD_CONFIG_NO_VERIFY_API)
147
+ MLD_INTERNAL_API
148
+ int mld_sig_unpack_hints(mld_poly *h, const uint8_t sig[MLDSA_CRYPTO_BYTES],
149
+ unsigned int i)
150
+ {
151
+ const uint8_t *packed_hints = sig + MLDSA_SIG_H_OFFSET;
152
+ const unsigned int old_hint_count =
153
+ (i == 0) ? 0 : packed_hints[MLDSA_OMEGA + i - 1];
154
+ const unsigned int new_hint_count = packed_hints[MLDSA_OMEGA + i];
155
+ unsigned int j;
156
+
157
+ if (new_hint_count < old_hint_count || new_hint_count > MLDSA_OMEGA)
158
+ {
159
+ return MLD_ERR_FAIL;
160
+ }
161
+
162
+ mld_memset(h, 0, sizeof(mld_poly));
163
+
164
+ for (j = old_hint_count; j < new_hint_count; ++j)
165
+ __loop__(
166
+ invariant(j >= old_hint_count && j <= new_hint_count &&
167
+ new_hint_count <= MLDSA_OMEGA)
168
+ invariant(array_bound(h->coeffs, 0, MLDSA_N, 0, 2))
169
+ invariant(forall(p, 0, MLDSA_N,
170
+ (h->coeffs[p] == 1) ==
171
+ exists(hj, old_hint_count, j, packed_hints[hj] == p)))
172
+ decreases(new_hint_count - j)
173
+ )
174
+ {
175
+ if (j > old_hint_count && packed_hints[j] <= packed_hints[j - 1])
176
+ {
177
+ return MLD_ERR_FAIL;
178
+ }
179
+ /* Safety: packed_hints[j] is uint8_t (<= 255) and MLDSA_N == 256. */
180
+ h->coeffs[packed_hints[j]] = 1;
181
+ }
182
+
183
+ /* On the last row, also verify that the trailing index slots are zero. */
184
+ if (i == MLDSA_K - 1)
185
+ {
186
+ for (j = new_hint_count; j < MLDSA_OMEGA; ++j)
187
+ __loop__(
188
+ invariant(j <= MLDSA_OMEGA)
189
+ decreases(MLDSA_OMEGA - j)
190
+ )
191
+ {
192
+ if (packed_hints[j] != 0)
193
+ {
194
+ return MLD_ERR_FAIL;
195
+ }
196
+ }
197
+ }
198
+
199
+ /* On success, h->coeffs[p] is 1 exactly for the hint indices decoded for this
200
+ * row, i.e. packed_hints[old_hint_count, new_hint_count). Asserted here
201
+ * rather than posted as a contract to not unnecessarily increase proof
202
+ * complexity at callers that do not need the functional description. */
203
+ cassert(forall(
204
+ p, 0, MLDSA_N,
205
+ (h->coeffs[p] == 1) ==
206
+ exists(hj, old_hint_count, new_hint_count, packed_hints[hj] == p)));
207
+
208
+ return 0;
209
+ }
210
+ #endif /* !MLD_CONFIG_NO_VERIFY_API */
211
+
212
+ /* To facilitate single-compilation-unit (SCU) builds, undefine all macros.
213
+ * Don't modify by hand -- this is auto-generated by scripts/autogen. */