mldsa_gh 0.1.0

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Files changed (128) hide show
  1. checksums.yaml +7 -0
  2. data/LICENSE +21 -0
  3. data/README.md +88 -0
  4. data/ext/mldsa_gh_native/extconf.rb +14 -0
  5. data/ext/mldsa_gh_native/mldsa_gh_native.c +222 -0
  6. data/ext/mldsa_gh_native/mldsa_gh_native_all.c +24 -0
  7. data/ext/mldsa_gh_native/mldsa_gh_native_all.h +26 -0
  8. data/ext/mldsa_gh_native/vendor/mldsa-native/BUILDING.md +108 -0
  9. data/ext/mldsa_gh_native/vendor/mldsa-native/LICENSE +305 -0
  10. data/ext/mldsa_gh_native/vendor/mldsa-native/README.md +247 -0
  11. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/README.md +23 -0
  12. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/mldsa_native.c +803 -0
  13. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/mldsa_native.h +956 -0
  14. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/mldsa_native_asm.S +830 -0
  15. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/mldsa_native_config.h +855 -0
  16. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/cbmc.h +233 -0
  17. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/common.h +301 -0
  18. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/context.h +152 -0
  19. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/ct.c +21 -0
  20. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/ct.h +373 -0
  21. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/debug.c +75 -0
  22. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/debug.h +125 -0
  23. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/fips202.c +270 -0
  24. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/fips202.h +224 -0
  25. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/fips202x4.c +187 -0
  26. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/fips202x4.h +125 -0
  27. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/keccakf1600.c +510 -0
  28. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/keccakf1600.h +110 -0
  29. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/auto.h +85 -0
  30. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/fips202_native_aarch64.h +69 -0
  31. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x1_scalar_aarch64_asm.S +378 -0
  32. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x1_v84a_aarch64_asm.S +207 -0
  33. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x2_v84a_aarch64_asm.S +262 -0
  34. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_scalar_hybrid_aarch64_asm.S +1080 -0
  35. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_v84a_scalar_hybrid_aarch64_asm.S +990 -0
  36. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccakf1600_round_constants.c +47 -0
  37. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x1_scalar.h +27 -0
  38. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x1_v84a.h +36 -0
  39. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x2_v84a.h +40 -0
  40. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x4_v8a_scalar.h +32 -0
  41. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x4_v8a_v84a_scalar.h +37 -0
  42. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/api.h +129 -0
  43. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/README.md +10 -0
  44. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/mve.h +67 -0
  45. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/fips202_native_armv81m.h +37 -0
  46. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_mve.S +717 -0
  47. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_mve.c +42 -0
  48. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_state_extract_bytes_mve.S +334 -0
  49. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_state_xor_bytes_mve.S +355 -0
  50. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccakf1600_round_constants.c +53 -0
  51. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/auto.h +35 -0
  52. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/keccak_f1600_x4_avx2.h +34 -0
  53. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/fips202_native_x86_64.h +45 -0
  54. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/keccak_f1600_x4_avx2_asm.S +488 -0
  55. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/keccakf1600_constants.c +52 -0
  56. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/meta.h +314 -0
  57. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/aarch64_zetas.c +248 -0
  58. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/arith_native_aarch64.h +367 -0
  59. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_intt_aarch64_asm.S +786 -0
  60. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_ntt_aarch64_asm.S +686 -0
  61. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_pointwise_montgomery_aarch64_asm.S +106 -0
  62. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_caddq_aarch64_asm.S +69 -0
  63. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_chknorm_aarch64_asm.S +76 -0
  64. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_decompose_32_aarch64_asm.S +108 -0
  65. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_decompose_88_aarch64_asm.S +108 -0
  66. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_use_hint_32_aarch64_asm.S +125 -0
  67. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_poly_use_hint_88_aarch64_asm.S +133 -0
  68. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_polyvecl_pointwise_acc_montgomery_l4_aarch64_asm.S +157 -0
  69. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_polyvecl_pointwise_acc_montgomery_l5_aarch64_asm.S +173 -0
  70. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_polyvecl_pointwise_acc_montgomery_l7_aarch64_asm.S +205 -0
  71. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_polyz_unpack_17_aarch64_asm.S +103 -0
  72. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_polyz_unpack_19_aarch64_asm.S +100 -0
  73. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_rej_uniform_aarch64_asm.S +222 -0
  74. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_rej_uniform_eta2_aarch64_asm.S +170 -0
  75. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/mldsa_rej_uniform_eta4_aarch64_asm.S +163 -0
  76. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/polyz_unpack_table.c +52 -0
  77. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_eta_table.c +547 -0
  78. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_table.c +63 -0
  79. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/api.h +617 -0
  80. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/meta.h +24 -0
  81. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/meta.h +323 -0
  82. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/arith_native_x86_64.h +330 -0
  83. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/consts.c +157 -0
  84. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/consts.h +27 -0
  85. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_intt_avx2_asm.S +2333 -0
  86. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_ntt_avx2_asm.S +2405 -0
  87. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_nttunpack_avx2_asm.S +254 -0
  88. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_pointwise_acc_l4_avx2_asm.S +173 -0
  89. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_pointwise_acc_l5_avx2_asm.S +189 -0
  90. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_pointwise_acc_l7_avx2_asm.S +221 -0
  91. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_pointwise_avx2_asm.S +158 -0
  92. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_caddq_avx2_asm.S +199 -0
  93. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_chknorm_avx2_asm.S +176 -0
  94. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_decompose_32_avx2_asm.S +490 -0
  95. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_decompose_88_avx2_asm.S +489 -0
  96. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_use_hint_32_avx2_asm.S +123 -0
  97. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_use_hint_88_avx2_asm.S +125 -0
  98. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_polyz_unpack_17_avx2_asm.S +355 -0
  99. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_polyz_unpack_19_avx2_asm.S +355 -0
  100. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_rej_uniform_avx2_asm.S +132 -0
  101. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_rej_uniform_eta2_avx2_asm.S +205 -0
  102. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_rej_uniform_eta4_avx2_asm.S +176 -0
  103. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/native/x86_64/src/rej_uniform_table.c +161 -0
  104. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/packing.c +213 -0
  105. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/packing.h +277 -0
  106. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/params.h +153 -0
  107. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/poly.c +1066 -0
  108. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/poly.h +464 -0
  109. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/poly_kl.c +910 -0
  110. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/poly_kl.h +367 -0
  111. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/polyvec.c +509 -0
  112. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/polyvec.h +435 -0
  113. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/polyvec_lazy.c +311 -0
  114. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/polyvec_lazy.h +652 -0
  115. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/randombytes.h +26 -0
  116. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/reduce.h +144 -0
  117. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/rounding.h +265 -0
  118. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/sign.c +1720 -0
  119. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/sign.h +850 -0
  120. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/symmetric.h +68 -0
  121. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/sys.h +327 -0
  122. data/ext/mldsa_gh_native/vendor/mldsa-native/mldsa/src/zetas.inc +55 -0
  123. data/lib/mldsa/parameter_set.rb +82 -0
  124. data/lib/mldsa/signing_key.rb +147 -0
  125. data/lib/mldsa/verify_key.rb +72 -0
  126. data/lib/mldsa/version.rb +7 -0
  127. data/lib/mldsa_gh.rb +93 -0
  128. metadata +225 -0
@@ -0,0 +1,110 @@
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+ /*
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+ * Copyright (c) The mlkem-native project authors
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+ * Copyright (c) The mldsa-native project authors
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+ * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
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+ */
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+ #ifndef MLD_FIPS202_KECCAKF1600_H
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+ #define MLD_FIPS202_KECCAKF1600_H
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+ #include "../cbmc.h"
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+ #include "../common.h"
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+ #include "fips202.h"
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+
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+ #define MLD_KECCAK_LANES 25
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+ #define MLD_KECCAK_WAY 4
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+
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+ /*
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+ * WARNING:
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+ * The contents of this structure, including the placement
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+ * and interleaving of Keccak lanes, are IMPLEMENTATION-DEFINED.
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+ * The struct is only exposed here to allow its construction on the stack.
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+ */
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+
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+ #define mld_keccakf1600_extract_bytes MLD_NAMESPACE(keccakf1600_extract_bytes)
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+ MLD_INTERNAL_API
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+ void mld_keccakf1600_extract_bytes(uint64_t *state, unsigned char *data,
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+ unsigned offset, unsigned length)
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+ __contract__(
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+ requires(0 <= offset && offset <= MLD_KECCAK_LANES * sizeof(uint64_t) &&
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+ 0 <= length && length <= MLD_KECCAK_LANES * sizeof(uint64_t) - offset)
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+ requires(memory_no_alias(state, sizeof(uint64_t) * MLD_KECCAK_LANES))
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+ requires(memory_no_alias(data, length))
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+ assigns(memory_slice(data, length))
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+ );
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+
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+ #define mld_keccakf1600_xor_bytes MLD_NAMESPACE(keccakf1600_xor_bytes)
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+ MLD_INTERNAL_API
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+ void mld_keccakf1600_xor_bytes(uint64_t *state, const unsigned char *data,
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+ unsigned offset, unsigned length)
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+ __contract__(
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+ requires(0 <= offset && offset <= MLD_KECCAK_LANES * sizeof(uint64_t) &&
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+ 0 <= length && length <= MLD_KECCAK_LANES * sizeof(uint64_t) - offset)
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+ requires(memory_no_alias(state, sizeof(uint64_t) * MLD_KECCAK_LANES))
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+ requires(memory_no_alias(data, length))
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+ assigns(memory_slice(state, sizeof(uint64_t) * MLD_KECCAK_LANES))
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+ );
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+
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+ #if (!defined(MLD_CONFIG_NO_KEYPAIR_API) || !defined(MLD_CONFIG_REDUCE_RAM) || \
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+ defined(MLD_UNIT_TEST)) && \
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+ !defined(MLD_CONFIG_SERIAL_FIPS202_ONLY)
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+ #define mld_keccakf1600x4_extract_bytes \
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+ MLD_NAMESPACE(keccakf1600x4_extract_bytes)
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+ MLD_INTERNAL_API
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+ void mld_keccakf1600x4_extract_bytes(uint64_t *state, unsigned char *data0,
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+ unsigned char *data1, unsigned char *data2,
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+ unsigned char *data3, unsigned offset,
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+ unsigned length)
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+ __contract__(
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+ requires(0 <= offset && offset <= MLD_KECCAK_LANES * sizeof(uint64_t) &&
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+ 0 <= length && length <= MLD_KECCAK_LANES * sizeof(uint64_t) - offset)
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+ requires(memory_no_alias(state, sizeof(uint64_t) * MLD_KECCAK_LANES * MLD_KECCAK_WAY))
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+ requires(memory_no_alias(data0, length))
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+ requires(memory_no_alias(data1, length))
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+ requires(memory_no_alias(data2, length))
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+ requires(memory_no_alias(data3, length))
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+ assigns(memory_slice(data0, length))
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+ assigns(memory_slice(data1, length))
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+ assigns(memory_slice(data2, length))
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+ assigns(memory_slice(data3, length))
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+ );
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+
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+ #define mld_keccakf1600x4_xor_bytes MLD_NAMESPACE(keccakf1600x4_xor_bytes)
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+ MLD_INTERNAL_API
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+ void mld_keccakf1600x4_xor_bytes(uint64_t *state, const unsigned char *data0,
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+ const unsigned char *data1,
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+ const unsigned char *data2,
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+ const unsigned char *data3, unsigned offset,
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+ unsigned length)
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+ __contract__(
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+ requires(0 <= offset && offset <= MLD_KECCAK_LANES * sizeof(uint64_t) &&
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+ 0 <= length && length <= MLD_KECCAK_LANES * sizeof(uint64_t) - offset)
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+ requires(memory_no_alias(state, sizeof(uint64_t) * MLD_KECCAK_LANES * MLD_KECCAK_WAY))
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+ requires(memory_no_alias(data0, length))
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+ /* Case 1: all input buffers are distinct; Case 2: All input buffers are the same */
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+ requires((data0 == data1 &&
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+ data0 == data2 &&
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+ data0 == data3) ||
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+ (memory_no_alias(data1, length) &&
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+ memory_no_alias(data2, length) &&
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+ memory_no_alias(data3, length)))
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+ assigns(memory_slice(state, sizeof(uint64_t) * MLD_KECCAK_LANES * MLD_KECCAK_WAY))
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+ );
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+
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+ #define mld_keccakf1600x4_permute MLD_NAMESPACE(keccakf1600x4_permute)
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+ MLD_INTERNAL_API
94
+ void mld_keccakf1600x4_permute(uint64_t *state)
95
+ __contract__(
96
+ requires(memory_no_alias(state, sizeof(uint64_t) * MLD_KECCAK_LANES * MLD_KECCAK_WAY))
97
+ assigns(memory_slice(state, sizeof(uint64_t) * MLD_KECCAK_LANES * MLD_KECCAK_WAY))
98
+ );
99
+ #endif /* (!MLD_CONFIG_NO_KEYPAIR_API || !MLD_CONFIG_REDUCE_RAM || \
100
+ MLD_UNIT_TEST) && !MLD_CONFIG_SERIAL_FIPS202_ONLY */
101
+
102
+ #define mld_keccakf1600_permute MLD_NAMESPACE(keccakf1600_permute)
103
+ MLD_INTERNAL_API
104
+ void mld_keccakf1600_permute(uint64_t *state)
105
+ __contract__(
106
+ requires(memory_no_alias(state, sizeof(uint64_t) * MLD_KECCAK_LANES))
107
+ assigns(memory_slice(state, sizeof(uint64_t) * MLD_KECCAK_LANES))
108
+ );
109
+
110
+ #endif /* !MLD_FIPS202_KECCAKF1600_H */
@@ -0,0 +1,85 @@
1
+ /*
2
+ * Copyright (c) The mlkem-native project authors
3
+ * Copyright (c) The mldsa-native project authors
4
+ * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
5
+ */
6
+
7
+ /* References
8
+ * ==========
9
+ *
10
+ * - [HYBRID]
11
+ * Hybrid scalar/vector implementations of Keccak and SPHINCS+ on AArch64
12
+ * Becker, Kannwischer
13
+ * https://eprint.iacr.org/2022/1243
14
+ */
15
+
16
+ #ifndef MLD_FIPS202_NATIVE_AARCH64_AUTO_H
17
+ #define MLD_FIPS202_NATIVE_AARCH64_AUTO_H
18
+ /* Default FIPS202 assembly profile for AArch64 systems */
19
+
20
+ /*
21
+ * Default logic to decide which implementation to use.
22
+ *
23
+ */
24
+
25
+ /*
26
+ * Keccak-f1600
27
+ *
28
+ * - On Arm-based Apple CPUs, or CPUs with MLD_SYS_AARCH64_FAST_SHA3 set,
29
+ * we pick a pure Neon implementation.
30
+ * - Otherwise, unless MLD_SYS_AARCH64_SLOW_BARREL_SHIFTER is set,
31
+ * we use lazy-rotation scalar assembly from @[HYBRID].
32
+ * - Otherwise, if MLD_SYS_AARCH64_SLOW_BARREL_SHIFTER is set, we
33
+ * fall back to the standard C implementation.
34
+ */
35
+ #if defined(__ARM_FEATURE_SHA3) && \
36
+ (defined(__APPLE__) || defined(MLD_SYS_AARCH64_FAST_SHA3))
37
+ #include "x1_v84a.h"
38
+ #elif !defined(MLD_SYS_AARCH64_SLOW_BARREL_SHIFTER)
39
+ #include "x1_scalar.h"
40
+ #endif
41
+
42
+ #if (!defined(MLD_CONFIG_NO_KEYPAIR_API) || \
43
+ !defined(MLD_CONFIG_NO_SIGN_API) || !defined(MLD_CONFIG_REDUCE_RAM)) && \
44
+ !defined(MLD_CONFIG_SERIAL_FIPS202_ONLY)
45
+ /* Batched, SIMD-based Keccak-f1600 implementations. */
46
+ #if defined(MLD_SYS_AARCH64_NEON)
47
+
48
+ /*
49
+ * Keccak-f1600x2/x4
50
+ *
51
+ * The optimal implementation is highly CPU-specific; see @[HYBRID].
52
+ *
53
+ * For now, if v8.4-A is not implemented, we fall back to Keccak-f1600.
54
+ * If v8.4-A is implemented and we are on an Apple CPU (or a CPU with
55
+ * MLD_SYS_AARCH64_FAST_SHA3 set), we use a plain Neon-based implementation.
56
+ * If v8.4-A is implemented and we are on neither, we use a
57
+ * scalar/Neon/Neon hybrid.
58
+ * The reason for this distinction is that Apple CPUs (and other CPUs flagged
59
+ * via MLD_SYS_AARCH64_FAST_SHA3) appear to implement the SHA3 instructions on
60
+ * all SIMD units, while Arm CPUs prior to Cortex-X4 don't, and ordinary Neon
61
+ * instructions are still needed.
62
+ */
63
+ #if defined(__ARM_FEATURE_SHA3)
64
+ /*
65
+ * For Apple-M cores (and other cores flagged via MLD_SYS_AARCH64_FAST_SHA3),
66
+ * we use a plain implementation leveraging SHA3 instructions only.
67
+ */
68
+ #if defined(__APPLE__) || defined(MLD_SYS_AARCH64_FAST_SHA3)
69
+ #include "x2_v84a.h"
70
+ #else
71
+ #include "x4_v8a_v84a_scalar.h"
72
+ #endif
73
+
74
+ #else /* __ARM_FEATURE_SHA3 */
75
+
76
+ #include "x4_v8a_scalar.h"
77
+
78
+ #endif /* !__ARM_FEATURE_SHA3 */
79
+
80
+ #endif /* MLD_SYS_AARCH64_NEON */
81
+
82
+ #endif /* (!MLD_CONFIG_NO_KEYPAIR_API || !MLD_CONFIG_NO_SIGN_API || \
83
+ !MLD_CONFIG_REDUCE_RAM) && !MLD_CONFIG_SERIAL_FIPS202_ONLY */
84
+
85
+ #endif /* !MLD_FIPS202_NATIVE_AARCH64_AUTO_H */
@@ -0,0 +1,69 @@
1
+ /*
2
+ * Copyright (c) The mlkem-native project authors
3
+ * Copyright (c) The mldsa-native project authors
4
+ * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
5
+ */
6
+ #ifndef MLD_FIPS202_NATIVE_AARCH64_SRC_FIPS202_NATIVE_AARCH64_H
7
+ #define MLD_FIPS202_NATIVE_AARCH64_SRC_FIPS202_NATIVE_AARCH64_H
8
+
9
+
10
+ #include "../../../../cbmc.h"
11
+ #include "../../../../common.h"
12
+
13
+
14
+ #define mld_keccakf1600_round_constants \
15
+ MLD_NAMESPACE(keccakf1600_round_constants)
16
+ MLD_INTERNAL_DATA_DECLARATION const uint64_t
17
+ mld_keccakf1600_round_constants[24];
18
+
19
+ #define mld_keccak_f1600_x1_scalar_aarch64_asm \
20
+ MLD_NAMESPACE(keccak_f1600_x1_scalar_aarch64_asm)
21
+ void mld_keccak_f1600_x1_scalar_aarch64_asm(uint64_t state[25],
22
+ const uint64_t rc[24])
23
+ __contract__(
24
+ requires(memory_no_alias(state, sizeof(uint64_t) * 25 * 1))
25
+ requires(rc == mld_keccakf1600_round_constants)
26
+ assigns(memory_slice(state, sizeof(uint64_t) * 25 * 1))
27
+ );
28
+
29
+ #define mld_keccak_f1600_x1_v84a_aarch64_asm \
30
+ MLD_NAMESPACE(keccak_f1600_x1_v84a_aarch64_asm)
31
+ void mld_keccak_f1600_x1_v84a_aarch64_asm(uint64_t state[25],
32
+ const uint64_t rc[24])
33
+ __contract__(
34
+ requires(memory_no_alias(state, sizeof(uint64_t) * 25 * 1))
35
+ requires(rc == mld_keccakf1600_round_constants)
36
+ assigns(memory_slice(state, sizeof(uint64_t) * 25 * 1))
37
+ );
38
+
39
+ #define mld_keccak_f1600_x2_v84a_aarch64_asm \
40
+ MLD_NAMESPACE(keccak_f1600_x2_v84a_aarch64_asm)
41
+ void mld_keccak_f1600_x2_v84a_aarch64_asm(uint64_t state[50],
42
+ const uint64_t rc[24])
43
+ __contract__(
44
+ requires(memory_no_alias(state, sizeof(uint64_t) * 25 * 2))
45
+ requires(rc == mld_keccakf1600_round_constants)
46
+ assigns(memory_slice(state, sizeof(uint64_t) * 25 * 2))
47
+ );
48
+
49
+ #define mld_keccak_f1600_x4_v8a_scalar_hybrid_aarch64_asm \
50
+ MLD_NAMESPACE(keccak_f1600_x4_v8a_scalar_hybrid_aarch64_asm)
51
+ void mld_keccak_f1600_x4_v8a_scalar_hybrid_aarch64_asm(uint64_t state[100],
52
+ const uint64_t rc[24])
53
+ __contract__(
54
+ requires(memory_no_alias(state, sizeof(uint64_t) * 25 * 4))
55
+ requires(rc == mld_keccakf1600_round_constants)
56
+ assigns(memory_slice(state, sizeof(uint64_t) * 25 * 4))
57
+ );
58
+
59
+ #define mld_keccak_f1600_x4_v8a_v84a_scalar_hybrid_aarch64_asm \
60
+ MLD_NAMESPACE(keccak_f1600_x4_v8a_v84a_scalar_hybrid_aarch64_asm)
61
+ void mld_keccak_f1600_x4_v8a_v84a_scalar_hybrid_aarch64_asm(
62
+ uint64_t state[100], const uint64_t rc[24])
63
+ __contract__(
64
+ requires(memory_no_alias(state, sizeof(uint64_t) * 25 * 4))
65
+ requires(rc == mld_keccakf1600_round_constants)
66
+ assigns(memory_slice(state, sizeof(uint64_t) * 25 * 4))
67
+ );
68
+
69
+ #endif /* !MLD_FIPS202_NATIVE_AARCH64_SRC_FIPS202_NATIVE_AARCH64_H */
@@ -0,0 +1,378 @@
1
+ /*
2
+ * Copyright (c) The mlkem-native project authors
3
+ * Copyright (c) The mldsa-native project authors
4
+ * Copyright (c) 2021-2022 Arm Limited
5
+ * Copyright (c) 2022 Matthias Kannwischer
6
+ * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
7
+ */
8
+
9
+ // Author: Hanno Becker <hanno.becker@arm.com>
10
+ // Author: Matthias Kannwischer <matthias@kannwischer.eu>
11
+
12
+ /*yaml
13
+ Name: keccak_f1600_x1_scalar_aarch64_asm
14
+ Description: AArch64 scalar implementation of Keccak-f[1600] permutation for single state
15
+ Signature: void mld_keccak_f1600_x1_scalar_aarch64_asm(uint64_t state[25], const uint64_t rc[24])
16
+ ABI:
17
+ Architecture: aarch64
18
+ CallingConvention: AAPCS64
19
+ x0:
20
+ type: buffer
21
+ size_bytes: 200
22
+ permissions: read/write
23
+ c_parameter: uint64_t state[25]
24
+ description: Keccak state (25 x uint64_t)
25
+ x1:
26
+ type: buffer
27
+ size_bytes: 192
28
+ permissions: read-only
29
+ c_parameter: uint64_t const *rc
30
+ description: Round constants (24 x uint64_t)
31
+ Stack:
32
+ bytes: 128
33
+ description: register preservation and temporary storage
34
+ */
35
+
36
+ #include "../../../../common.h"
37
+ #if defined(MLD_FIPS202_AARCH64_NEED_X1_SCALAR) && \
38
+ !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED)
39
+
40
+ /*
41
+ * WARNING: This file is auto-derived from the mldsa-native source file
42
+ * dev/fips202/aarch64/src/keccak_f1600_x1_scalar_aarch64_asm.S using scripts/simpasm. Do not modify it directly.
43
+ */
44
+
45
+ .text
46
+ .balign 4
47
+ .global MLD_ASM_NAMESPACE(keccak_f1600_x1_scalar_aarch64_asm)
48
+ MLD_ASM_FN_SYMBOL(keccak_f1600_x1_scalar_aarch64_asm)
49
+
50
+ .cfi_startproc
51
+ sub sp, sp, #0x80
52
+ .cfi_adjust_cfa_offset 0x80
53
+ stp x19, x20, [sp, #0x20]
54
+ .cfi_rel_offset x19, 0x20
55
+ .cfi_rel_offset x20, 0x28
56
+ stp x21, x22, [sp, #0x30]
57
+ .cfi_rel_offset x21, 0x30
58
+ .cfi_rel_offset x22, 0x38
59
+ stp x23, x24, [sp, #0x40]
60
+ .cfi_rel_offset x23, 0x40
61
+ .cfi_rel_offset x24, 0x48
62
+ stp x25, x26, [sp, #0x50]
63
+ .cfi_rel_offset x25, 0x50
64
+ .cfi_rel_offset x26, 0x58
65
+ stp x27, x28, [sp, #0x60]
66
+ .cfi_rel_offset x27, 0x60
67
+ .cfi_rel_offset x28, 0x68
68
+ stp x29, x30, [sp, #0x70]
69
+ .cfi_rel_offset x29, 0x70
70
+ .cfi_rel_offset x30, 0x78
71
+
72
+ Lmld_keccak_f1600_x1_scalar_initial:
73
+ mov x26, x1
74
+ str x1, [sp, #0x8]
75
+ ldp x1, x6, [x0]
76
+ ldp x11, x16, [x0, #0x10]
77
+ ldp x21, x2, [x0, #0x20]
78
+ ldp x7, x12, [x0, #0x30]
79
+ ldp x17, x22, [x0, #0x40]
80
+ ldp x3, x8, [x0, #0x50]
81
+ ldp x13, x28, [x0, #0x60]
82
+ ldp x23, x4, [x0, #0x70]
83
+ ldp x9, x14, [x0, #0x80]
84
+ ldp x19, x24, [x0, #0x90]
85
+ ldp x5, x10, [x0, #0xa0]
86
+ ldp x15, x20, [x0, #0xb0]
87
+ ldr x25, [x0, #0xc0]
88
+ str x0, [sp]
89
+ eor x30, x24, x25
90
+ eor x27, x9, x10
91
+ eor x0, x30, x21
92
+ eor x26, x27, x6
93
+ eor x27, x26, x7
94
+ eor x29, x0, x22
95
+ eor x26, x29, x23
96
+ eor x29, x4, x5
97
+ eor x30, x29, x1
98
+ eor x0, x27, x8
99
+ eor x29, x30, x2
100
+ eor x30, x19, x20
101
+ eor x30, x30, x16
102
+ eor x27, x26, x0, ror #63
103
+ eor x4, x4, x27
104
+ eor x30, x30, x17
105
+ eor x30, x30, x28
106
+ eor x29, x29, x3
107
+ eor x0, x0, x30, ror #63
108
+ eor x30, x30, x29, ror #63
109
+ eor x22, x22, x30
110
+ eor x23, x23, x30
111
+ str x23, [sp, #0x18]
112
+ eor x23, x14, x15
113
+ eor x14, x14, x0
114
+ eor x23, x23, x11
115
+ eor x15, x15, x0
116
+ eor x1, x1, x27
117
+ eor x23, x23, x12
118
+ eor x23, x23, x13
119
+ eor x11, x11, x0
120
+ eor x29, x29, x23, ror #63
121
+ eor x23, x23, x26, ror #63
122
+ eor x26, x13, x0
123
+ eor x13, x28, x23
124
+ eor x28, x24, x30
125
+ eor x24, x16, x23
126
+ eor x16, x21, x30
127
+ eor x21, x25, x30
128
+ eor x30, x19, x23
129
+ eor x19, x20, x23
130
+ eor x20, x17, x23
131
+ eor x17, x12, x0
132
+ eor x0, x2, x27
133
+ eor x2, x6, x29
134
+ eor x6, x8, x29
135
+ bic x8, x28, x13, ror #47
136
+ eor x12, x3, x27
137
+ bic x3, x13, x17, ror #19
138
+ eor x5, x5, x27
139
+ ldr x27, [sp, #0x18]
140
+ bic x25, x17, x2, ror #5
141
+ eor x9, x9, x29
142
+ eor x23, x25, x5, ror #52
143
+ eor x3, x3, x2, ror #24
144
+ eor x8, x8, x17, ror #2
145
+ eor x17, x10, x29
146
+ bic x25, x12, x22, ror #47
147
+ eor x29, x7, x29
148
+ bic x10, x4, x27, ror #2
149
+ bic x7, x5, x28, ror #10
150
+ eor x10, x10, x20, ror #50
151
+ eor x13, x7, x13, ror #57
152
+ bic x7, x2, x5, ror #47
153
+ eor x2, x25, x24, ror #39
154
+ bic x25, x20, x11, ror #57
155
+ bic x5, x17, x4, ror #25
156
+ eor x25, x25, x17, ror #53
157
+ bic x17, x11, x17, ror #60
158
+ eor x28, x7, x28, ror #57
159
+ bic x7, x9, x12, ror #42
160
+ eor x7, x7, x22, ror #25
161
+ bic x22, x22, x24, ror #56
162
+ bic x24, x24, x15, ror #31
163
+ eor x22, x22, x15, ror #23
164
+ bic x20, x27, x20, ror #48
165
+ bic x15, x15, x9, ror #16
166
+ eor x12, x15, x12, ror #58
167
+ eor x15, x5, x27, ror #27
168
+ eor x5, x20, x11, ror #41
169
+ ldr x11, [sp, #0x8]
170
+ eor x20, x17, x4, ror #21
171
+ eor x17, x24, x9, ror #47
172
+ mov x24, #0x1 // =1
173
+ bic x9, x0, x16, ror #9
174
+ str x24, [sp, #0x10]
175
+ bic x24, x29, x1, ror #44
176
+ bic x27, x1, x21, ror #50
177
+ bic x4, x26, x29, ror #63
178
+ eor x1, x1, x4, ror #21
179
+ ldr x11, [x11]
180
+ bic x4, x21, x30, ror #57
181
+ eor x21, x24, x21, ror #30
182
+ eor x24, x9, x19, ror #44
183
+ bic x9, x14, x6, ror #5
184
+ eor x9, x9, x0, ror #43
185
+ bic x0, x6, x0, ror #38
186
+ eor x1, x1, x11
187
+ eor x11, x4, x26, ror #35
188
+ eor x4, x0, x16, ror #47
189
+ bic x0, x16, x19, ror #35
190
+ eor x16, x27, x30, ror #43
191
+ bic x27, x30, x26, ror #42
192
+ bic x26, x19, x14, ror #41
193
+ eor x19, x0, x14, ror #12
194
+ eor x14, x26, x6, ror #46
195
+ eor x6, x27, x29, ror #41
196
+
197
+ Lmld_keccak_f1600_x1_scalar_loop:
198
+ eor x0, x15, x11, ror #52
199
+ eor x0, x0, x13, ror #48
200
+ eor x26, x8, x9, ror #57
201
+ eor x27, x0, x14, ror #10
202
+ eor x29, x16, x28, ror #63
203
+ eor x26, x26, x6, ror #51
204
+ eor x30, x23, x22, ror #50
205
+ eor x0, x26, x10, ror #31
206
+ eor x29, x29, x19, ror #37
207
+ eor x27, x27, x12, ror #5
208
+ eor x30, x30, x24, ror #34
209
+ eor x0, x0, x7, ror #27
210
+ eor x26, x30, x21, ror #26
211
+ eor x26, x26, x25, ror #15
212
+ ror x30, x27, #0x3e
213
+ eor x30, x30, x26, ror #57
214
+ ror x26, x26, #0x3a
215
+ eor x16, x30, x16
216
+ eor x28, x30, x28, ror #63
217
+ str x28, [sp, #0x18]
218
+ eor x29, x29, x17, ror #36
219
+ eor x28, x1, x2, ror #61
220
+ eor x19, x30, x19, ror #37
221
+ eor x29, x29, x20, ror #2
222
+ eor x28, x28, x4, ror #54
223
+ eor x26, x26, x0, ror #55
224
+ eor x28, x28, x3, ror #39
225
+ eor x28, x28, x5, ror #25
226
+ ror x0, x0, #0x38
227
+ eor x0, x0, x29, ror #63
228
+ eor x27, x28, x27, ror #61
229
+ eor x13, x0, x13, ror #46
230
+ eor x28, x29, x28, ror #63
231
+ eor x29, x30, x20, ror #2
232
+ eor x20, x26, x3, ror #39
233
+ eor x11, x0, x11, ror #50
234
+ eor x25, x28, x25, ror #9
235
+ eor x3, x28, x21, ror #20
236
+ eor x21, x26, x1
237
+ eor x9, x27, x9, ror #49
238
+ eor x24, x28, x24, ror #28
239
+ eor x1, x30, x17, ror #36
240
+ eor x14, x0, x14, ror #8
241
+ eor x22, x28, x22, ror #44
242
+ eor x8, x27, x8, ror #56
243
+ eor x17, x27, x7, ror #19
244
+ eor x15, x0, x15, ror #62
245
+ bic x7, x20, x22, ror #47
246
+ eor x4, x26, x4, ror #54
247
+ eor x0, x0, x12, ror #3
248
+ eor x28, x28, x23, ror #58
249
+ eor x23, x26, x2, ror #61
250
+ eor x26, x26, x5, ror #25
251
+ eor x2, x7, x16, ror #39
252
+ bic x7, x9, x20, ror #42
253
+ bic x30, x15, x9, ror #16
254
+ eor x7, x7, x22, ror #25
255
+ eor x12, x30, x20, ror #58
256
+ bic x20, x22, x16, ror #56
257
+ eor x30, x27, x6, ror #43
258
+ eor x22, x20, x15, ror #23
259
+ bic x6, x19, x13, ror #42
260
+ eor x6, x6, x17, ror #41
261
+ bic x5, x13, x17, ror #63
262
+ eor x5, x21, x5, ror #21
263
+ bic x17, x17, x21, ror #44
264
+ eor x27, x27, x10, ror #23
265
+ bic x21, x21, x25, ror #50
266
+ bic x20, x27, x4, ror #25
267
+ bic x10, x16, x15, ror #31
268
+ eor x16, x21, x19, ror #43
269
+ eor x21, x17, x25, ror #30
270
+ bic x19, x25, x19, ror #57
271
+ ldr x25, [sp, #0x10]
272
+ eor x17, x10, x9, ror #47
273
+ ldr x9, [sp, #0x8]
274
+ eor x15, x20, x28, ror #27
275
+ bic x20, x4, x28, ror #2
276
+ eor x10, x20, x1, ror #50
277
+ bic x20, x11, x27, ror #60
278
+ eor x20, x20, x4, ror #21
279
+ bic x4, x28, x1, ror #48
280
+ bic x1, x1, x11, ror #57
281
+ ldr x28, [x9, x25, lsl #3]
282
+ ldr x9, [sp, #0x18]
283
+ add x25, x25, #0x1
284
+ str x25, [sp, #0x10]
285
+ cmp x25, #0x17
286
+ eor x25, x1, x27, ror #53
287
+ bic x27, x30, x26, ror #47
288
+ eor x1, x5, x28
289
+ eor x5, x4, x11, ror #41
290
+ eor x11, x19, x13, ror #35
291
+ bic x13, x26, x24, ror #10
292
+ eor x28, x27, x24, ror #57
293
+ bic x27, x24, x9, ror #47
294
+ bic x19, x23, x3, ror #9
295
+ bic x4, x29, x14, ror #41
296
+ eor x24, x19, x29, ror #44
297
+ bic x29, x3, x29, ror #35
298
+ eor x13, x13, x9, ror #57
299
+ eor x19, x29, x14, ror #12
300
+ bic x29, x9, x0, ror #19
301
+ bic x14, x14, x8, ror #5
302
+ eor x9, x14, x23, ror #43
303
+ eor x14, x4, x8, ror #46
304
+ bic x23, x8, x23, ror #38
305
+ eor x8, x27, x0, ror #2
306
+ eor x4, x23, x3, ror #47
307
+ bic x3, x0, x30, ror #5
308
+ eor x23, x3, x26, ror #52
309
+ eor x3, x29, x30, ror #24
310
+ b.le Lmld_keccak_f1600_x1_scalar_loop
311
+ ror x6, x6, #0x2b
312
+ ror x11, x11, #0x32
313
+ ror x21, x21, #0x14
314
+ ror x2, x2, #0x3d
315
+ ror x7, x7, #0x13
316
+ ror x12, x12, #0x3
317
+ ror x17, x17, #0x24
318
+ ror x22, x22, #0x2c
319
+ ror x3, x3, #0x27
320
+ ror x8, x8, #0x38
321
+ ror x13, x13, #0x2e
322
+ ror x28, x28, #0x3f
323
+ ror x23, x23, #0x3a
324
+ ror x4, x4, #0x36
325
+ ror x9, x9, #0x31
326
+ ror x14, x14, #0x8
327
+ ror x19, x19, #0x25
328
+ ror x24, x24, #0x1c
329
+ ror x5, x5, #0x19
330
+ ror x10, x10, #0x17
331
+ ror x15, x15, #0x3e
332
+ ror x20, x20, #0x2
333
+ ror x25, x25, #0x9
334
+ ldr x0, [sp]
335
+ stp x1, x6, [x0]
336
+ stp x11, x16, [x0, #0x10]
337
+ stp x21, x2, [x0, #0x20]
338
+ stp x7, x12, [x0, #0x30]
339
+ stp x17, x22, [x0, #0x40]
340
+ stp x3, x8, [x0, #0x50]
341
+ stp x13, x28, [x0, #0x60]
342
+ stp x23, x4, [x0, #0x70]
343
+ stp x9, x14, [x0, #0x80]
344
+ stp x19, x24, [x0, #0x90]
345
+ stp x5, x10, [x0, #0xa0]
346
+ stp x15, x20, [x0, #0xb0]
347
+ str x25, [x0, #0xc0]
348
+ ldp x19, x20, [sp, #0x20]
349
+ .cfi_restore x19
350
+ .cfi_restore x20
351
+ ldp x21, x22, [sp, #0x30]
352
+ .cfi_restore x21
353
+ .cfi_restore x22
354
+ ldp x23, x24, [sp, #0x40]
355
+ .cfi_restore x23
356
+ .cfi_restore x24
357
+ ldp x25, x26, [sp, #0x50]
358
+ .cfi_restore x25
359
+ .cfi_restore x26
360
+ ldp x27, x28, [sp, #0x60]
361
+ .cfi_restore x27
362
+ .cfi_restore x28
363
+ ldp x29, x30, [sp, #0x70]
364
+ .cfi_restore x29
365
+ .cfi_restore x30
366
+ add sp, sp, #0x80
367
+ .cfi_adjust_cfa_offset -0x80
368
+ ret
369
+ .cfi_endproc
370
+
371
+ MLD_ASM_FN_SIZE(keccak_f1600_x1_scalar_aarch64_asm)
372
+
373
+ #endif /* MLD_FIPS202_AARCH64_NEED_X1_SCALAR && \
374
+ !MLD_CONFIG_MULTILEVEL_NO_SHARED */
375
+
376
+ #if defined(__ELF__)
377
+ .section .note.GNU-stack,"",%progbits
378
+ #endif