contrast-agent 3.8.4

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  1. checksums.yaml +7 -0
  2. data/.clang-format +5 -0
  3. data/.dockerignore +10 -0
  4. data/.gitignore +58 -0
  5. data/.gitmodules +6 -0
  6. data/.rspec +6 -0
  7. data/.simplecov +4 -0
  8. data/Gemfile +7 -0
  9. data/LICENSE.txt +12 -0
  10. data/Rakefile +15 -0
  11. data/exe/contrast_service +29 -0
  12. data/ext/build_funchook.rb +48 -0
  13. data/ext/cs__assess_active_record_named/cs__active_record_named.c +47 -0
  14. data/ext/cs__assess_active_record_named/cs__active_record_named.h +10 -0
  15. data/ext/cs__assess_active_record_named/extconf.rb +2 -0
  16. data/ext/cs__assess_array/cs__assess_array.c +38 -0
  17. data/ext/cs__assess_array/cs__assess_array.h +9 -0
  18. data/ext/cs__assess_array/extconf.rb +2 -0
  19. data/ext/cs__assess_basic_object/cs__assess_basic_object.c +50 -0
  20. data/ext/cs__assess_basic_object/cs__assess_basic_object.h +17 -0
  21. data/ext/cs__assess_basic_object/extconf.rb +2 -0
  22. data/ext/cs__assess_fiber_track/cs__assess_fiber_track.c +86 -0
  23. data/ext/cs__assess_fiber_track/cs__assess_fiber_track.h +34 -0
  24. data/ext/cs__assess_fiber_track/extconf.rb +2 -0
  25. data/ext/cs__assess_hash/cs__assess_hash.c +64 -0
  26. data/ext/cs__assess_hash/cs__assess_hash.h +24 -0
  27. data/ext/cs__assess_hash/extconf.rb +2 -0
  28. data/ext/cs__assess_kernel/cs__assess_kernel.c +36 -0
  29. data/ext/cs__assess_kernel/cs__assess_kernel.h +10 -0
  30. data/ext/cs__assess_kernel/extconf.rb +2 -0
  31. data/ext/cs__assess_marshal_module/cs__assess_marshal_module.c +47 -0
  32. data/ext/cs__assess_marshal_module/cs__assess_marshal_module.h +18 -0
  33. data/ext/cs__assess_marshal_module/extconf.rb +2 -0
  34. data/ext/cs__assess_module/cs__assess_module.c +78 -0
  35. data/ext/cs__assess_module/cs__assess_module.h +25 -0
  36. data/ext/cs__assess_module/extconf.rb +2 -0
  37. data/ext/cs__assess_regexp/cs__assess_regexp.c +48 -0
  38. data/ext/cs__assess_regexp/cs__assess_regexp.h +22 -0
  39. data/ext/cs__assess_regexp/extconf.rb +2 -0
  40. data/ext/cs__assess_regexp_track/cs__assess_regexp_track.c +63 -0
  41. data/ext/cs__assess_regexp_track/cs__assess_regexp_track.h +29 -0
  42. data/ext/cs__assess_regexp_track/extconf.rb +2 -0
  43. data/ext/cs__assess_string/cs__assess_string.c +38 -0
  44. data/ext/cs__assess_string/cs__assess_string.h +19 -0
  45. data/ext/cs__assess_string/extconf.rb +2 -0
  46. data/ext/cs__assess_string_interpolation26/cs__assess_string_interpolation26.c +31 -0
  47. data/ext/cs__assess_string_interpolation26/cs__assess_string_interpolation26.h +13 -0
  48. data/ext/cs__assess_string_interpolation26/extconf.rb +2 -0
  49. data/ext/cs__common/cs__common.c +60 -0
  50. data/ext/cs__common/cs__common.h +28 -0
  51. data/ext/cs__common/extconf.rb +20 -0
  52. data/ext/cs__contrast_patch/cs__contrast_patch.c +445 -0
  53. data/ext/cs__contrast_patch/cs__contrast_patch.h +196 -0
  54. data/ext/cs__contrast_patch/extconf.rb +2 -0
  55. data/ext/cs__protect_kernel/cs__protect_kernel.c +37 -0
  56. data/ext/cs__protect_kernel/cs__protect_kernel.h +11 -0
  57. data/ext/cs__protect_kernel/extconf.rb +2 -0
  58. data/ext/cs__scope/cs__scope.c +96 -0
  59. data/ext/cs__scope/cs__scope.h +33 -0
  60. data/ext/cs__scope/extconf.rb +2 -0
  61. data/ext/extconf_common.rb +49 -0
  62. data/funchook/LICENSE +360 -0
  63. data/funchook/Makefile +29 -0
  64. data/funchook/Makefile.in +29 -0
  65. data/funchook/README.md +121 -0
  66. data/funchook/appveyor.yml +42 -0
  67. data/funchook/autogen.sh +3 -0
  68. data/funchook/autom4te.cache/output.0 +4976 -0
  69. data/funchook/autom4te.cache/requests +78 -0
  70. data/funchook/autom4te.cache/traces.0 +364 -0
  71. data/funchook/config.guess +1530 -0
  72. data/funchook/config.log +490 -0
  73. data/funchook/config.status +1016 -0
  74. data/funchook/config.sub +1773 -0
  75. data/funchook/configure +4976 -0
  76. data/funchook/configure.ac +59 -0
  77. data/funchook/distorm/COPYING +26 -0
  78. data/funchook/distorm/MANIFEST +25 -0
  79. data/funchook/distorm/MANIFEST.in +4 -0
  80. data/funchook/distorm/README.md +12 -0
  81. data/funchook/distorm/disOps/disOps.py +795 -0
  82. data/funchook/distorm/disOps/x86db.py +404 -0
  83. data/funchook/distorm/disOps/x86header.py +247 -0
  84. data/funchook/distorm/disOps/x86sets.py +1664 -0
  85. data/funchook/distorm/examples/cs/TestdiStorm/Program.cs +79 -0
  86. data/funchook/distorm/examples/cs/TestdiStorm/Properties/AssemblyInfo.cs +36 -0
  87. data/funchook/distorm/examples/cs/TestdiStorm/TestdiStorm.csproj +69 -0
  88. data/funchook/distorm/examples/cs/distorm-net.sln +26 -0
  89. data/funchook/distorm/examples/cs/distorm-net/CodeInfo.cs +23 -0
  90. data/funchook/distorm/examples/cs/distorm-net/DecodedInst.cs +15 -0
  91. data/funchook/distorm/examples/cs/distorm-net/DecodedResult.cs +14 -0
  92. data/funchook/distorm/examples/cs/distorm-net/DecomposedInst.cs +36 -0
  93. data/funchook/distorm/examples/cs/distorm-net/DecomposedResult.cs +14 -0
  94. data/funchook/distorm/examples/cs/distorm-net/Opcodes.cs +1268 -0
  95. data/funchook/distorm/examples/cs/distorm-net/Opcodes.tt +37 -0
  96. data/funchook/distorm/examples/cs/distorm-net/Operand.cs +25 -0
  97. data/funchook/distorm/examples/cs/distorm-net/Properties/AssemblyInfo.cs +36 -0
  98. data/funchook/distorm/examples/cs/distorm-net/diStorm3.cs +411 -0
  99. data/funchook/distorm/examples/cs/distorm-net/distorm-net.csproj +80 -0
  100. data/funchook/distorm/examples/cs/readme +3 -0
  101. data/funchook/distorm/examples/ddk/README +48 -0
  102. data/funchook/distorm/examples/ddk/distorm.ini +11 -0
  103. data/funchook/distorm/examples/ddk/dummy.c +15 -0
  104. data/funchook/distorm/examples/ddk/main.c +91 -0
  105. data/funchook/distorm/examples/ddk/makefile +1 -0
  106. data/funchook/distorm/examples/ddk/sources +10 -0
  107. data/funchook/distorm/examples/java/Makefile +23 -0
  108. data/funchook/distorm/examples/java/distorm/src/Main.java +43 -0
  109. data/funchook/distorm/examples/java/distorm/src/diStorm3/CodeInfo.java +27 -0
  110. data/funchook/distorm/examples/java/distorm/src/diStorm3/DecodedInst.java +32 -0
  111. data/funchook/distorm/examples/java/distorm/src/diStorm3/DecodedResult.java +11 -0
  112. data/funchook/distorm/examples/java/distorm/src/diStorm3/DecomposedInst.java +89 -0
  113. data/funchook/distorm/examples/java/distorm/src/diStorm3/DecomposedResult.java +11 -0
  114. data/funchook/distorm/examples/java/distorm/src/diStorm3/OpcodeEnum.java +131 -0
  115. data/funchook/distorm/examples/java/distorm/src/diStorm3/Opcodes.java +1123 -0
  116. data/funchook/distorm/examples/java/distorm/src/diStorm3/Operand.java +24 -0
  117. data/funchook/distorm/examples/java/distorm/src/diStorm3/distorm3.java +41 -0
  118. data/funchook/distorm/examples/java/jdistorm.c +405 -0
  119. data/funchook/distorm/examples/java/jdistorm.h +40 -0
  120. data/funchook/distorm/examples/java/jdistorm.sln +20 -0
  121. data/funchook/distorm/examples/java/jdistorm.vcproj +208 -0
  122. data/funchook/distorm/examples/linux/Makefile +15 -0
  123. data/funchook/distorm/examples/linux/main.c +181 -0
  124. data/funchook/distorm/examples/tests/Makefile +15 -0
  125. data/funchook/distorm/examples/tests/main.cpp +42 -0
  126. data/funchook/distorm/examples/tests/main.py +66 -0
  127. data/funchook/distorm/examples/tests/test_distorm3.py +1672 -0
  128. data/funchook/distorm/examples/tests/tests.sln +20 -0
  129. data/funchook/distorm/examples/tests/tests.vcxproj +82 -0
  130. data/funchook/distorm/examples/tests/tests.vcxproj.filters +22 -0
  131. data/funchook/distorm/examples/win32/disasm.sln +25 -0
  132. data/funchook/distorm/examples/win32/disasm.vcxproj +201 -0
  133. data/funchook/distorm/examples/win32/disasm.vcxproj.filters +14 -0
  134. data/funchook/distorm/examples/win32/main.cpp +163 -0
  135. data/funchook/distorm/include/distorm.h +482 -0
  136. data/funchook/distorm/include/mnemonics.h +301 -0
  137. data/funchook/distorm/make/linux/Makefile +28 -0
  138. data/funchook/distorm/make/mac/Makefile +24 -0
  139. data/funchook/distorm/make/win32/cdistorm.vcxproj +239 -0
  140. data/funchook/distorm/make/win32/cdistorm.vcxproj.filters +80 -0
  141. data/funchook/distorm/make/win32/distorm.sln +25 -0
  142. data/funchook/distorm/make/win32/resource.h +14 -0
  143. data/funchook/distorm/make/win32/resource.rc +99 -0
  144. data/funchook/distorm/python/distorm3/__init__.py +957 -0
  145. data/funchook/distorm/python/distorm3/sample.py +51 -0
  146. data/funchook/distorm/setup.cfg +10 -0
  147. data/funchook/distorm/setup.py +266 -0
  148. data/funchook/distorm/src/config.h +169 -0
  149. data/funchook/distorm/src/decoder.c +641 -0
  150. data/funchook/distorm/src/decoder.h +33 -0
  151. data/funchook/distorm/src/distorm.c +413 -0
  152. data/funchook/distorm/src/instructions.c +597 -0
  153. data/funchook/distorm/src/instructions.h +463 -0
  154. data/funchook/distorm/src/insts.c +7939 -0
  155. data/funchook/distorm/src/insts.h +64 -0
  156. data/funchook/distorm/src/mnemonics.c +284 -0
  157. data/funchook/distorm/src/operands.c +1290 -0
  158. data/funchook/distorm/src/operands.h +28 -0
  159. data/funchook/distorm/src/prefix.c +368 -0
  160. data/funchook/distorm/src/prefix.h +64 -0
  161. data/funchook/distorm/src/textdefs.c +172 -0
  162. data/funchook/distorm/src/textdefs.h +57 -0
  163. data/funchook/distorm/src/wstring.c +47 -0
  164. data/funchook/distorm/src/wstring.h +35 -0
  165. data/funchook/distorm/src/x86defs.h +82 -0
  166. data/funchook/include/funchook.h +123 -0
  167. data/funchook/install-sh +527 -0
  168. data/funchook/src/Makefile +70 -0
  169. data/funchook/src/Makefile.in +70 -0
  170. data/funchook/src/__strerror.h +109 -0
  171. data/funchook/src/config.h +101 -0
  172. data/funchook/src/config.h.in +100 -0
  173. data/funchook/src/decoder.o +0 -0
  174. data/funchook/src/distorm.o +0 -0
  175. data/funchook/src/funchook.c +440 -0
  176. data/funchook/src/funchook.o +0 -0
  177. data/funchook/src/funchook_internal.h +155 -0
  178. data/funchook/src/funchook_io.c +182 -0
  179. data/funchook/src/funchook_io.h +64 -0
  180. data/funchook/src/funchook_io.o +0 -0
  181. data/funchook/src/funchook_syscall.S +134 -0
  182. data/funchook/src/funchook_syscall.o +0 -0
  183. data/funchook/src/funchook_unix.c +480 -0
  184. data/funchook/src/funchook_unix.o +0 -0
  185. data/funchook/src/funchook_windows.c +397 -0
  186. data/funchook/src/funchook_x86.c +622 -0
  187. data/funchook/src/funchook_x86.o +0 -0
  188. data/funchook/src/instructions.o +0 -0
  189. data/funchook/src/insts.o +0 -0
  190. data/funchook/src/libfunchook.so +0 -0
  191. data/funchook/src/mnemonics.o +0 -0
  192. data/funchook/src/operands.o +0 -0
  193. data/funchook/src/os_func.c +115 -0
  194. data/funchook/src/os_func.h +75 -0
  195. data/funchook/src/os_func.o +0 -0
  196. data/funchook/src/os_func_unix.c +94 -0
  197. data/funchook/src/os_func_unix.o +0 -0
  198. data/funchook/src/os_func_windows.c +32 -0
  199. data/funchook/src/prefix.o +0 -0
  200. data/funchook/src/printf_base.c +1688 -0
  201. data/funchook/src/printf_base.h +46 -0
  202. data/funchook/src/printf_base.o +0 -0
  203. data/funchook/src/textdefs.o +0 -0
  204. data/funchook/src/wstring.o +0 -0
  205. data/funchook/test/Makefile +43 -0
  206. data/funchook/test/Makefile.in +43 -0
  207. data/funchook/test/funchook_test +0 -0
  208. data/funchook/test/libfunchook_test.c +25 -0
  209. data/funchook/test/libfunchook_test.so +0 -0
  210. data/funchook/test/libfunchook_test2.c +18 -0
  211. data/funchook/test/suffix.list +600 -0
  212. data/funchook/test/test_main.c +430 -0
  213. data/funchook/test/test_main.o +0 -0
  214. data/funchook/test/x86_64_test.S +10 -0
  215. data/funchook/test/x86_64_test.o +0 -0
  216. data/funchook/test/x86_test.S +339 -0
  217. data/funchook/win32/config.h +1 -0
  218. data/funchook/win32/funchook.sln +52 -0
  219. data/funchook/win32/funchook.vcxproj +188 -0
  220. data/funchook/win32/funchook.vcxproj.filters +84 -0
  221. data/funchook/win32/funchook_test.vcxproj +170 -0
  222. data/funchook/win32/funchook_test.vcxproj.filters +22 -0
  223. data/funchook/win32/funchook_test_dll.vcxproj +184 -0
  224. data/funchook/win32/funchook_test_dll.vcxproj.filters +30 -0
  225. data/funchook/win32/funchook_test_exe.def +3 -0
  226. data/lib/contrast-agent.rb +8 -0
  227. data/lib/contrast.rb +57 -0
  228. data/lib/contrast/agent.rb +80 -0
  229. data/lib/contrast/agent/assess.rb +45 -0
  230. data/lib/contrast/agent/assess/adjusted_span.rb +25 -0
  231. data/lib/contrast/agent/assess/class_reverter.rb +82 -0
  232. data/lib/contrast/agent/assess/contrast_event.rb +398 -0
  233. data/lib/contrast/agent/assess/frozen_properties.rb +41 -0
  234. data/lib/contrast/agent/assess/insulator.rb +53 -0
  235. data/lib/contrast/agent/assess/policy/dynamic_source_factory.rb +78 -0
  236. data/lib/contrast/agent/assess/policy/patcher.rb +85 -0
  237. data/lib/contrast/agent/assess/policy/policy.rb +116 -0
  238. data/lib/contrast/agent/assess/policy/policy_node.rb +289 -0
  239. data/lib/contrast/agent/assess/policy/policy_scanner.rb +44 -0
  240. data/lib/contrast/agent/assess/policy/preshift.rb +94 -0
  241. data/lib/contrast/agent/assess/policy/propagation_method.rb +260 -0
  242. data/lib/contrast/agent/assess/policy/propagation_node.rb +127 -0
  243. data/lib/contrast/agent/assess/policy/propagator.rb +35 -0
  244. data/lib/contrast/agent/assess/policy/propagator/append.rb +54 -0
  245. data/lib/contrast/agent/assess/policy/propagator/base.rb +37 -0
  246. data/lib/contrast/agent/assess/policy/propagator/center.rb +73 -0
  247. data/lib/contrast/agent/assess/policy/propagator/custom.rb +36 -0
  248. data/lib/contrast/agent/assess/policy/propagator/database_write.rb +62 -0
  249. data/lib/contrast/agent/assess/policy/propagator/insert.rb +55 -0
  250. data/lib/contrast/agent/assess/policy/propagator/keep.rb +26 -0
  251. data/lib/contrast/agent/assess/policy/propagator/next.rb +42 -0
  252. data/lib/contrast/agent/assess/policy/propagator/prepend.rb +50 -0
  253. data/lib/contrast/agent/assess/policy/propagator/remove.rb +76 -0
  254. data/lib/contrast/agent/assess/policy/propagator/replace.rb +27 -0
  255. data/lib/contrast/agent/assess/policy/propagator/reverse.rb +38 -0
  256. data/lib/contrast/agent/assess/policy/propagator/select.rb +86 -0
  257. data/lib/contrast/agent/assess/policy/propagator/splat.rb +60 -0
  258. data/lib/contrast/agent/assess/policy/propagator/split.rb +49 -0
  259. data/lib/contrast/agent/assess/policy/propagator/substitution.rb +169 -0
  260. data/lib/contrast/agent/assess/policy/propagator/trim.rb +81 -0
  261. data/lib/contrast/agent/assess/policy/rewriter_patch.rb +79 -0
  262. data/lib/contrast/agent/assess/policy/source_method.rb +209 -0
  263. data/lib/contrast/agent/assess/policy/source_node.rb +62 -0
  264. data/lib/contrast/agent/assess/policy/trigger_method.rb +209 -0
  265. data/lib/contrast/agent/assess/policy/trigger_node.rb +198 -0
  266. data/lib/contrast/agent/assess/policy/trigger_validation/ssrf_validator.rb +77 -0
  267. data/lib/contrast/agent/assess/policy/trigger_validation/trigger_validation.rb +31 -0
  268. data/lib/contrast/agent/assess/policy/trigger_validation/xss_validator.rb +40 -0
  269. data/lib/contrast/agent/assess/properties.rb +392 -0
  270. data/lib/contrast/agent/assess/rule.rb +18 -0
  271. data/lib/contrast/agent/assess/rule/base.rb +72 -0
  272. data/lib/contrast/agent/assess/rule/csrf.rb +66 -0
  273. data/lib/contrast/agent/assess/rule/csrf/csrf_action.rb +28 -0
  274. data/lib/contrast/agent/assess/rule/csrf/csrf_applicator.rb +69 -0
  275. data/lib/contrast/agent/assess/rule/csrf/csrf_watcher.rb +132 -0
  276. data/lib/contrast/agent/assess/rule/provider.rb +21 -0
  277. data/lib/contrast/agent/assess/rule/provider/hardcoded_key.rb +62 -0
  278. data/lib/contrast/agent/assess/rule/provider/hardcoded_password.rb +73 -0
  279. data/lib/contrast/agent/assess/rule/provider/hardcoded_value_rule.rb +121 -0
  280. data/lib/contrast/agent/assess/rule/redos.rb +68 -0
  281. data/lib/contrast/agent/assess/rule/response_scanning_rule.rb +47 -0
  282. data/lib/contrast/agent/assess/rule/response_watcher.rb +36 -0
  283. data/lib/contrast/agent/assess/rule/watcher.rb +36 -0
  284. data/lib/contrast/agent/assess/tag.rb +151 -0
  285. data/lib/contrast/agent/at_exit_hook.rb +33 -0
  286. data/lib/contrast/agent/class_reopener.rb +195 -0
  287. data/lib/contrast/agent/deadzone/policy/deadzone_node.rb +26 -0
  288. data/lib/contrast/agent/deadzone/policy/policy.rb +57 -0
  289. data/lib/contrast/agent/disable_reaction.rb +24 -0
  290. data/lib/contrast/agent/exclusion_matcher.rb +190 -0
  291. data/lib/contrast/agent/feature_state.rb +379 -0
  292. data/lib/contrast/agent/inventory/policy/policy.rb +32 -0
  293. data/lib/contrast/agent/inventory/policy/trigger_node.rb +22 -0
  294. data/lib/contrast/agent/logger_manager.rb +116 -0
  295. data/lib/contrast/agent/middleware.rb +352 -0
  296. data/lib/contrast/agent/module_data.rb +16 -0
  297. data/lib/contrast/agent/patching/policy/after_load_patch.rb +37 -0
  298. data/lib/contrast/agent/patching/policy/after_load_patcher.rb +58 -0
  299. data/lib/contrast/agent/patching/policy/method_policy.rb +94 -0
  300. data/lib/contrast/agent/patching/policy/module_policy.rb +116 -0
  301. data/lib/contrast/agent/patching/policy/patch.rb +312 -0
  302. data/lib/contrast/agent/patching/policy/patch_status.rb +192 -0
  303. data/lib/contrast/agent/patching/policy/patcher.rb +310 -0
  304. data/lib/contrast/agent/patching/policy/policy.rb +138 -0
  305. data/lib/contrast/agent/patching/policy/policy_node.rb +80 -0
  306. data/lib/contrast/agent/patching/policy/policy_unpatcher.rb +28 -0
  307. data/lib/contrast/agent/patching/policy/trigger_node.rb +81 -0
  308. data/lib/contrast/agent/protect/policy/policy.rb +37 -0
  309. data/lib/contrast/agent/protect/policy/trigger_node.rb +23 -0
  310. data/lib/contrast/agent/protect/rule.rb +58 -0
  311. data/lib/contrast/agent/protect/rule/base.rb +300 -0
  312. data/lib/contrast/agent/protect/rule/base_service.rb +88 -0
  313. data/lib/contrast/agent/protect/rule/cmd_injection.rb +156 -0
  314. data/lib/contrast/agent/protect/rule/csrf.rb +118 -0
  315. data/lib/contrast/agent/protect/rule/csrf/csrf_evaluator.rb +103 -0
  316. data/lib/contrast/agent/protect/rule/csrf/csrf_token_injector.rb +85 -0
  317. data/lib/contrast/agent/protect/rule/default_scanner.rb +300 -0
  318. data/lib/contrast/agent/protect/rule/deserialization.rb +193 -0
  319. data/lib/contrast/agent/protect/rule/http_method_tampering.rb +80 -0
  320. data/lib/contrast/agent/protect/rule/no_sqli.rb +101 -0
  321. data/lib/contrast/agent/protect/rule/no_sqli/mongo_no_sql_scanner.rb +40 -0
  322. data/lib/contrast/agent/protect/rule/path_traversal.rb +143 -0
  323. data/lib/contrast/agent/protect/rule/sqli.rb +101 -0
  324. data/lib/contrast/agent/protect/rule/sqli/default_sql_scanner.rb +16 -0
  325. data/lib/contrast/agent/protect/rule/sqli/mysql_sql_scanner.rb +38 -0
  326. data/lib/contrast/agent/protect/rule/sqli/postgres_sql_scanner.rb +22 -0
  327. data/lib/contrast/agent/protect/rule/sqli/sqlite_sql_scanner.rb +19 -0
  328. data/lib/contrast/agent/protect/rule/unsafe_file_upload.rb +20 -0
  329. data/lib/contrast/agent/protect/rule/xss.rb +24 -0
  330. data/lib/contrast/agent/protect/rule/xxe.rb +120 -0
  331. data/lib/contrast/agent/protect/rule/xxe/entity_wrapper.rb +82 -0
  332. data/lib/contrast/agent/railtie.rb +30 -0
  333. data/lib/contrast/agent/reaction_processor.rb +47 -0
  334. data/lib/contrast/agent/request.rb +493 -0
  335. data/lib/contrast/agent/request_context.rb +225 -0
  336. data/lib/contrast/agent/require_state.rb +61 -0
  337. data/lib/contrast/agent/response.rb +215 -0
  338. data/lib/contrast/agent/rewriter.rb +244 -0
  339. data/lib/contrast/agent/scope.rb +28 -0
  340. data/lib/contrast/agent/service_heartbeat.rb +37 -0
  341. data/lib/contrast/agent/settings_state.rb +148 -0
  342. data/lib/contrast/agent/socket_client.rb +125 -0
  343. data/lib/contrast/agent/thread.rb +26 -0
  344. data/lib/contrast/agent/tracepoint_hook.rb +51 -0
  345. data/lib/contrast/agent/version.rb +8 -0
  346. data/lib/contrast/api.rb +17 -0
  347. data/lib/contrast/api/.gitkeep +0 -0
  348. data/lib/contrast/api/connection_status.rb +49 -0
  349. data/lib/contrast/api/socket.rb +43 -0
  350. data/lib/contrast/api/speedracer.rb +206 -0
  351. data/lib/contrast/api/tcp_socket.rb +31 -0
  352. data/lib/contrast/api/unix_socket.rb +25 -0
  353. data/lib/contrast/common_agent_configuration.rb +86 -0
  354. data/lib/contrast/components/agent.rb +85 -0
  355. data/lib/contrast/components/app_context.rb +188 -0
  356. data/lib/contrast/components/assess.rb +67 -0
  357. data/lib/contrast/components/config.rb +135 -0
  358. data/lib/contrast/components/contrast_service.rb +113 -0
  359. data/lib/contrast/components/heap_dump.rb +34 -0
  360. data/lib/contrast/components/interface.rb +178 -0
  361. data/lib/contrast/components/inventory.rb +23 -0
  362. data/lib/contrast/components/logger.rb +92 -0
  363. data/lib/contrast/components/protect.rb +38 -0
  364. data/lib/contrast/components/sampling.rb +41 -0
  365. data/lib/contrast/components/scope.rb +106 -0
  366. data/lib/contrast/components/settings.rb +140 -0
  367. data/lib/contrast/config.rb +33 -0
  368. data/lib/contrast/config/agent_configuration.rb +24 -0
  369. data/lib/contrast/config/application_configuration.rb +27 -0
  370. data/lib/contrast/config/assess_configuration.rb +22 -0
  371. data/lib/contrast/config/assess_rules_configuration.rb +18 -0
  372. data/lib/contrast/config/base_configuration.rb +105 -0
  373. data/lib/contrast/config/default_value.rb +16 -0
  374. data/lib/contrast/config/exception_configuration.rb +21 -0
  375. data/lib/contrast/config/heap_dump_configuration.rb +23 -0
  376. data/lib/contrast/config/inventory_configuration.rb +20 -0
  377. data/lib/contrast/config/logger_configuration.rb +20 -0
  378. data/lib/contrast/config/protect_configuration.rb +20 -0
  379. data/lib/contrast/config/protect_rule_configuration.rb +37 -0
  380. data/lib/contrast/config/protect_rules_configuration.rb +30 -0
  381. data/lib/contrast/config/root_configuration.rb +26 -0
  382. data/lib/contrast/config/ruby_configuration.rb +39 -0
  383. data/lib/contrast/config/sampling_configuration.rb +22 -0
  384. data/lib/contrast/config/server_configuration.rb +23 -0
  385. data/lib/contrast/config/service_configuration.rb +22 -0
  386. data/lib/contrast/configuration.rb +214 -0
  387. data/lib/contrast/core_extensions/assess.rb +51 -0
  388. data/lib/contrast/core_extensions/assess/array.rb +58 -0
  389. data/lib/contrast/core_extensions/assess/assess_extension.rb +145 -0
  390. data/lib/contrast/core_extensions/assess/basic_object.rb +15 -0
  391. data/lib/contrast/core_extensions/assess/erb.rb +42 -0
  392. data/lib/contrast/core_extensions/assess/exec_trigger.rb +48 -0
  393. data/lib/contrast/core_extensions/assess/fiber.rb +125 -0
  394. data/lib/contrast/core_extensions/assess/hash.rb +22 -0
  395. data/lib/contrast/core_extensions/assess/kernel.rb +95 -0
  396. data/lib/contrast/core_extensions/assess/module.rb +14 -0
  397. data/lib/contrast/core_extensions/assess/regexp.rb +206 -0
  398. data/lib/contrast/core_extensions/assess/string.rb +75 -0
  399. data/lib/contrast/core_extensions/assess/tilt_template_trigger.rb +73 -0
  400. data/lib/contrast/core_extensions/delegator.rb +14 -0
  401. data/lib/contrast/core_extensions/eval_trigger.rb +52 -0
  402. data/lib/contrast/core_extensions/inventory.rb +22 -0
  403. data/lib/contrast/core_extensions/inventory/datastores.rb +37 -0
  404. data/lib/contrast/core_extensions/module.rb +42 -0
  405. data/lib/contrast/core_extensions/object.rb +27 -0
  406. data/lib/contrast/core_extensions/protect.rb +20 -0
  407. data/lib/contrast/core_extensions/protect/applies_command_injection_rule.rb +70 -0
  408. data/lib/contrast/core_extensions/protect/applies_deserialization_rule.rb +58 -0
  409. data/lib/contrast/core_extensions/protect/applies_no_sqli_rule.rb +81 -0
  410. data/lib/contrast/core_extensions/protect/applies_path_traversal_rule.rb +119 -0
  411. data/lib/contrast/core_extensions/protect/applies_sqli_rule.rb +63 -0
  412. data/lib/contrast/core_extensions/protect/applies_xxe_rule.rb +141 -0
  413. data/lib/contrast/core_extensions/protect/kernel.rb +30 -0
  414. data/lib/contrast/core_extensions/protect/psych.rb +7 -0
  415. data/lib/contrast/core_extensions/thread.rb +31 -0
  416. data/lib/contrast/internal_exception.rb +8 -0
  417. data/lib/contrast/rails_extensions/assess/action_controller_inheritance.rb +48 -0
  418. data/lib/contrast/rails_extensions/assess/active_record.rb +32 -0
  419. data/lib/contrast/rails_extensions/assess/active_record_named.rb +61 -0
  420. data/lib/contrast/rails_extensions/assess/configuration.rb +26 -0
  421. data/lib/contrast/rails_extensions/buffer.rb +30 -0
  422. data/lib/contrast/rails_extensions/rack.rb +45 -0
  423. data/lib/contrast/security_exception.rb +14 -0
  424. data/lib/contrast/sinatra_extensions/assess/cookie.rb +26 -0
  425. data/lib/contrast/sinatra_extensions/inventory/sinatra_base.rb +59 -0
  426. data/lib/contrast/tasks/service.rb +95 -0
  427. data/lib/contrast/utils/assess/sampling_util.rb +96 -0
  428. data/lib/contrast/utils/assess/tracking_util.rb +39 -0
  429. data/lib/contrast/utils/boolean_util.rb +33 -0
  430. data/lib/contrast/utils/cache.rb +69 -0
  431. data/lib/contrast/utils/class_util.rb +58 -0
  432. data/lib/contrast/utils/comment_range.rb +19 -0
  433. data/lib/contrast/utils/data_store_util.rb +23 -0
  434. data/lib/contrast/utils/duck_utils.rb +58 -0
  435. data/lib/contrast/utils/env_configuration_item.rb +52 -0
  436. data/lib/contrast/utils/environment_util.rb +152 -0
  437. data/lib/contrast/utils/freeze_util.rb +36 -0
  438. data/lib/contrast/utils/gemfile_reader.rb +191 -0
  439. data/lib/contrast/utils/hash_digest.rb +148 -0
  440. data/lib/contrast/utils/heap_dump_util.rb +113 -0
  441. data/lib/contrast/utils/invalid_configuration_util.rb +88 -0
  442. data/lib/contrast/utils/inventory_util.rb +126 -0
  443. data/lib/contrast/utils/io_util.rb +61 -0
  444. data/lib/contrast/utils/object_share.rb +117 -0
  445. data/lib/contrast/utils/operating_environment.rb +38 -0
  446. data/lib/contrast/utils/os.rb +49 -0
  447. data/lib/contrast/utils/path_util.rb +151 -0
  448. data/lib/contrast/utils/performs_logging.rb +152 -0
  449. data/lib/contrast/utils/preflight_util.rb +13 -0
  450. data/lib/contrast/utils/prevent_serialization.rb +52 -0
  451. data/lib/contrast/utils/rack_assess_session_cookie.rb +104 -0
  452. data/lib/contrast/utils/rails_assess_configuration.rb +95 -0
  453. data/lib/contrast/utils/random_util.rb +22 -0
  454. data/lib/contrast/utils/resource_loader.rb +23 -0
  455. data/lib/contrast/utils/ruby_ast_rewriter.rb +74 -0
  456. data/lib/contrast/utils/scope_util.rb +99 -0
  457. data/lib/contrast/utils/service_response_util.rb +116 -0
  458. data/lib/contrast/utils/service_sender_util.rb +98 -0
  459. data/lib/contrast/utils/sha256_builder.rb +69 -0
  460. data/lib/contrast/utils/sinatra_helper.rb +49 -0
  461. data/lib/contrast/utils/stack_trace_utils.rb +209 -0
  462. data/lib/contrast/utils/string_utils.rb +72 -0
  463. data/lib/contrast/utils/tag_util.rb +139 -0
  464. data/lib/contrast/utils/thread_tracker.rb +54 -0
  465. data/lib/contrast/utils/timer.rb +78 -0
  466. data/resources/assess/policy.json +1673 -0
  467. data/resources/csrf/inject.js +44 -0
  468. data/resources/deadzone/policy.json +55 -0
  469. data/resources/factory-bot-spec/spec_helper.rb +30 -0
  470. data/resources/inventory/policy.json +110 -0
  471. data/resources/protect/policy.json +417 -0
  472. data/resources/rubocops/kernel/catch_cop.rb +37 -0
  473. data/resources/rubocops/kernel/require_cop.rb +37 -0
  474. data/resources/rubocops/kernel/require_relative_cop.rb +33 -0
  475. data/resources/rubocops/module/autoload_cop.rb +37 -0
  476. data/resources/rubocops/module/const_defined_cop.rb +37 -0
  477. data/resources/rubocops/module/const_get_cop.rb +37 -0
  478. data/resources/rubocops/module/const_set_cop.rb +37 -0
  479. data/resources/rubocops/module/constants_cop.rb +37 -0
  480. data/resources/rubocops/module/name_cop.rb +37 -0
  481. data/resources/rubocops/object/class_cop.rb +37 -0
  482. data/resources/rubocops/object/freeze_cop.rb +37 -0
  483. data/resources/rubocops/object/frozen_cop.rb +37 -0
  484. data/resources/rubocops/object/is_a_cop.rb +37 -0
  485. data/resources/rubocops/object/method_cop.rb +37 -0
  486. data/resources/rubocops/object/respond_to_cop.rb +37 -0
  487. data/resources/rubocops/object/singleton_class_cop.rb +37 -0
  488. data/resources/rubocops/regexp/spelling_cop.rb +44 -0
  489. data/resources/rubocops/thread/new_cop.rb +39 -0
  490. data/resources/ruby-spec/ancestors_spec.rb +70 -0
  491. data/resources/ruby-spec/modulo_spec.rb +831 -0
  492. data/resources/ruby-spec/parameters_spec.rb +261 -0
  493. data/resources/ruby-spec/ruby_spec_spec_helper.rb +35 -0
  494. data/resources/test_marker.txt +1 -0
  495. data/ruby-agent.gemspec +129 -0
  496. data/service_executables/.gitkeep +0 -0
  497. data/service_executables/VERSION +1 -0
  498. data/service_executables/linux/contrast-service +0 -0
  499. data/service_executables/mac/contrast-service +0 -0
  500. metadata +945 -0
data/funchook/distorm/disOps/x86sets.py ADDED
@@ -0,0 +1,1664 @@
1
+ #
2
+ # x86sets.py
3
+ #
4
+ # Copyright (C) 2009 Gil Dabah, http://ragestorm.net/disops/
5
+ #
6
+
7
+ from x86header import *
8
+
9
+ OPT = OperandType
10
+ IFlag = InstFlag
11
+
12
+ class Instructions:
13
+ """ Initializes all instruction of the 80x86 CPU (includes AMD64). """
14
+
15
+ def init_INTEGER(self):
16
+ Set = lambda *args: self.SetCallback(ISetClass.INTEGER, *args)
17
+
18
+ # V 1.5.13 - Pushes can be affected by operand size prefix. Segment is encoded in flags.
19
+
20
+ # SAL is exactly like SHL, so I prefer to use the mnemonic "SHL" (below).
21
+
22
+ Set("00", ["ADD"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
23
+ Set("01", ["ADD"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
24
+ Set("02", ["ADD"], [OPT.REG8, OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
25
+ Set("03", ["ADD"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
26
+ Set("04", ["ADD"], [OPT.ACC8, OPT.IMM8], IFlag.INST_FLAGS_NONE)
27
+ Set("05", ["ADD"], [OPT.ACC_FULL, OPT.IMM_FULL], IFlag.INST_FLAGS_NONE)
28
+ Set("06", ["PUSH"], [OPT.SEG], IFlag.PRE_ES | IFlag.INVALID_64BITS)
29
+ Set("07", ["POP"], [OPT.SEG], IFlag.PRE_ES | IFlag.INVALID_64BITS)
30
+ Set("08", ["OR"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
31
+ Set("09", ["OR"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
32
+ Set("0a", ["OR"], [OPT.REG8, OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
33
+ Set("0b", ["OR"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
34
+ Set("0c", ["OR"], [OPT.ACC8, OPT.IMM8], IFlag.INST_FLAGS_NONE)
35
+ Set("0d", ["OR"], [OPT.ACC_FULL, OPT.IMM_FULL], IFlag.INST_FLAGS_NONE)
36
+ Set("0e", ["PUSH"], [OPT.SEG], IFlag.PRE_CS | IFlag.INVALID_64BITS)
37
+ Set("0f, 00 /00", ["SLDT"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED)
38
+ Set("0f, 00 /01", ["STR"], [OPT.RM16], IFlag.MODRM_REQUIRED)
39
+ Set("0f, 00 /02", ["LLDT"], [OPT.RM16], IFlag.MODRM_REQUIRED)
40
+ Set("0f, 00 /03", ["LTR"], [OPT.RM16], IFlag.MODRM_REQUIRED | IFlag._32BITS)
41
+ Set("0f, 00 /04", ["VERR"], [OPT.RM16], IFlag.MODRM_REQUIRED)
42
+ Set("0f, 00 /05", ["VERW"], [OPT.RM16], IFlag.MODRM_REQUIRED)
43
+ Set("0f, 01 //00", ["SGDT"], [OPT.MEM16_3264], IFlag.MODRM_REQUIRED | IFlag._64BITS)
44
+ Set("0f, 01 //01", ["SIDT"], [OPT.MEM16_3264], IFlag.MODRM_REQUIRED | IFlag._64BITS)
45
+ Set("0f, 01 //02", ["LGDT"], [OPT.MEM16_3264], IFlag.MODRM_REQUIRED | IFlag._64BITS)
46
+ Set("0f, 01 //03", ["LIDT"], [OPT.MEM16_3264], IFlag.MODRM_REQUIRED | IFlag._64BITS)
47
+
48
+ # These two instructions need the whole byte, means they use the whole third byte and are NOT divided.
49
+ # We'll recognize them by their 3 REG bits in their third byte.
50
+ Set("0f, 01 //04", ["SMSW"], [OPT.RFULL_M16], IFlag.MODRM_REQUIRED | IFlag.NOT_DIVIDED)
51
+ Set("0f, 01 //06", ["LMSW"], [OPT.RM16], IFlag.MODRM_REQUIRED | IFlag.NOT_DIVIDED)
52
+
53
+ Set("0f, 01 //07", ["INVLPG"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
54
+ Set("0f, 01 //c8", ["MONITOR"], [], IFlag._32BITS)
55
+ Set("0f, 01 //c9", ["MWAIT"], [], IFlag._32BITS)
56
+ Set("0f, 01 //f8", ["SWAPGS"], [], IFlag._64BITS_FETCH)
57
+ Set("0f, 01 //f9", ["RDTSCP"], [], IFlag._64BITS_FETCH)
58
+ Set("0f, 02", ["LAR"], [OPT.REG_FULL, OPT.RM16], IFlag.MODRM_REQUIRED)
59
+ Set("0f, 03", ["LSL"], [OPT.REG_FULL, OPT.RM16], IFlag.MODRM_REQUIRED)
60
+ Set("0f, 06", ["CLTS"], [], IFlag._32BITS)
61
+ Set("0f, 08", ["INVD"], [], IFlag._32BITS)
62
+ Set("0f, 09", ["WBINVD"], [], IFlag._32BITS)
63
+ Set("0f, 0b", ["UD2"], [], IFlag._32BITS)
64
+
65
+ # MOV: In 64 bits decoding mode REG is 64 bits by default.
66
+ Set("0f, 20", ["MOV"], [OPT.FREG32_64_RM, OPT.CREG], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
67
+ Set("0f, 21", ["MOV"], [OPT.FREG32_64_RM, OPT.DREG], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
68
+ Set("0f, 22", ["MOV"], [OPT.CREG, OPT.FREG32_64_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
69
+ Set("0f, 23", ["MOV"], [OPT.DREG, OPT.FREG32_64_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
70
+ Set("0f, 30", ["WRMSR"], [], IFlag._32BITS)
71
+ Set("0f, 31", ["RDTSC"], [], IFlag._32BITS)
72
+ Set("0f, 32", ["RDMSR"], [], IFlag._32BITS)
73
+ Set("0f, 33", ["RDPMC"], [], IFlag._32BITS)
74
+ Set("0f, 80", ["JO"], [OPT.RELC_FULL], IFlag._32BITS)
75
+ Set("0f, 81", ["JNO"], [OPT.RELC_FULL], IFlag._32BITS)
76
+ Set("0f, 82", ["JB"], [OPT.RELC_FULL], IFlag._32BITS)
77
+ Set("0f, 83", ["JAE"], [OPT.RELC_FULL], IFlag._32BITS)
78
+ Set("0f, 84", ["JZ"], [OPT.RELC_FULL], IFlag._32BITS)
79
+ Set("0f, 85", ["JNZ"], [OPT.RELC_FULL], IFlag._32BITS)
80
+ Set("0f, 86", ["JBE"], [OPT.RELC_FULL], IFlag._32BITS)
81
+ Set("0f, 87", ["JA"], [OPT.RELC_FULL], IFlag._32BITS)
82
+ Set("0f, 88", ["JS"], [OPT.RELC_FULL], IFlag._32BITS)
83
+ Set("0f, 89", ["JNS"], [OPT.RELC_FULL], IFlag._32BITS)
84
+ Set("0f, 8a", ["JP"], [OPT.RELC_FULL], IFlag._32BITS)
85
+ Set("0f, 8b", ["JNP"], [OPT.RELC_FULL], IFlag._32BITS)
86
+ Set("0f, 8c", ["JL"], [OPT.RELC_FULL], IFlag._32BITS)
87
+ Set("0f, 8d", ["JGE"], [OPT.RELC_FULL], IFlag._32BITS)
88
+ Set("0f, 8e", ["JLE"], [OPT.RELC_FULL], IFlag._32BITS)
89
+ Set("0f, 8f", ["JG"], [OPT.RELC_FULL], IFlag._32BITS)
90
+ Set("0f, 90", ["SETO"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
91
+ Set("0f, 91", ["SETNO"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
92
+ Set("0f, 92", ["SETB"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
93
+ Set("0f, 93", ["SETAE"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
94
+ Set("0f, 94", ["SETZ"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
95
+ Set("0f, 95", ["SETNZ"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
96
+ Set("0f, 96", ["SETBE"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
97
+ Set("0f, 97", ["SETA"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
98
+ Set("0f, 98", ["SETS"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
99
+ Set("0f, 99", ["SETNS"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
100
+ Set("0f, 9a", ["SETP"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
101
+ Set("0f, 9b", ["SETNP"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
102
+ Set("0f, 9c", ["SETL"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
103
+ Set("0f, 9d", ["SETGE"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
104
+ Set("0f, 9e", ["SETLE"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
105
+ Set("0f, 9f", ["SETG"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
106
+ Set("0f, a0", ["PUSH"], [OPT.SEG], IFlag._32BITS | IFlag.PRE_FS | IFlag._64BITS)
107
+ Set("0f, a1", ["POP"], [OPT.SEG], IFlag._32BITS | IFlag.PRE_FS | IFlag._64BITS)
108
+ Set("0f, a2", ["CPUID"], [], IFlag._32BITS)
109
+ Set("0f, a3", ["BT"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
110
+ Set("0f, a4", ["SHLD"], [OPT.RM_FULL, OPT.REG_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
111
+ Set("0f, a5", ["SHLD"], [OPT.RM_FULL, OPT.REG_FULL, OPT.REGCL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
112
+ Set("0f, a8", ["PUSH"], [OPT.SEG], IFlag._32BITS | IFlag.PRE_GS | IFlag._64BITS)
113
+ Set("0f, a9", ["POP"], [OPT.SEG], IFlag._32BITS | IFlag.PRE_GS | IFlag._64BITS)
114
+ Set("0f, aa", ["RSM"], [], IFlag._32BITS)
115
+ Set("0f, ab", ["BTS"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
116
+ Set("0f, ac", ["SHRD"], [OPT.RM_FULL, OPT.REG_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
117
+ Set("0f, ad", ["SHRD"], [OPT.RM_FULL, OPT.REG_FULL, OPT.REGCL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
118
+ Set("0f, ae /00", ["FXSAVE", "", "FXSAVE64"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX | IFlag.USE_EXMNEMONIC2)
119
+ Set("0f, ae /01", ["FXRSTOR", "", "FXRSTOR64"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX | IFlag.USE_EXMNEMONIC2)
120
+ Set("0f, ae /02", ["LDMXCSR"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
121
+ Set("0f, ae /03", ["STMXCSR"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
122
+
123
+ # MFENCE and XSAVEOPT share the same opcode 0f ae /6. It's MFENCE when MOD=11, else XSAVEOPT or XSAVEOPT64 in 64.
124
+ Set("0f, ae /06", ["MFENCE", "XSAVEOPT", "XSAVEOPT64"], [OPT.MEM_OPT], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC | IFlag.MNEMONIC_MODRM_BASED | IFlag._64BITS | IFlag.PRE_REX | IFlag.USE_EXMNEMONIC2)
125
+
126
+ # SFENCE and CLFLUSH share the same opcode 0f ae /7. It's SFENCE when MOD=11, else CLFLUSH.
127
+ # But the operand is used only for CLFLUSH, which means it's optional. MOD=11 for first mnemonic.
128
+ Set("0f, ae /07", ["SFENCE", "CLFLUSH"], [OPT.MEM_OPT], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC | IFlag.MNEMONIC_MODRM_BASED)
129
+ # Same for LFENCE and XRSTOR with 0f ae /5.
130
+ Set("0f, ae /05", ["LFENCE", "XRSTOR", "XRSTOR64"], [OPT.MEM_OPT], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC | IFlag.MNEMONIC_MODRM_BASED | IFlag._64BITS | IFlag.PRE_REX | IFlag.USE_EXMNEMONIC2)
131
+
132
+ Set("0f, af", ["IMUL"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
133
+ Set("0f, b0", ["CMPXCHG"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
134
+ Set("0f, b1", ["CMPXCHG"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
135
+ Set("0f, b2", ["LSS"], [OPT.REG_FULL, OPT.MEM16_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
136
+ Set("0f, b3", ["BTR"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
137
+ Set("0f, b4", ["LFS"], [OPT.REG_FULL, OPT.MEM16_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
138
+ Set("0f, b5", ["LGS"], [OPT.REG_FULL, OPT.MEM16_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
139
+ Set("0f, b6", ["MOVZX"], [OPT.REG_FULL, OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
140
+ Set("0f, b7", ["MOVZX"], [OPT.REG_FULL, OPT.RM16], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
141
+ Set("0f, b9", ["UD2"], [], IFlag._32BITS)
142
+ Set("0f, ba /04", ["BT"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
143
+ Set("0f, ba /05", ["BTS"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
144
+ Set("0f, ba /06", ["BTR"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
145
+ Set("0f, ba /07", ["BTC"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
146
+ Set("0f, bb", ["BTC"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
147
+ Set("0f, bc", ["BSF"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
148
+ Set("0f, bd", ["BSR"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
149
+
150
+ # V 1.1.6 MOVSX/MOVZX now support 16bits regs.
151
+ Set("0f, be", ["MOVSX"], [OPT.REG_FULL, OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
152
+ Set("0f, bf", ["MOVSX"], [OPT.REG_FULL, OPT.RM16], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
153
+ Set("0f, c0", ["XADD"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
154
+ Set("0f, c1", ["XADD"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
155
+ Set("0f, c7 /01", ["CMPXCHG8B", "", "CMPXCHG16B"], [OPT.MEM64_128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK | IFlag._64BITS | IFlag.PRE_REX | IFlag.USE_EXMNEMONIC2)
156
+ Set("0f, c8", ["BSWAP"], [OPT.IB_R_FULL], IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX | IFlag.GEN_BLOCK)
157
+ Set("10", ["ADC"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
158
+ Set("11", ["ADC"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
159
+ Set("12", ["ADC"], [OPT.REG8, OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
160
+ Set("13", ["ADC"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
161
+ Set("14", ["ADC"], [OPT.ACC8, OPT.IMM8], IFlag.INST_FLAGS_NONE)
162
+ Set("15", ["ADC"], [OPT.ACC_FULL, OPT.IMM_FULL], IFlag.INST_FLAGS_NONE)
163
+ Set("16", ["PUSH"], [OPT.SEG], IFlag.PRE_SS | IFlag.INVALID_64BITS)
164
+ Set("17", ["POP"], [OPT.SEG], IFlag.PRE_SS | IFlag.INVALID_64BITS)
165
+ Set("18", ["SBB"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
166
+ Set("19", ["SBB"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
167
+ Set("1a", ["SBB"], [OPT.REG8, OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
168
+ Set("1b", ["SBB"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
169
+ Set("1c", ["SBB"], [OPT.ACC8, OPT.IMM8], IFlag.INST_FLAGS_NONE)
170
+ Set("1d", ["SBB"], [OPT.ACC_FULL, OPT.IMM_FULL], IFlag.INST_FLAGS_NONE)
171
+ Set("1e", ["PUSH"], [OPT.SEG], IFlag.PRE_DS | IFlag.INVALID_64BITS)
172
+ Set("1f", ["POP"], [OPT.SEG], IFlag.PRE_DS | IFlag.INVALID_64BITS)
173
+ Set("20", ["AND"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
174
+ Set("21", ["AND"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
175
+ Set("22", ["AND"], [OPT.REG8, OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
176
+ Set("23", ["AND"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
177
+ Set("24", ["AND"], [OPT.ACC8, OPT.IMM8], IFlag.INST_FLAGS_NONE)
178
+ Set("25", ["AND"], [OPT.ACC_FULL, OPT.IMM_FULL], IFlag.INST_FLAGS_NONE)
179
+ Set("27", ["DAA"], [], IFlag.INVALID_64BITS)
180
+ Set("28", ["SUB"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
181
+ Set("29", ["SUB"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
182
+ Set("2a", ["SUB"], [OPT.REG8, OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
183
+ Set("2b", ["SUB"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
184
+ Set("2c", ["SUB"], [OPT.ACC8, OPT.IMM8], IFlag.INST_FLAGS_NONE)
185
+ Set("2d", ["SUB"], [OPT.ACC_FULL, OPT.IMM_FULL], IFlag.INST_FLAGS_NONE)
186
+ Set("2f", ["DAS"], [], IFlag.INVALID_64BITS)
187
+ Set("30", ["XOR"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
188
+ Set("31", ["XOR"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
189
+ Set("32", ["XOR"], [OPT.REG8, OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
190
+ Set("33", ["XOR"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
191
+ Set("34", ["XOR"], [OPT.ACC8, OPT.IMM8], IFlag.INST_FLAGS_NONE)
192
+ Set("35", ["XOR"], [OPT.ACC_FULL, OPT.IMM_FULL], IFlag.INST_FLAGS_NONE)
193
+ Set("37", ["AAA"], [], IFlag.INVALID_64BITS)
194
+ Set("38", ["CMP"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED)
195
+ Set("39", ["CMP"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED)
196
+ Set("3a", ["CMP"], [OPT.REG8, OPT.RM8], IFlag.MODRM_REQUIRED)
197
+ Set("3b", ["CMP"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED)
198
+ Set("3c", ["CMP"], [OPT.ACC8, OPT.IMM8], IFlag.INST_FLAGS_NONE)
199
+ Set("3d", ["CMP"], [OPT.ACC_FULL, OPT.IMM_FULL], IFlag.INST_FLAGS_NONE)
200
+ Set("3f", ["AAS"], [], IFlag.INVALID_64BITS)
201
+ Set("40", ["INC"], [OPT.IB_R_FULL], IFlag.INVALID_64BITS | IFlag.GEN_BLOCK)
202
+ Set("48", ["DEC"], [OPT.IB_R_FULL], IFlag.INVALID_64BITS | IFlag.GEN_BLOCK)
203
+ Set("50", ["PUSH"], [OPT.IB_R_FULL], IFlag._64BITS | IFlag.GEN_BLOCK)
204
+ Set("58", ["POP"], [OPT.IB_R_FULL], IFlag._64BITS | IFlag.GEN_BLOCK)
205
+ Set("60", ["PUSHA"], [], IFlag.NATIVE | IFlag.INVALID_64BITS)
206
+ Set("61", ["POPA"], [], IFlag.NATIVE | IFlag.INVALID_64BITS)
207
+ Set("62", ["BOUND"], [OPT.REG_FULL, OPT.MEM], IFlag.MODRM_REQUIRED | IFlag.INVALID_64BITS)
208
+ Set("68", ["PUSH"], [OPT.IMM_FULL], IFlag._64BITS)
209
+ Set("69", ["IMUL"], [OPT.REG_FULL, OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED)
210
+ Set("6a", ["PUSH"], [OPT.SEIMM8], IFlag.PRE_OP_SIZE | IFlag._64BITS)
211
+ Set("6b", ["IMUL"], [OPT.REG_FULL, OPT.RM_FULL, OPT.SEIMM8], IFlag.MODRM_REQUIRED)
212
+ # V 1.5.14 - String instructions aren't supposed to be promoted automatically in 64bits, only with a REX prefix.
213
+ # In 64 bits INS/OUTS still supports only 8/16/32 bits.
214
+ Set("6c", ["INS"], [OPT.REGI_EDI, OPT.REGDX], IFlag.PRE_REPNZ | IFlag.PRE_REP) # 8 bit.
215
+ Set("6d", ["INS"], [OPT.REGI_EDI, OPT.REGDX], IFlag._16BITS | IFlag.PRE_REPNZ | IFlag.PRE_REP) # Full size.
216
+ Set("6e", ["OUTS"], [OPT.REGDX, OPT.REGI_ESI], IFlag.PRE_REPNZ | IFlag.PRE_REP) # 8 bit.
217
+ Set("6f", ["OUTS"], [OPT.REGDX, OPT.REGI_ESI], IFlag._16BITS | IFlag.PRE_REPNZ | IFlag.PRE_REP) # Full size.
218
+ Set("70", ["JO"], [OPT.RELCB], IFlag._64BITS)
219
+ Set("71", ["JNO"], [OPT.RELCB], IFlag._64BITS)
220
+ Set("72", ["JB"], [OPT.RELCB], IFlag._64BITS)
221
+ Set("73", ["JAE"], [OPT.RELCB], IFlag._64BITS)
222
+ Set("74", ["JZ"], [OPT.RELCB], IFlag._64BITS)
223
+ Set("75", ["JNZ"], [OPT.RELCB], IFlag._64BITS)
224
+ Set("76", ["JBE"], [OPT.RELCB], IFlag._64BITS)
225
+ Set("77", ["JA"], [OPT.RELCB], IFlag._64BITS)
226
+ Set("78", ["JS"], [OPT.RELCB], IFlag._64BITS)
227
+ Set("79", ["JNS"], [OPT.RELCB], IFlag._64BITS)
228
+ Set("7a", ["JP"], [OPT.RELCB], IFlag._64BITS)
229
+ Set("7b", ["JNP"], [OPT.RELCB], IFlag._64BITS)
230
+ Set("7c", ["JL"], [OPT.RELCB], IFlag._64BITS)
231
+ Set("7d", ["JGE"], [OPT.RELCB], IFlag._64BITS)
232
+ Set("7e", ["JLE"], [OPT.RELCB], IFlag._64BITS)
233
+ Set("7f", ["JG"], [OPT.RELCB], IFlag._64BITS)
234
+ Set("80 /00", ["ADD"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
235
+ Set("80 /01", ["OR"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
236
+ Set("80 /02", ["ADC"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
237
+ Set("80 /03", ["SBB"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
238
+ Set("80 /04", ["AND"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
239
+ Set("80 /05", ["SUB"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
240
+ Set("80 /06", ["XOR"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
241
+ Set("80 /07", ["CMP"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED)
242
+ Set("81 /00", ["ADD"], [OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
243
+ Set("81 /01", ["OR"], [OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
244
+ Set("81 /02", ["ADC"], [OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
245
+ Set("81 /03", ["SBB"], [OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
246
+ Set("81 /04", ["AND"], [OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
247
+ Set("81 /05", ["SUB"], [OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
248
+ Set("81 /06", ["XOR"], [OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
249
+ Set("81 /07", ["CMP"], [OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED)
250
+ Set("82 /00", ["ADD"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK | IFlag.INVALID_64BITS)
251
+ Set("82 /01", ["OR"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK | IFlag.INVALID_64BITS)
252
+ Set("82 /02", ["ADC"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK | IFlag.INVALID_64BITS)
253
+ Set("82 /03", ["SBB"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK | IFlag.INVALID_64BITS)
254
+ Set("82 /04", ["AND"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK | IFlag.INVALID_64BITS)
255
+ Set("82 /05", ["SUB"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK | IFlag.INVALID_64BITS)
256
+ Set("82 /06", ["XOR"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK | IFlag.INVALID_64BITS)
257
+ Set("82 /07", ["CMP"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.INVALID_64BITS)
258
+ Set("83 /00", ["ADD"], [OPT.RM_FULL, OPT.SEIMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
259
+ Set("83 /01", ["OR"], [OPT.RM_FULL, OPT.SEIMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
260
+ Set("83 /02", ["ADC"], [OPT.RM_FULL, OPT.SEIMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
261
+ Set("83 /03", ["SBB"], [OPT.RM_FULL, OPT.SEIMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
262
+ Set("83 /04", ["AND"], [OPT.RM_FULL, OPT.SEIMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
263
+ Set("83 /05", ["SUB"], [OPT.RM_FULL, OPT.SEIMM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
264
+ Set("83 /06", ["XOR"], [OPT.RM_FULL, OPT.SEIMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_LOCK)
265
+ Set("83 /07", ["CMP"], [OPT.RM_FULL, OPT.SEIMM8], IFlag.MODRM_REQUIRED)
266
+ Set("84", ["TEST"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED)
267
+ Set("85", ["TEST"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED)
268
+ Set("86", ["XCHG"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
269
+ Set("87", ["XCHG"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
270
+ Set("88", ["MOV"], [OPT.RM8, OPT.REG8], IFlag.MODRM_REQUIRED)
271
+ Set("89", ["MOV"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED)
272
+ Set("8a", ["MOV"], [OPT.REG8, OPT.RM8], IFlag.MODRM_REQUIRED)
273
+ Set("8b", ["MOV"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED)
274
+ Set("8c", ["MOV"], [OPT.RFULL_M16, OPT.SREG], IFlag.MODRM_REQUIRED)
275
+ Set("8d", ["LEA"], [OPT.REG_FULL, OPT.MEM], IFlag.MODRM_REQUIRED)
276
+ Set("8e", ["MOV"], [OPT.SREG, OPT.RFULL_M16], IFlag.MODRM_REQUIRED)
277
+ Set("8f /00", ["POP"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._64BITS)
278
+ # V 1.7.28 - NOP in 64bits can be prefixed by REX -
279
+ # Therefore 0x90 in 16/32 bits is NOP. 0x90 with REX base is an XCHG. All else are NOP.
280
+ Set("90", ["XCHG"], [OPT.IB_R_FULL, OPT.ACC_FULL], IFlag.INST_FLAGS_NONE)
281
+
282
+ # V 1.7.24 - New instruction multi-byte NOP.
283
+ Set("0f, 1f", ["NOP"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED)
284
+ Set("91", ["XCHG"], [OPT.IB_R_FULL, OPT.ACC_FULL], IFlag.INST_FLAGS_NONE)
285
+ Set("92", ["XCHG"], [OPT.IB_R_FULL, OPT.ACC_FULL], IFlag.INST_FLAGS_NONE)
286
+ Set("93", ["XCHG"], [OPT.IB_R_FULL, OPT.ACC_FULL], IFlag.INST_FLAGS_NONE)
287
+ Set("94", ["XCHG"], [OPT.IB_R_FULL, OPT.ACC_FULL], IFlag.INST_FLAGS_NONE)
288
+ Set("95", ["XCHG"], [OPT.IB_R_FULL, OPT.ACC_FULL], IFlag.INST_FLAGS_NONE)
289
+ Set("96", ["XCHG"], [OPT.IB_R_FULL, OPT.ACC_FULL], IFlag.INST_FLAGS_NONE)
290
+ Set("97", ["XCHG"], [OPT.IB_R_FULL, OPT.ACC_FULL], IFlag.INST_FLAGS_NONE)
291
+ Set("98", ["CBW", "CWDE", "CDQE"], [], IFlag.USE_EXMNEMONIC | IFlag.USE_EXMNEMONIC2)
292
+ Set("99", ["CWD", "CDQ", "CQO"], [], IFlag.USE_EXMNEMONIC | IFlag.USE_EXMNEMONIC2)
293
+ Set("9a", ["CALL FAR"], [OPT.PTR16_FULL], IFlag.INVALID_64BITS)
294
+
295
+ # V 1.4.a PUSHF/POPF are supposed to be promoted to 64 bits, without a REX.
296
+ Set("9c", ["PUSHF"], [], IFlag.NATIVE | IFlag._64BITS)
297
+ Set("9d", ["POPF"], [], IFlag.NATIVE | IFlag._64BITS)
298
+ Set("9e", ["SAHF"], [], IFlag.INST_FLAGS_NONE)
299
+ Set("9f", ["LAHF"], [], IFlag.INST_FLAGS_NONE)
300
+
301
+ # V 1.6.21 MOV MEM-OFFSET instructions are NOT automatically promoted to 64bits, only with a REX.
302
+ Set("a0", ["MOV"], [OPT.ACC8, OPT.MOFFS8], IFlag.INST_FLAGS_NONE)
303
+ Set("a1", ["MOV"], [OPT.ACC_FULL, OPT.MOFFS_FULL], IFlag.INST_FLAGS_NONE)
304
+ Set("a2", ["MOV"], [OPT.MOFFS8, OPT.ACC8], IFlag.INST_FLAGS_NONE)
305
+ Set("a3", ["MOV"], [OPT.MOFFS_FULL, OPT.ACC_FULL], IFlag.INST_FLAGS_NONE)
306
+
307
+ # movs es:di, ds:si*
308
+ # cmps ds:si*, es:di
309
+ # stos es:di, al
310
+ # scas es:di al
311
+ # lods al, ds:si*
312
+ Set("a4", ["MOVS"], [OPT.REGI_EDI, OPT.REGI_ESI], IFlag.PRE_REPNZ | IFlag.PRE_REP)
313
+ Set("a5", ["MOVS"], [OPT.REGI_EDI, OPT.REGI_ESI], IFlag._16BITS | IFlag.PRE_REPNZ | IFlag.PRE_REP | IFlag._64BITS | IFlag.PRE_REX)
314
+ Set("a6", ["CMPS"], [OPT.REGI_ESI, OPT.REGI_EDI], IFlag.PRE_REPNZ | IFlag.PRE_REP)
315
+ Set("a7", ["CMPS"], [OPT.REGI_ESI, OPT.REGI_EDI], IFlag._16BITS | IFlag.PRE_REPNZ | IFlag.PRE_REP | IFlag._64BITS | IFlag.PRE_REX)
316
+ Set("aa", ["STOS"], [OPT.REGI_EDI, OPT.ACC8], IFlag.PRE_REPNZ | IFlag.PRE_REP)
317
+ Set("ab", ["STOS"], [OPT.REGI_EDI, OPT.ACC_FULL], IFlag._16BITS | IFlag.PRE_REPNZ | IFlag.PRE_REP | IFlag._64BITS | IFlag.PRE_REX)
318
+ Set("ac", ["LODS"], [OPT.ACC8, OPT.REGI_ESI], IFlag.PRE_REPNZ | IFlag.PRE_REP)
319
+ Set("ad", ["LODS"], [OPT.ACC_FULL, OPT.REGI_ESI], IFlag._16BITS | IFlag.PRE_REPNZ | IFlag.PRE_REP | IFlag._64BITS | IFlag.PRE_REX)
320
+ Set("ae", ["SCAS"], [OPT.REGI_EDI, OPT.ACC8], IFlag.PRE_REPNZ | IFlag.PRE_REP)
321
+ Set("af", ["SCAS"], [OPT.REGI_EDI, OPT.ACC_FULL], IFlag._16BITS | IFlag.PRE_REPNZ | IFlag.PRE_REP | IFlag._64BITS | IFlag.PRE_REX)
322
+ Set("a8", ["TEST"], [OPT.ACC8, OPT.IMM8], IFlag.INST_FLAGS_NONE)
323
+ Set("a9", ["TEST"], [OPT.ACC_FULL, OPT.IMM_FULL], IFlag.INST_FLAGS_NONE)
324
+ Set("b0", ["MOV"], [OPT.IB_RB, OPT.IMM8], IFlag.GEN_BLOCK)
325
+ Set("b8", ["MOV"], [OPT.IB_R_FULL, OPT.IMM_FULL], IFlag._64BITS | IFlag.PRE_REX | IFlag.GEN_BLOCK)
326
+ Set("c0 /00", ["ROL"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED)
327
+ Set("c0 /01", ["ROR"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED)
328
+ Set("c0 /02", ["RCL"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED)
329
+ Set("c0 /03", ["RCR"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED)
330
+ Set("c0 /04", ["SHL"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED)
331
+ Set("c0 /05", ["SHR"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED)
332
+ Set("c0 /06", ["SAL"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED)
333
+ Set("c0 /07", ["SAR"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED)
334
+ Set("c1 /00", ["ROL"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED)
335
+ Set("c1 /01", ["ROR"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED)
336
+ Set("c1 /02", ["RCL"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED)
337
+ Set("c1 /03", ["RCR"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED)
338
+ Set("c1 /04", ["SHL"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED)
339
+ Set("c1 /05", ["SHR"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED)
340
+ Set("c1 /06", ["SAL"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED)
341
+ Set("c1 /07", ["SAR"], [OPT.RM_FULL, OPT.IMM8], IFlag.MODRM_REQUIRED)
342
+ Set("c2", ["RET"], [OPT.IMM16], IFlag._64BITS)
343
+ Set("c3", ["RET"], [], IFlag._64BITS)
344
+ Set("c4", ["LES"], [OPT.REG_FULL, OPT.MEM16_FULL], IFlag.MODRM_REQUIRED | IFlag.INVALID_64BITS)
345
+ Set("c5", ["LDS"], [OPT.REG_FULL, OPT.MEM16_FULL], IFlag.MODRM_REQUIRED | IFlag.INVALID_64BITS)
346
+ Set("c6 //00", ["MOV"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag.NOT_DIVIDED)
347
+ Set("c7 //00", ["MOV"], [OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED | IFlag.NOT_DIVIDED)
348
+ Set("c8", ["ENTER"], [OPT.IMM16_1, OPT.IMM8_2], IFlag._64BITS)
349
+ Set("c9", ["LEAVE"], [], IFlag._64BITS)
350
+
351
+ # V 1.1.6 RETF is NOT promoted automatically in 64bits. So with REX it should be RETFQ.
352
+ Set("ca", ["RETF"], [OPT.IMM16], IFlag.NATIVE | IFlag._64BITS | IFlag.PRE_REX)
353
+ Set("cb", ["RETF"], [], IFlag.NATIVE | IFlag._64BITS | IFlag.PRE_REX)
354
+ Set("cc", ["INT 3"], [], IFlag.INST_FLAGS_NONE)
355
+ Set("cd", ["INT"], [OPT.IMM8], IFlag.INST_FLAGS_NONE)
356
+ Set("ce", ["INTO"], [], IFlag.INVALID_64BITS)
357
+ Set("cf", ["IRET"], [], IFlag.NATIVE | IFlag._64BITS | IFlag.PRE_REX)
358
+ Set("d0 /00", ["ROL"], [OPT.RM8, OPT.CONST1], IFlag.MODRM_REQUIRED)
359
+ Set("d0 /01", ["ROR"], [OPT.RM8, OPT.CONST1], IFlag.MODRM_REQUIRED)
360
+ Set("d0 /02", ["RCL"], [OPT.RM8, OPT.CONST1], IFlag.MODRM_REQUIRED)
361
+ Set("d0 /03", ["RCR"], [OPT.RM8, OPT.CONST1], IFlag.MODRM_REQUIRED)
362
+ Set("d0 /04", ["SHL"], [OPT.RM8, OPT.CONST1], IFlag.MODRM_REQUIRED)
363
+ Set("d0 /05", ["SHR"], [OPT.RM8, OPT.CONST1], IFlag.MODRM_REQUIRED)
364
+ Set("d0 /06", ["SAL"], [OPT.RM8, OPT.CONST1], IFlag.MODRM_REQUIRED)
365
+ Set("d0 /07", ["SAR"], [OPT.RM8, OPT.CONST1], IFlag.MODRM_REQUIRED)
366
+ Set("d1 /00", ["ROL"], [OPT.RM_FULL, OPT.CONST1], IFlag.MODRM_REQUIRED)
367
+ Set("d1 /01", ["ROR"], [OPT.RM_FULL, OPT.CONST1], IFlag.MODRM_REQUIRED)
368
+ Set("d1 /02", ["RCL"], [OPT.RM_FULL, OPT.CONST1], IFlag.MODRM_REQUIRED)
369
+ Set("d1 /03", ["RCR"], [OPT.RM_FULL, OPT.CONST1], IFlag.MODRM_REQUIRED)
370
+ Set("d1 /04", ["SHL"], [OPT.RM_FULL, OPT.CONST1], IFlag.MODRM_REQUIRED)
371
+ Set("d1 /05", ["SHR"], [OPT.RM_FULL, OPT.CONST1], IFlag.MODRM_REQUIRED)
372
+ Set("d1 /06", ["SAL"], [OPT.RM_FULL, OPT.CONST1], IFlag.MODRM_REQUIRED)
373
+ Set("d1 /07", ["SAR"], [OPT.RM_FULL, OPT.CONST1], IFlag.MODRM_REQUIRED)
374
+ Set("d2 /00", ["ROL"], [OPT.RM8, OPT.REGCL], IFlag.MODRM_REQUIRED)
375
+ Set("d2 /01", ["ROR"], [OPT.RM8, OPT.REGCL], IFlag.MODRM_REQUIRED)
376
+ Set("d2 /02", ["RCL"], [OPT.RM8, OPT.REGCL], IFlag.MODRM_REQUIRED)
377
+ Set("d2 /03", ["RCR"], [OPT.RM8, OPT.REGCL], IFlag.MODRM_REQUIRED)
378
+ Set("d2 /04", ["SHL"], [OPT.RM8, OPT.REGCL], IFlag.MODRM_REQUIRED)
379
+ Set("d2 /05", ["SHR"], [OPT.RM8, OPT.REGCL], IFlag.MODRM_REQUIRED)
380
+ Set("d2 /06", ["SAL"], [OPT.RM8, OPT.REGCL], IFlag.MODRM_REQUIRED)
381
+ Set("d2 /07", ["SAR"], [OPT.RM8, OPT.REGCL], IFlag.MODRM_REQUIRED)
382
+ Set("d3 /00", ["ROL"], [OPT.RM_FULL, OPT.REGCL], IFlag.MODRM_REQUIRED)
383
+ Set("d3 /01", ["ROR"], [OPT.RM_FULL, OPT.REGCL], IFlag.MODRM_REQUIRED)
384
+ Set("d3 /02", ["RCL"], [OPT.RM_FULL, OPT.REGCL], IFlag.MODRM_REQUIRED)
385
+ Set("d3 /03", ["RCR"], [OPT.RM_FULL, OPT.REGCL], IFlag.MODRM_REQUIRED)
386
+ Set("d3 /04", ["SHL"], [OPT.RM_FULL, OPT.REGCL], IFlag.MODRM_REQUIRED)
387
+ Set("d3 /05", ["SHR"], [OPT.RM_FULL, OPT.REGCL], IFlag.MODRM_REQUIRED)
388
+ Set("d3 /06", ["SAL"], [OPT.RM_FULL, OPT.REGCL], IFlag.MODRM_REQUIRED)
389
+ Set("d3 /07", ["SAR"], [OPT.RM_FULL, OPT.REGCL], IFlag.MODRM_REQUIRED)
390
+ Set("d4", ["AAM"], [OPT.IMM8], IFlag.INVALID_64BITS)
391
+ Set("d5", ["AAD"], [OPT.IMM8], IFlag.INVALID_64BITS)
392
+ Set("d6", ["SALC"], [], IFlag.INVALID_64BITS)
393
+
394
+ # XLATB / XLAT BYTE PTR DS:[EBX + AL]
395
+ Set("d7", ["XLAT"], [OPT.REGI_EBXAL], IFlag.PRE_DS)
396
+
397
+ # LOOPxx are also affected by the ADDRESS-SIZE prefix!
398
+ # But they require a suffix letter indicating their size.
399
+ # LOOPxx are promoted to 64bits.
400
+ Set("e0", ["LOOPNZ"], [OPT.RELCB], IFlag.PRE_ADDR_SIZE | IFlag.NATIVE)
401
+ Set("e1", ["LOOPZ"], [OPT.RELCB], IFlag.PRE_ADDR_SIZE | IFlag.NATIVE)
402
+ Set("e2", ["LOOP"], [OPT.RELCB], IFlag.PRE_ADDR_SIZE | IFlag.NATIVE)
403
+
404
+ # JMP CX:
405
+ # This is a special instruction, because the ADDRESS-SIZE prefix affects its register size!!!
406
+ # INST_PRE_ADDR_SIZE isn't supposed to really be a flag of a static instruction, it's quite a hack to distinguish this instruction.
407
+ # J(r/e)CXZ are promoted to 64bits.
408
+ Set("e3", ["JCXZ", "JECXZ", "JRCXZ"], [OPT.RELCB], IFlag.PRE_ADDR_SIZE | IFlag.USE_EXMNEMONIC | IFlag.USE_EXMNEMONIC2)
409
+ Set("e4", ["IN"], [OPT.ACC8, OPT.IMM8], IFlag.INST_FLAGS_NONE)
410
+ Set("e5", ["IN"], [OPT.ACC_FULL_NOT64, OPT.IMM8], IFlag.INST_FLAGS_NONE)
411
+ Set("e6", ["OUT"], [OPT.IMM8, OPT.ACC8], IFlag.INST_FLAGS_NONE)
412
+ Set("e7", ["OUT"], [OPT.IMM8, OPT.ACC_FULL_NOT64], IFlag.INST_FLAGS_NONE)
413
+ Set("e8", ["CALL"], [OPT.RELC_FULL], IFlag._64BITS)
414
+ Set("e9", ["JMP"], [OPT.RELC_FULL], IFlag._64BITS)
415
+ Set("ea", ["JMP FAR"], [OPT.PTR16_FULL], IFlag.INVALID_64BITS)
416
+ Set("eb", ["JMP"], [OPT.RELCB], IFlag._64BITS)
417
+ Set("ec", ["IN"], [OPT.ACC8, OPT.REGDX], IFlag.INST_FLAGS_NONE)
418
+ Set("ed", ["IN"], [OPT.ACC_FULL_NOT64, OPT.REGDX], IFlag.INST_FLAGS_NONE)
419
+ Set("ee", ["OUT"], [OPT.REGDX, OPT.ACC8], IFlag.INST_FLAGS_NONE)
420
+ Set("ef", ["OUT"], [OPT.REGDX, OPT.ACC_FULL_NOT64], IFlag.INST_FLAGS_NONE)
421
+ Set("f1", ["INT1"], [], IFlag.INST_FLAGS_NONE)
422
+ Set("f4", ["HLT"], [], IFlag.INST_FLAGS_NONE)
423
+ Set("f5", ["CMC"], [], IFlag.INST_FLAGS_NONE)
424
+ Set("f6 /00", ["TEST"], [OPT.RM8, OPT.IMM8], IFlag.MODRM_REQUIRED)
425
+ Set("f6 /02", ["NOT"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
426
+ Set("f6 /03", ["NEG"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
427
+ Set("f6 /04", ["MUL"], [OPT.RM8], IFlag.MODRM_REQUIRED)
428
+ Set("f6 /05", ["IMUL"], [OPT.RM8], IFlag.MODRM_REQUIRED)
429
+ Set("f6 /06", ["DIV"], [OPT.RM8], IFlag.MODRM_REQUIRED)
430
+ Set("f6 /07", ["IDIV"], [OPT.RM8], IFlag.MODRM_REQUIRED)
431
+ Set("f7 /00", ["TEST"], [OPT.RM_FULL, OPT.IMM_FULL], IFlag.MODRM_REQUIRED)
432
+ Set("f7 /02", ["NOT"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
433
+ Set("f7 /03", ["NEG"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
434
+ Set("f7 /04", ["MUL"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED)
435
+ Set("f7 /05", ["IMUL"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED)
436
+ Set("f7 /06", ["DIV"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED)
437
+ Set("f7 /07", ["IDIV"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED)
438
+ Set("f8", ["CLC"], [], IFlag.INST_FLAGS_NONE)
439
+ Set("f9", ["STC"], [], IFlag.INST_FLAGS_NONE)
440
+ Set("fa", ["CLI"], [], IFlag.INST_FLAGS_NONE)
441
+ Set("fb", ["STI"], [], IFlag.INST_FLAGS_NONE)
442
+ Set("fc", ["CLD"], [], IFlag.INST_FLAGS_NONE)
443
+ Set("fd", ["STD"], [], IFlag.INST_FLAGS_NONE)
444
+ Set("fe /00", ["INC"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
445
+ Set("fe /01", ["DEC"], [OPT.RM8], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
446
+ Set("ff /00", ["INC"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
447
+ Set("ff /01", ["DEC"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_LOCK)
448
+ Set("ff /02", ["CALL"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._64BITS)
449
+ Set("ff /03", ["CALL FAR"], [OPT.MEM16_FULL], IFlag.MODRM_REQUIRED | IFlag._64BITS | IFlag.PRE_REX)
450
+ Set("ff /04", ["JMP"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._64BITS)
451
+ Set("ff /05", ["JMP FAR"], [OPT.MEM16_FULL], IFlag.MODRM_REQUIRED | IFlag._64BITS | IFlag.PRE_REX)
452
+ Set("ff /06", ["PUSH"], [OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._64BITS)
453
+
454
+ # New instructions from AMD July 2007 (POPCNT is already defined in SSE4.2, MONITOR, MWAIT are already defined above):
455
+ # Note LZCNT can be prefixed by 0x66 although it has also a mandatory prefix!
456
+ Set("f3, 0f, bd", ["LZCNT"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_OP_SIZE)
457
+
458
+ Set("0f, 38, f0", ["MOVBE"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
459
+ Set("0f, 38, f1", ["MOVBE"], [OPT.RM_FULL, OPT.REG_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
460
+
461
+ # New instructions from Intel 2008:
462
+ Set("0f, 01, d0", ["XGETBV"], [], IFlag._32BITS)
463
+ Set("0f, 01, d1", ["XSETBV"], [], IFlag._32BITS)
464
+ Set("0f, ae /04", ["XSAVE", "", "XSAVE64"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX | IFlag.USE_EXMNEMONIC2)
465
+ # XRSTOR is declared below (see LFENCE), cause it is shared with LFENCE.
466
+
467
+ # New instruction from Intel September 2009:
468
+ Set("0f, 37", ["GETSEC"], [], IFlag.MODRM_REQUIRED | IFlag._32BITS)
469
+
470
+ # XSAVEOPT is declared below (see SFENCE).
471
+
472
+ def init_Exported(self):
473
+ """ Exported instruction are special instruction that create a collision in the DB.
474
+ Therefore they are exported directly so diStorm can use them manually in the
475
+ insts.c instruction look-up code.
476
+ Note that their opcodes are totally ignored here.
477
+ Also the path to the instruction in the trie has to be defined by any instruction with same opcode!
478
+ So for instance, NOP|PAUSE|XCHG -> XHG is really defined, the rest are exported.
479
+ Inside diStorm it will know which one to use. """
480
+
481
+ Set = lambda *args: self.SetCallback(ISetClass.INTEGER, *args)
482
+ # 63 /R
483
+ # 16/32: ARPL reg/mem16, reg16
484
+ # 64: MOVSXD OT_REG_FULL, OT_RM_FULL
485
+ # Damn processor, my DB won't support mixing of operands types.
486
+ # Define ARPL!
487
+ Set("63", ["ARPL"], [OPT.RM16, OPT.REG16], IFlag.MODRM_REQUIRED)
488
+
489
+ # MOVSXD:
490
+ # This is the worst defined instruction ever. It has so many variations.
491
+ # I decided after a third review, to make it like MOVSXD RAX, EAX when there IS a REX.W.
492
+ # Otherwise it will be MOVSXD EAX, EAX, which really zero extends to RAX.
493
+ # Completely ignoring DB 0x66, which is possible by the docs, BTW.
494
+ Set("63", ["MOVSXD"], [OPT.REG32_64, OPT.RM32], IFlag.MODRM_REQUIRED | IFlag._64BITS | IFlag.PRE_REX | IFlag.EXPORTED)
495
+
496
+ Set("90", ["NOP"], [], IFlag.EXPORTED)
497
+ # This instruction is supported directly in diStorm, since it's not a mandatory prefix really.
498
+ Set("f3, 90", ["PAUSE"], [], IFlag._32BITS | IFlag.EXPORTED)
499
+
500
+ # Wait instruction is needed, but it can be a prefix. See next page for more info.
501
+ Set("9b", ["WAIT"], [], IFlag.EXPORTED)
502
+
503
+ # VMPTRLD and RDRAND use same 2 first bytes and 06 as group (thus 2.3 bytes).
504
+ # When MOD is 3 it's the RDRAND instruction and for the rest it's VMPTRLD.
505
+ # The problem is that they have different operands, so a hack is required in the lookup instruction code.
506
+ # Plus remember that this opcode is prefixed (because of VMCLEAR) sometimes and therefore will be part of a prefixed table!
507
+ Set("0f, c7 /06", ["RDRAND"], [OPT.RM_FULL], IFlag._32BITS | IFlag.MODRM_INCLUDED | IFlag.MODRM_REQUIRED | IFlag._64BITS | IFlag.EXPORTED)
508
+
509
+ Set = lambda *args: self.SetCallback(ISetClass._3DNOW, *args)
510
+ # This is not really an instruction, but a gateway to all 3dnow instructions.
511
+ Set("0f, 0f", ["_3DNOW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._3DNOW_FETCH | IFlag.EXPORTED)
512
+
513
+ def init_FPU(self):
514
+ Set = lambda *args: self.SetCallback(ISetClass.FPU, *args)
515
+
516
+ # The WAIT instruction is tricky, it starts a 3 bytes instruction series.
517
+ # If you find a 3 bytes long instruction you are on your own.
518
+ # But the problem is that if you don't find a 3 bytes long instruction and the first byte that is going to be DB'ed
519
+ # is this 0x9b byte, which represents the WAIT instruction, thus you'll have to output it as a standalone instruction.
520
+ # Example:
521
+ # 9B DB E3 ~ FINIT
522
+ # 9B DB E4 ~ WAIT; DB 0xDB; ...
523
+ # Get the idea?
524
+ # It might be a part of a long instruction (3 bytes), else it just a simple one byte instruction by its own.
525
+ # This way is a simple rule which is broken easily when dealing with Trie DB, the whole point is that the byte says
526
+ # "read another byte" or "I'm your one", but here both happens.
527
+ # That's why I will have to hardcode the WAIT instruction in the decode function which DB'es unknown bytes.
528
+ # Set(0x9b, "WAIT") ....
529
+ # IFlag.PRE_OP_SIZE is set in order to tell the decoder that 0x9b can be part of the instruction.
530
+ # Because it's found in the prefixed table at the same entry of 0x66 for mandatory prefix.
531
+
532
+ Set("9b, d9 //06", ["FSTENV"], [OPT.MEM], IFlag.PRE_OP_SIZE | IFlag.MODRM_REQUIRED | IFlag._32BITS)
533
+ Set("9b, d9 //07", ["FSTCW"], [OPT.FPUM16], IFlag.PRE_OP_SIZE | IFlag.MODRM_REQUIRED | IFlag._32BITS)
534
+ Set("9b, db //e2", ["FCLEX"], [], IFlag.PRE_OP_SIZE | IFlag._32BITS)
535
+ Set("9b, db //e3", ["FINIT"], [], IFlag.PRE_OP_SIZE | IFlag._32BITS)
536
+ Set("9b, dd //06", ["FSAVE"], [OPT.MEM], IFlag.PRE_OP_SIZE | IFlag.MODRM_REQUIRED | IFlag._32BITS)
537
+ Set("9b, dd //07", ["FSTSW"], [OPT.FPUM16], IFlag.PRE_OP_SIZE | IFlag.MODRM_REQUIRED | IFlag._32BITS)
538
+ Set("9b, df //e0", ["FSTSW"], [OPT.ACC16], IFlag.PRE_OP_SIZE | IFlag._32BITS)
539
+
540
+
541
+ Set("d8 //00", ["FADD"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
542
+ Set("d8 //01", ["FMUL"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
543
+ Set("d8 //02", ["FCOM"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
544
+ Set("d8 //03", ["FCOMP"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
545
+ Set("d8 //04", ["FSUB"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
546
+ Set("d8 //05", ["FSUBR"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
547
+ Set("d8 //06", ["FDIV"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
548
+ Set("d8 //07", ["FDIVR"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
549
+ Set("d8 //c0", ["FADD"], [OPT.FPU_SSI], IFlag.GEN_BLOCK)
550
+ Set("d8 //c8", ["FMUL"], [OPT.FPU_SSI], IFlag.GEN_BLOCK)
551
+ Set("d8 //d0", ["FCOM"], [OPT.FPU_SI], IFlag.GEN_BLOCK)
552
+ Set("d8 //d8", ["FCOMP"], [OPT.FPU_SI], IFlag.GEN_BLOCK)
553
+ Set("d8 //d9", ["FCOMP"], [], IFlag.INST_FLAGS_NONE)
554
+ Set("d8 //e0", ["FSUB"], [OPT.FPU_SSI], IFlag.GEN_BLOCK)
555
+ Set("d8 //e8", ["FSUBR"], [OPT.FPU_SSI], IFlag.GEN_BLOCK)
556
+ Set("d8 //f0", ["FDIV"], [OPT.FPU_SSI], IFlag.GEN_BLOCK)
557
+ Set("d8 //f8", ["FDIVR"], [OPT.FPU_SSI], IFlag.GEN_BLOCK)
558
+ Set("d9 //00", ["FLD"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
559
+ Set("d9 //02", ["FST"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
560
+ Set("d9 //03", ["FSTP"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
561
+ Set("d9 //04", ["FLDENV"], [OPT.MEM], IFlag.MODRM_REQUIRED)
562
+ Set("d9 //05", ["FLDCW"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
563
+ Set("d9 //06", ["FNSTENV"], [OPT.MEM], IFlag.MODRM_REQUIRED)
564
+ Set("d9 //07", ["FNSTCW"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
565
+ Set("d9 //c0", ["FLD"], [OPT.FPU_SI], IFlag.GEN_BLOCK)
566
+ Set("d9 //c8", ["FXCH"], [OPT.FPU_SI], IFlag.GEN_BLOCK)
567
+ Set("d9 //c9", ["FXCH"], [], IFlag.INST_FLAGS_NONE)
568
+ Set("d9 //d0", ["FNOP"], [], IFlag.INST_FLAGS_NONE)
569
+ Set("d9 //e0", ["FCHS"], [], IFlag.INST_FLAGS_NONE)
570
+ Set("d9 //e1", ["FABS"], [], IFlag.INST_FLAGS_NONE)
571
+ Set("d9 //e4", ["FTST"], [], IFlag.INST_FLAGS_NONE)
572
+ Set("d9 //e5", ["FXAM"], [], IFlag.INST_FLAGS_NONE)
573
+ Set("d9 //e8", ["FLD1"], [], IFlag.INST_FLAGS_NONE)
574
+ Set("d9 //e9", ["FLDL2T"], [], IFlag.INST_FLAGS_NONE)
575
+ Set("d9 //ea", ["FLDL2E"], [], IFlag.INST_FLAGS_NONE)
576
+ Set("d9 //eb", ["FLDPI"], [], IFlag.INST_FLAGS_NONE)
577
+ Set("d9 //ec", ["FLDLG2"], [], IFlag.INST_FLAGS_NONE)
578
+ Set("d9 //ed", ["FLDLN2"], [], IFlag.INST_FLAGS_NONE)
579
+ Set("d9 //ee", ["FLDZ"], [], IFlag.INST_FLAGS_NONE)
580
+ Set("d9 //f0", ["F2XM1"], [], IFlag.INST_FLAGS_NONE)
581
+ Set("d9 //f1", ["FYL2X"], [], IFlag.INST_FLAGS_NONE)
582
+ Set("d9 //f2", ["FPTAN"], [], IFlag.INST_FLAGS_NONE)
583
+ Set("d9 //f3", ["FPATAN"], [], IFlag.INST_FLAGS_NONE)
584
+ Set("d9 //f4", ["FXTRACT"], [], IFlag.INST_FLAGS_NONE)
585
+ Set("d9 //f5", ["FPREM1"], [], IFlag.INST_FLAGS_NONE)
586
+ Set("d9 //f6", ["FDECSTP"], [], IFlag.INST_FLAGS_NONE)
587
+ Set("d9 //f7", ["FINCSTP"], [], IFlag.INST_FLAGS_NONE)
588
+ Set("d9 //f8", ["FPREM"], [], IFlag.INST_FLAGS_NONE)
589
+ Set("d9 //f9", ["FYL2XP1"], [], IFlag.INST_FLAGS_NONE)
590
+ Set("d9 //fa", ["FSQRT"], [], IFlag.INST_FLAGS_NONE)
591
+ Set("d9 //fb", ["FSINCOS"], [], IFlag.INST_FLAGS_NONE)
592
+ Set("d9 //fc", ["FRNDINT"], [], IFlag.INST_FLAGS_NONE)
593
+ Set("d9 //fd", ["FSCALE"], [], IFlag.INST_FLAGS_NONE)
594
+ Set("d9 //fe", ["FSIN"], [], IFlag.INST_FLAGS_NONE)
595
+ Set("d9 //ff", ["FCOS"], [], IFlag.INST_FLAGS_NONE)
596
+ Set("da //00", ["FIADD"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
597
+ Set("da //01", ["FIMUL"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
598
+ Set("da //02", ["FICOM"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
599
+ Set("da //03", ["FICOMP"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
600
+ Set("da //04", ["FISUB"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
601
+ Set("da //05", ["FISUBR"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
602
+ Set("da //06", ["FIDIV"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
603
+ Set("da //07", ["FIDIVR"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
604
+ Set("da //e9", ["FUCOMPP"], [], IFlag.INST_FLAGS_NONE)
605
+ Set("db //00", ["FILD"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
606
+ Set("db //02", ["FIST"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
607
+ Set("db //03", ["FISTP"], [OPT.FPUM32], IFlag.MODRM_REQUIRED)
608
+ Set("db //05", ["FLD"], [OPT.FPUM80], IFlag.MODRM_REQUIRED)
609
+ Set("db //07", ["FSTP"], [OPT.FPUM80], IFlag.MODRM_REQUIRED)
610
+
611
+ # Obsolete.
612
+ Set("db //e0", ["FENI"], [], IFlag.INST_FLAGS_NONE)
613
+
614
+ # Obsolete.
615
+ Set("db //e1", ["FEDISI"], [], IFlag.INST_FLAGS_NONE)
616
+ Set("db //e2", ["FNCLEX"], [], IFlag.INST_FLAGS_NONE)
617
+ Set("db //e3", ["FNINIT"], [], IFlag.INST_FLAGS_NONE)
618
+
619
+ # Obsolete.
620
+ Set("db //e4", ["FSETPM"], [], IFlag.INST_FLAGS_NONE)
621
+ Set("db //e8", ["FUCOMI"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
622
+ Set("dc //00", ["FADD"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
623
+ Set("dc //01", ["FMUL"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
624
+ Set("dc //02", ["FCOM"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
625
+ Set("dc //03", ["FCOMP"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
626
+ Set("dc //04", ["FSUB"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
627
+ Set("dc //05", ["FSUBR"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
628
+ Set("dc //06", ["FDIV"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
629
+ Set("dc //07", ["FDIVR"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
630
+ Set("dc //c0", ["FADD"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
631
+ Set("dc //c8", ["FMUL"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
632
+ Set("dc //e0", ["FSUBR"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
633
+ Set("dc //e8", ["FSUB"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
634
+ Set("dc //f0", ["FDIVR"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
635
+ Set("dc //f8", ["FDIV"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
636
+ Set("dd //00", ["FLD"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
637
+ Set("dd //02", ["FST"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
638
+ Set("dd //03", ["FSTP"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
639
+ Set("dd //04", ["FRSTOR"], [OPT.MEM], IFlag.MODRM_REQUIRED)
640
+ Set("dd //06", ["FNSAVE"], [OPT.MEM], IFlag.MODRM_REQUIRED)
641
+ Set("dd //07", ["FNSTSW"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
642
+ Set("dd //c0", ["FFREE"], [OPT.FPU_SI], IFlag.GEN_BLOCK)
643
+ Set("dd //d0", ["FST"], [OPT.FPU_SI], IFlag.GEN_BLOCK)
644
+ Set("dd //d8", ["FSTP"], [OPT.FPU_SI], IFlag.GEN_BLOCK)
645
+ Set("dd //e0", ["FUCOM"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
646
+ Set("dd //e1", ["FUCOM"], [], IFlag.INST_FLAGS_NONE)
647
+ Set("dd //e8", ["FUCOMP"], [OPT.FPU_SI], IFlag.GEN_BLOCK)
648
+ Set("dd //e9", ["FUCOMP"], [], IFlag.INST_FLAGS_NONE)
649
+ Set("de //00", ["FIADD"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
650
+ Set("de //01", ["FIMUL"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
651
+ Set("de //02", ["FICOM"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
652
+ Set("de //03", ["FICOMP"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
653
+ Set("de //04", ["FISUB"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
654
+ Set("de //05", ["FISUBR"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
655
+ Set("de //06", ["FIDIV"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
656
+ Set("de //07", ["FIDIVR"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
657
+ Set("de //c0", ["FADDP"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
658
+ Set("de //c1", ["FADDP"], [], IFlag.INST_FLAGS_NONE)
659
+ Set("de //c8", ["FMULP"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
660
+ Set("de //c9", ["FMULP"], [], IFlag.INST_FLAGS_NONE)
661
+ Set("de //d9", ["FCOMPP"], [], IFlag.INST_FLAGS_NONE)
662
+ Set("de //e0", ["FSUBRP"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
663
+ Set("de //e1", ["FSUBRP"], [], IFlag.INST_FLAGS_NONE)
664
+ Set("de //e8", ["FSUBP"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
665
+ Set("de //e9", ["FSUBP"], [], IFlag.INST_FLAGS_NONE)
666
+ Set("de //f0", ["FDIVRP"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
667
+ Set("de //f1", ["FDIVRP"], [], IFlag.INST_FLAGS_NONE)
668
+ Set("de //f8", ["FDIVP"], [OPT.FPU_SIS], IFlag.GEN_BLOCK)
669
+ Set("de //f9", ["FDIVP"], [], IFlag.INST_FLAGS_NONE)
670
+ Set("df //00", ["FILD"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
671
+ Set("df //02", ["FIST"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
672
+ Set("df //03", ["FISTP"], [OPT.FPUM16], IFlag.MODRM_REQUIRED)
673
+ Set("df //04", ["FBLD"], [OPT.FPUM80], IFlag.MODRM_REQUIRED)
674
+ Set("df //05", ["FILD"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
675
+ Set("df //06", ["FBSTP"], [OPT.FPUM80], IFlag.MODRM_REQUIRED)
676
+ Set("df //07", ["FISTP"], [OPT.FPUM64], IFlag.MODRM_REQUIRED)
677
+ Set("df //e0", ["FNSTSW"], [OPT.ACC16], IFlag.INST_FLAGS_NONE)
678
+ Set("df //e8", ["FUCOMIP"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
679
+ Set("df //f0", ["FCOMIP"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
680
+
681
+ def init_P6(self):
682
+ Set = lambda *args: self.SetCallback(ISetClass.P6, *args)
683
+ Set("0f, 05", ["SYSCALL"], [], IFlag._32BITS)
684
+ Set("0f, 07", ["SYSRET"], [], IFlag._32BITS)
685
+ Set("0f, 34", ["SYSENTER"], [], IFlag._32BITS) # Only AMD states invalid in 64 bits.
686
+ Set("0f, 35", ["SYSEXIT"], [], IFlag._32BITS) # Only AMD states invalid in 64 bits.
687
+ Set("0f, 40", ["CMOVO"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
688
+ Set("0f, 41", ["CMOVNO"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
689
+ Set("0f, 42", ["CMOVB"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
690
+ Set("0f, 43", ["CMOVAE"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
691
+ Set("0f, 44", ["CMOVZ"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
692
+ Set("0f, 45", ["CMOVNZ"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
693
+ Set("0f, 46", ["CMOVBE"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
694
+ Set("0f, 47", ["CMOVA"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
695
+ Set("0f, 48", ["CMOVS"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
696
+ Set("0f, 49", ["CMOVNS"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
697
+ Set("0f, 4a", ["CMOVP"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
698
+ Set("0f, 4b", ["CMOVNP"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
699
+ Set("0f, 4c", ["CMOVL"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
700
+ Set("0f, 4d", ["CMOVGE"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
701
+ Set("0f, 4e", ["CMOVLE"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
702
+ Set("0f, 4f", ["CMOVG"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
703
+ Set("da //c0", ["FCMOVB"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
704
+ Set("da //c8", ["FCMOVE"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
705
+ Set("da //d0", ["FCMOVBE"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
706
+ Set("da //d8", ["FCMOVU"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
707
+ Set("db //c0", ["FCMOVNB"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
708
+ Set("db //c8", ["FCMOVNE"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
709
+ Set("db //d0", ["FCMOVNBE"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
710
+ Set("db //d8", ["FCMOVNU"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
711
+ Set("db //f0", ["FCOMI"], [OPT.FPU_SSI], IFlag._32BITS | IFlag.GEN_BLOCK)
712
+
713
+ # Transactional
714
+ Set("0f, 01, d5", ["XEND"], [], IFlag._64BITS)
715
+ Set("c6 //f8", ["XABORT"], [OPT.IMM8], IFlag._64BITS)
716
+ Set("c7 //f8", ["XBEGIN"], [OPT.RELC_FULL], IFlag._64BITS)
717
+
718
+ def init_MMX(self):
719
+ Set = lambda *args: self.SetCallback(ISetClass.MMX, *args)
720
+
721
+ # Pseudo Opcodes, the second mnemonic is concatenated to the first mnemonic.
722
+
723
+ Set("0f, 60", ["PUNPCKLBW"], [OPT.MM, OPT.MM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
724
+ Set("0f, 61", ["PUNPCKLWD"], [OPT.MM, OPT.MM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
725
+ Set("0f, 62", ["PUNPCKLDQ"], [OPT.MM, OPT.MM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
726
+ Set("0f, 63", ["PACKSSWB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
727
+ Set("0f, 64", ["PCMPGTB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
728
+ Set("0f, 65", ["PCMPGTW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
729
+ Set("0f, 66", ["PCMPGTD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
730
+ Set("0f, 67", ["PACKUSWB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
731
+ Set("0f, 68", ["PUNPCKHBW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
732
+ Set("0f, 69", ["PUNPCKHWD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
733
+ Set("0f, 6a", ["PUNPCKHDQ"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
734
+ Set("0f, 6b", ["PACKSSDW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
735
+
736
+ # V 1.6.22 MOVD/MOVQ are used for 32bits or 64bits correspondignly.
737
+ Set("0f, 6e", ["MOVD", "", "MOVQ"], [OPT.MM, OPT.RM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX | IFlag.USE_EXMNEMONIC2)
738
+ Set("0f, 6f", ["MOVQ"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
739
+ Set("0f, 71 /02", ["PSRLW"], [OPT.MM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
740
+ Set("0f, 71 /04", ["PSRAW"], [OPT.MM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
741
+ Set("0f, 71 /06", ["PSLLW"], [OPT.MM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
742
+ Set("0f, 72 /02", ["PSRLD"], [OPT.MM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
743
+ Set("0f, 72 /04", ["PSRAD"], [OPT.MM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
744
+ Set("0f, 72 /06", ["PSLLD"], [OPT.MM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
745
+ Set("0f, 73 /02", ["PSRLQ"], [OPT.MM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
746
+ Set("0f, 73 /06", ["PSLLQ"], [OPT.MM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
747
+ Set("0f, 74", ["PCMPEQB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
748
+ Set("0f, 75", ["PCMPEQW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
749
+ Set("0f, 76", ["PCMPEQD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
750
+ Set("0f, 77", ["EMMS"], [], IFlag._32BITS)
751
+
752
+ # V 1.6.22 MOVD/MOVQ are used for 32bits or 64bits correspondignly.
753
+ Set("0f, 7e", ["MOVD", "", "MOVQ"], [OPT.RM32_64, OPT.MM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX | IFlag.USE_EXMNEMONIC2)
754
+ Set("0f, 7f", ["MOVQ"], [OPT.MM64, OPT.MM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
755
+ Set("0f, d1", ["PSRLW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
756
+ Set("0f, d2", ["PSRLD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
757
+ Set("0f, d3", ["PSRLQ"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
758
+ Set("0f, d5", ["PMULLW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
759
+ Set("0f, d8", ["PSUBUSB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
760
+ Set("0f, d9", ["PSUBUSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
761
+ Set("0f, db", ["PAND"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
762
+ Set("0f, dc", ["PADDUSB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
763
+ Set("0f, dd", ["PADDUSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
764
+ Set("0f, df", ["PANDN"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
765
+ Set("0f, e1", ["PSRAW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
766
+ Set("0f, e2", ["PSRAD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
767
+ Set("0f, e5", ["PMULHW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
768
+ Set("0f, e8", ["PSUBSB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
769
+ Set("0f, e9", ["PSUBSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
770
+ Set("0f, eb", ["POR"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
771
+ Set("0f, ec", ["PADDSB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
772
+ Set("0f, ed", ["PADDSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
773
+ Set("0f, ef", ["PXOR"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
774
+ Set("0f, f1", ["PSLLW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
775
+ Set("0f, f2", ["PSLLD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
776
+ Set("0f, f3", ["PSLLQ"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
777
+ Set("0f, f5", ["PMADDWD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
778
+ Set("0f, f8", ["PSUBB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
779
+ Set("0f, f9", ["PSUBW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
780
+ Set("0f, fa", ["PSUBD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
781
+ Set("0f, fc", ["PADDB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
782
+ Set("0f, fd", ["PADDW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
783
+ Set("0f, fe", ["PADDD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
784
+
785
+ def init_SSE(self):
786
+ Set = lambda *args: self.SetCallback(ISetClass.SSE, *args)
787
+ Set("0f, 10", ["MOVUPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
788
+ Set("0f, 11", ["MOVUPS"], [OPT.XMM128, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
789
+
790
+ # The problem with these instructions (MOVHLPS/MOVLHPS) is that both kinds need partialy the ModR/M byte.
791
+ # mod=11 for first mnemonic.
792
+
793
+ Set("0f, 12", ["MOVHLPS", "MOVLPS"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC | IFlag.MNEMONIC_MODRM_BASED)
794
+ Set("0f, 13", ["MOVLPS"], [OPT.MEM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
795
+ Set("0f, 14", ["UNPCKLPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
796
+ Set("0f, 15", ["UNPCKHPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
797
+ Set("0f, 16", ["MOVLHPS", "MOVHPS"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC | IFlag.MNEMONIC_MODRM_BASED)
798
+ Set("0f, 17", ["MOVHPS"], [OPT.MEM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
799
+ Set("0f, 18 /00", ["PREFETCHNTA"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
800
+ Set("0f, 18 /01", ["PREFETCHT0"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
801
+ Set("0f, 18 /02", ["PREFETCHT1"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
802
+ Set("0f, 18 /03", ["PREFETCHT2"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
803
+ Set("0f, 28", ["MOVAPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
804
+ Set("0f, 29", ["MOVAPS"], [OPT.XMM128, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
805
+ Set("0f, 2a", ["CVTPI2PS"], [OPT.XMM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
806
+ Set("0f, 2b", ["MOVNTPS"], [OPT.MEM128, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
807
+ Set("0f, 2c", ["CVTTPS2PI"], [OPT.MM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
808
+ Set("0f, 2d", ["CVTPS2PI"], [OPT.MM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
809
+ Set("0f, 2e", ["UCOMISS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
810
+ Set("0f, 2f", ["COMISS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
811
+ Set("0f, 50", ["MOVMSKPS"], [OPT.REG32, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
812
+ Set("0f, 51", ["SQRTPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
813
+ Set("0f, 52", ["RSQRTPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
814
+ Set("0f, 53", ["RCPPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
815
+ Set("0f, 54", ["ANDPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
816
+ Set("0f, 55", ["ANDNPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
817
+ Set("0f, 56", ["ORPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
818
+ Set("0f, 57", ["XORPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
819
+ Set("0f, 58", ["ADDPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
820
+ Set("0f, 59", ["MULPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
821
+ Set("0f, 5c", ["SUBPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
822
+ Set("0f, 5d", ["MINPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
823
+ Set("0f, 5e", ["DIVPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
824
+ Set("0f, 5f", ["MAXPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
825
+ Set("0f, 70", ["PSHUFW"], [OPT.MM, OPT.MM64, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
826
+ Set("0f, c2", ["CMP", "PS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC | IFlag.PSEUDO_OPCODE)
827
+ Set("0f, c4", ["PINSRW"], [OPT.MM, OPT.R32_M16, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
828
+ Set("0f, c5", ["PEXTRW"], [OPT.REG32, OPT.MM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
829
+ Set("0f, c6", ["SHUFPS"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
830
+ Set("0f, d7", ["PMOVMSKB"], [OPT.REG32, OPT.MM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
831
+ Set("0f, da", ["PMINUB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
832
+ Set("0f, de", ["PMAXUB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
833
+ Set("0f, e0", ["PAVGB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
834
+ Set("0f, e3", ["PAVGW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
835
+ Set("0f, e4", ["PMULHUW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
836
+ Set("0f, e7", ["MOVNTQ"], [OPT.MEM64, OPT.MM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
837
+ Set("0f, ea", ["PMINSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
838
+ Set("0f, ee", ["PMAXSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
839
+ Set("0f, f6", ["PSADBW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
840
+ Set("0f, f7", ["MASKMOVQ"], [OPT.MM, OPT.MM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
841
+ Set("f3, 0f, 10", ["MOVSS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
842
+ Set("f3, 0f, 11", ["MOVSS"], [OPT.XMM32, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
843
+ Set("f3, 0f, 2a", ["CVTSI2SS"], [OPT.XMM, OPT.RM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
844
+ Set("f3, 0f, 2c", ["CVTTSS2SI"], [OPT.REG32_64, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
845
+ Set("f3, 0f, 2d", ["CVTSS2SI"], [OPT.REG32_64, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
846
+ Set("f3, 0f, 51", ["SQRTSS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
847
+ Set("f3, 0f, 52", ["RSQRTSS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
848
+ Set("f3, 0f, 53", ["RCPSS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
849
+ Set("f3, 0f, 58", ["ADDSS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
850
+ Set("f3, 0f, 59", ["MULSS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
851
+ Set("f3, 0f, 5c", ["SUBSS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
852
+ Set("f3, 0f, 5d", ["MINSS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
853
+ Set("f3, 0f, 5e", ["DIVSS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
854
+ Set("f3, 0f, 5f", ["MAXSS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
855
+ Set("f3, 0f, c2", ["CMP", "SS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC | IFlag.PSEUDO_OPCODE)
856
+
857
+ def init_SSE2(self):
858
+ Set = lambda *args: self.SetCallback(ISetClass.SSE2, *args)
859
+ Set("0f, 5a", ["CVTPS2PD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
860
+ Set("0f, 5b", ["CVTDQ2PS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
861
+ Set("0f, c3", ["MOVNTI"], [OPT.MEM32_64, OPT.REG32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
862
+ Set("0f, d4", ["PADDQ"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
863
+ Set("0f, f4", ["PMULUDQ"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
864
+ Set("0f, fb", ["PSUBQ"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
865
+ Set("66, 0f, 10", ["MOVUPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
866
+ Set("66, 0f, 11", ["MOVUPD"], [OPT.XMM128, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
867
+ Set("66, 0f, 12", ["MOVLPD"], [OPT.XMM, OPT.MEM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
868
+ Set("66, 0f, 13", ["MOVLPD"], [OPT.MEM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
869
+ Set("66, 0f, 14", ["UNPCKLPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
870
+ Set("66, 0f, 15", ["UNPCKHPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
871
+ Set("66, 0f, 16", ["MOVHPD"], [OPT.XMM, OPT.MEM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
872
+ Set("66, 0f, 17", ["MOVHPD"], [OPT.MEM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
873
+ Set("66, 0f, 28", ["MOVAPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
874
+ Set("66, 0f, 29", ["MOVAPD"], [OPT.XMM128, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
875
+ Set("66, 0f, 2a", ["CVTPI2PD"], [OPT.XMM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
876
+ Set("66, 0f, 2b", ["MOVNTPD"], [OPT.MEM128, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
877
+ Set("66, 0f, 2c", ["CVTTPD2PI"], [OPT.MM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
878
+ Set("66, 0f, 2d", ["CVTPD2PI"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
879
+ Set("66, 0f, 2e", ["UCOMISD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
880
+ Set("66, 0f, 2f", ["COMISD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
881
+ Set("66, 0f, 50", ["MOVMSKPD"], [OPT.REG32, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
882
+ Set("66, 0f, 51", ["SQRTPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
883
+ Set("66, 0f, 54", ["ANDPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
884
+ Set("66, 0f, 55", ["ANDNPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
885
+ Set("66, 0f, 56", ["ORPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
886
+ Set("66, 0f, 57", ["XORPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
887
+ Set("66, 0f, 58", ["ADDPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
888
+ Set("66, 0f, 59", ["MULPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
889
+ Set("66, 0f, 5a", ["CVTPD2PS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
890
+ Set("66, 0f, 5b", ["CVTPS2DQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
891
+ Set("66, 0f, 5c", ["SUBPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
892
+ Set("66, 0f, 5d", ["MINPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
893
+ Set("66, 0f, 5e", ["DIVPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
894
+ Set("66, 0f, 5f", ["MAXPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
895
+ Set("66, 0f, 60", ["PUNPCKLBW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
896
+ Set("66, 0f, 61", ["PUNPCKLWD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
897
+ Set("66, 0f, 62", ["PUNPCKLDQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
898
+ Set("66, 0f, 63", ["PACKSSWB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
899
+ Set("66, 0f, 64", ["PCMPGTB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
900
+ Set("66, 0f, 65", ["PCMPGTW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
901
+ Set("66, 0f, 66", ["PCMPGTD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
902
+ Set("66, 0f, 67", ["PACKUSWB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
903
+ Set("66, 0f, 68", ["PUNPCKHBW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
904
+ Set("66, 0f, 69", ["PUNPCKHWD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
905
+ Set("66, 0f, 6a", ["PUNPCKHDQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
906
+ Set("66, 0f, 6b", ["PACKSSDW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
907
+ Set("66, 0f, 6c", ["PUNPCKLQDQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
908
+ Set("66, 0f, 6d", ["PUNPCKHQDQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
909
+
910
+ # V 1.6.22 MOVD/MOVQ are used for 32bits or 64bits correspondignly.
911
+ Set("66, 0f, 6e", ["MOVD", "", "MOVQ"], [OPT.XMM, OPT.RM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX | IFlag.USE_EXMNEMONIC2)
912
+ Set("66, 0f, 6f", ["MOVDQA"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
913
+ Set("66, 0f, 70", ["PSHUFD"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
914
+ Set("66, 0f, 71 /02", ["PSRLW"], [OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
915
+ Set("66, 0f, 71 /04", ["PSRAW"], [OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
916
+ Set("66, 0f, 71 /06", ["PSLLW"], [OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
917
+ Set("66, 0f, 72 /02", ["PSRLD"], [OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
918
+ Set("66, 0f, 72 /04", ["PSRAD"], [OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
919
+ Set("66, 0f, 72 /06", ["PSLLD"], [OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
920
+ Set("66, 0f, 73 /02", ["PSRLQ"], [OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
921
+ Set("66, 0f, 73 /03", ["PSRLDQ"], [OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
922
+ Set("66, 0f, 73 /06", ["PSLLQ"], [OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
923
+ Set("66, 0f, 73 /07", ["PSLLDQ"], [OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
924
+ Set("66, 0f, 74", ["PCMPEQB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
925
+ Set("66, 0f, 75", ["PCMPEQW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
926
+ Set("66, 0f, 76", ["PCMPEQD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
927
+
928
+ # V 1.6.22 MOVD/MOVQ are used for 32bits or 64bits correspondignly.
929
+ Set("66, 0f, 7e", ["MOVD", "", "MOVQ"], [OPT.RM32_64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX | IFlag.USE_EXMNEMONIC2)
930
+ Set("66, 0f, 7f", ["MOVDQA"], [OPT.XMM128, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
931
+ Set("66, 0f, c2", ["CMP", "PD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC | IFlag.PSEUDO_OPCODE)
932
+ Set("66, 0f, c4", ["PINSRW"], [OPT.XMM, OPT.R32_M16, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
933
+ Set("66, 0f, c5", ["PEXTRW"], [OPT.REG32, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
934
+ Set("66, 0f, c6", ["SHUFPD"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
935
+ Set("66, 0f, d1", ["PSRLW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
936
+ Set("66, 0f, d2", ["PSRLD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
937
+ Set("66, 0f, d3", ["PSRLQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
938
+ Set("66, 0f, d4", ["PADDQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
939
+ Set("66, 0f, d5", ["PMULLW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
940
+ Set("66, 0f, d6", ["MOVQ"], [OPT.XMM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
941
+ Set("66, 0f, d7", ["PMOVMSKB"], [OPT.REG32, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
942
+ Set("66, 0f, d8", ["PSUBUSB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
943
+ Set("66, 0f, d9", ["PSUBUSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
944
+ Set("66, 0f, da", ["PMINUB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
945
+ Set("66, 0f, db", ["PAND"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
946
+ Set("66, 0f, dc", ["PADDUSB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
947
+ Set("66, 0f, dd", ["PADDUSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
948
+ Set("66, 0f, de", ["PMAXUB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
949
+ Set("66, 0f, df", ["PANDN"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
950
+ Set("66, 0f, e0", ["PAVGB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
951
+ Set("66, 0f, e1", ["PSRAW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
952
+ Set("66, 0f, e2", ["PSRAD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
953
+ Set("66, 0f, e3", ["PAVGW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
954
+ Set("66, 0f, e4", ["PMULHUW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
955
+ Set("66, 0f, e5", ["PMULHW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
956
+ Set("66, 0f, e6", ["CVTTPD2DQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
957
+ Set("66, 0f, e7", ["MOVNTDQ"], [OPT.MEM128, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
958
+ Set("66, 0f, e8", ["PSUBSB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
959
+ Set("66, 0f, e9", ["PSUBSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
960
+ Set("66, 0f, ea", ["PMINSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
961
+ Set("66, 0f, eb", ["POR"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
962
+ Set("66, 0f, ec", ["PADDSB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
963
+ Set("66, 0f, ed", ["PADDSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
964
+ Set("66, 0f, ee", ["PMAXSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
965
+ Set("66, 0f, ef", ["PXOR"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
966
+ Set("66, 0f, f1", ["PSLLW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
967
+ Set("66, 0f, f2", ["PSLLD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
968
+ Set("66, 0f, f3", ["PSLLQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
969
+ Set("66, 0f, f4", ["PMULUDQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
970
+ Set("66, 0f, f5", ["PMADDWD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
971
+ Set("66, 0f, f6", ["PSADBW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
972
+ Set("66, 0f, f7", ["MASKMOVDQU"], [OPT.XMM, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
973
+ Set("66, 0f, f8", ["PSUBB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
974
+ Set("66, 0f, f9", ["PSUBW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
975
+ Set("66, 0f, fa", ["PSUBD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
976
+ Set("66, 0f, fb", ["PSUBQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
977
+ Set("66, 0f, fc", ["PADDB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
978
+ Set("66, 0f, fd", ["PADDW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
979
+ Set("66, 0f, fe", ["PADDD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
980
+ Set("f2, 0f, 10", ["MOVSD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
981
+ Set("f2, 0f, 11", ["MOVSD"], [OPT.XMM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
982
+ Set("f2, 0f, 2a", ["CVTSI2SD"], [OPT.XMM, OPT.RM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
983
+ Set("f2, 0f, 2c", ["CVTTSD2SI"], [OPT.REG32_64, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
984
+ Set("f2, 0f, 2d", ["CVTSD2SI"], [OPT.REG32_64, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_REX)
985
+ Set("f2, 0f, 51", ["SQRTSD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
986
+ Set("f2, 0f, 58", ["ADDSD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
987
+ Set("f2, 0f, 59", ["MULSD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
988
+ Set("f2, 0f, 5a", ["CVTSD2SS"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
989
+ Set("f2, 0f, 5c", ["SUBSD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
990
+ Set("f2, 0f, 5d", ["MINSD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
991
+ Set("f2, 0f, 5e", ["DIVSD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
992
+ Set("f2, 0f, 5f", ["MAXSD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
993
+ Set("f2, 0f, 70", ["PSHUFLW"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
994
+ Set("f2, 0f, c2", ["CMP", "SD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC | IFlag.PSEUDO_OPCODE)
995
+ Set("f2, 0f, d6", ["MOVDQ2Q"], [OPT.MM, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
996
+ Set("f2, 0f, e6", ["CVTPD2DQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
997
+ Set("f3, 0f, 5a", ["CVTSS2SD"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
998
+ Set("f3, 0f, 5b", ["CVTTPS2DQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
999
+ Set("f3, 0f, 6f", ["MOVDQU"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1000
+ Set("f3, 0f, 70", ["PSHUFHW"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1001
+
1002
+ Set("f3, 0f, 7e", ["MOVQ"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1003
+ Set("f3, 0f, 7f", ["MOVDQU"], [OPT.XMM128, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1004
+ Set("f3, 0f, d6", ["MOVQ2DQ"], [OPT.XMM, OPT.MM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.MODRR_REQUIRED)
1005
+ Set("f3, 0f, e6", ["CVTDQ2PD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1006
+
1007
+ def init_SSE3(self):
1008
+ Set = lambda *args: self.SetCallback(ISetClass.SSE3, *args)
1009
+ Set("66, 0f, 7c", ["HADDPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1010
+ Set("66, 0f, 7d", ["HSUBPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1011
+ Set("66, 0f, d0", ["ADDSUBPD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1012
+ Set("db //01", ["FISTTP"], [OPT.FPUM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1013
+ Set("dd //01", ["FISTTP"], [OPT.FPUM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1014
+ Set("df //01", ["FISTTP"], [OPT.FPUM16], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1015
+ Set("f2, 0f, 12", ["MOVDDUP"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1016
+ Set("f3, 0f, 12", ["MOVSLDUP"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1017
+ Set("f2, 0f, 7c", ["HADDPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1018
+ Set("f2, 0f, 7d", ["HSUBPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1019
+ Set("f2, 0f, d0", ["ADDSUBPS"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1020
+ Set("f2, 0f, f0", ["LDDQU"], [OPT.XMM, OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1021
+ Set("f3, 0f, 16", ["MOVSHDUP"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1022
+
1023
+ def init_SSSE3(self):
1024
+ Set = lambda *args: self.SetCallback(ISetClass.SSSE3, *args)
1025
+ Set("0f, 38, 00", ["PSHUFB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1026
+ Set("0f, 38, 01", ["PHADDW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1027
+ Set("0f, 38, 02", ["PHADDD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1028
+ Set("0f, 38, 03", ["PHADDSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1029
+ Set("0f, 38, 04", ["PMADDUBSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1030
+ Set("0f, 38, 05", ["PHSUBW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1031
+ Set("0f, 38, 06", ["PHSUBD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1032
+ Set("0f, 38, 07", ["PHSUBSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1033
+ Set("0f, 38, 08", ["PSIGNB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1034
+ Set("0f, 38, 09", ["PSIGNW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1035
+ Set("0f, 38, 0a", ["PSIGND"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1036
+ Set("0f, 38, 0b", ["PMULHRSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1037
+ Set("0f, 38, 1c", ["PABSB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1038
+ Set("0f, 38, 1d", ["PABSW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1039
+ Set("0f, 38, 1e", ["PABSD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1040
+ Set("0f, 3a, 0f", ["PALIGNR"], [OPT.MM, OPT.MM64, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1041
+ Set("66, 0f, 38, 00", ["PSHUFB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1042
+ Set("66, 0f, 38, 01", ["PHADDW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1043
+ Set("66, 0f, 38, 02", ["PHADDD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1044
+ Set("66, 0f, 38, 03", ["PHADDSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1045
+ Set("66, 0f, 38, 04", ["PMADDUBSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1046
+ Set("66, 0f, 38, 05", ["PHSUBW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1047
+ Set("66, 0f, 38, 06", ["PHSUBD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1048
+ Set("66, 0f, 38, 07", ["PHSUBSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1049
+ Set("66, 0f, 38, 08", ["PSIGNB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1050
+ Set("66, 0f, 38, 09", ["PSIGNW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1051
+ Set("66, 0f, 38, 0a", ["PSIGND"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1052
+ Set("66, 0f, 38, 0b", ["PMULHRSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1053
+ Set("66, 0f, 38, 1c", ["PABSB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1054
+ Set("66, 0f, 38, 1d", ["PABSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1055
+ Set("66, 0f, 38, 1e", ["PABSD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1056
+ Set("66, 0f, 3a, 0f", ["PALIGNR"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1057
+
1058
+ def init_SSE4_1(self):
1059
+ Set = lambda *args: self.SetCallback(ISetClass.SSE4_1, *args)
1060
+ Set("66, 0f, 3a, 0d", ["BLENDPD"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1061
+ Set("66, 0f, 3a, 0c", ["BLENDPS"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1062
+ Set("66, 0f, 38, 15", ["BLENDVPD"], [OPT.XMM, OPT.XMM128, OPT.REGXMM0], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1063
+ Set("66, 0f, 38, 14", ["BLENDVPS"], [OPT.XMM, OPT.XMM128, OPT.REGXMM0], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1064
+ Set("66, 0f, 3a, 41", ["DPPD"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1065
+ Set("66, 0f, 3a, 40", ["DPPS"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1066
+ Set("66, 0f, 3a, 17", ["EXTRACTPS"], [OPT.RM32_64, OPT.XMM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1067
+ Set("66, 0f, 3a, 21", ["INSERTPS"], [OPT.XMM, OPT.XMM32, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1068
+ Set("66, 0f, 38, 2a", ["MOVNTDQA"], [OPT.XMM, OPT.MEM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1069
+ Set("66, 0f, 3a, 42", ["MPSADBW"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1070
+ Set("66, 0f, 38, 2b", ["PACKUSDW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1071
+ Set("66, 0f, 38, 10", ["PBLENDVB"], [OPT.XMM, OPT.XMM128, OPT.REGXMM0], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1072
+ Set("66, 0f, 3a, 0e", ["PBLENDW"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1073
+ Set("66, 0f, 38, 29", ["PCMPEQQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1074
+ Set("66, 0f, 3a, 14", ["PEXTRB"], [OPT.R32_64_M8, OPT.XMM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1075
+ Set("66, 0f, 3a, 16", ["PEXTRD", "", "PEXTRQ"], [OPT.RM32_64, OPT.XMM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC2)
1076
+ Set("66, 0f, 3a, 15", ["PEXTRW"], [OPT.R32_64_M16, OPT.XMM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1077
+ Set("66, 0f, 38, 41", ["PHMINPOSUW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1078
+ Set("66, 0f, 3a, 20", ["PINSRB"], [OPT.XMM, OPT.R32_M8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1079
+ Set("66, 0f, 3a, 22", ["PINSRD", "", "PINSRQ"], [OPT.XMM, OPT.RM32_64, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.USE_EXMNEMONIC2)
1080
+ Set("66, 0f, 38, 3c", ["PMAXSB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1081
+ Set("66, 0f, 38, 3d", ["PMAXSD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1082
+ Set("66, 0f, 38, 3f", ["PMAXUD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1083
+ Set("66, 0f, 38, 3e", ["PMAXUW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1084
+ Set("66, 0f, 38, 38", ["PMINSB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1085
+ Set("66, 0f, 38, 39", ["PMINSD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1086
+ Set("66, 0f, 38, 3b", ["PMINUD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1087
+ Set("66, 0f, 38, 3a", ["PMINUW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1088
+ Set("66, 0f, 38, 20", ["PMOVSXBW"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1089
+ Set("66, 0f, 38, 21", ["PMOVSXBD"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1090
+ Set("66, 0f, 38, 22", ["PMOVSXBQ"], [OPT.XMM, OPT.XMM16], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1091
+ Set("66, 0f, 38, 23", ["PMOVSXWD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1092
+ Set("66, 0f, 38, 24", ["PMOVSXWQ"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1093
+ Set("66, 0f, 38, 25", ["PMOVSXDQ"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1094
+ Set("66, 0f, 38, 30", ["PMOVZXBW"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1095
+ Set("66, 0f, 38, 31", ["PMOVZXBD"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1096
+ Set("66, 0f, 38, 32", ["PMOVZXBQ"], [OPT.XMM, OPT.XMM16], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1097
+ Set("66, 0f, 38, 33", ["PMOVZXWD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1098
+ Set("66, 0f, 38, 34", ["PMOVZXWQ"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1099
+ Set("66, 0f, 38, 35", ["PMOVZXDQ"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1100
+ Set("66, 0f, 38, 28", ["PMULDQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1101
+ Set("66, 0f, 38, 40", ["PMULLD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1102
+ Set("66, 0f, 3a, 09", ["ROUNDPD"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1103
+ Set("66, 0f, 3a, 08", ["ROUNDPS"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1104
+ Set("66, 0f, 3a, 0b", ["ROUNDSD"], [OPT.XMM, OPT.XMM64, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1105
+ Set("66, 0f, 3a, 0a", ["ROUNDSS"], [OPT.XMM, OPT.XMM32, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1106
+
1107
+ def init_SSE4_2(self):
1108
+ Set = lambda *args: self.SetCallback(ISetClass.SSE4_2, *args)
1109
+ Set("f2, 0f, 38, f0", ["CRC32"], [OPT.REG32_64, OPT.RM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1110
+ Set("f2, 0f, 38, f1", ["CRC32"], [OPT.REG32_64, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1111
+ Set("66, 0f, 38, 17", ["PTEST"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1112
+ Set("66, 0f, 3a, 61", ["PCMPESTRI"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1113
+ Set("66, 0f, 3a, 60", ["PCMPESTRM"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1114
+ Set("66, 0f, 3a, 63", ["PCMPISTRI"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1115
+ Set("66, 0f, 3a, 62", ["PCMPISTRM"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1116
+ Set("66, 0f, 38, 37", ["PCMPGTQ"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1117
+
1118
+ # Note POPCNT can be prefixed by 0x66 although it has also a mandatory prefix!
1119
+ Set("f3, 0f, b8", ["POPCNT"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_OP_SIZE)
1120
+
1121
+ def init_SSE4_A(self):
1122
+ # New instructions from AMD July 2007
1123
+ Set = lambda *args: self.SetCallback(ISetClass.SSE4_A, *args)
1124
+ # DB can't support a table after Prefixed table (it will really complicate everything and doesn't worth it),
1125
+ # therefore we will have to force a REG of 0 in the flags! Beats me. :(
1126
+ #Set("66, 0f, 78 /00", ["EXTRQ"], [OPT.XMM_RM, OPT.IMM8_1, OPT.IMM8_2], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1127
+ Set("66, 0f, 78", ["EXTRQ"], [OPT.XMM_RM, OPT.IMM8_1, OPT.IMM8_2], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.FORCE_REG0)
1128
+ Set("66, 0f, 79", ["EXTRQ"], [OPT.XMM, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1129
+ # Four operands(!) I want m'mommy
1130
+ Set("f2, 0f, 78", ["INSERTQ"], [OPT.XMM, OPT.XMM_RM, OPT.IMM8_1, OPT.IMM8_2], IFlag.MODRM_REQUIRED | IFlag.MODRR_REQUIRED | IFlag._32BITS)
1131
+ Set("f2, 0f, 79", ["INSERTQ"], [OPT.XMM, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag.MODRR_REQUIRED | IFlag._32BITS)
1132
+ Set("f2, 0f, 2b", ["MOVNTSD"], [OPT.MEM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1133
+ Set("f3, 0f, 2b", ["MOVNTSS"], [OPT.MEM32, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1134
+
1135
+ def init_3DNOW(self):
1136
+ Set = lambda *args: self.SetCallback(ISetClass._3DNOW, *args)
1137
+ Set("0f, 0d /00", ["PREFETCH"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1138
+ Set("0f, 0d /01", ["PREFETCHW"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1139
+ Set("0f, 0e", ["FEMMS"], [], IFlag.INST_FLAGS_NONE)
1140
+ Set("0f, 0f, 0d", ["PI2FD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1141
+ Set("0f, 0f, 1d", ["PF2ID"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1142
+ Set("0f, 0f, 90", ["PFCMPGE"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1143
+ Set("0f, 0f, 94", ["PFMIN"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1144
+ Set("0f, 0f, 96", ["PFRCP"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1145
+ Set("0f, 0f, 97", ["PFRSQRT"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1146
+ Set("0f, 0f, 9a", ["PFSUB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1147
+ Set("0f, 0f, 9e", ["PFADD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1148
+ Set("0f, 0f, a0", ["PFCMPGT"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1149
+ Set("0f, 0f, a4", ["PFMAX"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1150
+ Set("0f, 0f, a6", ["PFRCPIT1"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1151
+ Set("0f, 0f, a7", ["PFRSQIT1"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1152
+ Set("0f, 0f, aa", ["PFSUBR"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1153
+ Set("0f, 0f, ae", ["PFACC"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1154
+ Set("0f, 0f, b0", ["PFCMPEQ"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1155
+ Set("0f, 0f, b4", ["PFMUL"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1156
+ Set("0f, 0f, b6", ["PFRCPIT2"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1157
+ Set("0f, 0f, b7", ["PMULHRW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1158
+ Set("0f, 0f, bf", ["PAVGUSB"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1159
+
1160
+ def init_3DNOWEXT(self):
1161
+ Set = lambda *args: self.SetCallback(ISetClass._3DNOWEXT, *args)
1162
+ Set("0f, 0f, 0c", ["PI2FW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1163
+ Set("0f, 0f, 1c", ["PF2IW"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1164
+ Set("0f, 0f, 8a", ["PFNACC"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1165
+ Set("0f, 0f, 8e", ["PFPNACC"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1166
+ Set("0f, 0f, bb", ["PSWAPD"], [OPT.MM, OPT.MM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._3DNOW_FETCH)
1167
+
1168
+ def init_VMX(self):
1169
+ Set = lambda *args: self.SetCallback(ISetClass.VMX, *args)
1170
+ Set("0f, 01 //c1", ["VMCALL"], [], IFlag._32BITS)
1171
+ Set("0f, 01 //c2", ["VMLAUNCH"], [], IFlag._32BITS)
1172
+ Set("0f, 01 //c3", ["VMRESUME"], [], IFlag._32BITS)
1173
+ Set("0f, 01 //c4", ["VMXOFF"], [], IFlag._32BITS)
1174
+
1175
+ # In 64bits the operands are promoted to 64bits automatically.
1176
+ Set("0f, 78", ["VMREAD"], [OPT.RM32_64, OPT.REG32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
1177
+ Set("0f, 79", ["VMWRITE"], [OPT.REG32_64, OPT.RM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
1178
+ # VMPTRLD collides with RDRAND (see exported instructions).
1179
+ Set("0f, c7 /06", ["VMPTRLD"], [OPT.MEM], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1180
+ Set("0f, c7 /07", ["VMPTRST"], [OPT.MEM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1181
+ Set("66, 0f, c7 /06", ["VMCLEAR"], [OPT.MEM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1182
+ Set("f3, 0f, c7 /06", ["VMXON"], [OPT.MEM64], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1183
+
1184
+ # New VMX instructions from Intel September 2009:
1185
+ Set("66, 0f, 38, 80", ["INVEPT"], [OPT.REG32_64, OPT.MEM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
1186
+ Set("66, 0f, 38, 81", ["INVVPID"], [OPT.REG32_64, OPT.MEM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
1187
+
1188
+ # New instructions from Intel December 2011.
1189
+ Set("0f, 01 //d4", ["VMFUNC"], [], IFlag._32BITS)
1190
+
1191
+ Set("66, 0f, 38, 82", ["INVPCID"], [OPT.REG32_64, OPT.MEM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
1192
+ # Can be prefixed with 0x66, see LZCNT.
1193
+ Set("f3, 0f, bc", ["TZCNT"], [OPT.REG_FULL, OPT.RM_FULL], IFlag.MODRM_REQUIRED | IFlag.PRE_OP_SIZE)
1194
+
1195
+ Set("f3, 0f, ae /0", ["RDFSBASE"], [OPT.REG32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
1196
+ Set("f3, 0f, ae /1", ["RDGSBASE"], [OPT.REG32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
1197
+ Set("f3, 0f, ae /2", ["WRFSBASE"], [OPT.REG32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
1198
+ Set("f3, 0f, ae /3", ["WRGSBASE"], [OPT.REG32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS)
1199
+
1200
+ # SSE5.
1201
+ Set("0f, 7a, 31", ["CVTPS2PH"], [OPT.XMM64, OPT.XMM], IFlag._32BITS, IFlag._64BITS)
1202
+ Set("0f, 7a, 30", ["CVTPH2PS"], [OPT.XMM, OPT.XMM64], IFlag._32BITS, IFlag._64BITS)
1203
+
1204
+ def init_SVM(self):
1205
+ Set = lambda *args: self.SetCallback(ISetClass.SVM, *args)
1206
+ Set("0f, 01 //d8", ["VMRUN"], [OPT.REGI_EAX], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1207
+ Set("0f, 01 //d9", ["VMMCALL"], [], IFlag._32BITS)
1208
+ Set("0f, 01 //da", ["VMLOAD"], [OPT.REGI_EAX], IFlag._32BITS)
1209
+ Set("0f, 01 //db", ["VMSAVE"], [OPT.REGI_EAX], IFlag._32BITS)
1210
+ Set("0f, 01 //dc", ["STGI"], [], IFlag._32BITS)
1211
+ Set("0f, 01 //dd", ["CLGI"], [], IFlag._32BITS)
1212
+ Set("0f, 01 //de", ["SKINIT"], [OPT.REGI_EAX], IFlag._32BITS)
1213
+ Set("0f, 01 //df", ["INVLPGA"], [OPT.REGI_EAX, OPT.REGECX], IFlag._32BITS)
1214
+
1215
+ def init_AVX(self):
1216
+ # Most SSE/SSE2/SSE3/SSSE3/SSE4 instructions have been promoted, and they are all part of the AVX category.
1217
+ # It's easier to keep them separated, also because some of the promoted instructions have different number of operands, etc.
1218
+
1219
+ Set = lambda *args: self.SetCallback(ISetClass.AVX, *args)
1220
+ SetAes = lambda *args: self.SetCallback(ISetClass.AES, *args)
1221
+ SetClmul = lambda *args: self.SetCallback(ISetClass.CLMUL, *args)
1222
+
1223
+ Set("66, 0f, 58", ["VADDPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1224
+ Set("0f, 58", ["VADDPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1225
+ Set("f2, 0f, 58", ["VADDSD"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1226
+ Set("f3, 0f, 58", ["VADDSS"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1227
+
1228
+ Set("66, 0f, d0", ["VADDSUBPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1229
+ Set("f2, 0f, d0", ["VADDSUBPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1230
+
1231
+ SetAes("66, 0f, 38, dc", ["AESENC"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1232
+ SetAes("66, 0f, 38, dd", ["AESENCLAST"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1233
+ SetAes("66, 0f, 38, dc", ["VAESENC"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1234
+ SetAes("66, 0f, 38, dd", ["VAESENCLAST"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1235
+
1236
+ SetAes("66, 0f, 38, de", ["AESDEC"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1237
+ SetAes("66, 0f, 38, df", ["AESDECLAST"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1238
+ SetAes("66, 0f, 38, de", ["VAESDEC"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1239
+ SetAes("66, 0f, 38, df", ["VAESDECLAST"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1240
+
1241
+ SetAes("66, 0f, 38, db", ["AESIMC"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1242
+ SetAes("66, 0f, 38, db", ["VAESIMC"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1243
+
1244
+ SetAes("66, 0f, 3a, df", ["AESKEYGENASSIST"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1245
+ SetAes("66, 0f, 3a, df", ["VAESKEYGENASSIST"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1246
+
1247
+ Set("66, 0f, 54", ["VANDPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1248
+ Set("0f, 54", ["VANDPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1249
+ Set("66, 0f, 55", ["VANDNPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1250
+ Set("0f, 55", ["VANDNPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1251
+
1252
+ Set("66, 0f, 3a, 0d", ["VBLENDPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1253
+ Set("66, 0f, 3a, 0c", ["VBLENDPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1254
+ Set("66, 0f, 3a, 4b", ["VBLENDVPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256, OPT.YXMM_IMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1255
+ Set("66, 0f, 3a, 4a", ["VBLENDVPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256, OPT.YXMM_IMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1256
+
1257
+ Set("66, 0f, 38, 18", ["VBROADCASTSS"], [OPT.YXMM, OPT.MEM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1258
+ Set("66, 0f, 38, 19", ["VBROADCASTSD"], [OPT.YMM, OPT.MEM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.FORCE_VEXL)
1259
+ Set("66, 0f, 38, 1a", ["VBROADCASTF128"], [OPT.YMM, OPT.MEM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.FORCE_VEXL)
1260
+
1261
+ Set("66, 0f, c2", ["VCMP", "PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L | IFlag.PSEUDO_OPCODE)
1262
+ Set("0f, c2", ["VCMP", "PS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L | IFlag.PSEUDO_OPCODE)
1263
+ Set("f2, 0f, c2", ["VCMP", "SD"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.PSEUDO_OPCODE)
1264
+ Set("f3, 0f, c2", ["VCMP", "SS"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.PSEUDO_OPCODE)
1265
+
1266
+ Set("66, 0f, 2f", ["VCOMISD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1267
+ Set("0f, 2f", ["VCOMISS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1268
+
1269
+ Set("f3, 0f, e6", ["VCVTDQ2PD"], [OPT.YXMM, OPT.LXMM64_128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1270
+ Set("0f, 5b", ["VCVTDQ2PS"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1271
+ Set("f2, 0f, e6", ["VCVTPD2DQ"], [OPT.XMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1272
+ Set("66, 0f, 5a", ["VCVTPD2PS"], [OPT.XMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1273
+ Set("66, 0f, 5b", ["VCVTPS2DQ"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1274
+ Set("0f, 5a", ["VCVTPS2PD"], [OPT.YXMM, OPT.LXMM64_128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1275
+ Set("f2, 0f, 2d", ["VCVTSD2SI"], [OPT.WREG32_64, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W)
1276
+ Set("f2, 0f, 5a", ["VCVTSD2SS"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1277
+ Set("f2, 0f, 2a", ["VCVTSI2SD"], [OPT.XMM, OPT.VXMM, OPT.WRM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W)
1278
+ Set("f3, 0f, 2a", ["VCVTSI2SS"], [OPT.XMM, OPT.VXMM, OPT.WRM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W)
1279
+ Set("f3, 0f, 5a", ["VCVTSS2SD"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1280
+ Set("f3, 0f, 2d", ["VCVTSS2SI"], [OPT.WREG32_64, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W)
1281
+ Set("66, 0f, e6", ["VCVTTPD2DQ"], [OPT.XMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1282
+ Set("f3, 0f, 5b", ["VCVTTPS2DQ"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1283
+ Set("f2, 0f, 2c", ["VCVTTSD2SI"], [OPT.WREG32_64, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W)
1284
+ Set("f3, 0f, 2c", ["VCVTTSS2SI"], [OPT.WREG32_64, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W)
1285
+
1286
+ Set("66, 0f, 5e", ["VDIVPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1287
+ Set("0f, 5e", ["VDIVPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1288
+ Set("f2, 0f, 5e", ["VDIVSD"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1289
+ Set("f3, 0f, 5e", ["VDIVSS"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1290
+
1291
+ Set("66, 0f, 3a, 41", ["VDPPD"], [OPT.XMM, OPT.VXMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1292
+ Set("66, 0f, 3a, 40", ["VDPPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1293
+
1294
+ Set("66, 0f, 3a, 19", ["VEXTRACTF128"], [OPT.XMM128, OPT.YMM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.FORCE_VEXL)
1295
+ Set("66, 0f, 3a, 17", ["VEXTRACTPS"], [OPT.RM32, OPT.XMM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1296
+
1297
+ Set("66, 0f, 7c", ["VHADDPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1298
+ Set("f2, 0f, 7c", ["VHADDPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1299
+ Set("66, 0f, 7d", ["VHSUBPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1300
+ Set("f2, 0f, 7d", ["VHSUBPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1301
+
1302
+ Set("66, 0f, 3a, 18", ["VINSERTF128"], [OPT.YMM, OPT.VYMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.FORCE_VEXL)
1303
+ Set("66, 0f, 3a, 21", ["VINSERTPS"], [OPT.XMM, OPT.VXMM, OPT.XMM32, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1304
+ Set("f2, 0f, f0", ["VLDDQU"], [OPT.YXMM, OPT.LMEM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1305
+
1306
+ Set("0f, ae /02", ["VLDMXCSR"], [OPT.MEM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1307
+
1308
+ Set("66, 0f, f7", ["VMASKMOVDQU"], [OPT.XMM, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag.MODRR_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1309
+
1310
+ Set("66, 0f, 38, 2c", ["VMASKMOVPS"], [OPT.YXMM, OPT.VYXMM, OPT.LMEM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1311
+ Set("66, 0f, 38, 2d", ["VMASKMOVPD"], [OPT.YXMM, OPT.VYXMM, OPT.LMEM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1312
+ Set("66, 0f, 38, 2e", ["VMASKMOVPS"], [OPT.LMEM128_256, OPT.VYXMM, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1313
+ Set("66, 0f, 38, 2f", ["VMASKMOVPD"], [OPT.LMEM128_256, OPT.VYXMM, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1314
+
1315
+ Set("66, 0f, 5f", ["VMAXPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1316
+ Set("0f, 5f", ["VMAXPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1317
+ Set("f2, 0f, 5f", ["VMAXSD"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1318
+ Set("f3, 0f, 5f", ["VMAXSS"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1319
+
1320
+ Set("66, 0f, 5d", ["VMINPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1321
+ Set("0f, 5d", ["VMINPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1322
+ Set("f2, 0f, 5d", ["VMINSD"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1323
+ Set("f3, 0f, 5d", ["VMINSS"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1324
+
1325
+ Set("66, 0f, 28", ["VMOVAPD"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1326
+ Set("66, 0f, 29", ["VMOVAPD"], [OPT.YXMM128_256, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1327
+ Set("0f, 28", ["VMOVAPS"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1328
+ Set("0f, 29", ["VMOVAPS"], [OPT.YXMM128_256, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1329
+
1330
+ Set("66, 0f, 6e", ["VMOVD", "VMOVQ"], [OPT.XMM, OPT.WRM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1331
+ Set("66, 0f, 7e", ["VMOVD", "VMOVQ"], [OPT.WRM32_64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1332
+ Set("f3, 0f, 7e", ["VMOVQ"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1333
+ Set("66, 0f, d6", ["VMOVQ"], [OPT.XMM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1334
+ Set("f2, 0f, 12", ["VMOVDDUP"], [OPT.YXMM, OPT.YXMM64_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1335
+ Set("66, 0f, 6f", ["VMOVDQA"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1336
+ Set("66, 0f, 7f", ["VMOVDQA"], [OPT.YXMM128_256, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1337
+ Set("f3, 0f, 6f", ["VMOVDQU"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1338
+ Set("f3, 0f, 7f", ["VMOVDQU"], [OPT.YXMM128_256, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1339
+
1340
+ Set("0f, 12", ["VMOVHLPS", "VMOVLPS"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MNEMONIC_MODRM_BASED | IFlag.USE_EXMNEMONIC)
1341
+ Set("66, 0f, 12", ["VMOVLPD"], [OPT.XMM, OPT.VXMM, OPT.MEM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1342
+ Set("0f, 13", ["VMOVLPS"], [OPT.MEM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1343
+ Set("66, 0f, 13", ["VMOVLPD"], [OPT.MEM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1344
+ Set("0f, 16", ["VMOVLHPS", "VMOVHPS"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MNEMONIC_MODRM_BASED | IFlag.USE_EXMNEMONIC)
1345
+ Set("66, 0f, 16", ["VMOVHPD"], [OPT.XMM, OPT.VXMM, OPT.MEM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1346
+ Set("0f, 17", ["VMOVHPS"], [OPT.MEM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1347
+ Set("66, 0f, 17", ["VMOVHPD"], [OPT.MEM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1348
+
1349
+ Set("66, 0f, 50", ["VMOVMSKPD"], [OPT.REG32_64, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag.MODRR_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1350
+ Set("0f, 50", ["VMOVMSKPS"], [OPT.REG32_64, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag.MODRR_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1351
+
1352
+ Set("66, 0f, e7", ["VMOVNTDQ"], [OPT.LMEM128_256, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1353
+ Set("66, 0f, 38, 2a", ["VMOVNTDQA"], [OPT.XMM, OPT.MEM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1354
+ Set("66, 0f, 2b", ["VMOVNTPD"], [OPT.LMEM128_256, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1355
+ Set("0f, 2b", ["VMOVNTPS"], [OPT.LMEM128_256, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1356
+
1357
+ # Next two instructions are based on vvvv field.
1358
+ Set("f2, 0f, 10", ["VMOVSD"], [OPT.XMM, OPT.VXMM, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRM_INCLUDED | IFlag.MODRR_BASED)
1359
+ Set("f2, 0f, 10", ["VMOVSD"], [OPT.XMM, OPT.MEM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRM_INCLUDED | IFlag.MODRR_BASED)
1360
+
1361
+ # Next two instructions are based on vvvv field.
1362
+ Set("f2, 0f, 11", ["VMOVSD"], [OPT.XMM, OPT.VXMM, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRM_INCLUDED | IFlag.MODRR_BASED)
1363
+ Set("f2, 0f, 11", ["VMOVSD"], [OPT.MEM64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRM_INCLUDED | IFlag.MODRR_BASED)
1364
+
1365
+ Set("f3, 0f, 16", ["VMOVSHDUP"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1366
+ Set("f3, 0f, 12", ["VMOVSLDUP"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1367
+
1368
+ # Next two instructions are based on vvvv field.
1369
+ Set("f3, 0f, 10", ["VMOVSS"], [OPT.XMM, OPT.VXMM, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRM_INCLUDED | IFlag.MODRR_BASED)
1370
+ Set("f3, 0f, 10", ["VMOVSS"], [OPT.XMM, OPT.MEM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRM_INCLUDED | IFlag.MODRR_BASED)
1371
+
1372
+ # Next two instructions are based on vvvv field.
1373
+ Set("f3, 0f, 11", ["VMOVSS"], [OPT.XMM, OPT.VXMM, OPT.XMM_RM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRM_INCLUDED | IFlag.MODRR_BASED)
1374
+ Set("f3, 0f, 11", ["VMOVSS"], [OPT.MEM32, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRM_INCLUDED | IFlag.MODRR_BASED)
1375
+
1376
+ Set("66, 0f, 10", ["VMOVUPD"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1377
+ Set("66, 0f, 11", ["VMOVUPD"], [OPT.YXMM128_256, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1378
+ Set("0f, 10", ["VMOVUPS"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1379
+ Set("0f, 11", ["VMOVUPS"], [OPT.YXMM128_256, OPT.YXMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1380
+
1381
+ Set("66, 0f, 3a, 42", ["VMPSADBW"], [OPT.XMM, OPT.VXMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1382
+
1383
+ Set("66, 0f, 59", ["VMULPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1384
+ Set("0f, 59", ["VMULPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1385
+ Set("f2, 0f, 59", ["VMULSD"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1386
+ Set("f3, 0f, 59", ["VMULSS"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1387
+
1388
+ Set("66, 0f, 56", ["VORPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1389
+ Set("0f, 56", ["VORPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1390
+
1391
+ Set("66, 0f, 38, 1c", ["VPABSB"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1392
+ Set("66, 0f, 38, 1d", ["VPABSW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1393
+ Set("66, 0f, 38, 1e", ["VPABSD"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1394
+ Set("66, 0f, 63", ["VPACKSSWB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1395
+ Set("66, 0f, 6b", ["VPACKSSDW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1396
+ Set("66, 0f, 67", ["VPACKUSWB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1397
+ Set("66, 0f, 38, 2b", ["VPACKUSDW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1398
+ Set("66, 0f, fc", ["VPADDB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1399
+ Set("66, 0f, fd", ["VPADDW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1400
+ Set("66, 0f, fe", ["VPADDD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1401
+ Set("66, 0f, d4", ["VPADDQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1402
+ Set("66, 0f, ec", ["VPADDSB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1403
+ Set("66, 0f, ed", ["VPADDSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1404
+ Set("66, 0f, dc", ["VPADDUSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1405
+ Set("66, 0f, dd", ["VPADDUSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1406
+
1407
+ Set("66, 0f, 3a, 0f", ["VPALIGNR"], [OPT.XMM, OPT.VXMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1408
+
1409
+ Set("66, 0f, db", ["VPAND"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1410
+ Set("66, 0f, df", ["VPANDN"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1411
+
1412
+ Set("66, 0f, e0", ["VPAVGB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1413
+ Set("66, 0f, e3", ["VPAVGW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1414
+
1415
+ Set("66, 0f, 3a, 4c", ["VPBLENDVB"], [OPT.XMM, OPT.VXMM, OPT.XMM128, OPT.XMM_IMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1416
+ Set("66, 0f, 3a, 0e", ["VPBLENDW"], [OPT.XMM, OPT.VXMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1417
+
1418
+ # This instruction is not prefixed with VEX.
1419
+ SetClmul("66, 0f, 3a, 44", ["PCLMULQDQ"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS)
1420
+ # Next instruction is prefixed with VEX.
1421
+ SetClmul("66, 0f, 3a, 44", ["VPCLMULQDQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1422
+
1423
+ Set("66, 0f, 3a, 61", ["VPCMPESTRI"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1424
+ Set("66, 0f, 3a, 60", ["VPCMPESTRM"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1425
+ Set("66, 0f, 3a, 63", ["VPCMPISTRI"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1426
+ Set("66, 0f, 3a, 62", ["VPCMPISTRM"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1427
+
1428
+ Set("66, 0f, 74", ["VPCMPEQB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1429
+ Set("66, 0f, 75", ["VPCMPEQW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1430
+ Set("66, 0f, 76", ["VPCMPEQD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1431
+ Set("66, 0f, 38, 29", ["VPCMPEQQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1432
+
1433
+ Set("66, 0f, 64", ["VPCMPGTB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1434
+ Set("66, 0f, 65", ["VPCMPGTW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1435
+ Set("66, 0f, 66", ["VPCMPGTD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1436
+ Set("66, 0f, 38, 37", ["VPCMPGTQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1437
+
1438
+ Set("66, 0f, 38, 0d", ["VPERMILPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1439
+ Set("66, 0f, 3a, 05", ["VPERMILPD"], [OPT.YXMM, OPT.YXMM128_256, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1440
+ Set("66, 0f, 3a, 04", ["VPERMILPS"], [OPT.YXMM, OPT.YXMM128_256, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1441
+ Set("66, 0f, 38, 0c", ["VPERMILPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1442
+ Set("66, 0f, 3a, 06", ["VPERM2F128"], [OPT.YMM, OPT.VYMM, OPT.YMM256, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.FORCE_VEXL)
1443
+
1444
+ Set("66, 0f, 3a, 14", ["VPEXTRB"], [OPT.REG32_64_M8, OPT.XMM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_VEX)
1445
+ Set("66, 0f, c5", ["VPEXTRW"], [OPT.REG32_64, OPT.XMM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_VEX)
1446
+ Set("66, 0f, 3a, 15", ["VPEXTRW"], [OPT.REG32_64_M16, OPT.XMM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_VEX)
1447
+ Set("66, 0f, 3a, 16", ["VPEXTRD", "VPEXTRQ"], [OPT.WRM32_64, OPT.XMM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1448
+
1449
+ Set("66, 0f, 38, 01", ["VPHADDW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1450
+ Set("66, 0f, 38, 02", ["VPHADDD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1451
+ Set("66, 0f, 38, 03", ["VPHADDSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1452
+ Set("66, 0f, 38, 41", ["VPHMINPOSUW"], [OPT.XMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1453
+
1454
+ Set("66, 0f, 38, 05", ["VPHSUBW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1455
+ Set("66, 0f, 38, 06", ["VPHSUBD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1456
+ Set("66, 0f, 38, 07", ["VPHSUBSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1457
+
1458
+ Set("66, 0f, 3a, 20", ["VPINSRB"], [OPT.XMM, OPT.VXMM, OPT.REG32_64_M8, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1459
+ Set("66, 0f, c4", ["VPINSRW"], [OPT.XMM, OPT.VXMM, OPT.R32_M16, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1460
+ Set("66, 0f, 3a, 22", ["VPINSRD", "VPINSRQ"], [OPT.XMM, OPT.VXMM, OPT.WRM32_64, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1461
+
1462
+ Set("66, 0f, f5", ["VPMADDWD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1463
+ Set("66, 0f, 38, 04", ["VPMADDUBSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1464
+
1465
+ Set("66, 0f, 38, 3c", ["VPMAXSB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1466
+ Set("66, 0f, ee", ["VPMAXSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1467
+ Set("66, 0f, 38, 3d", ["VPMAXSD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1468
+ Set("66, 0f, de", ["VPMAXUB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1469
+ Set("66, 0f, 38, 3e", ["VPMAXUW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1470
+ Set("66, 0f, 38, 3f", ["VPMAXUD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1471
+
1472
+ Set("66, 0f, 38, 38", ["VPMINSB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1473
+ Set("66, 0f, ea", ["VPMINSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1474
+ Set("66, 0f, 38, 39", ["VPMINSD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1475
+ Set("66, 0f, da", ["VPMINUB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1476
+ Set("66, 0f, 38, 3a", ["VPMINUW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1477
+ Set("66, 0f, 38, 3b", ["VPMINUD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1478
+
1479
+ Set("66, 0f, d7", ["VPMOVMSKB"], [OPT.REG32_64, OPT.XMM], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag._64BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1480
+
1481
+ Set("66, 0f, 38, 20", ["VPMOVSXBW"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1482
+ Set("66, 0f, 38, 21", ["VPMOVSXBD"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1483
+ Set("66, 0f, 38, 22", ["VPMOVSXBQ"], [OPT.XMM, OPT.XMM16], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1484
+ Set("66, 0f, 38, 23", ["VPMOVSXWD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1485
+ Set("66, 0f, 38, 24", ["VPMOVSXWQ"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1486
+ Set("66, 0f, 38, 25", ["VPMOVSXDQ"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1487
+
1488
+ Set("66, 0f, 38, 30", ["VPMOVZXBW"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1489
+ Set("66, 0f, 38, 31", ["VPMOVZXBD"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1490
+ Set("66, 0f, 38, 32", ["VPMOVZXBQ"], [OPT.XMM, OPT.XMM16], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1491
+ Set("66, 0f, 38, 33", ["VPMOVZXWD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1492
+ Set("66, 0f, 38, 34", ["VPMOVZXWQ"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1493
+ Set("66, 0f, 38, 35", ["VPMOVZXDQ"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1494
+
1495
+ Set("66, 0f, e4", ["VPMULHUW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1496
+ Set("66, 0f, 38, 0b", ["VPMULHRSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1497
+ Set("66, 0f, e5", ["VPMULHW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1498
+ Set("66, 0f, d5", ["VPMULLW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1499
+ Set("66, 0f, 38, 40", ["VPMULLD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1500
+ Set("66, 0f, f4", ["VPMULUDQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1501
+ Set("66, 0f, 38, 28", ["VPMULDQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1502
+
1503
+ Set("66, 0f, eb", ["VPOR"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1504
+ Set("66, 0f, f6", ["VPSADBW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1505
+ Set("66, 0f, 38, 00", ["VPSHUFB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1506
+ Set("66, 0f, 70", ["VPSHUFD"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1507
+ Set("f3, 0f, 70", ["VPSHUFHW"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1508
+ Set("f2, 0f, 70", ["VPSHUFLW"], [OPT.XMM, OPT.XMM128, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1509
+
1510
+ Set("66, 0f, 38, 08", ["VPSIGNB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1511
+ Set("66, 0f, 38, 09", ["VPSIGNW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1512
+ Set("66, 0f, 38, 0a", ["VPSIGND"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1513
+
1514
+ Set("66, 0f, 73 /07", ["VPSLLDQ"], [OPT.VXMM, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1515
+ Set("66, 0f, 73 /03", ["VPSRLDQ"], [OPT.VXMM, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1516
+
1517
+ Set("66, 0f, f1", ["VPSLLW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1518
+ Set("66, 0f, 71 /06", ["VPSLLW"], [OPT.VXMM, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1519
+ Set("66, 0f, f2", ["VPSLLD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1520
+ Set("66, 0f, 72 /06", ["VPSLLD"], [OPT.VXMM, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1521
+ Set("66, 0f, f3", ["VPSLLQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1522
+ Set("66, 0f, 73 /06", ["VPSLLQ"], [OPT.VXMM, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1523
+
1524
+ Set("66, 0f, e1", ["VPSRAW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1525
+ Set("66, 0f, 71 /04", ["VPSRAW"], [OPT.VXMM, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1526
+ Set("66, 0f, e2", ["VPSRAD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1527
+ Set("66, 0f, 72 /04", ["VPSRAD"], [OPT.VXMM, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1528
+
1529
+ Set("66, 0f, d1", ["VPSRLW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1530
+ Set("66, 0f, 71 /02", ["VPSRLW"], [OPT.VXMM, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1531
+ Set("66, 0f, d2", ["VPSRLD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1532
+ Set("66, 0f, 72 /02", ["VPSRLD"], [OPT.VXMM, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1533
+ Set("66, 0f, d3", ["VPSRLQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1534
+ Set("66, 0f, 73 /02", ["VPSRLQ"], [OPT.VXMM, OPT.XMM_RM, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.MODRR_REQUIRED)
1535
+
1536
+ Set("66, 0f, 38, 17", ["VPTEST"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1537
+ Set("66, 0f, 38, 0e", ["VTESTPS"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1538
+ Set("66, 0f, 38, 0f", ["VTESTPD"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1539
+
1540
+ Set("66, 0f, f8", ["VPSUBB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1541
+ Set("66, 0f, f9", ["VPSUBW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1542
+ Set("66, 0f, fa", ["VPSUBD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1543
+ Set("66, 0f, fb", ["VPSUBQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1544
+ Set("66, 0f, e8", ["VPSUBSB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1545
+ Set("66, 0f, e9", ["VPSUBSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1546
+ Set("66, 0f, d8", ["VPSUBUSB"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1547
+ Set("66, 0f, d9", ["VPSUBUSW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1548
+
1549
+ Set("66, 0f, 68", ["VPUNPCKHBW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1550
+ Set("66, 0f, 69", ["VPUNPCKHWD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1551
+ Set("66, 0f, 6a", ["VPUNPCKHDQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1552
+ Set("66, 0f, 6d", ["VPUNPCKHQDQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1553
+ Set("66, 0f, 60", ["VPUNPCKLBW"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1554
+ Set("66, 0f, 61", ["VPUNPCKLWD"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1555
+ Set("66, 0f, 62", ["VPUNPCKLDQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1556
+ Set("66, 0f, 6c", ["VPUNPCKLQDQ"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1557
+
1558
+ Set("66, 0f, ef", ["VPXOR"], [OPT.XMM, OPT.VXMM, OPT.XMM128], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1559
+
1560
+ Set("0f, 53", ["VRCPPS"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1561
+ Set("f3, 0f, 53", ["VRCPSS"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1562
+ Set("0f, 52", ["VRSQRTPS"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1563
+ Set("f3, 0f, 52", ["VRSQRTSS"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1564
+
1565
+ Set("66, 0f, 3a, 09", ["VROUNDPD"], [OPT.YXMM, OPT.YXMM128_256, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1566
+ Set("66, 0f, 3a, 08", ["VROUNDPS"], [OPT.YXMM, OPT.YXMM128_256, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1567
+ Set("66, 0f, 3a, 0b", ["VROUNDSD"], [OPT.XMM, OPT.VXMM, OPT.XMM64, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1568
+ Set("66, 0f, 3a, 0a", ["VROUNDSS"], [OPT.XMM, OPT.VXMM, OPT.XMM32, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1569
+
1570
+ Set("66, 0f, c6", ["VSHUFPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1571
+ Set("0f, c6", ["VSHUFPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256, OPT.IMM8], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1572
+
1573
+ Set("66, 0f, 51", ["VSQRTPD"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1574
+ Set("0f, 51", ["VSQRTPS"], [OPT.YXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1575
+ Set("f2, 0f, 51", ["VSQRTSD"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1576
+ Set("f3, 0f, 51", ["VSQRTSS"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1577
+
1578
+ Set("0f, ae /03", ["VSTMXCSR"], [OPT.MEM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1579
+
1580
+ Set("66, 0f, 5c", ["VSUBPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1581
+ Set("0f, 5c", ["VSUBPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1582
+ Set("f2, 0f, 5c", ["VSUBSD"], [OPT.XMM, OPT.VXMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1583
+ Set("f3, 0f, 5c", ["VSUBSS"], [OPT.XMM, OPT.VXMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1584
+
1585
+ Set("66, 0f, 2e", ["VUCOMISD"], [OPT.XMM, OPT.XMM64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1586
+ Set("0f, 2e", ["VUCOMISS"], [OPT.XMM, OPT.XMM32], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX)
1587
+
1588
+ Set("66, 0f, 15", ["VUNPCKHPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1589
+ Set("0f, 15", ["VUNPCKHPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1590
+ Set("66, 0f, 14", ["VUNPCKLPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1591
+ Set("0f, 14", ["VUNPCKLPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1592
+
1593
+ Set("66, 0f, 57", ["VXORPD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1594
+ Set("0f, 57", ["VXORPS"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L)
1595
+
1596
+ Set("0f, 77", ["VZEROUPPER", "VZEROALL"], [], IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_L | IFlag.MNEMONIC_VEXL_BASED)
1597
+
1598
+ def init_FMA(self):
1599
+ Set = lambda *args: self.SetCallback(ISetClass.FMA, *args)
1600
+
1601
+ Set("66, 0f, 38, 98", ["VFMADD132PS", "VFMADD132PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1602
+ Set("66, 0f, 38, a8", ["VFMADD213PS", "VFMADD213PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1603
+ Set("66, 0f, 38, b8", ["VFMADD231PS", "VFMADD231PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1604
+
1605
+ Set("66, 0f, 38, 99", ["VFMADD132SS", "VFMADD132SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1606
+ Set("66, 0f, 38, a9", ["VFMADD213SS", "VFMADD213SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1607
+ Set("66, 0f, 38, b9", ["VFMADD231SS", "VFMADD231SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1608
+
1609
+ Set("66, 0f, 38, 96", ["VFMADDSUB132PS", "VFMADDSUB132PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1610
+ Set("66, 0f, 38, a6", ["VFMADDSUB213PS", "VFMADDSUB213PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1611
+ Set("66, 0f, 38, b6", ["VFMADDSUB231PS", "VFMADDSUB231PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1612
+
1613
+ Set("66, 0f, 38, 97", ["VFMSUBADD132PS", "VFMSUBADD132PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1614
+ Set("66, 0f, 38, a7", ["VFMSUBADD213PS", "VFMSUBADD213PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1615
+ Set("66, 0f, 38, b7", ["VFMSUBADD231PS", "VFMSUBADD231PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1616
+
1617
+ Set("66, 0f, 38, 9a", ["VFMSUB132PS", "VFMSUB132PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1618
+ Set("66, 0f, 38, aa", ["VFMSUB213PS", "VFMSUB213PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1619
+ Set("66, 0f, 38, ba", ["VFMSUB231PS", "VFMSUB231PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1620
+
1621
+ Set("66, 0f, 38, 9b", ["VFMSUB132SS", "VFMSUB132SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1622
+ Set("66, 0f, 38, ab", ["VFMSUB213SS", "VFMSUB213SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1623
+ Set("66, 0f, 38, bb", ["VFMSUB231SS", "VFMSUB231SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1624
+
1625
+ Set("66, 0f, 38, 9c", ["VFNMADD132PS", "VFNMADD132PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1626
+ Set("66, 0f, 38, ac", ["VFNMADD213PS", "VFNMADD213PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1627
+ Set("66, 0f, 38, bc", ["VFNMADD231PS", "VFNMADD231PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1628
+
1629
+ Set("66, 0f, 38, 9d", ["VFNMADD132SS", "VFNMADD132SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1630
+ Set("66, 0f, 38, ad", ["VFNMADD213SS", "VFNMADD213SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1631
+ Set("66, 0f, 38, bd", ["VFNMADD231SS", "VFNMADD231SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1632
+
1633
+ Set("66, 0f, 38, 9e", ["VFNMSUB132PS", "VFNMSUB132PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1634
+ Set("66, 0f, 38, ae", ["VFNMSUB213PS", "VFNMSUB213PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1635
+ Set("66, 0f, 38, be", ["VFNMSUB231PS", "VFNMSUB231PD"], [OPT.YXMM, OPT.VYXMM, OPT.YXMM128_256], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.VEX_L | IFlag.MNEMONIC_VEXW_BASED)
1636
+
1637
+ Set("66, 0f, 38, 9f", ["VFNMSUB132SS", "VFNMSUB132SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1638
+ Set("66, 0f, 38, af", ["VFNMSUB213SS", "VFNMSUB213SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1639
+ Set("66, 0f, 38, bf", ["VFNMSUB231SS", "VFNMSUB231SD"], [OPT.XMM, OPT.VXMM, OPT.WXMM32_64], IFlag.MODRM_REQUIRED | IFlag._32BITS | IFlag.PRE_VEX | IFlag.VEX_W | IFlag.MNEMONIC_VEXW_BASED)
1640
+
1641
+ def __init__(self, SetCallback):
1642
+ """ Initializes all instructions-sets using the given callback.
1643
+ The arguments of the callback are as follows:
1644
+ (iset-class, opcode-length, list of bytes of opcode, list of string of mnemonics, list of operands, flags) """
1645
+ self.SetCallback = SetCallback
1646
+ Set = lambda *args: self.SetCallback(ISetClass.INTEGER, *args)
1647
+ self.init_INTEGER()
1648
+ self.init_Exported()
1649
+ self.init_FPU()
1650
+ self.init_P6()
1651
+ self.init_MMX()
1652
+ self.init_SSE()
1653
+ self.init_SSE2()
1654
+ self.init_SSE3()
1655
+ self.init_SSSE3()
1656
+ self.init_SSE4_1()
1657
+ self.init_SSE4_2()
1658
+ self.init_SSE4_A()
1659
+ self.init_3DNOW()
1660
+ self.init_3DNOWEXT()
1661
+ self.init_VMX()
1662
+ self.init_SVM()
1663
+ self.init_AVX()
1664
+ self.init_FMA()