badline 0.5.0 → 0.6.0

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data/CHANGELOG.md

@@ -1,5 +1,29 @@
 # Changelog
 
+## [0.6.0](https://github.com/elektronaut/badline/compare/v0.5.1...v0.6.0) (2026-09-29)
+
+
+### Features
+
+* save and restore the machine in VICE .vsf snapshots ([07c0a26](https://github.com/elektronaut/badline/commit/07c0a26d7e73595d5cd4a5bfa90b633ee01195be))
+
+
+### Bug Fixes
+
+* forget the drive's orbits after restoring it ([0238d81](https://github.com/elektronaut/badline/commit/0238d81ab12a0b0ff1e841661e10004ab3683cc1))
+
+## [0.5.1](https://github.com/elektronaut/badline/compare/v0.5.0...v0.5.1) (2026-09-29)
+
+
+### Bug Fixes
+
+* build the native badline with a Spinel that writes .d64 images through the true drive ([97f537a](https://github.com/elektronaut/badline/commit/97f537afe69b10ae044f83ccf4dd018402ebe1be))
+
+
+### Performance Improvements
+
+* sleep the idle true drive through its timer interrupts ([0482e43](https://github.com/elektronaut/badline/commit/0482e439cfb160ab69027b166b1059ed8fc9dfb3)), closes [#367](https://github.com/elektronaut/badline/issues/367)
+
 ## [0.5.0](https://github.com/elektronaut/badline/compare/v0.4.2...v0.5.0) (2026-09-29)
 
 

data/CLAUDE.md

@@ -48,6 +48,7 @@ requires only the namespace file.
 | Wolfgang Lorenz suite | `bin/lorenz` | CPU, CIA, interrupts |
 | VICE testbench | `bin/testbench <subtree>` | `VICII/`, `CIA/`, `interrupts/`, `CPU/`, cartridges with `--carts`, and the true 1541 drive with `--drive` |
 | VICE SID testprogs | `bin/sidtests` | SID |
+| Drive scenarios | `bin/drive_scenarios` | The true 1541 running the DOS ROM: save, format, the error channel, idle, write protect and autostart |
 | CIA offline grids | `bundle exec rspec --tag slow spec/badline/cia` | CIA timers and shift register, against a bare CIA in about 2 min |
 
 The CIA offline grids replay Lorenz's `cia1ta` and `cia1tb` sweeps (about
@@ -156,29 +157,29 @@ the rows your change can't reach tell you nothing about it.
   `ruby --yjit bin/lorenz [image] [start_test] [max_cycles]` (resumes the
   chain at a named test, and `--stop-after NAME` ends it once that test is
   done). These take seconds to minutes
-- When your change moves rows, re-record only those rows, in the same
-  change: `rake "regression:record:<suite>[filter,...]"` (quote it, because
-  zsh globs the brackets). It runs only the matching tests and splices
-  their rows into the baseline, and every other row keeps its verdict.
+- A pull request's CI is the verdict. It runs every suite but
+  `testbench-drive` on the Spinel build, compared row by row against
+  `test/baselines/`, and every job is a required check. A row that moved
+  fails it. Re-record only those rows, in the same change:
+  `rake "regression:record:<suite>[filter,...]"` (quote it, because zsh
+  globs the brackets). It runs only the matching tests on CRuby and
+  splices their rows into the baseline, and every other row keeps its
+  verdict. CI runs the same rows on Spinel, so the two have to agree.
   `lorenz` chains itself, so it takes a stretch of the chain instead:
   `rake "regression:record:lorenz[first,last]"` resumes just ahead of
   `first`, stops after `last` and leaves the `(suite)` row alone.
   `[first,(suite)]` runs on to the end of the chain and records the
-  `(suite)` row too. Cover every test your change can reach, and explain
-  every moved row. Never re-record just to make a diff go away
-- CI's nightly run owns the whole-suite verdict. The Regression workflow
-  runs `testbench`, `lorenz` and `sid` against `main` each night, and skips
-  the night when nothing relevant has changed since the last successful
-  nightly run. It also runs from the Actions tab on demand. It never runs
-  on push or on pull requests, so one verdict can cover a day's merges.
-  The `testbench-*` and `sid-8580` suites run from the Actions tab on
-  demand. The Spinel workflow runs the Spinel suites on pull requests
-  that touch emulation, harness or build paths. Its jobs aren't required
-  checks yet, and the CRuby Regression nightly runs as before
-- The one exception is a change whose reach you can't bound to a set of
-  filters, such as reordering `Computer#cycle!` or changing the LOAD trap
-  every suite loads through. Ask before running a full suite for it, and
-  don't start one on your own judgement
+  `(suite)` row too. Explain every moved row in the pull request. Never
+  re-record just to make a diff go away
+- For a change whose reach you can't bound to a set of filters, such as
+  reordering `Computer#cycle!` or changing the LOAD trap every suite loads
+  through, push and let CI run the suites
+- `testbench-drive` needs the true drive, which the Spinel testbench
+  harness doesn't have, so CI leaves it out. Run the rows your change can
+  reach locally
+- The Regression workflow runs the suites on CRuby, started by hand from
+  the Actions tab, for a person checking that CRuby and Spinel agree.
+  Agents don't start it
 
 Pick the filters from the suites your change can move: VIC → `testbench`,
 plus `testbench-vicii-new` (`bin/testbench --vicii-new`, the 8565) for
@@ -190,10 +191,9 @@ CPU, interrupts or timing → the matching `testbench-*` suite, plus
 the 6526A) for anything the interrupt register or the CIA model reaches; cartridge mappers, banking or power-on state →
 `testbench-carts`, plus `testbench-expansions` for banking; GEO-RAM, +60K,
 +256K, the REU or the VIC's BA line the REU follows → `testbench-expansions`; the 1541 drive, VIA or IEC bus →
-`testbench-drive` (`bin/testbench --drive`); SID → `sid`, plus `sid-8580` for anything the 8580
-model reaches (`bin/sidtests --sid 8580`). Lorenz isn't a per-change check:
-its full chain runs nightly, and the planner assigns any row it moves. The
-exception is code whose rule in `doc/pinned-behaviour.md` names Lorenz
+`testbench-drive` (`bin/testbench --drive`) and `drive-scenarios` (`bin/drive_scenarios <filter>`); SID → `sid`, plus `sid-8580` for anything the 8580
+model reaches (`bin/sidtests --sid 8580`). Leave the Lorenz chain to CI,
+unless your code has a rule in `doc/pinned-behaviour.md` that names Lorenz
 tests: the interrupt polling, CPU port and CIA timer rules. Run just the
 tests that rule names, one at a time, with
 `ruby --yjit bin/lorenz --resume <test> --stop-after <test>`. A stretch

data/CONTRIBUTING.md

@@ -85,6 +85,11 @@ bundle exec rubocop
 ## Tests and commits
 
 - Add tests for any behavior you change.
+- CI runs rubocop, the specs and every regression suite on each pull
+  request, and fails on any suite row that differs from its baseline in
+  `test/baselines/`. When a change moves rows on purpose, re-record just
+  those rows as [test/baselines/README.md](test/baselines/README.md)
+  describes, and say why in the pull request.
 - Write commit messages using
   [Conventional Commits](https://www.conventionalcommits.org). The
   changelog and releases are generated from them, so the `feat:` and

data/README.md

@@ -1,5 +1,5 @@
 [![Version](https://img.shields.io/gem/v/badline.svg?style=flat)](https://rubygems.org/gems/badline)
-[![Build](https://github.com/elektronaut/badline/actions/workflows/build.yml/badge.svg)](https://github.com/elektronaut/badline/actions/workflows/build.yml)
+[![CI](https://github.com/elektronaut/badline/actions/workflows/ci.yml/badge.svg)](https://github.com/elektronaut/badline/actions/workflows/ci.yml)
 
 # Badline
 
@@ -57,6 +57,7 @@ badline game.d64       # Mount a disk image as device 8 and load it
 badline game.tap       # Insert a tape and load it
 badline game.crt       # Attach a cartridge
 badline tune.sid       # Play a SID tune
+badline game.vsf       # Restore a snapshot, from badline or VICE
 badline ~/c64          # Mount a directory as device 8
 ```
 
@@ -107,6 +108,7 @@ slows the emulation down.
 | `.tap` | Inserted in the datasette with PLAY pressed, then `LOAD` and `RUN`. It loads at the speed of a real tape |
 | `.crt` | The hardware types listed under [Cartridges](#whats-emulated). Other types are rejected |
 | `.sid` | PSID and RSID tunes, started through a small driver after boot |
+| `.vsf` | A snapshot of a running machine, badline's own or one VICE's x64sc saved. See [Snapshots](#snapshots) |
 | A directory | Mounted read-write as device 8. It serves the `.prg` and `.p00` files in it and the contents of any `.t64`, and `SAVE` writes a new `.prg` |
 
 Apart from a `.g64`, which only a true drive can read, there is no 1541
@@ -139,6 +141,62 @@ and takes out a disk mounted through the traps, so `LOAD` and `SAVE`
 reach the 1541 too. With the 1541 in device 8, a `.d64` goes in its
 drive as well.
 
+## Snapshots
+
+In the window, `F11` saves the whole machine to a new
+`badline-<date>-<time>.vsf` in the working directory, and `F12` goes
+back to the snapshot last saved or opened, in a new machine built as the
+saved one was. Both executables do this, and both open a `.vsf` given as
+the media. A snapshot that fails to open leaves the machine running as
+it was. From Ruby, `computer.save_snapshot(path)` saves,
+`computer.restore_snapshot(path)` takes a machine back to a snapshot,
+and `Badline::Snapshot.load(path)` builds a new machine as the saved one
+was built and restores it. `computer.snapshot` and
+`computer.restore(state)` do the same in memory, without a file. A
+restore that fails leaves the machine as it was.
+
+A snapshot holds the machine as it was on the cycle it was saved: the
+chips down to the instruction step and the pixel pipeline, the RAM and
+any +60K or +256K expansion, the cartridge with its RAM and flash, a
+GEO-RAM, a true 1541 with its RAM, its VIAs and the disk under the head,
+a disk or directory mounted through the traps with its open channels,
+and the tape with its place on it. A restored machine runs on exactly
+as the saved one would have. A directory, a tape and a true drive's
+disk image open again from their paths when the snapshot is restored,
+the disk with its tracks as the drive last saw them. A disk image mounted through the traps comes back
+with its contents from the snapshot. What the host holds stays the host's: the keyboard, the
+joysticks, the mouse and paddles, sound, and blocks given to `on_init`
+that hadn't run yet, which a restore reports. A snapshot only restores
+in the badline version that wrote it, into a machine with the same
+chip models, RAM expansion and REU. `computer.snapshot` holds an REU's
+RAM, registers and transfer too, but a machine with an REU doesn't save
+to a file yet, as badline doesn't write VICE's REU module.
+
+Snapshots use VICE's `.vsf` format. badline writes VICE's modules for
+the CPU, RAM and CPU port, both CIAs, the SID and the VIC-II, plus the
+ones x64sc needs to open the file, with nothing attached to the
+cartridge, tape or user ports and no true drive. A `BADLINE` module,
+which VICE skips, holds the whole machine, and badline restores its own
+snapshots from it.
+
+x64sc 3.10 opens badline's snapshots, taken at the end of the
+instruction the CPU was in, as long as its VIC-II model matches
+(`-model c64` for the default machine). It keeps its own drives and
+leaves out the cartridge, the expansions and the tape. Snapshots x64sc
+saves open in badline through the same modules: the CPU at its
+instruction boundary, RAM, the CPU port, the CIAs' registers, timers and
+clocks, the SID's registers and reSID voice state, and the VIC-II's
+registers, beam position, counters and colour RAM. The VIC-II's pixel
+pipeline starts empty. badline reads the modules x64sc 3.7 to 3.10
+write, and VICE's development versions' `MAINC64CPU` and `VIC-IISC`. A module version
+it doesn't know is left out, or fails the restore for the CPU and RAM.
+It reports the modules it leaves out, such as the 1541 drives, the
+cartridge, the datasette and the keyboard, and carries on without them.
+An NTSC snapshot fails, as badline runs PAL only. Restored into a
+running machine, a VICE snapshot fails for a machine built another way,
+such as a C64C's snapshot in a C64, and otherwise takes the cartridge
+out and switches the machine off and on.
+
 ## Playing and rendering SID tunes
 
 `badline-ruby --headless` plays a `.sid` tune on the host's audio

data/doc/pinned-behaviour.md

@@ -1203,8 +1203,10 @@ and each was knocked out: removing it fails the rows named.
   - Spec guard: *steps in from the stop with the first phase after the
     bump* in
     [`mechanism_spec.rb`](../spec/badline/drive1541/mechanism_spec.rb),
-    and *lists it through the traps* (`:slow`) in
-    [`drive1541_spec.rb`](../spec/badline/drive1541_spec.rb).
+    and the `format/name-and-id`, `format/bam-free` and
+    `format/trap-readable` rows of the `drive-scenarios` suite
+    ([`drive_scenarios.rb`](../test/drive_scenarios.rb)), which read the
+    formatted disk back from its image.
 - The disk turns at 300 rpm whatever bit rate VIA 2's PB5-6 select: a
   turn is 200,000 drive cycles over every track and over a half track
   without data. Each track's bits pass under the head at the rate they

data/exe/badline-ruby

@@ -55,7 +55,8 @@ begin
                                               disk: { read_only: options.read_only? })
 rescue Badline::Media::TrueDrive::Error, Badline::Storage::SIDFile::FormatError, Badline::Storage::T64::FormatError,
        Badline::Storage::TAP::FormatError, Badline::Storage::CRTFile::FormatError,
-       Badline::Storage::G64Image::FormatError, Badline::Cartridge::UnsupportedTypeError => e
+       Badline::Storage::G64Image::FormatError, Badline::Cartridge::UnsupportedTypeError,
+       Badline::Snapshot::FormatError => e
   warn "badline-ruby: #{options.media_path}: #{e.message}"
   exit 1
 end

data/lib/badline/address_bus/saved_state.rb

@@ -0,0 +1,72 @@
+# frozen_string_literal: true
+
+module Badline
+  class AddressBus
+    # The bus's state for a snapshot: the CPU port, the RAM, colour RAM and
+    # a RAM expansion, the cartridge, the datasette and the chips.
+    module SavedState
+      # The RAM expansion fitted, or an Unexpanded stand-in.
+      attr_reader :ram_expansion
+
+      # Takes the cartridge out of the expansion port, as a restore does for
+      # a state without one.
+      def detach_cartridge
+        @cartridge = nil
+        update_overlays!
+      end
+
+      # The 6510 port's direction and output registers, and the charge left
+      # on its floating bits.
+      def port_state = [@port_ddr, @port_out, @port_floating]
+
+      # Sets the port as port_state reads it, as a snapshot restores it,
+      # leaving the RAM under $00 and $01 alone.
+      def restore_port(ddr, out, floating)
+        @port_ddr = ddr
+        @port_out = out
+        @port_floating = floating
+        update_port!
+      end
+
+      # The machine's memory and everything on the bus but the keyboard, the
+      # joysticks and the pot devices, which the host holds. A cartridge is
+      # already in the port, built from its setup (Computer#load_state).
+      def save_state(out)
+        out.marker("BUS")
+        out.int(@port_ddr).int(@port_out).int(@port_floating)
+        @ram.save_state(out)
+        @color_ram.save_state(out)
+        @ram_expansion.save_state(out)
+        @cartridge&.save_state(out)
+        @datasette.save_state(out)
+        @vic.save_state(out)
+        @cia1.save_state(out)
+        @cia2.save_state(out)
+        @sid.save_state(out)
+      end
+
+      def load_state(input)
+        input.marker("BUS")
+        ddr = input.int
+        port_out = input.int
+        floating = input.int
+        @ram.load_state(input)
+        @color_ram.load_state(input)
+        @ram_expansion.load_state(input)
+        @cartridge&.load_state(input)
+        @datasette.load_state(input)
+        @port_ddr = ddr
+        @port_out = port_out
+        @port_floating = floating
+        @io_port.value = port_value
+        update_overlays!
+        @vic.load_state(input)
+        @cia1.load_state(input)
+        @cia2.load_state(input)
+        @sid.load_state(input)
+      end
+    end
+
+    include SavedState
+  end
+end

data/lib/badline/address_bus.rb

@@ -1,5 +1,6 @@
 # frozen_string_literal: true
 
+require "badline/address_bus/saved_state"
 require "badline/address_bus/ultimax_pages"
 
 module Badline

data/lib/badline/audio/stream.rb

@@ -38,6 +38,12 @@ module Badline
 
       def rate = @sink.rate
 
+      # Plays another machine's SID from here on.
+      def sid=(sid)
+        @sid = sid
+        sid.record(rate: rate)
+      end
+
       def muted? = @muted
 
       def playing? = @started

data/lib/badline/cartridge/action_replay.rb

@@ -64,6 +64,21 @@ module Badline
 
       private
 
+      def save_mapper(out)
+        save_windows(out, windows)
+        out.int(window_index(@rom, windows)).boolean(@active).boolean(@io2_ram).blob(@ram_data)
+      end
+
+      def load_mapper(input)
+        load_windows(input, windows)
+        @rom = window_at(input.int, windows)
+        @active = input.boolean?
+        @io2_ram = input.boolean?
+        input.blob_into(@ram_data)
+      end
+
+      def windows = [@through, @isolated, @contended, *@rom_banks, EMPTY_BANK]
+
       def io2_peek(addr)
         @io2_ram ? @ram_data[IO2_PAGE | (addr & 0xff)] : @rom.peek(addr)
       end

data/lib/badline/cartridge/comal80.rb

@@ -33,6 +33,14 @@ module Badline
 
       private
 
+      def save_mapper(out)
+        save_windows(out, [*@roml_banks, *@romh_banks, EMPTY_BANK])
+      end
+
+      def load_mapper(input)
+        load_windows(input, [*@roml_banks, *@romh_banks, EMPTY_BANK])
+      end
+
       def select(number, mode)
         @roml = bank(@roml_banks, number)
         @romh = bank(@romh_banks, number)

data/lib/badline/cartridge/dinamic.rb

@@ -24,6 +24,14 @@ module Badline
 
       private
 
+      def save_mapper(out)
+        save_windows(out, [*@banks, EMPTY_BANK])
+      end
+
+      def load_mapper(input)
+        load_windows(input, [*@banks, EMPTY_BANK])
+      end
+
       def install_chips(chips)
         @banks = banks_from(chips).first
         self.mode = :rom8k

data/lib/badline/cartridge/easy_flash.rb

@@ -78,9 +78,28 @@ module Badline
       private
 
       def select_bank
+        map_bank
+        changed!
+      end
+
+      def map_bank
         @roml = @low_flash.window(@bank * BANK_SIZE)
         @romh = @high_flash.window(@bank * BANK_SIZE)
-        changed!
+      end
+
+      def save_mapper(out)
+        out.int(@bank).int(@control).blob(@io_ram)
+        @low_flash.save_state(out)
+        @high_flash.save_state(out)
+      end
+
+      def load_mapper(input)
+        @bank = input.int
+        @control = input.int
+        input.blob_into(@io_ram)
+        @low_flash.load_state(input)
+        @high_flash.load_state(input)
+        map_bank
       end
 
       def apply_control

data/lib/badline/cartridge/epyx_fastload.rb

@@ -56,6 +56,14 @@ module Badline
 
       private
 
+      def save_mapper(out)
+        out.int(@discharged_at)
+      end
+
+      def load_mapper(input)
+        @discharged_at = input.int
+      end
+
       def discharge!
         @discharged_at = @clock ? @clock.call : 0
       end

data/lib/badline/cartridge/final_cartridge3.rb

@@ -62,6 +62,18 @@ module Badline
 
       private
 
+      def save_mapper(out)
+        save_windows(out, [*@roml_banks, *@romh_banks, EMPTY_BANK])
+        out.boolean(@register_visible).boolean(@phi1_ultimax)
+      end
+
+      def load_mapper(input)
+        load_windows(input, [*@roml_banks, *@romh_banks, EMPTY_BANK])
+        @io_bank = @roml
+        @register_visible = input.boolean?
+        @phi1_ultimax = input.boolean?
+      end
+
       def select(number)
         @io_bank = @roml = bank(@roml_banks, number)
         @romh = bank(@romh_banks, number)

data/lib/badline/cartridge/flash.rb

@@ -2,6 +2,37 @@
 
 module Badline
   class Cartridge
+    # A Flash chip's state, for a snapshot.
+    module FlashState
+      STATES = %i[read program_setup autoselect programming erase_window erasing suspended chip_erase
+                  program_error].freeze
+
+      # The array, the command state, a timed operation's end on the
+      # machine's clock, and the windows handed out so far, which load_state
+      # builds anew.
+      def save_state(out)
+        out.blob(@data).int(STATES.index(@state)).int(STATES.index(@base_state)).int(@cycle).int(@toggle)
+        out.optional_int(@done_at).optional_int(@programmed).optional_int(@remaining)
+        out.boolean(!@erasing_sectors.nil?)
+        out.ints(@erasing_sectors) if @erasing_sectors
+        out.ints(@windows.keys).ints(@status_windows.keys)
+      end
+
+      def load_state(input)
+        input.blob_into(@data)
+        @state = STATES.fetch(input.int).to_sym
+        @base_state = STATES.fetch(input.int).to_sym
+        @cycle = input.int
+        @toggle = input.int
+        @done_at = input.optional_int
+        @programmed = input.optional_int
+        @remaining = input.optional_int
+        @erasing_sectors = nil
+        @erasing_sectors = input.ints if input.boolean?
+        rebuild_windows(input.ints, input.ints)
+      end
+    end
+
     # An AMD 29F0x0 flash chip, driven through the JEDEC command set in the
     # AMD datasheets. Each command opens with two unlock cycles, $AA to the
     # first unlock address and $55 to the second, and a third write picks
@@ -66,6 +97,8 @@ module Badline
         alias [] peek
       end
 
+      include FlashState
+
       attr_reader :data, :state
       attr_writer :clock
 
@@ -95,6 +128,14 @@ module Badline
         end
       end
 
+      # Hands out new windows at the bases given, as #window would have.
+      def rebuild_windows(bases, status_bases)
+        @windows = {}
+        @status_windows = {}
+        bases.each { |base| @windows[base] = Window.new(self, base) }
+        status_bases.each { |base| @status_windows[base] = StatusWindow.new(self, base) }
+      end
+
       def array_mode?
         @state == :read || @state == :program_setup
       end

data/lib/badline/cartridge/fun_play.rb

@@ -28,6 +28,14 @@ module Badline
 
       private
 
+      def save_mapper(out)
+        save_windows(out, [*@banks, EMPTY_BANK])
+      end
+
+      def load_mapper(input)
+        load_windows(input, [*@banks, EMPTY_BANK])
+      end
+
       def install_chips(chips)
         @banks = []
         chips.each { |chip| @banks[self.class.bank_number(chip.bank)] = rom_bank(chip.data) }

data/lib/badline/cartridge/g_mod2.rb

@@ -47,6 +47,18 @@ module Badline
         changed!
       end
 
+      def save_mapper(out)
+        out.int(@bank).boolean(@flash_writes)
+        @flash.save_state(out)
+      end
+
+      def load_mapper(input)
+        @bank = input.int
+        @flash_writes = input.boolean?
+        @flash.load_state(input)
+        @roml = @flash.window(@bank * BANK_SIZE)
+      end
+
       def install_chips(chips)
         data = Array.new(BANKS * BANK_SIZE, 0xff)
         chips.each do |chip|

data/lib/badline/cartridge/game_system.rb

@@ -25,6 +25,14 @@ module Badline
 
       private
 
+      def save_mapper(out)
+        save_windows(out, [*@banks, EMPTY_BANK])
+      end
+
+      def load_mapper(input)
+        load_windows(input, [*@banks, EMPTY_BANK])
+      end
+
       def select(addr)
         @roml = bank(@banks, addr & 0x3f)
         changed!

data/lib/badline/cartridge/geo_ram.rb

@@ -52,8 +52,24 @@ module Badline
         @block = @page = @window = 0
       end
 
+      # A GEO-RAM is built from its size alone.
+      def save_setup(out)
+        out.int(GEO_RAM_SETUP).int(@size)
+      end
+
       private
 
+      def save_mapper(out)
+        out.blob(@ram_data).int(@block).int(@page).int(@window)
+      end
+
+      def load_mapper(input)
+        input.blob_into(@ram_data)
+        @block = input.int
+        @page = input.int
+        @window = input.int
+      end
+
       def install_chips(_chips)
         @ram_data = Array.new(@size * 1024, 0)
         reset

data/lib/badline/cartridge/magic_desk.rb

@@ -20,6 +20,14 @@ module Badline
 
       private
 
+      def save_mapper(out)
+        save_windows(out, [*@banks, EMPTY_BANK])
+      end
+
+      def load_mapper(input)
+        load_windows(input, [*@banks, EMPTY_BANK])
+      end
+
       def install_chips(chips)
         @banks = banks_from(chips).first
         @bank_mask = (bank_mask(@banks) | 0x03) & 0x7f

data/lib/badline/cartridge/ocean.rb

@@ -19,6 +19,14 @@ module Badline
 
       private
 
+      def save_mapper(out)
+        save_windows(out, [*@banks, EMPTY_BANK])
+      end
+
+      def load_mapper(input)
+        load_windows(input, [*@banks, EMPTY_BANK])
+      end
+
       # In 16K mode the selected bank shows through ROMH as well.
       def select_bank(number)
         @roml = bank(@banks, number)

data/lib/badline/cartridge/pagefox.rb

@@ -29,6 +29,18 @@ module Badline
 
       private
 
+      def save_mapper(out)
+        save_windows(out, windows)
+        @ram_banks.each { |ram| out.blob(ram.data) }
+      end
+
+      def load_mapper(input)
+        load_windows(input, windows)
+        @ram_banks.each { |ram| input.blob_into(ram.data) }
+      end
+
+      def windows = [*@roml_banks, *@romh_banks, *@ram_banks, @open_bus || EMPTY_BANK, EMPTY_BANK]
+
       def select(value)
         half = (value >> 1) & 0x01
         chip = (value >> 2) & 0x03