badline 0.14.0 → 0.15.1

data/lib/badline/c64/bus/extra_sids.rb

@@ -7,7 +7,16 @@ module Badline
       # them, each over its 32 bytes of the I/O area (SIDSlots). The SID
       # player's machine has nothing else in I/O 1 and 2, so the rest of a
       # page there reads the open bus.
+      #
+      # A snapshot holds each in its own keyed module, BL-SID2 onwards in the
+      # order they were fitted, with the address it sits at and its model
+      # ahead of the SID's own fields.
       module ExtraSIDs
+        SID_MODEL_NAMES = %w[mos6581 mos8580].freeze
+
+        # The SIDs fitted past the first, in the order they were fitted.
+        attr_reader :extra_sids
+
         # Fits a SID at the address it was built at, where it takes its 32
         # bytes over from whatever maps there.
         def add_sid(sid)
@@ -18,14 +27,85 @@ module Badline
             @sid_slots << slots
           end
           slots.place(sid)
+          @extra_sids << sid
+          update_overlays!
+        end
+
+        # Takes the extra SIDs out, giving their addresses back to what maps
+        # there.
+        def remove_extra_sids
+          @sid_slots.clear
+          @extra_sids.clear
           update_overlays!
         end
 
+        def save_extra_sid_modules(sections)
+          @extra_sids.each_with_index do |sid, index|
+            sections << Snapshot::Keyed.section("BL-SID#{index + 2}") do |out|
+              out.int("address", sid.start).text("model", sid.model.to_s)
+              sid.save_fields(out)
+            end
+          end
+          sections
+        end
+
+        # Fits the extra SIDs the snapshot's modules hold and loads them. A
+        # SID already fitted at the same address stays, on the model the
+        # snapshot names, and one the snapshot hasn't comes out. A module
+        # whose address no SID fits at is left out, and reported.
+        def load_extra_sid_modules(modules)
+          addresses = []
+          inputs = extra_sid_inputs(modules, addresses)
+          models = inputs.map { |input| sid_model_named(input.choice("model", SID_MODEL_NAMES, "mos6581")) }
+          refit_sids(addresses, models)
+          @extra_sids.each_with_index do |sid, index|
+            model = models[index]
+            sid.model = model unless sid.model == model
+            sid.load_fields(inputs[index])
+          end
+        end
+
         private
 
         def map_extra_sids
           @sid_slots.each { |slots| @read_pages[slots.page] = @write_pages[slots.page] = slots }
         end
+
+        def extra_sid_inputs(modules, taken)
+          inputs = []
+          number = 2
+          input = modules.optional("BL-SID2")
+          while input
+            address = input.word("address", 0xd420)
+            if sid_fits?(address) && !taken.include?(address)
+              inputs << input
+              taken << address
+            else
+              input.adjust(format("no SID fits at $%04x, so it's left out", address))
+            end
+            number += 1
+            input = modules.optional("BL-SID#{number}")
+          end
+          inputs
+        end
+
+        # A SID's 32 bytes past the first SID's own, in $D420-$D7FF, or in
+        # I/O 1 or 2.
+        def sid_fits?(address)
+          address.nobits?(0x1f) && ((0xd420..0xd7e0).cover?(address) || (0xde00..0xdfe0).cover?(address))
+        end
+
+        def sid_model_named(name) = name == "mos8580" ? :mos8580 : :mos6581
+
+        def refit_sids(addresses, models)
+          fitted = @extra_sids.dup
+          return if fitted.map(&:start) == addresses
+
+          remove_extra_sids
+          addresses.each_with_index do |address, index|
+            add_sid(fitted.find { |sid| sid.start == address } || Chips::SID.new(model: models[index], at: address))
+          end
+        end
       end
     end
   end

data/lib/badline/c64/bus.rb

@@ -91,6 +91,7 @@ module Badline
         @cia1.on_port_b4_change { |high| @vic.lightpen_level(high) }
         @sid = Chips::SID.new(model: sid_model, pots: @control_ports)
         @sid_slots = []
+        @extra_sids = []
 
         @datasette = Drives::Datasette.new
         @datasette.on_flag { @cia1.flag! }

data/lib/badline/c64/cartridge/action_replay.rb

@@ -22,6 +22,10 @@ module Badline
         include Freezer
 
         CONTROL_MODES = %i[rom8k rom16k off ultimax].freeze
+
+        # Ultimax mode with the RAM at ROML and I/O 2 and the first bank at
+        # ROMH, as a freeze leaves the register.
+        FREEZE_CONTROL = 0x23
         IO2_PAGE = 0x1f00
 
         def connect(ram:, open_bus:)
@@ -59,8 +63,7 @@ module Badline
 
         def freeze!
           @active = true
-          @rom = bank(@rom_banks, 0)
-          select(:ultimax, @isolated, io2_ram: true)
+          control(FREEZE_CONTROL)
         end
 
         private
@@ -72,6 +75,7 @@ module Badline
         end
 
         def control(value)
+          @control = value
           self.nmi = false if value.anybits?(0x40)
           @rom = bank(@rom_banks, (value >> 3) & 0x03)
           configure(value)

data/lib/badline/c64/cartridge/comal80.rb

@@ -37,6 +37,7 @@ module Badline
         def windows = [*@roml_banks, *@romh_banks, EMPTY_BANK]
 
         def select(number, mode)
+          @bank = number
           @roml = bank(@roml_banks, number)
           @romh = bank(@romh_banks, number)
           self.mode = mode

data/lib/badline/c64/cartridge/dinamic.rb

@@ -12,13 +12,15 @@ module Badline
 
         def peek(addr)
           if addr < 0xde10
-            @roml = bank(@banks, addr & 0x0f)
+            @bank = addr & 0x0f
+            @roml = bank(@banks, @bank)
             changed!
           end
           open_bus(addr)
         end
 
         def reset
+          @bank = 0
           @roml = bank(@banks, 0)
           changed!
         end

data/lib/badline/c64/cartridge/final_cartridge3.rb

@@ -64,6 +64,7 @@ module Badline
         def windows = [*@roml_banks, *@romh_banks, EMPTY_BANK]
 
         def select(number)
+          @bank = number
           @io_bank = @roml = bank(@roml_banks, number)
           @romh = bank(@romh_banks, number)
         end

data/lib/badline/c64/cartridge/fun_play.rb

@@ -10,7 +10,8 @@ module Badline
         def poke(addr, value)
           return if addr > 0xdeff
 
-          @roml = bank(@banks, self.class.bank_number(value))
+          @bank = self.class.bank_number(value)
+          @roml = bank(@banks, @bank)
           case value & 0xc6
           when 0x00 then self.mode = :rom8k
           when 0x86 then self.mode = :off

data/lib/badline/c64/cartridge/game_system.rb

@@ -27,7 +27,8 @@ module Badline
         private
 
         def select(addr)
-          @roml = bank(@banks, addr & 0x3f)
+          @bank = addr & 0x3f
+          @roml = bank(@banks, @bank)
           changed!
         end
 

data/lib/badline/c64/cartridge/keyed_state.rb

@@ -6,9 +6,13 @@ module Badline
       # A cartridge's fields in a keyed snapshot module (Snapshot::Keyed,
       # BL-CART): the CRT image it was built from and its jumpers, which
       # build it again (Cartridge.from_fields), the EXROM and GAME lines,
-      # its pull on NMI, the button, and where ROML and ROMH point, each by
-      # the name of the bank or view it shows (window_labels), and whatever
-      # each mapper adds.
+      # its pull on NMI, the button, and each mapper's own registers, from
+      # which a load works out where ROML and ROMH point again.
+      #
+      # Snapshots from 0.14.0 name the bank or view each window shows
+      # instead (window_labels), under roml and romh. A load reads those
+      # when the mapper's register isn't there, and works the register out
+      # from the windows.
       module KeyedState
         def save_fields(out)
           save_setup_fields(out)
@@ -34,12 +38,28 @@ module Badline
 
         def save_jumper_fields(_out); end
 
-        def save_mapper_fields(out)
-          save_window_fields(out)
-        end
+        def save_mapper_fields(_out); end
+
+        def load_mapper_fields(_input); end
+
+        # The register at `key`, cut to `mask`, or nil for a snapshot that
+        # names the windows instead, with the windows put back from their
+        # names.
+        def latch_or_windows(input, key, default, mask)
+          return input.masked(key, default, mask) if input.tags.key?(key)
 
-        def load_mapper_fields(input)
           load_window_fields(input)
+          nil
+        end
+
+        # The number of the bank among `banks` that `window` shows, or of the
+        # first the image leaves out for erased ROM.
+        def number_showing(banks, window)
+          number = banks.index { |each| each.equal?(window) }
+          return number if number
+          return 0 unless window.equal?(EMPTY_BANK)
+
+          banks.index(nil) || banks.length
         end
 
         # The name of each of `windows`, in the same order: bank<N> for the
@@ -51,21 +71,6 @@ module Badline
           [*Array.new(banks.length) { |number| "bank#{number}" }, "empty"]
         end
 
-        def save_window_fields(out)
-          choices = windows
-          return unless choices
-
-          labels = window_labels
-          save_window(out, "roml", @roml, choices, labels)
-          save_window(out, "romh", @romh, choices, labels)
-        end
-
-        def save_window(out, key, window, choices, labels)
-          return if window.nil?
-
-          out.text(key, labels.fetch(window_index(window, choices)))
-        end
-
         def load_window_fields(input)
           choices = windows
           return unless choices
@@ -97,21 +102,104 @@ module Badline
         def from_jumper_fields(crt, _input) = new(crt)
       end
 
-      # Two banks of ROM, one behind each window: roml<N> and romh<N>.
+      # One bank register, under bank, selecting the bank ROML shows.
+      module BankLatch
+        private
+
+        def save_mapper_fields(out)
+          out.int("bank", @bank)
+        end
+
+        def load_mapper_fields(input)
+          latch = latch_or_windows(input, "bank", @bank, bank_latch_mask)
+          if latch.nil?
+            @bank = number_showing(@banks, @roml)
+          else
+            @bank = latch
+            show_bank
+          end
+        end
+
+        def show_bank
+          @roml = bank(@banks, @bank)
+        end
+      end
+
+      # Two banks of ROM, one behind each window: roml<N> and romh<N>, both
+      # selected by one bank register, under bank.
       module SplitBanks
         private
 
+        def save_mapper_fields(out)
+          out.int("bank", @bank)
+        end
+
+        def load_mapper_fields(input)
+          latch = latch_or_windows(input, "bank", @bank, bank_latch_mask)
+          if latch.nil?
+            @bank = number_showing(@roml_banks, @roml)
+          else
+            @bank = latch
+            @roml = bank(@roml_banks, @bank)
+            @romh = bank(@romh_banks, @bank)
+          end
+        end
+
         def window_labels
           [*Array.new(@roml_banks.length) { |number| "roml#{number}" },
            *Array.new(@romh_banks.length) { |number| "romh#{number}" }, "empty"]
         end
       end
 
+      class Ocean
+        include BankLatch
+
+        private
+
+        def bank_latch_mask = @bank_mask
+
+        def show_bank = select_bank(@bank)
+      end
+
+      class FunPlay
+        include BankLatch
+
+        private
+
+        def bank_latch_mask = 0x0f
+      end
+
+      class GameSystem
+        include BankLatch
+
+        private
+
+        def bank_latch_mask = 0x3f
+      end
+
+      class Dinamic
+        include BankLatch
+
+        private
+
+        def bank_latch_mask = 0x0f
+      end
+
+      class MagicDesk
+        include BankLatch
+
+        private
+
+        def bank_latch_mask = @bank_mask
+      end
+
       class SuperGames
         include SplitBanks
 
         private
 
+        def bank_latch_mask = 0x03
+
         def save_mapper_fields(out)
           super
           out.bool("locked", @locked)
@@ -125,6 +213,10 @@ module Badline
 
       class Comal80
         include SplitBanks
+
+        private
+
+        def bank_latch_mask = 0x07
       end
 
       class FinalCartridge3
@@ -132,6 +224,8 @@ module Badline
 
         private
 
+        def bank_latch_mask = @bank_mask
+
         def save_mapper_fields(out)
           super
           out.bool("register_visible", @register_visible).bool("phi1_ultimax", @phi1_ultimax)
@@ -146,8 +240,12 @@ module Badline
       end
 
       class RGCD
+        include BankLatch
+
         private
 
+        def bank_latch_mask = @bank_mask
+
         def save_mapper_fields(out)
           super
           out.bool("disabled", @disabled)
@@ -162,12 +260,11 @@ module Badline
       class Zaxxon
         class High
           def save_fields(out)
-            out.int("high_bank", [*@banks, EMPTY_BANK].index { |bank| bank.equal?(@bank) }.to_i)
+            out.int("high_bank", @number)
           end
 
           def load_fields(input)
-            choices = [*@banks, EMPTY_BANK]
-            @bank = choices.fetch(input.int("high_bank", 0).clamp(0, choices.length - 1))
+            select(input.int("high_bank", 0).clamp(0, @banks.length))
           end
         end
 
@@ -204,18 +301,35 @@ module Badline
         end
 
         def save_mapper_fields(out)
-          super
-          out.text("rom", window_labels.fetch(window_index(@rom, windows))).bool("active", @active)
-          out.bool("io2_ram", @io2_ram).bytes("ram", @ram_data)
+          out.int("control", @control).bool("active", @active).bytes("ram", @ram_data)
         end
 
         def load_mapper_fields(input)
-          super
+          latch = latch_or_windows(input, "control", @control, 0xff)
+          if latch.nil?
+            load_legacy_fields(input)
+          else
+            @control = latch
+            @rom = bank(@rom_banks, (@control >> 3) & 0x03)
+            configure(@control)
+          end
+          @active = input.bool("active", @active)
+          input.bytes_into("ram", @ram_data)
+        end
+
+        # The ROM bank by name, and whether I/O 2 shows the RAM, from which
+        # the register is worked out.
+        def load_legacy_fields(input)
           labels = window_labels
           @rom = window_named(input.choice("rom", labels, "rom0"), windows, labels)
-          @active = input.bool("active", @active)
           @io2_ram = input.bool("io2_ram", @io2_ram)
-          input.bytes_into("ram", @ram_data)
+          number = number_showing(@rom_banks, @rom) << 3
+          @control = if @roml.equal?(@contended) || @romh.equal?(@isolated)
+                       0x22 | number
+                     else
+                       mode = @exrom.zero? ? 1 - @game : 3 - @game
+                       mode | (@io2_ram ? 0x20 : 0) | number
+                     end
         end
       end
 
@@ -237,12 +351,19 @@ module Badline
         end
 
         def save_mapper_fields(out)
-          super
+          out.int("control", @control)
           @ram_banks.each_with_index { |ram, number| out.bytes("ram#{number}.data", ram.data) }
         end
 
         def load_mapper_fields(input)
-          super
+          latch = latch_or_windows(input, "control", @control, 0xff)
+          if latch.nil?
+            selected = (0...8).find { |select| window(select >> 1, select & 0x01) == [@roml, @romh] } || 0
+            @control = (selected << 1) | (@exrom == 1 && @game == 1 ? 0x10 : 0)
+          else
+            @control = latch
+            @roml, @romh = window((@control >> 2) & 0x03, (@control >> 1) & 0x01)
+          end
           @ram_banks.each_with_index { |ram, number| input.bytes_into("ram#{number}.data", ram.data) }
         end
       end

data/lib/badline/c64/cartridge/magic_desk.rb

@@ -11,7 +11,8 @@ module Badline
           return if addr > 0xdeff
 
           @exrom = value.anybits?(0x80) ? 1 : 0
-          @roml = bank(@banks, value & @bank_mask)
+          @bank = value & @bank_mask
+          @roml = bank(@banks, @bank)
           changed!
         end
 

data/lib/badline/c64/cartridge/ocean.rb

@@ -22,6 +22,7 @@ module Badline
 
         # In 16K mode the selected bank shows through ROMH as well.
         def select_bank(number)
+          @bank = number
           @roml = bank(@banks, number)
           @romh = @roml if game.zero?
         end

data/lib/badline/c64/cartridge/pagefox.rb

@@ -33,6 +33,7 @@ module Badline
         def windows = [*@roml_banks, *@romh_banks, *@ram_banks, @open_bus || EMPTY_BANK, EMPTY_BANK]
 
         def select(value)
+          @control = value
           half = (value >> 1) & 0x01
           chip = (value >> 2) & 0x03
           @roml, @romh = window(chip, half)

data/lib/badline/c64/cartridge/rgcd.rb

@@ -35,7 +35,8 @@ module Badline
             @disabled = true
             self.mode = :off
           else
-            @roml = bank(@banks, value & @bank_mask)
+            @bank = value & @bank_mask
+            @roml = bank(@banks, @bank)
           end
         end
 

data/lib/badline/c64/cartridge/super_games.rb

@@ -24,8 +24,9 @@ module Badline
         def windows = [*@roml_banks, *@romh_banks, EMPTY_BANK]
 
         def select(value)
-          @roml = bank(@roml_banks, value & 0x03)
-          @romh = bank(@romh_banks, value & 0x03)
+          @bank = value & 0x03
+          @roml = bank(@roml_banks, @bank)
+          @romh = bank(@romh_banks, @bank)
           self.mode = value.anybits?(0x04) ? :off : :rom16k
           @locked = value.anybits?(0x08)
         end

data/lib/badline/c64/cartridge/zaxxon.rb

@@ -26,6 +26,7 @@ module Badline
           end
 
           def select(number)
+            @number = number
             @bank = @banks[number] || EMPTY_BANK
           end
 

data/lib/badline/c64/cartridge.rb

@@ -152,9 +152,9 @@ module Badline
 
       private
 
-      # The banks and views ROML and ROMH can point at, which a snapshot
-      # names them by: the mapper's banks, or nothing for a mapper whose
-      # windows stay where install_chips put them.
+      # The banks and views ROML and ROMH can point at, which a 0.14.0
+      # snapshot names them by: the mapper's banks, or nothing for a mapper
+      # whose windows stay where install_chips put them.
       def windows
         [*@banks, EMPTY_BANK] if @banks
       end

data/lib/badline/c64/keyed_modules.rb

@@ -4,8 +4,9 @@ module Badline
   class C64
     # The whole machine as keyed snapshot modules (Snapshot::Keyed), in the
     # order a load applies them: BL-MACHINE with the setup, the memories,
-    # the cartridge, the CPU with its port, the chips, an REU, the
-    # datasette, device 8 through the traps and the true drives. A load
+    # the cartridge, the CPU with its port, the chips with any extra SIDs
+    # (Bus::ExtraSIDs), an REU, the datasette, device 8 through the traps
+    # and the true drives. A load
     # reads the CPU's port before the chips, so the banks are mapped as the
     # chips load, and the CPU's own fields after them. What each unit works
     # out again from its fields comes last, once every unit is loaded.
@@ -60,6 +61,7 @@ module Badline
         sections << Snapshot::Keyed.section("BL-CIA1") { |out| @cia1.save_fields(out) }
         sections << Snapshot::Keyed.section("BL-CIA2") { |out| @cia2.save_fields(out) }
         sections << Snapshot::Keyed.section("BL-SID") { |out| @sid.save_fields(out) }
+        bus.save_extra_sid_modules(sections)
       end
 
       def load_chip_modules(modules, cpu)
@@ -67,6 +69,7 @@ module Badline
         @cia1.load_fields(modules.required("BL-CIA1"))
         @cia2.load_fields(modules.required("BL-CIA2"))
         @sid.load_fields(modules.required("BL-SID"))
+        address_bus.load_extra_sid_modules(modules)
         @reu&.load_fields(modules.required("BL-REU"))
         @cpu.load_fields(cpu)
       end
@@ -94,6 +97,7 @@ module Badline
         @cia1.restored!
         @cia2.restored!
         @sid.restored!
+        address_bus.extra_sids.each(&:restored!)
         @reu&.restored!
         machine_restored!
       end

data/lib/badline/c64/true_drives.rb

@@ -9,7 +9,7 @@ module Badline
       include Drives::Model1581::Slot
 
       # The true drive models a snapshot names.
-      DRIVE_MODELS = %w[1541 1571 1581].freeze
+      DRIVE_MODELS = %w[1541 1551 1571 1581].freeze
 
       # Plugs in a Drives::Model1541, which then runs alongside the machine on its
       # own clock and talks to it over the serial bus. The serial traps stop
@@ -44,6 +44,7 @@ module Badline
         drive1581 = @drive1581
         drive1581&.save_modules(sections, "BL-D#{drive1581.device}")
         save_drive1571_modules(sections)
+        save_drive1551_modules(sections)
         sections
       end
 
@@ -63,6 +64,7 @@ module Badline
         detach_drive1541 unless models.include?("1541")
         detach_drive1581 unless models.include?("1581")
         detach_drive1571 unless models.include?("1571")
+        detach_drive1551 unless models.include?("1551")
       end
 
       # Unplugs the Drives::Model1541, leaving the serial bus with nothing on it.
@@ -91,6 +93,7 @@ module Badline
         case model
         when "1581" then load_drive1581_modules(modules, input, device)
         when "1571" then load_drive1571_modules(modules, input, device)
+        when "1551" then load_drive1551_modules(modules, input, device)
         else load_drive1541_modules(modules, input, device)
         end
       end
@@ -115,6 +118,15 @@ module Badline
       end
 
       def detach_drive1571 = nil
+
+      # The 264 series' 1551, which only the Plus/4 has (Plus4::TCBMDrive).
+      def save_drive1551_modules(sections) = sections
+
+      def load_drive1551_modules(_modules, input, _device)
+        input.adjust("a 1551 doesn't plug into this machine, left out")
+      end
+
+      def detach_drive1551 = nil
     end
   end
 end

data/lib/badline/c64.rb

@@ -68,6 +68,7 @@ module Badline
       @cia1 = @address_bus.cia1
       @cia2 = @address_bus.cia2
       @sid = @address_bus.sid
+      @extra_sids = @address_bus.extra_sids
       @datasette = @address_bus.datasette
       @cycles = 0
       @nmi_asserted = false
@@ -100,6 +101,7 @@ module Badline
       @cia1.cycle!
       @cia2.cycle!
       @sid.cycle!
+      clock_extra_sids unless @extra_sids.empty?
       @datasette.cycle!
 
       @cpu.irq = @cia1.interrupted? || @vic.interrupted? || @reu_irq
@@ -202,6 +204,10 @@ module Badline
       reu
     end
 
+    # The SIDs fitted past the first, which clock ahead of the CPU as the
+    # first does.
+    def clock_extra_sids = @extra_sids.each(&:cycle!)
+
     # BA halts the CPU on a read cycle, and so does an REU holding the bus
     # for a transfer.
     def clock_cpu