badline 0.11.1 → 0.12.1

data/lib/badline/drive/core.rb

@@ -3,8 +3,8 @@
 module Badline
   module Drive
     # What every Commodore disk drive here shares: a 6502 running the DOS
-    # ROM with two VIAs on its bus, VIA 1 facing the serial bus and VIA 2
-    # the disk mechanism, on a clock of its own.
+    # ROM, with chips on its bus facing the serial bus and the disk
+    # mechanism, on a clock of its own.
     #
     # The drive runs on its own crystal, so it clocks against the host's
     # clock through a fractional accumulator: each host cycle adds the
@@ -14,8 +14,7 @@ module Badline
     # every 67. The host sets its clock on attaching the drive, and until
     # then a 1 MHz drive runs one cycle per host cycle.
     #
-    # VIA 2's port B runs the Mechanism, which reads a Disk put in with
-    # insert.
+    # The Mechanism reads a Disk put in with insert.
     #
     # While the DOS idles, host_cycle! skips the drive's cycles and catches
     # up on them later, exactly (see Idle). The readers of the drive's parts
@@ -24,7 +23,10 @@ module Badline
     # sleeps through them too (see Orbit).
     #
     # A model includes Core and builds its parts, sets @clock_hz and
-    # @idle_loop, and runs one drive cycle in step.
+    # @idle_loop, and runs one drive cycle in step. It hears ATN on
+    # connecting (hear_atn), drives the serial bus (serial_output), and
+    # answers Idle's and Orbit's questions about its chips, as VIAs does
+    # for the 1541 and the 1571.
     module Core
       include Sleep
       include Idle
@@ -42,16 +44,6 @@ module Badline
         @bus
       end
 
-      def via1
-        settle!
-        @via1
-      end
-
-      def via2
-        settle!
-        @via2
-      end
-
       def mechanism
         settle!
         @mechanism
@@ -77,7 +69,7 @@ module Badline
         @serial_bus = serial_bus
         @serial_port.bus = serial_bus
         serial_bus.attach(self)
-        @via1.ca1 = @serial_port.atn_low?
+        hear_atn
       end
 
       # Puts a Disk in the drive (Disk.from_d64 makes one from an image).
@@ -93,10 +85,6 @@ module Badline
       # is the same at the end of every pass the drive sleeps through.
       def led_on? = @mechanism.led_on?
 
-      # VIA 1's port B as it drives the serial bus. It holds still while the
-      # drive sleeps, so reading it leaves the drive asleep.
-      def serial_output = @via1.port_b_output
-
       # Stores what the head wrote since the motor last stopped in the
       # disk's image, as the motor stopping does.
       def flush
@@ -104,15 +92,6 @@ module Badline
         @mechanism.flush
       end
 
-      # The serial bus's RESET line reaches the CPU and both VIAs. RAM keeps
-      # its contents.
-      def reset!
-        settle!
-        @via1.reset!
-        @via2.reset!
-        @cpu.reset!
-      end
-
       # Runs the drive cycles that fall in one host cycle: none, one or two.
       # The host has run this cycle already, and the drive sees what it did
       # from the next one on (see SerialPort). Asleep, the drive owes the
@@ -158,10 +137,6 @@ module Badline
 
       private
 
-      # Runs the model's chips beyond the VIAs +cycles+ quiet cycles at once
-      # (see quiet_cycles). The 1541 has none.
-      def fast_forward_chips(_cycles) = nil
-
       # A drive cycle from host_cycle!, which may find the idle loop.
       def run_cycle
         step

data/lib/badline/drive/fast_serial.rb

@@ -0,0 +1,73 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drive
+    # Fast serial on a drive with a CIA, the 1571's 6526 or the 1581's
+    # 8520: through buffers a port line turns round, the CIA's CNT drives
+    # SRQ and its SP drives DATA, or it hears them. The drive pushes its
+    # pins into the bus as they move, and hears the host's as the host
+    # pushes them, pin by pin, so each byte goes through both shift
+    # registers bit by bit. The CIA takes no part in a pass of the idle
+    # loop, and any access to it, or the host moving its fast serial pins,
+    # wakes the drive.
+    #
+    # A model includes it beside Core, and calls turn_fast_serial when its
+    # direction line moves and drive_fast_serial each cycle the buffers
+    # face out. Its serial_output carries @fast_output above its port.
+    module FastSerial
+      # Whether the buffers face out, the drive's CIA driving DATA and SRQ.
+      attr_reader :fast_serial_out
+
+      # The host moved its fast serial pins: the CIA hears SRQ on CNT and
+      # DATA on SP while the buffers face in.
+      def fast_lines_moved
+        settle!
+        hear_fast_serial unless @fast_serial_out
+      end
+
+      private
+
+      def init_fast_serial
+        @fast_serial_out = false
+        @fast_output = 0
+      end
+
+      # The buffers turned round: outwards the CIA's pins drive the lines,
+      # and inwards they let go and hear them.
+      def turn_fast_serial(out)
+        @fast_serial_out = out
+        return unless @serial_bus
+
+        push_fast_output(out ? fast_pins : 0)
+        hear_fast_serial unless out
+      end
+
+      def drive_fast_serial
+        low = fast_pins
+        push_fast_output(low) if low != @fast_output
+      end
+
+      # The lines the CIA's CNT and SP pull while its serial port drives
+      # them.
+      def fast_pins
+        serial = @cia.serial
+        return 0 unless serial.output?
+
+        low = serial.cnt ? 0 : IECBus::DRIVE_FAST_SRQ
+        serial.sp_out ? low : low | IECBus::DRIVE_FAST_DATA
+      end
+
+      def push_fast_output(low)
+        @fast_output = low
+        @serial_bus&.drives_fast_moved!
+      end
+
+      def hear_fast_serial
+        low = @serial_bus.low_lines
+        serial = @cia.serial
+        serial.cnt_in = low.nobits?(IECBus::SRQ)
+        serial.sp_in = low.nobits?(IECBus::DATA)
+      end
+    end
+  end
+end

data/lib/badline/drive/idle.rb

@@ -81,7 +81,7 @@ module Badline
       end
 
       def start_recording
-        return if @mechanism.motor_on? || @via1.irq? || @via2.irq? || @cpu.trapped?
+        return if busy_for_pass? || @cpu.trapped?
 
         @recording = true
         @record_state = idle_state
@@ -116,20 +116,10 @@ module Badline
         anchor
       end
 
-      def quiet_cycles
-        [@via1.quiet_cycles, @via2.quiet_cycles].min
-      end
-
       def ram_as_found?
         ram = @bus.ram
         @bus.touched.all? { |addr, value| ram.peek(addr) == value }
       end
-
-      def idle_state
-        mechanism = @mechanism
-        [*@cpu.idle_state, *@via1.idle_state, *@via2.idle_state, @bus.data, mechanism.so_pending,
-         *mechanism.idle_state, mechanism.read_a(0xff), mechanism.read_b(0xff)]
-      end
     end
   end
 end

data/lib/badline/drive/orbit.rb

@@ -63,9 +63,7 @@ module Badline
         cycles = orbits * @orbit_cycles
         touched = @bus.touched_timers
         @cpu.fast_forward(cycles, orbits * @orbit_instructions)
-        @via1.skip_orbits(cycles, touched & 0x03)
-        @via2.skip_orbits(cycles, touched >> 2)
-        fast_forward_chips(cycles)
+        skip_chip_orbits(cycles, touched)
         @cycles += cycles
         cycles
       end
@@ -74,8 +72,7 @@ module Badline
       # the unarmed timers it hasn't touched since it was last tainted.
       def anchor_state
         touched = @bus.touched_timers
-        [*idle_state, *@via1.counter_state(touched & 0x03), *@via2.counter_state(touched >> 2),
-         @bus.ram.snapshot]
+        [*idle_state, *counter_state(touched), @bus.ram.snapshot]
       end
     end
   end

data/lib/badline/drive/sleep.rb

@@ -102,8 +102,6 @@ module Badline
       def skip_passes(passes)
         cycles = passes * @pass_cycles
         @cpu.fast_forward(cycles, passes * @pass_instructions)
-        @via1.fast_forward(cycles)
-        @via2.fast_forward(cycles)
         fast_forward_chips(cycles)
         @cycles += cycles
         @budget -= cycles

data/lib/badline/drive/vias.rb

@@ -0,0 +1,84 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drive
+    # The two VIAs the 1541 and the 1571 share: VIA 1 facing the serial
+    # bus, its CA1 on ATN, and VIA 2 running the GCR Mechanism. A model
+    # includes it beside Core, and it answers Core's, Idle's and Orbit's
+    # questions about the chips: what they hold, how long their counters
+    # leave them quiet, and how to run them a stretch at once. A model with
+    # more chips on its bus runs them in fast_forward_more.
+    module VIAs
+      def via1
+        settle!
+        @via1
+      end
+
+      def via2
+        settle!
+        @via2
+      end
+
+      # Puts in a Disk from the .d64, .g64, .d71 or .g71 image at +path+
+      # (Drive1541::Disk.open), write-protected with `read_only`.
+      def insert_image(path, read_only: false)
+        insert(Drive1541::Disk.open(path, read_only:))
+      end
+
+      # VIA 1's port B as it drives the serial bus. It holds still while the
+      # drive sleeps, so reading it leaves the drive asleep.
+      def serial_output = @via1.port_b_output
+
+      # The serial bus's RESET line reaches the CPU and both VIAs. RAM keeps
+      # its contents.
+      def reset!
+        settle!
+        @via1.reset!
+        @via2.reset!
+        @cpu.reset!
+      end
+
+      private
+
+      # ATN reaches VIA 1's CA1 as the serial port latched it.
+      def hear_atn
+        @via1.ca1 = @serial_port.atn_low?
+      end
+
+      # Whether the drive is doing anything a pass of the idle loop can't
+      # repeat: the motor on, or a VIA pulling IRQ.
+      def busy_for_pass? = @mechanism.motor_on? || @via1.irq? || @via2.irq?
+
+      def quiet_cycles
+        [@via1.quiet_cycles, @via2.quiet_cycles].min
+      end
+
+      def idle_state
+        mechanism = @mechanism
+        [*@cpu.idle_state, *@via1.idle_state, *@via2.idle_state, @bus.data, mechanism.so_pending,
+         *mechanism.idle_state, mechanism.read_a(0xff), mechanism.read_b(0xff)]
+      end
+
+      # The counters an orbit has to bring back (VIA#counter_state).
+      def counter_state(touched)
+        [*@via1.counter_state(touched & 0x03), *@via2.counter_state(touched >> 2)]
+      end
+
+      def fast_forward_chips(cycles)
+        @via1.fast_forward(cycles)
+        @via2.fast_forward(cycles)
+        fast_forward_more(cycles)
+      end
+
+      def skip_chip_orbits(cycles, touched)
+        @via1.skip_orbits(cycles, touched & 0x03)
+        @via2.skip_orbits(cycles, touched >> 2)
+        fast_forward_more(cycles)
+      end
+
+      # Runs the model's chips beyond the VIAs +cycles+ quiet cycles at once
+      # (see quiet_cycles). The 1541 has none.
+      def fast_forward_more(_cycles) = nil
+    end
+  end
+end

data/lib/badline/drive.rb

@@ -4,6 +4,8 @@ require "badline/drive/sleep"
 require "badline/drive/idle"
 require "badline/drive/orbit"
 require "badline/drive/core"
+require "badline/drive/vias"
+require "badline/drive/fast_serial"
 require "badline/drive/idle_cpu"
 require "badline/drive/watch"
 require "badline/drive/serial_lines"

data/lib/badline/drive1541/disk.rb

@@ -35,20 +35,10 @@ module Badline
       # The half track entries a side of a .g71 holds.
       G71_SIDE_ENTRIES = 84
 
-      # GCR bytes around a track in each speed zone: 200 ms of rotation at
-      # 300 rpm, in bytes of 32, 30, 28 and 26 µs.
+      # GCR bytes around a track in each speed zone (Storage::D64Image.zone):
+      # 200 ms of rotation at 300 rpm, in bytes of 32, 30, 28 and 26 µs.
       TRACK_LENGTHS = [6250, 6666, 7142, 7692].freeze
 
-      # The speed zone each track is written in: 3 for the 21 sectors of
-      # tracks 1-17, 2 for 18-24, 1 for 25-30 and 0 from 31 on.
-      def self.zone(track)
-        if track <= 17 then 3
-        elsif track <= 24 then 2
-        elsif track <= 30 then 1
-        else 0
-        end
-      end
-
       # How far round the DOS's N: starts each track from the one before,
       # in each zone, in 1/10000 of a turn: it steps in and starts writing
       # the next track that long after it started the last.
@@ -69,10 +59,17 @@ module Badline
       # a .d71 formatted on both sides, and anything else as a .d64,
       # formatted. `read_only` opens the image write-protected.
       def self.open(path, read_only: false)
-        return from_g64(Storage::G64Image.new(path, read_only:)).opened(path, read_only) if State.g64?(path)
-        return from_d64(Storage::D71Image.new(path, read_only:)).opened(path, read_only) if State.d71?(path)
+        image = image_for(path, read_only)
+        (State.g64?(path) ? from_g64(image) : from_d64(image)).opened(path, read_only)
+      end
+
+      # The image at +path+, by its name: a .g64 or .g71, a .d71, and
+      # anything else a .d64.
+      def self.image_for(path, read_only)
+        return Storage::G64Image.new(path, read_only:) if State.g64?(path)
+        return Storage::D71Image.new(path, read_only:) if File.extname(path).casecmp?(".d71")
 
-        from_d64(Storage::D64Image.new(path, read_only:)).opened(path, read_only)
+        Storage::D64Image.new(path, read_only:)
       end
 
       # A disk from a G64 or G71 image, each half track as the image stores
@@ -141,7 +138,7 @@ module Badline
         angle = 0
         (1..image.track_count).each do |track|
           half_track = d64_half_track(image, track)
-          zone = zone((half_track % SIDE) / 2)
+          zone = Storage::D64Image.zone((half_track % SIDE) / 2)
           angle = half_track == SIDE + 2 ? 0 : (angle + SKEWS[zone]) % SKEW_TURN if track > 1
           bytes = format_track(image, track, id, zone)
           disk.write(half_track, Track.new(bytes.rotate(-(bytes.length * angle / SKEW_TURN)), zone))
@@ -149,7 +146,7 @@ module Badline
         disk
       end
 
-      def self.format_track(image, track, id, zone = zone(track))
+      def self.format_track(image, track, id, zone = Storage::D64Image.zone(track))
         sectors = image.sectors_in(track)
         length = TRACK_LENGTHS[zone]
         gap = (length - (sectors * SECTOR_LENGTH)) / sectors

data/lib/badline/drive1541/disk_state.rb

@@ -1,5 +1,7 @@
 # frozen_string_literal: true
 
+require "badline/media/extensions"
+
 module Badline
   class Drive1541
     class Disk
@@ -12,22 +14,12 @@ module Badline
         # for a disk from Disk.open. Nil for a disk made another way.
         attr_reader :path, :read_only
 
-        # A .g64 or .g71 image by its name, a .d71 by its name, and anything
-        # else a .d64.
-        def self.g64?(path) = %w[.g64 .g71].include?(File.extname(path).downcase)
-
-        def self.d71?(path) = File.extname(path).casecmp?(".d71")
+        # Whether the image is a .g64 or .g71, by its name.
+        def self.g64?(path) = Media::Extensions.kind(path) == :gcr
 
-        # A disk for the image at the path, its tracks left for the state.
-        def self.reopen(path, read_only)
-          if g64?(path)
-            Disk.new(Storage::G64Image.new(path, read_only:)).opened(path, read_only)
-          elsif d71?(path)
-            Disk.new(Storage::D71Image.new(path, read_only:)).opened(path, read_only)
-          else
-            Disk.new(Storage::D64Image.new(path, read_only:)).opened(path, read_only)
-          end
-        end
+        # A disk for the image at the path (Disk.image_for), its tracks left
+        # for the state.
+        def self.reopen(path, read_only) = Disk.new(Disk.image_for(path, read_only)).opened(path, read_only)
 
         # The disk a state from save_state describes: +current+ when it was
         # opened from the same image the same way, and otherwise a disk for

data/lib/badline/drive1541.rb

@@ -16,6 +16,7 @@ module Badline
   # clocks it against the host and sleeps through the DOS's idle loop.
   class Drive1541
     include Drive::Core
+    include Drive::VIAs
 
     CLOCK_HZ = 1_000_000
 

data/lib/badline/drive1571/wd1770.rb

@@ -2,32 +2,118 @@
 
 module Badline
   class Drive1571
-    # The WD1770 floppy controller at $2000, which the DOS needs only for
-    # MFM disks. Its four registers hold what's written to them and it
-    # runs no commands: the status reads idle, with the motor off.
+    # The WD1770 floppy controller at $2000, which DOS 3.0 drives for MFM
+    # disks. The 1571 here only ever holds GCR disks, so the controller
+    # never finds an MFM sector: it runs each command for its time and ends
+    # it as the WD177x data sheet does on a disk without one.
     #
     #   $2000  status (read), command (write)
     #   $2001  track
     #   $2002  sector
     #   $2003  data
+    #
+    # BUSY sets as a command is written. A restore, seek or step (type I)
+    # moves the track register and ends a few milliseconds later, with
+    # TRACK 0 reported at track 0. A sector read or write, a read address
+    # or a read track ends with RECORD NOT FOUND after five turns of the
+    # disk, and a write track after one, with nothing written. A force
+    # interrupt ends the command at once. Time is the drive CPU's cycles.
     class WD1770
+      BUSY = 0x01
+      TRACK0 = 0x04
+      NOT_FOUND = 0x10
+      MOTOR_ON = 0x80
+
+      # Cycles at 2 MHz, the 1571's clock in 1571 mode: a turn of the disk
+      # at 300 rpm, and a step with the head settling.
+      TURN = 400_000
+      STEP = 12_000
+
+      # The CPU whose cycles time the commands.
+      attr_writer :cpu
+
       def initialize
         @registers = [0, 0, 0, 0]
+        @status = 0
+        @due = 0
+        @result = 0
+        @cpu = nil
       end
 
-      # Register +offset+, 0 to 3.
-      def peek(offset) = offset.zero? ? 0 : @registers[offset]
+      # Register +offset+, 0 to 3: the status, settled to the command's end
+      # once its time has run out.
+      def peek(offset)
+        return @registers[offset] unless offset.zero?
+
+        finish if @status.anybits?(BUSY) && @cpu.cycles >= @due
+        @status
+      end
 
       def poke(offset, value)
-        @registers[offset] = value
+        offset.zero? ? command(value) : @registers[offset] = value
       end
 
       def save_state(out)
-        out.ints(@registers)
+        out.ints([*@registers, @status, @due, @result])
       end
 
+      # A state from before the controller ran commands holds the four
+      # registers alone.
       def load_state(input)
-        @registers = input.ints
+        values = input.ints
+        @registers = values[0, 4]
+        @status = values[4] || 0
+        @due = values[5] || 0
+        @result = values[6] || 0
+      end
+
+      private
+
+      def command(value)
+        return interrupt if (value & 0xf0) == 0xd0
+
+        @registers[0] = value
+        value < 0x80 ? step(value) : search(value)
+      end
+
+      # A restore ($0x), seek ($1x) or step ($2x to $7x), its track register
+      # moved at once.
+      def step(value)
+        track = @registers[1]
+        target = case value >> 4
+                 when 0 then 0
+                 when 1 then @registers[3]
+                 else track + step_direction(value)
+                 end
+        @registers[1] = target.clamp(0, 255) if value < 0x20 || value.anybits?(0x10)
+        start(STEP * [(target - track).abs, 1].max, @registers[1].zero? ? TRACK0 : 0)
+      end
+
+      # Step in ($4x) moves toward higher tracks, step out ($6x) toward
+      # track 0, and step ($2x) the way the last one went.
+      def step_direction(value)
+        @direction = 1 if (value >> 5) == 2
+        @direction = -1 if (value >> 5) == 3
+        @direction || 1
+      end
+
+      # A sector or track command that finds no MFM sector.
+      def search(value)
+        value >= 0xf0 ? start(TURN, 0) : start(TURN * 5, NOT_FOUND)
+      end
+
+      def start(cycles, result)
+        @status = BUSY | MOTOR_ON
+        @due = @cpu.cycles + cycles
+        @result = result
+      end
+
+      def finish
+        @status = @result
+      end
+
+      def interrupt
+        @status &= ~BUSY & 0xff
       end
     end
   end

data/lib/badline/drive1571.rb

@@ -19,15 +19,13 @@ module Badline
   # same speed either way (Drive1541::Mechanism#clock_hz=).
   #
   # The CIA sits at $4000, on the IRQ line with both VIAs. Only its serial
-  # port is wired: through buffers PA1 turns round, its CNT drives SRQ and
-  # its SP DATA, or it hears them. The drive pushes its pins into the bus
-  # as they move, and hears the host's as the host pushes them, pin by
-  # pin, so each byte goes through both shift registers bit by bit. The
-  # CIA takes no part in a pass of the idle loop: the drive sleeps only
-  # while the CIA is quiet (CIA#quiet?), and any access to it, or the
-  # host moving its fast serial pins, wakes the drive.
+  # port is wired, for fast serial through buffers PA1 turns round
+  # (Drive::FastSerial). The drive sleeps only while the CIA is quiet
+  # (CIA#quiet?).
   class Drive1571
     include Drive::Core
+    include Drive::VIAs
+    include Drive::FastSerial
 
     CLOCK_HZ = 1_000_000
     FAST_CLOCK_HZ = 2_000_000
@@ -40,10 +38,6 @@ module Badline
     SIDE = 0x04
     FAST = 0x20
 
-    # Whether PA1 turns the fast serial buffers outwards, the drive's CIA
-    # driving DATA and SRQ.
-    attr_reader :fast_serial_out
-
     def cia
       settle!
       @cia
@@ -62,8 +56,7 @@ module Badline
     def initialize(rom: nil, host_clock_hz: CLOCK_HZ, device: 8, debug: false)
       @device = device
       @clock_hz = CLOCK_HZ
-      @fast_serial_out = false
-      @fast_output = 0
+      init_fast_serial
       @mechanism = Drive1541::Mechanism.new(slip: 2)
       @serial_port = SerialPort.new(@mechanism, device:)
       @via1 = SerialVIA.new(start: 0x1800, peripheral: @serial_port, drive: self)
@@ -72,6 +65,7 @@ module Badline
       @fdc = WD1770.new
       @bus = Bus.new(rom: rom || ROM.load("dos1571.rom", 0x8000), via1: @via1, via2: @via2, cia: @cia, fdc: @fdc)
       @cpu = CPU.new(@bus, debug:)
+      @fdc.cpu = @cpu
       @idle_loop = IDLE_LOOP
       @host_clock_hz = host_clock_hz
       @phase = 0
@@ -114,13 +108,6 @@ module Badline
     # (IECBus::DRIVE_FAST_DATA and DRIVE_FAST_SRQ) above it.
     def serial_output = @via1.port_b_output | @fast_output
 
-    # The host moved its fast serial pins: the CIA hears SRQ on CNT and
-    # DATA on SP while PA1 turns the buffers inwards.
-    def fast_lines_moved
-      settle!
-      hear_fast_serial unless @fast_serial_out
-    end
-
     # The drive's whole state, as the 1541's (Drive1541#save_state), with
     # the CIA and the WD1770's registers. The clock rate, the side and the
     # fast serial direction follow from VIA 1's port A.
@@ -181,45 +168,8 @@ module Badline
       @cia.quiet? ? [@via1.quiet_cycles, @via2.quiet_cycles].min : 0
     end
 
-    def fast_forward_chips(cycles)
+    def fast_forward_more(cycles)
       @cia.fast_forward(cycles)
     end
-
-    # PA1 turned the buffers round: outwards the CIA's pins drive the
-    # lines, and inwards they let go and hear them.
-    def turn_fast_serial(out)
-      @fast_serial_out = out
-      return unless @serial_bus
-
-      push_fast_output(out ? fast_pins : 0)
-      hear_fast_serial unless out
-    end
-
-    def drive_fast_serial
-      low = fast_pins
-      push_fast_output(low) if low != @fast_output
-    end
-
-    # The lines the CIA's CNT and SP pull while its serial port drives
-    # them.
-    def fast_pins
-      serial = @cia.serial
-      return 0 unless serial.output?
-
-      low = serial.cnt ? 0 : IECBus::DRIVE_FAST_SRQ
-      serial.sp_out ? low : low | IECBus::DRIVE_FAST_DATA
-    end
-
-    def push_fast_output(low)
-      @fast_output = low
-      @serial_bus&.drives_fast_moved!
-    end
-
-    def hear_fast_serial
-      low = @serial_bus.low_lines
-      serial = @cia.serial
-      serial.cnt_in = low.nobits?(IECBus::SRQ)
-      serial.sp_in = low.nobits?(IECBus::DATA)
-    end
   end
 end