badline 0.1.0 → 0.2.1

data/lib/badline/cpu/addressing.rb

@@ -0,0 +1,131 @@
+# frozen_string_literal: true
+
+module Badline
+  class CPU
+    # Steps that read an instruction's operand bytes and work out the
+    # address it operates on, which they leave in @address. Also the
+    # single-step implied, accumulator and immediate instructions, and JMP.
+    module Addressing
+      private
+
+      def op_implied_dummy
+        @memory.peek(@program_counter)
+      end
+
+      def op_implied_exec
+        @memory.peek(@program_counter)
+        send(@operation, nil, nil)
+        end_instruction
+      end
+
+      def op_accumulator_exec
+        @memory.peek(@program_counter)
+        send(@operation, :accumulator, @a)
+        end_instruction
+      end
+
+      def op_immediate_read
+        value = @memory.peek(@program_counter)
+        @program_counter = (@program_counter + 1) & 0xffff
+        send(@operation, nil, value)
+        end_instruction
+      end
+
+      def op_zp
+        @address = @memory.peek(@program_counter)
+        @program_counter = (@program_counter + 1) & 0xffff
+      end
+
+      def op_zp_x
+        @memory.peek(@address)
+        @address = (@address + @x) & 0xff
+      end
+
+      def op_zp_y
+        @memory.peek(@address)
+        @address = (@address + @y) & 0xff
+      end
+
+      def op_abs_low
+        @address = @memory.peek(@program_counter)
+        @program_counter = (@program_counter + 1) & 0xffff
+      end
+
+      def op_abs_high
+        @address |= @memory.peek(@program_counter) << 8
+        @program_counter = (@program_counter + 1) & 0xffff
+      end
+
+      def op_abs_high_x
+        high = @memory.peek(@program_counter)
+        @program_counter = (@program_counter + 1) & 0xffff
+        index_address(high, @x)
+      end
+
+      def op_abs_high_y
+        high = @memory.peek(@program_counter)
+        @program_counter = (@program_counter + 1) & 0xffff
+        index_address(high, @y)
+      end
+
+      def op_idx_dummy
+        @memory.peek(@dummy_address)
+      end
+
+      def op_zp_pointer
+        @pointer = @memory.peek(@program_counter)
+        @program_counter = (@program_counter + 1) & 0xffff
+      end
+
+      def op_pointer_x
+        @memory.peek(@pointer)
+        @pointer = (@pointer + @x) & 0xff
+      end
+
+      def op_pointer_low
+        @address = @memory.peek(@pointer)
+      end
+
+      def op_pointer_high
+        @address |= @memory.peek((@pointer + 1) & 0xff) << 8
+      end
+
+      def op_pointer_high_y
+        index_address(@memory.peek((@pointer + 1) & 0xff), @y)
+      end
+
+      def op_jmp_high
+        @program_counter = @address | (@memory.peek(@program_counter) << 8)
+        end_instruction
+      end
+
+      def op_indirect_low
+        @pointer = @address
+        @address = @memory.peek(@pointer)
+      end
+
+      # The pointer's high byte never increments, so JMP ($30FF) reads its
+      # target's high byte from $3000, not $3100.
+      def op_indirect_high
+        high = @memory.peek((@pointer & 0xff00) | ((@pointer + 1) & 0xff))
+        @program_counter = @address | (high << 8)
+        end_instruction
+      end
+
+      # Adds an index register to a base address. The 6502 adds to the low
+      # byte first and spends the next cycle reading from that address,
+      # before the carry reaches the high byte. Read instructions skip that
+      # cycle when there is no carry.
+      def index_address(high, index)
+        low = @address
+        @address = (((high << 8) | low) + index) & 0xffff
+        @boundary_crossed = (low + index) > 0xff
+        if @optional_dummy && !@boundary_crossed
+          @index += 1
+        else
+          @dummy_address = (high << 8) | ((low + index) & 0xff)
+        end
+      end
+    end
+  end
+end

data/lib/badline/cpu/microcode.rb

@@ -0,0 +1,169 @@
+# frozen_string_literal: true
+
+module Badline
+  class CPU
+    class InvalidOpcodeError < StandardError; end
+
+    # Steps that write to memory. The CPU keeps running through BA on
+    # cycles that write, so Computer#cycle! asks before each cycle whether
+    # the next step is one of these.
+    WRITE_STEPS = %i[
+      op_mem_write op_rmw_write_original op_rmw_write_result op_push_exec op_jsr_push_high op_jsr_push_low
+      op_int_push_pch op_int_push_pcl op_int_push_status
+    ].freeze
+
+    # The steps each addressing mode takes to work out the address an
+    # instruction operates on. They run after the opcode fetch.
+    ADDRESSING_STEPS = {
+      zeropage: %i[op_zp],
+      zeropage_x: %i[op_zp op_zp_x],
+      zeropage_y: %i[op_zp op_zp_y],
+      absolute: %i[op_abs_low op_abs_high],
+      absolute_x: %i[op_abs_low op_abs_high_x op_idx_dummy],
+      absolute_y: %i[op_abs_low op_abs_high_y op_idx_dummy],
+      indirect_x: %i[op_zp_pointer op_pointer_x op_pointer_low op_pointer_high],
+      indirect_y: %i[op_zp_pointer op_pointer_low op_pointer_high_y op_idx_dummy]
+    }.freeze
+
+    # The steps that read or write that address, once it is known.
+    OPERATION_STEPS = {
+      read: %i[op_mem_read],
+      write: %i[op_mem_write],
+      rmw: %i[op_rmw_read op_rmw_write_original op_rmw_write_result]
+    }.freeze
+
+    STORES = %i[sta stx sty sax sha shx shy tas].freeze
+    READ_MODIFY_WRITES = %i[asl lsr rol ror inc dec slo sre rla rra isc dcp].freeze
+    BRANCHES = %i[bcc bcs beq bmi bne bpl bvc bvs].freeze
+
+    # The addresses a 6502 reads after a JAM opcode, before it settles into
+    # JAMMED_PLAN.
+    JAM_ADDRESSES = [0xffff, 0xfffe, 0xfffe].freeze
+
+    # The plan between instructions: the next cycle fetches an opcode.
+    FETCH_PLAN = %i[op_fetch].freeze
+
+    IMPLIED_PLAN = %i[op_fetch op_implied_exec].freeze
+    ACCUMULATOR_PLAN = %i[op_fetch op_accumulator_exec].freeze
+    IMMEDIATE_PLAN = %i[op_fetch op_immediate_read].freeze
+
+    # $10, $30, $50, $70, $90, $B0, $D0, $F0 - relative - 2+ cycles.
+    # A branch that is not taken takes 2 cycles. A taken branch takes 3,
+    # or 4 when the target is on another page.
+    BRANCH_PLAN = %i[op_fetch op_relative op_branch op_branch_fixup].freeze
+
+    # $4C - absolute - 3 cycles
+    JMP_ABSOLUTE_PLAN = %i[op_fetch op_abs_low op_jmp_high].freeze
+
+    # $6C - indirect - 5 cycles
+    JMP_INDIRECT_PLAN = %i[op_fetch op_abs_low op_abs_high op_indirect_low op_indirect_high].freeze
+
+    # $20 - absolute - 6 cycles
+    JSR_PLAN = %i[op_fetch op_jsr_low op_jsr_dummy op_jsr_push_high op_jsr_push_low op_jsr_high].freeze
+
+    # $60 - implied - 6 cycles
+    RTS_PLAN = %i[op_fetch op_implied_dummy op_pull_dummy op_pull_low op_pull_high op_rts_fixup].freeze
+
+    # $40 - implied - 6 cycles
+    RTI_PLAN = %i[op_fetch op_implied_dummy op_pull_dummy op_rti_pull_status op_pull_low op_rti_pull_high].freeze
+
+    # $08, $48 - implied - 3 cycles
+    PUSH_PLAN = %i[op_fetch op_implied_dummy op_push_exec].freeze
+
+    # $28, $68 - implied - 4 cycles
+    PULL_PLAN = %i[op_fetch op_implied_dummy op_pull_dummy op_pull_exec].freeze
+
+    # $02, $12, $22, $32, $42, $52, $62, $72, $92, $B2, $D2, $F2 - illegal
+    JAM_PLAN = [:op_fetch, :op_implied_dummy, *Array.new(JAM_ADDRESSES.length, :op_jam)].freeze
+
+    # A jammed CPU reads $FFFF on every cycle until reset. It never reaches
+    # an instruction boundary, so a pending IRQ or NMI never starts.
+    JAMMED_PLAN = %i[op_jammed].freeze
+
+    # BRK and hardware interrupts push the return address and status, then
+    # read the new PC from a vector. Only the second step differs: BRK's
+    # selects the IRQ vector and sets the break flag it pushes.
+    #
+    # $00 - implied - 7 cycles (BRK)
+    INTERRUPT_PLAN = %i[
+      op_fetch op_implied_dummy op_int_push_pch op_int_push_pcl op_int_push_status
+      op_int_vector_low op_int_vector_high
+    ].freeze
+    BRK_PLAN = %i[
+      op_fetch op_brk_dummy op_int_push_pch op_int_push_pcl op_int_push_status
+      op_int_vector_low op_int_vector_high
+    ].freeze
+
+    SPECIAL_PLANS = {
+      brk: BRK_PLAN, jam: JAM_PLAN, jsr: JSR_PLAN, rts: RTS_PLAN,
+      rti: RTI_PLAN, pha: PUSH_PLAN, php: PUSH_PLAN,
+      pla: PULL_PLAN, plp: PULL_PLAN
+    }.freeze
+
+    # Everything the CPU needs to run one opcode:
+    # - +operation+: the instruction method to call, such as :lda
+    # - +plan+: the step to run on each cycle
+    # - +writes+: which of those steps write to memory
+    # - +optional_dummy+: true for indexed reads, which skip the extra
+    #   cycle unless indexing crosses a page
+    Microcode = Struct.new(:operation, :plan, :writes, :optional_dummy) do
+      def self.table
+        Array.new(256) do |opcode|
+          instruction = Instruction.find(opcode)
+          raise InvalidOpcodeError, format("$%02x", opcode) unless instruction
+
+          build(instruction)
+        end.freeze
+      end
+
+      def self.write_mask(plan)
+        plan.map { |step| WRITE_STEPS.include?(step) }.freeze
+      end
+
+      def self.build(instruction)
+        plan = plan_for(instruction)
+        new(instruction.name, plan, write_mask(plan),
+            instruction.boundary_cycle?)
+      end
+
+      def self.plan_for(instruction)
+        case instruction.name
+        when :jmp
+          if instruction.addressing_mode == :indirect
+            JMP_INDIRECT_PLAN
+          else
+            JMP_ABSOLUTE_PLAN
+          end
+        when *BRANCHES then BRANCH_PLAN
+        else SPECIAL_PLANS[instruction.name] || addressed_plan(instruction)
+        end
+      end
+
+      def self.addressed_plan(instruction)
+        mode = instruction.addressing_mode
+        case mode
+        when :implied then IMPLIED_PLAN
+        when :accumulator then ACCUMULATOR_PLAN
+        when :immediate then IMMEDIATE_PLAN
+        else
+          [:op_fetch, *ADDRESSING_STEPS.fetch(mode),
+           *OPERATION_STEPS.fetch(operation_kind(instruction.name))].freeze
+        end
+      end
+
+      def self.operation_kind(name)
+        return :write if STORES.include?(name)
+        return :rmw if READ_MODIFY_WRITES.include?(name)
+
+        :read
+      end
+
+      private_class_method :build, :plan_for, :addressed_plan, :operation_kind
+    end
+
+    FETCH_WRITES = Microcode.write_mask(FETCH_PLAN)
+    INTERRUPT_WRITES = Microcode.write_mask(INTERRUPT_PLAN)
+    JAMMED_WRITES = Microcode.write_mask(JAMMED_PLAN)
+    MICROCODE = Microcode.table
+  end
+end

data/lib/badline/cpu/operations.rb

@@ -0,0 +1,88 @@
+# frozen_string_literal: true
+
+module Badline
+  class CPU
+    # Steps that read or write an instruction's operand once its address is
+    # known, plus the branch and JAM steps.
+    module Operations
+      private
+
+      def op_mem_read
+        send(@operation, @address, @memory.peek(@address))
+        end_instruction
+      end
+
+      def op_mem_write
+        send(@operation, @address, nil)
+        end_instruction
+      end
+
+      # Read-modify-write instructions (ASL, INC and the like) take three
+      # cycles here: read the value and compute the result, write the
+      # original value back, then write the result. The instruction method
+      # hands the result over through #write_modified.
+      def op_rmw_read
+        @value = @memory.peek(@address)
+        send(@operation, @address, @value)
+      end
+
+      def op_rmw_write_original
+        @memory.poke(@address, @value)
+      end
+
+      def op_rmw_write_result
+        @memory.poke(@address, @rmw_result)
+        end_instruction
+      end
+
+      def op_relative
+        offset = @memory.peek(@program_counter)
+        @program_counter = (@program_counter + 1) & 0xffff
+        @address = (@program_counter + signed_int8(offset)) & 0xffff
+        @branch_taken = false
+        send(@operation, @address, nil)
+        if @branch_taken
+          # A taken branch within the same page doesn't poll on its last cycle.
+          @skip_poll = true if same_page?
+        else
+          end_instruction
+        end
+      end
+
+      def op_branch
+        @memory.peek(@program_counter)
+        return unless same_page?
+
+        @program_counter = @address
+        end_instruction
+      end
+
+      # A branch to another page spends an extra cycle reading from the target's low byte on the old page.
+      def op_branch_fixup
+        @memory.peek((@program_counter & 0xff00) | (@address & 0xff))
+        @program_counter = @address
+        end_instruction
+      end
+
+      def same_page?
+        @address >> 8 == @program_counter >> 8
+      end
+
+      # Runs once for each address in JAM_ADDRESSES. By the time a step runs, @index already points at the next one.
+      def op_jam
+        position = @index - 2
+        @memory.peek(JAM_ADDRESSES[position - 1])
+        return unless position == JAM_ADDRESSES.length
+
+        @plan = JAMMED_PLAN
+        @writes = JAMMED_WRITES
+        @index = 0
+      end
+
+      def op_jammed
+        @index = 0
+        @memory.peek(0xffff)
+      end
+    end
+  end
+end

data/lib/badline/cpu/stack_operations.rb

@@ -0,0 +1,82 @@
+# frozen_string_literal: true
+
+module Badline
+  class CPU
+    # Steps that use the stack: PHA, PHP, PLA, PLP, JSR, RTS and RTI.
+    module StackOperations
+      private
+
+      def op_push_exec
+        send(@operation, nil, nil)
+        end_instruction
+      end
+
+      def op_pull_dummy
+        @memory.peek(stack_address)
+      end
+
+      def op_pull_exec
+        send(@operation, nil, nil)
+        end_instruction
+      end
+
+      def op_pull_low
+        @stack_pointer = (@stack_pointer + 1) & 0xff
+        @address = @memory.peek(stack_address)
+      end
+
+      def op_pull_high
+        @stack_pointer = (@stack_pointer + 1) & 0xff
+        @address |= @memory.peek(stack_address) << 8
+      end
+
+      def op_rts_fixup
+        @memory.peek(@address)
+        @program_counter = (@address + 1) & 0xffff
+        end_instruction
+      end
+
+      def op_rti_pull_status
+        @stack_pointer = (@stack_pointer + 1) & 0xff
+        @status.value = @memory.peek(stack_address)
+        @status.break = false
+      end
+
+      def op_rti_pull_high
+        @stack_pointer = (@stack_pointer + 1) & 0xff
+        @program_counter = @address | (@memory.peek(stack_address) << 8)
+        end_instruction
+      end
+
+      def op_jsr_low
+        @address = @memory.peek(@program_counter)
+        @program_counter = (@program_counter + 2) & 0xffff
+      end
+
+      def op_jsr_dummy
+        @memory.peek(stack_address)
+      end
+
+      def op_jsr_push_high
+        @memory.poke(stack_address, high_byte(return_address))
+      end
+
+      def op_jsr_push_low
+        @memory.poke(stack_address(-1), low_byte(return_address))
+        @stack_pointer = (@stack_pointer - 2) & 0xff
+      end
+
+      # JSR reads its target's high byte after pushing the return address.
+      # A JSR running from the stack page can overwrite its own operand
+      # with that push, and then jumps to the overwritten address.
+      def op_jsr_high
+        @program_counter = @address | (@memory.peek(return_address) << 8)
+        end_instruction
+      end
+
+      def return_address
+        (@program_counter - 1) & 0xffff
+      end
+    end
+  end
+end