avruby 0.5.1

data/lib/avr/port.rb

@@ -0,0 +1,107 @@
+# typed: strict
+# frozen_string_literal: true
+
+module AVR
+  class Port
+    extend T::Sig
+
+    PINS = T.let((0..7).to_a.freeze, T::Array[Integer])
+
+    sig { returns(CPU) }
+    attr_reader :cpu
+
+    sig { returns(T.any(Symbol, String)) }
+    attr_reader :name
+
+    sig do
+      params(
+        cpu: CPU,
+        name: T.any(Symbol, String),
+        pin_address: Integer,
+        ddr_address: Integer,
+        port_address: Integer
+      ).void
+    end
+    def initialize(cpu, name, pin_address, ddr_address, port_address)
+      @cpu = cpu
+      @name = name
+      @input = T.let(PINS.map { :Z }, T::Array[Symbol])
+      @pin_address = pin_address
+      @ddr_address = ddr_address
+      @port_address = port_address
+      @sram_watch = T.let(
+        Memory::Watch.new do |_memory_byte, _old_value, _new_value|
+          # puts "Port watch fired"
+        end,
+        Memory::Watch
+      )
+      @cpu.sram.push_watch(@sram_watch, [@ddr_address, @port_address])
+    end
+
+    sig { returns(MemoryByte) }
+    def pin
+      T.must(cpu.sram.memory[@pin_address])
+    end
+
+    sig { returns(MemoryByte) }
+    def ddr
+      T.must(cpu.sram.memory[@ddr_address])
+    end
+
+    sig { returns(MemoryByte) }
+    def port
+      T.must(cpu.sram.memory[@port_address])
+    end
+
+    sig { params(pin: Integer, state: Symbol).returns(Symbol) }
+    def pin_input(pin, state)
+      raise unless %i[H L Z].include?(state)
+
+      @input[pin] = state
+    end
+
+    sig do
+      params(
+        pin: Integer,
+        _pin_value: Integer,
+        ddr_value: Integer,
+        port_value: Integer
+      ).returns(Symbol)
+    end
+    def pin_state(pin, _pin_value, ddr_value, port_value)
+      n_bv = 1 << pin
+      drive = (ddr_value & n_bv) == n_bv
+      state = (port_value & n_bv) == n_bv
+
+      return (state ? :H : :L) if drive
+
+      @input.fetch(pin)
+    end
+
+    sig { returns(T::Array[Symbol]) }
+    def pin_states
+      pin_value = pin.value
+      ddr_value = ddr.value
+      port_value = port.value
+
+      PINS.map { |n| pin_state(n, pin_value, ddr_value, port_value) }
+    end
+
+    sig { returns(String) }
+    def value_pins
+      PINS.zip(pin_states).map { |n, s| "P#{n}=#{s}" }.join(', ')
+    end
+
+    sig { returns(Integer) }
+    def value
+      sum = 0
+      pin_states.each_with_index { |n, i| sum += (n == :H ? 1 : 0) * (2**i).to_i }
+      sum
+    end
+
+    sig { returns(String) }
+    def inspect
+      "#<#{self.class.name} #{value_pins}>"
+    end
+  end
+end

data/lib/avr/register.rb

@@ -0,0 +1,18 @@
+# typed: strict
+# frozen_string_literal: true
+
+module AVR
+  class Register < Value
+    extend T::Sig
+
+    sig { returns(CPU) }
+    attr_reader :cpu
+
+    sig { params(cpu: CPU, name: T.any(String, Symbol)).void }
+    def initialize(cpu, name)
+      super()
+      @cpu = cpu
+      @name = name
+    end
+  end
+end

data/lib/avr/register/memory_byte_register.rb

@@ -0,0 +1,27 @@
+# typed: strict
+# frozen_string_literal: true
+
+module AVR
+  class MemoryByteRegister < Register
+    extend T::Sig
+
+    sig { returns(MemoryByte) }
+    attr_reader :memory_byte
+
+    sig { params(cpu: CPU, name: T.any(Symbol, String), memory_byte: MemoryByte).void }
+    def initialize(cpu, name, memory_byte)
+      super(cpu, name)
+      @memory_byte = memory_byte
+    end
+
+    sig { returns(Integer) }
+    def value
+      memory_byte.value
+    end
+
+    sig { params(new_value: Integer).void }
+    def value=(new_value)
+      memory_byte.value = new_value
+    end
+  end
+end

data/lib/avr/register/memory_byte_register_with_named_bits.rb

@@ -0,0 +1,85 @@
+# typed: true
+# frozen_string_literal: true
+
+module AVR
+  class MemoryByteRegisterWithNamedBits < MemoryByteRegister
+    attr_reader :bit_names
+
+    def initialize(cpu, name, memory_byte, bit_names)
+      super(cpu, name, memory_byte)
+      @bit_names = bit_names
+      @bit_names_bv = @bit_names.each_with_index.each_with_object({}) { |(b, i), h| h[b] = 2**i if b }
+
+      @bit_names_bv.each do |bit_name, bit_value|
+        define_singleton_method(bit_name, proc { (value & bit_value) == bit_value })
+
+        define_singleton_method((bit_name.to_s + '=').to_sym, proc { |new_value|
+          if [true, 1].include?(new_value)
+            self.value |= bit_value
+          elsif [false, 0].include?(new_value)
+            self.value &= ~bit_value
+          else
+            raise "Bad value #{new_value} for bit #{bit_name}"
+          end
+        })
+      end
+    end
+
+    def fetch(name)
+      send(name)
+    end
+
+    def fetch_bit(name)
+      fetch(name) ? 1 : 0
+    end
+
+    def mask_for_flags(flags)
+      mask = 0
+      flags.each { |flag| mask |= @bit_names_bv[flag] }
+      mask
+    end
+
+    def bit_values
+      @bit_names.reject(&:nil?).map { |name| name.to_s + '=' + (send(name) ? '1' : '0') }.join(', ')
+    end
+
+    def hash_for_value(value)
+      @bit_names_bv.each_with_object({}) { |(name, bv), hash| hash[name] = (value & bv != 0) }
+    end
+
+    def value_for_hash(hash)
+      mask = 0
+      sum = 0
+      hash.each do |name, status|
+        mask |= @bit_names_bv[name]
+        sum |= @bit_names_bv[name] if [true, 1].include?(status)
+      end
+      [mask, sum]
+    end
+
+    def reset
+      self.value = 0
+    end
+
+    def from_h(hash)
+      mask, sum = value_for_hash(hash)
+      self.value = (value & ~mask) | sum
+      self
+    end
+
+    def inspect
+      "#<#{self.class.name} #{bit_values}>"
+    end
+
+    def diff_values(old_value, new_value)
+      diff_mask = old_value ^ new_value
+      diff_strings = []
+      @bit_names_bv.each do |flag, mask|
+        old_bit = (old_value & mask) != 0 ? 1 : 0
+        new_bit = (new_value & mask) != 0 ? 1 : 0
+        diff_strings << "#{flag}=#{old_bit}->#{new_bit}" if diff_mask & mask != 0
+      end
+      '[' + diff_strings.join(', ') + ']'
+    end
+  end
+end

data/lib/avr/register/register_file.rb

@@ -0,0 +1,59 @@
+# typed: true
+# frozen_string_literal: true
+
+module AVR
+  class RegisterFile
+    def add(register)
+      @registers[register.name] = register
+      @cpu.send(:define_singleton_method, register.name.to_sym, proc { register })
+      @cpu.send(:define_singleton_method, (register.name.to_s + '=').to_sym, proc { |value| register.value = value })
+      @register_list << register.name
+      return unless register.is_a?(RegisterPair)
+
+      @word_register_map[register.l] = register
+      @word_register_map[register.h] = register
+    end
+
+    attr_reader :registers
+    attr_reader :word_register_map
+
+    def initialize(cpu)
+      @cpu = cpu
+      @registers = {}
+      @word_register_map = {}
+      @register_list = []
+    end
+
+    def reset
+      @registers.each_value do |register|
+        register.value = 0
+      end
+    end
+
+    def register_values
+      @register_list.map { |name| @registers[name].to_s }.join(', ')
+    end
+
+    def print_status
+      @register_list.each_slice(8) do |slice|
+        puts slice.map { |name| '%10s' % ["#{name}=#{@registers[name].value_hex}"] }.join + '\n'
+      end
+    end
+
+    def fetch(key)
+      @registers.fetch(@register_list.fetch(key)) if key.is_a?(Integer)
+    end
+
+    def [](key)
+      @registers[@register_list[key]] if key.is_a?(Integer)
+    end
+
+    def associated_word_register(register)
+      @word_register_map[register]
+    end
+
+    def inspect
+      "#<#{self.class.name} #{register_values}>"
+    end
+  end
+end

data/lib/avr/register/register_pair.rb

@@ -0,0 +1,46 @@
+# typed: strict
+# frozen_string_literal: true
+
+# rubocop:disable Naming/MethodParameterName
+module AVR
+  class RegisterPair < Register
+    extend T::Sig
+
+    sig { returns(MemoryByteRegister) }
+    attr_reader :l
+
+    sig { returns(MemoryByteRegister) }
+    attr_reader :h
+
+    sig do
+      params(
+        cpu: CPU,
+        l: MemoryByteRegister,
+        h: MemoryByteRegister,
+        name: T.nilable(T.any(Symbol, String))
+      ).void
+    end
+    def initialize(cpu, l, h, name = nil)
+      super(cpu, name || "Temporary[#{l.name}, #{h.name}]")
+      @l = l
+      @h = h
+    end
+
+    sig { returns(String) }
+    def format
+      '%04x'
+    end
+
+    sig { returns(Integer) }
+    def value
+      (h.value << 8) | l.value
+    end
+
+    sig { params(new_value: Integer).void }
+    def value=(new_value)
+      h.value = (new_value & 0xff00) >> 8
+      l.value = (new_value & 0x00ff)
+    end
+  end
+end
+# rubocop:enable Naming/MethodParameterName

data/lib/avr/register/sp.rb

@@ -0,0 +1,41 @@
+# typed: strict
+# frozen_string_literal: true
+
+module AVR
+  class SP < RegisterPair
+    extend T::Sig
+
+    sig do
+      params(
+        cpu: CPU,
+        l_memory_byte: MemoryByte,
+        h_memory_byte: MemoryByte,
+        initial_value: Integer
+      ).void
+    end
+    def initialize(cpu, l_memory_byte, h_memory_byte, initial_value)
+      super(
+        cpu,
+        MemoryByteRegister.new(cpu, 'SPL', l_memory_byte),
+        MemoryByteRegister.new(cpu, 'SPH', h_memory_byte),
+        'SP'
+      )
+      self.value = initial_value
+    end
+
+    sig { params(offset: Integer).returns(Integer) }
+    def adjust(offset)
+      self.value += offset
+    end
+
+    sig { params(by: Integer).returns(Integer) }
+    def decrement(by = 1)
+      adjust(-by)
+    end
+
+    sig { params(by: Integer).returns(Integer) }
+    def increment(by = 1)
+      adjust(+by)
+    end
+  end
+end

data/lib/avr/register/sreg.rb

@@ -0,0 +1,12 @@
+# typed: true
+# frozen_string_literal: true
+
+module AVR
+  class SREG < MemoryByteRegisterWithNamedBits
+    STATUS_BITS = T.let(%i[C Z N V S H T I].freeze, T::Array[Symbol])
+
+    def initialize(cpu)
+      super(cpu, 'SREG', cpu.sram.memory[cpu.device.data_memory_map[:SREG]], STATUS_BITS)
+    end
+  end
+end

data/lib/avr/register_with_bit_number.rb

@@ -0,0 +1,40 @@
+# typed: strict
+# frozen_string_literal: true
+
+module AVR
+  class RegisterWithBitNumber < Value
+    extend T::Sig
+
+    sig { returns(MemoryByteRegister) }
+    attr_reader :register
+
+    sig { returns(Integer) }
+    attr_reader :bit_number
+
+    sig { returns(Integer) }
+    attr_reader :bit_mask
+
+    sig { params(register: MemoryByteRegister, bit_number: Integer).void }
+    def initialize(register, bit_number)
+      @register = register
+      @bit_number = bit_number
+      @bit_mask = T.let(1<<bit_number, Integer)
+      super()
+    end
+
+    sig { returns(Integer) }
+    def value
+      (register.value & bit_mask) >> bit_number
+    end
+
+    sig { params(new_value: Integer).void }
+    def value=(new_value)
+      register.value |= (new_value << bit_number) & bit_mask
+    end
+
+    sig { returns(String) }
+    def name
+      "#{register.name}.#{bit_number}"
+    end
+  end
+end

data/lib/avr/register_with_displacement.rb

@@ -0,0 +1,31 @@
+# typed: strict
+# frozen_string_literal: true
+
+require 'forwardable'
+
+module AVR
+  class RegisterWithDisplacement < Value
+    extend Forwardable
+    extend T::Sig
+
+    sig { returns(Register) }
+    attr_reader :register
+
+    def_delegators :register, :value, :value=
+
+    sig { returns(Integer) }
+    attr_reader :displacement
+
+    sig { params(register: Register, displacement: Integer).void }
+    def initialize(register, displacement)
+      @register = register
+      @displacement = displacement
+      super()
+    end
+
+    sig { returns(String) }
+    def name
+      "%s%+d" % [register.name, displacement]
+    end
+  end
+end