HDLRuby 3.9.0 → 3.9.3
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/README.html +4121 -4648
- data/README.md +117 -105
- data/ext/hruby_sim/hruby_rcsim_build.c +2 -0
- data/ext/hruby_sim/hruby_sim.h +6 -0
- data/ext/hruby_sim/hruby_sim_calc.c +67 -0
- data/lib/HDLRuby/hdr_samples/with_henumerable.rb +281 -258
- data/lib/HDLRuby/hdr_samples/with_to_svg.rb +37 -0
- data/lib/HDLRuby/hdr_samples/with_unary_reduction.rb +23 -0
- data/lib/HDLRuby/hdr_samples/with_values.rb +4 -0
- data/lib/HDLRuby/hdrcc.rb +3 -0
- data/lib/HDLRuby/hruby_bstr.rb +2 -1
- data/lib/HDLRuby/hruby_high.rb +35 -7
- data/lib/HDLRuby/hruby_low.rb +52 -87
- data/lib/HDLRuby/hruby_low_split_signals.rb +213 -0
- data/lib/HDLRuby/hruby_types.rb +6 -2
- data/lib/HDLRuby/hruby_viz.rb +359 -166
- data/lib/HDLRuby/std/hruby_enum.rb +104 -28
- data/lib/HDLRuby/std/sequencer.rb +17 -3
- data/lib/HDLRuby/verilog_hruby.rb +70 -28
- data/lib/HDLRuby/verilog_parser.rb +38 -18
- data/lib/HDLRuby/version.rb +1 -1
- metadata +5 -2
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@@ -0,0 +1,23 @@
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1
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+
# Sample code for testing unary reduction operators.
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+
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system :with_unary_reduction do
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[8].inner :val
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inner :red0, :red1
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+
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red0 <= val.|()
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red1 <= val.&()
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+
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timed do
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val <= 0
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!10.ns
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val <= 1
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!10.ns
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val <= 2
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!10.ns
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val <= 3
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!10.ns
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val <= 255
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!10.ns
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end
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end
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@@ -9,6 +9,8 @@ system :with_values do
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[64].inner :v64
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[96].inner :v96
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_CST = _u8b1111_0000
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timed do
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v1 <= _b0
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@@ -71,5 +73,7 @@ system :with_values do
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!10.ns
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v96 <= 0x1000000000000000000
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!10.ns
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v8 <= _CST
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!10.ns
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end
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end
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data/lib/HDLRuby/hdrcc.rb
CHANGED
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@@ -1079,6 +1079,9 @@ elsif $options[:vhdl] then
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end
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1080
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end
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elsif $options[:svg] then
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# Requires to split the signals for better visibility and routability.
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require "HDLRuby/hruby_low_split_signals.rb"
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$top_system.split_signals
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# Requires the viz library.
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require "HDLRuby/hruby_viz.rb"
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# Generate the viz structure.
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data/lib/HDLRuby/hruby_bstr.rb
CHANGED
data/lib/HDLRuby/hruby_high.rb
CHANGED
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@@ -934,10 +934,16 @@ module HDLRuby::High
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if condition.respond_to?(:to_i) then
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# The hif can be evaluate straight away. Do metaprograming.
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if condition.to_i != 0 then
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caught = false
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HDLRuby::High.top_user.sub do
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-
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caught = true
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catch(:HDLRubyThrow) do
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ruby_block.call
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caught = false
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end
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end
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@metacond = :hif
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throw(:HDLRubyThrow) if caught
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else
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@metacond = :helse
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end
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@@ -956,10 +962,16 @@ module HDLRuby::High
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return :toif unless condition.respond_to?(:to_i)
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# The hif can be evaluate straight away. Do metaprograming.
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if condition.to_i != 0 then
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caught = false
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HDLRuby::High.top_user.sub do
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-
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caught = true
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catch(:HDLRubyThrow) do
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ruby_block.call
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caught = false
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end
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end
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@metacond = :hif
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throw(:HDLRubyThrow) if caught
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else
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@metacond = :helse
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end
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@@ -990,10 +1002,16 @@ module HDLRuby::High
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if @metavalue and match.respond_to?(:to_i) then
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# The hwen can be evaluate straight away. Do metaprograming.
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if @metavalue == match.to_i then
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caught = false
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HDLRuby::High.top_user.sub do
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-
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caught = true
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catch(:HDLRubyThrow) do
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ruby_block.call
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caught = false
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end
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end
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@metacond = :hwhen
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throw(:HDLRubyThrow) if caught
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else
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1016
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@metacond = :helse
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end
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@@ -1008,11 +1026,17 @@ module HDLRuby::High
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if @metacond then
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if @metacond == :helse then
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if ruby_block then
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caught = false
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HDLRuby::High.top_user.sub do
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-
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caught = true
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catch(:HDLRubyThrow) do
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ruby_block.call
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caught = false
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end
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end
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end
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@metacond = nil
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throw(:HDLRubyThrow) if caught
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end
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return true
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end
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@@ -3273,14 +3297,18 @@ module HDLRuby::High
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end
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end
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-
# Adds the binary operations generation.
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# Adds the binary or unary-reduction operations generation.
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[:"+",:"-",:"*",:"/",:"%",:"**",
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:"&",:"|",:"^",
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:"<<",:">>",# :ls,:rs,:lr,:rr, # ls, rs lr and rr are treated separately
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:"==",:"!=",:"<",:">",:"<=",:">="].each do |operator|
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-
meth = proc do |right|
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meth = proc do |right = nil|
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expr = self.to_expr
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-
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if right then
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return expr.type.binary(operator,expr,right.to_expr)
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else
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return expr.type.unary(operator,expr)
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end
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3312
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end
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# Defines the operator method.
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define_method(operator,&meth)
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data/lib/HDLRuby/hruby_low.rb
CHANGED
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@@ -419,15 +419,15 @@ module HDLRuby::Low
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return @inouts[name.to_sym]
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end
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-
# # Gets an inner signal by +name+.
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# def get_inner(name)
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# return @inners[name.to_sym]
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# end
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-
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# Gets a signal by +name+.
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def get_signal(name)
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429
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-
return get_input(name) || get_output(name) || get_inout(name)
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-
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return get_input(name) || get_output(name) || get_inout(name)
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end
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# Gets a signal by +name+ up to the systemT.
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# Here it is a systemT, so stop here if not found.
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def get_signal_up(name)
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return self.get_signal(name)
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431
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end
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# Gets an interface signal by order of declaration +i+.
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@@ -435,41 +435,6 @@ module HDLRuby::Low
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return @interface[i]
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end
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# # Deletes input +signal+.
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# def delete_input(signal)
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# if @inputs.key?(signal) then
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# # The signal is present, delete it.
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# @inputs.delete(signal.name)
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# @interface.delete(signal)
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# # And remove its parent.
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# signal.parent = nil
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# end
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# signal
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# end
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-
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# # Deletes output +signal+.
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# def delete_output(signal)
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# if @outputs.key?(signal) then
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# # The signal is present, delete it.
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# @outputs.delete(signal.name)
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# @interface.delete(signal)
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# # And remove its parent.
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# signal.parent = nil
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# end
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# signal
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# end
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-
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# # Deletes inout +signal+.
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463
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# def delete_inout(signal)
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# if @inouts.key?(signal) then
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# # The signal is present, delete it.
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# @inouts.delete(signal.name)
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# @interface.delete(signal)
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# # And remove its parent.
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# signal.parent = nil
|
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# end
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# signal
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# end
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# Iterates over each object deeply.
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#
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@@ -993,56 +958,20 @@ module HDLRuby::Low
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958
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return @inners[name.to_sym]
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959
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end
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995
960
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996
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-
# ## Gets a signal by +path+.
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997
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# #
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998
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# # NOTE: +path+ can also be a single name or a reference object.
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999
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# def get_signal(path)
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1000
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# path = path.path_each if path.respond_to?(:path_each) # Ref case.
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1001
|
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# if path.respond_to?(:each) then
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1002
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# # Path is iterable: look for the first name.
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1003
|
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# path = path.each
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1004
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# name = path.each.next
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1005
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# # Maybe it is a system instance.
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1006
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# systemI = self.get_systemI(name)
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1007
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# if systemI then
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1008
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# # Yes, look for the remaining of the path into the
|
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1009
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# # corresponding system type.
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1010
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# return systemI.systemT.get_signal(path)
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1011
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-
# else
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1012
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# # Maybe it is a signal name.
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1013
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# return self.get_signal(name)
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1014
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# end
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1015
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# else
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1016
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# # Path is a single name, look for the signal in the system's
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1017
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# # Try in the inputs.
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1018
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# signal = get_input(path)
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# return signal if signal
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1020
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# # Try in the outputs.
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1021
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# signal = get_output(path)
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1022
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# return signal if signal
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1023
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# # Try in the inouts.
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1024
|
-
# signal = get_inout(path)
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1025
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# return signal if signal
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1026
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# # Not found yet, look into the inners.
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1027
|
-
# return get_inner(path)
|
|
1028
|
-
# end
|
|
1029
|
-
# end
|
|
1030
|
-
|
|
1031
961
|
# Gets an inner signal by +name+, equivalent to get_inner.
|
|
1032
962
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def get_signal(name)
|
|
1033
963
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return @inners[name]
|
|
1034
964
|
end
|
|
1035
965
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1036
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-
#
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1037
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-
#
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1038
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-
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1039
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-
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1040
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-
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1041
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-
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1042
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-
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1043
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-
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1044
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-
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1045
|
-
# end
|
|
966
|
+
# Gets a signal by +name+ up to the systemT.
|
|
967
|
+
# Here it is a systemT, so stop here if not found.
|
|
968
|
+
def get_signal_up(name)
|
|
969
|
+
# Maybe its an inner.
|
|
970
|
+
sig = self.get_inner(name)
|
|
971
|
+
# If not, look in the parent.
|
|
972
|
+
sig = self.parent.get_signal(name) unless sig
|
|
973
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+
return sig
|
|
974
|
+
end
|
|
1046
975
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1047
976
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# Handling the connections.
|
|
1048
977
|
|
|
@@ -2556,6 +2485,13 @@ module HDLRuby::Low
|
|
|
2556
2485
|
def parent_system
|
|
2557
2486
|
return self.top_scope.parent
|
|
2558
2487
|
end
|
|
2488
|
+
|
|
2489
|
+
# Gets a signal by +name+ up to the systemT.
|
|
2490
|
+
# Here it is a systemT, so stop here if not found.
|
|
2491
|
+
def get_signal_up(name)
|
|
2492
|
+
# Look in the parent.
|
|
2493
|
+
return self.parent.get_signal(name)
|
|
2494
|
+
end
|
|
2559
2495
|
end
|
|
2560
2496
|
|
|
2561
2497
|
|
|
@@ -2710,6 +2646,24 @@ module HDLRuby::Low
|
|
|
2710
2646
|
false
|
|
2711
2647
|
end
|
|
2712
2648
|
|
|
2649
|
+
# Give the direction of the signal if possible.
|
|
2650
|
+
def direction
|
|
2651
|
+
# No parent? No direction.
|
|
2652
|
+
return nil unless self.parent
|
|
2653
|
+
if self.parent.is_a?(Block) or self.parent.is_a?(Scope) then
|
|
2654
|
+
# Inner direction.
|
|
2655
|
+
return :inner
|
|
2656
|
+
else
|
|
2657
|
+
if parent.get_input(self.name) then
|
|
2658
|
+
return :input
|
|
2659
|
+
elsif parent.get_output(self.name) then
|
|
2660
|
+
return :output
|
|
2661
|
+
else
|
|
2662
|
+
return :inout
|
|
2663
|
+
end
|
|
2664
|
+
end
|
|
2665
|
+
end
|
|
2666
|
+
|
|
2713
2667
|
# Adds sub signal +sig+
|
|
2714
2668
|
def add_signal(sig)
|
|
2715
2669
|
# puts "add sub=#{sig.name} in signal=#{self}"
|
|
@@ -2938,6 +2892,7 @@ module HDLRuby::Low
|
|
|
2938
2892
|
:each_signal, :each_signal_deep,
|
|
2939
2893
|
:get_input, :get_output, :get_inout, :get_inner,
|
|
2940
2894
|
:get_signal, :get_interface,
|
|
2895
|
+
:get_signal_up,
|
|
2941
2896
|
:each_systemI, :get_systemI,
|
|
2942
2897
|
:each_connection, :each_connection_deep,
|
|
2943
2898
|
:each_statement_deep, :each_arrow_deep,
|
|
@@ -4700,6 +4655,16 @@ module HDLRuby::Low
|
|
|
4700
4655
|
end
|
|
4701
4656
|
alias_method :get_signal, :get_inner
|
|
4702
4657
|
|
|
4658
|
+
# Gets a signal by +name+ up to the systemT.
|
|
4659
|
+
# Here it is a systemT, so stop here if not found.
|
|
4660
|
+
def get_signal_up(name)
|
|
4661
|
+
# Maybe its an inner.
|
|
4662
|
+
sig = self.get_inner(name)
|
|
4663
|
+
# If not, look in the parent.
|
|
4664
|
+
sig = self.parent.get_signal_up(name) unless sig
|
|
4665
|
+
return sig
|
|
4666
|
+
end
|
|
4667
|
+
|
|
4703
4668
|
# Iterates over all the signals of the block and its sub block's ones.
|
|
4704
4669
|
def each_signal_deep(&ruby_block)
|
|
4705
4670
|
# No ruby block? Return an enumerator.
|
|
@@ -0,0 +1,213 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
require 'HDLRuby/hruby_tools'
|
|
3
|
+
require 'HDLRuby/hruby_low_mutable'
|
|
4
|
+
require 'HDLRuby/hruby_low_with_bool'
|
|
5
|
+
|
|
6
|
+
|
|
7
|
+
module HDLRuby::Low
|
|
8
|
+
|
|
9
|
+
|
|
10
|
+
##
|
|
11
|
+
# Split signals with determined bit and range accesses.
|
|
12
|
+
#
|
|
13
|
+
########################################################################
|
|
14
|
+
|
|
15
|
+
|
|
16
|
+
class SystemT
|
|
17
|
+
|
|
18
|
+
# Get the signals than can be split, where they are used and their
|
|
19
|
+
# resulting sub signals.
|
|
20
|
+
# The result is to be put in the +res+ table.
|
|
21
|
+
def get_signal_splits(res = { })
|
|
22
|
+
# Search in the scope.
|
|
23
|
+
return self.scope.get_signal_splits(res)
|
|
24
|
+
end
|
|
25
|
+
|
|
26
|
+
# Split the signals of a system if they have determined bit or range
|
|
27
|
+
# accessed.
|
|
28
|
+
def split_signals(signals_splits = nil)
|
|
29
|
+
# puts "split_signals for systemT=#{self.name}"
|
|
30
|
+
# Gather the signals to split and their splitting.
|
|
31
|
+
signal_splits = self.get_signal_splits unless signals_splits
|
|
32
|
+
|
|
33
|
+
# Do the splitting.
|
|
34
|
+
signal_splits.each do |sig,splits|
|
|
35
|
+
# Get the owner of the signal.
|
|
36
|
+
owner = sig.parent
|
|
37
|
+
dir = sig.direction
|
|
38
|
+
# # Remove the signal from the owner since it is split.
|
|
39
|
+
# case dir
|
|
40
|
+
# when :input
|
|
41
|
+
# owner.delete_input!(sig)
|
|
42
|
+
# when :output
|
|
43
|
+
# owner.delete_output!(sig)
|
|
44
|
+
# when :inout
|
|
45
|
+
# owner.delete_inout!(sig)
|
|
46
|
+
# when :inner
|
|
47
|
+
# owner.delete_inner!(sig)
|
|
48
|
+
# end
|
|
49
|
+
|
|
50
|
+
# Add instead the corresponding sub signals.
|
|
51
|
+
splits.each do |idx,(sub,places)|
|
|
52
|
+
# puts "owner.class=#{owner.class} sub.class=#{sub.class}"
|
|
53
|
+
# In the owner.
|
|
54
|
+
case dir
|
|
55
|
+
when :input
|
|
56
|
+
owner.add_input(sub)
|
|
57
|
+
when :output
|
|
58
|
+
owner.add_output(sub)
|
|
59
|
+
when :inout
|
|
60
|
+
owner.add_input(sub)
|
|
61
|
+
when :inner
|
|
62
|
+
owner.add_inner(sub)
|
|
63
|
+
end
|
|
64
|
+
|
|
65
|
+
# Replace the references of the signal by its subs.
|
|
66
|
+
places.each do |place|
|
|
67
|
+
place.parent.map_nodes! do |node|
|
|
68
|
+
node == place ? HDLRuby::Low::RefName.new(Bit,RefThis.new,sub.name) : node
|
|
69
|
+
end
|
|
70
|
+
end
|
|
71
|
+
end
|
|
72
|
+
end
|
|
73
|
+
end
|
|
74
|
+
end
|
|
75
|
+
|
|
76
|
+
|
|
77
|
+
class Scope
|
|
78
|
+
# Get the signals than can be split, where they are used and their
|
|
79
|
+
# resulting sub signals.
|
|
80
|
+
# The result is to be put in the +res+ table.
|
|
81
|
+
def get_signal_splits(res = {})
|
|
82
|
+
# Search in the sub systems.
|
|
83
|
+
self.each_systemT { |sysT| sysT.get_signal_splits(res) }
|
|
84
|
+
# Search in the sub scopes.
|
|
85
|
+
self.each_scope { |scop| scop.get_signal_splits(res) }
|
|
86
|
+
# Search in the instances.
|
|
87
|
+
self.each_systemI { |sysI| sysI.get_signal_splits(res) }
|
|
88
|
+
# Search in the connections.
|
|
89
|
+
self.each_connection { |cnx| cnx.get_signal_splits(res) }
|
|
90
|
+
# Search in the behaviors.
|
|
91
|
+
self.each_behavior { |beh| beh.get_signal_splits(res) }
|
|
92
|
+
return res
|
|
93
|
+
end
|
|
94
|
+
end
|
|
95
|
+
|
|
96
|
+
|
|
97
|
+
class Behavior
|
|
98
|
+
# Get the signals than can be split, where they are used and their
|
|
99
|
+
# resulting sub signals.
|
|
100
|
+
# The result is to be put in the +res+ table.
|
|
101
|
+
def get_signal_splits(res = {})
|
|
102
|
+
# Recurse on the events.
|
|
103
|
+
self.each_event { |ev| ev.get_signal_splits(res) }
|
|
104
|
+
# Recurse on the block.
|
|
105
|
+
self.block.get_signal_splits(res)
|
|
106
|
+
return res
|
|
107
|
+
end
|
|
108
|
+
end
|
|
109
|
+
|
|
110
|
+
|
|
111
|
+
class Event
|
|
112
|
+
# Get the signals than can be split, where they are used and their
|
|
113
|
+
# resulting sub signals.
|
|
114
|
+
# The result is to be put in the +res+ table.
|
|
115
|
+
def get_signal_splits(res = {})
|
|
116
|
+
if self.ref.is_a?(RefIndex) and self.ref.ref.is_a?(RefName) and
|
|
117
|
+
self.ref.index.is_a?(Value) then
|
|
118
|
+
sigref = self.ref
|
|
119
|
+
# A split is found. Get the signal upward.
|
|
120
|
+
sig = self.parent.parent.get_signal_upward(self.ref.name)
|
|
121
|
+
sig.split_to_index(self.ref.index,res)
|
|
122
|
+
elsif self.ref.is_a?(RefRange) and self.ref.ref.is_a?(RefName) and
|
|
123
|
+
self.ref.range.first.is_a?(Value) and
|
|
124
|
+
self.ref.range.last.is_a?(Value) then
|
|
125
|
+
sigref = self.ref
|
|
126
|
+
# A split is found. Get the signal upward.
|
|
127
|
+
sig = self.parent.parent.get_signal_upward(self.ref.name)
|
|
128
|
+
sig.split_to_range(self.ref.range,res)
|
|
129
|
+
end
|
|
130
|
+
return res
|
|
131
|
+
end
|
|
132
|
+
end
|
|
133
|
+
|
|
134
|
+
|
|
135
|
+
class SystemI
|
|
136
|
+
# Get the signals than can be split, where they are used and their
|
|
137
|
+
# resulting sub signals.
|
|
138
|
+
# The result is to be put in the +res+ table.
|
|
139
|
+
def get_signal_splits(res = {})
|
|
140
|
+
return self.systemT.get_signal_splits(res)
|
|
141
|
+
end
|
|
142
|
+
end
|
|
143
|
+
|
|
144
|
+
|
|
145
|
+
class Statement
|
|
146
|
+
# Get the signals than can be split, where they are used and their
|
|
147
|
+
# resulting sub signals.
|
|
148
|
+
# The result is to be put in the +res+ table.
|
|
149
|
+
def get_signal_splits(res = {})
|
|
150
|
+
# Recurse on the sub statements.
|
|
151
|
+
self.each_statement_deep do |stmnt|
|
|
152
|
+
stmnt.each_node_deep do |expr|
|
|
153
|
+
if expr.is_a?(RefIndex) and expr.ref.is_a?(RefName) and
|
|
154
|
+
expr.index.is_a?(Value) then
|
|
155
|
+
# A split is found. Get the signal upward.
|
|
156
|
+
blk = self.block
|
|
157
|
+
sig = blk ? blk.get_signal_up(expr.ref.name) :
|
|
158
|
+
self.scope.get_signal_up(expr.ref.name)
|
|
159
|
+
sig.split_to_index(expr,expr.index,res)
|
|
160
|
+
elsif expr.is_a?(RefRange) and expr.ref.is_a?(RefName) and
|
|
161
|
+
expr.range.first.is_a?(Value) and
|
|
162
|
+
expr.range.last.is_a?(Value) then
|
|
163
|
+
# A split is found. Get the signal upward.
|
|
164
|
+
blk = self.block
|
|
165
|
+
sig = blk ? blk.get_signal_up(expr.ref.name) :
|
|
166
|
+
self.scope.get_signal_up(expr.ref.name)
|
|
167
|
+
sig.split_to_range(expr,expr.range,res)
|
|
168
|
+
end
|
|
169
|
+
end
|
|
170
|
+
end
|
|
171
|
+
return res
|
|
172
|
+
end
|
|
173
|
+
end
|
|
174
|
+
|
|
175
|
+
|
|
176
|
+
class SignalI
|
|
177
|
+
# Split the signal at place +place+ for +index+ and register it to
|
|
178
|
+
# +res+ table.
|
|
179
|
+
def split_to_index(place ,index, res)
|
|
180
|
+
index = index.to_i
|
|
181
|
+
entry = res[self]
|
|
182
|
+
unless entry then
|
|
183
|
+
entry = {}
|
|
184
|
+
res[self] = entry
|
|
185
|
+
end
|
|
186
|
+
split = entry[index]
|
|
187
|
+
unless split then
|
|
188
|
+
split = [SignalI.new(self.name.to_s + "[#{index}]",Bit), []]
|
|
189
|
+
entry[index] = split
|
|
190
|
+
end
|
|
191
|
+
split[1] << place
|
|
192
|
+
return res
|
|
193
|
+
end
|
|
194
|
+
|
|
195
|
+
# Split the signal at place +place+ for +index+ and register it to
|
|
196
|
+
# +res+ table.
|
|
197
|
+
def split_to_range(place ,range, res)
|
|
198
|
+
range = range.first.to_i..range.last.to_i
|
|
199
|
+
entry = res[self]
|
|
200
|
+
unless entry then
|
|
201
|
+
entry = {}
|
|
202
|
+
res[self] = entry
|
|
203
|
+
end
|
|
204
|
+
split = entry[range]
|
|
205
|
+
unless split then
|
|
206
|
+
split = [SignalI.new(self.name.to_s + "[#{range}]",Bit), []]
|
|
207
|
+
entry[range] = split
|
|
208
|
+
end
|
|
209
|
+
split[1] << place
|
|
210
|
+
return res
|
|
211
|
+
end
|
|
212
|
+
end
|
|
213
|
+
end
|
data/lib/HDLRuby/hruby_types.rb
CHANGED
|
@@ -156,7 +156,7 @@ module HDLRuby
|
|
|
156
156
|
|
|
157
157
|
|
|
158
158
|
# And
|
|
159
|
-
def &(type)
|
|
159
|
+
def &(type = nil)
|
|
160
160
|
# # puts "compute types with=#{self} and #{type}"
|
|
161
161
|
# # Resolve the type class.
|
|
162
162
|
# resolved = self.resolve(type)
|
|
@@ -178,7 +178,11 @@ module HDLRuby
|
|
|
178
178
|
# return resolved.make(:"",resolved.base,res_lsb..res_msb)
|
|
179
179
|
# end
|
|
180
180
|
# The result is the resolve result now!
|
|
181
|
-
|
|
181
|
+
if type then
|
|
182
|
+
return self.resolve(type)
|
|
183
|
+
else
|
|
184
|
+
return self
|
|
185
|
+
end
|
|
182
186
|
end
|
|
183
187
|
|
|
184
188
|
# Or
|