HDLRuby 3.2.0 → 3.3.0

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Files changed (44) hide show
  1. checksums.yaml +4 -4
  2. data/README.html +2330 -2670
  3. data/README.md +391 -101
  4. data/ext/hruby_sim/hruby_rcsim_build.c +400 -3
  5. data/ext/hruby_sim/hruby_sim.h +2 -1
  6. data/ext/hruby_sim/hruby_sim_calc.c +1 -1
  7. data/ext/hruby_sim/hruby_sim_core.c +15 -5
  8. data/ext/hruby_sim/hruby_sim_tree_calc.c +1 -1
  9. data/lib/HDLRuby/hdr_samples/c_program/echo.c +33 -0
  10. data/lib/HDLRuby/hdr_samples/ruby_program/echo.rb +9 -0
  11. data/lib/HDLRuby/hdr_samples/ruby_program/stdrw.rb +6 -0
  12. data/lib/HDLRuby/hdr_samples/ruby_program/sw_cpu_terminal.rb +614 -0
  13. data/lib/HDLRuby/hdr_samples/ruby_program/sw_inc_mem.rb +32 -0
  14. data/lib/HDLRuby/hdr_samples/ruby_program/sw_log.rb +33 -0
  15. data/lib/HDLRuby/hdr_samples/with_board.rb +63 -0
  16. data/lib/HDLRuby/hdr_samples/with_clocks.rb +42 -0
  17. data/lib/HDLRuby/hdr_samples/with_of.rb +1 -1
  18. data/lib/HDLRuby/hdr_samples/with_program_c.rb +28 -0
  19. data/lib/HDLRuby/hdr_samples/with_program_ruby.rb +28 -0
  20. data/lib/HDLRuby/hdr_samples/with_program_ruby_cpu.rb +234 -0
  21. data/lib/HDLRuby/hdr_samples/with_program_ruby_io.rb +23 -0
  22. data/lib/HDLRuby/hdr_samples/with_program_ruby_mem.rb +58 -0
  23. data/lib/HDLRuby/hdr_samples/with_program_ruby_threads.rb +56 -0
  24. data/lib/HDLRuby/hdr_samples/with_sequencer_func.rb +2 -4
  25. data/lib/HDLRuby/hdrcc.rb +60 -21
  26. data/lib/HDLRuby/hruby_error.rb +13 -0
  27. data/lib/HDLRuby/hruby_high.rb +50 -7
  28. data/lib/HDLRuby/hruby_low.rb +74 -30
  29. data/lib/HDLRuby/hruby_rcsim.rb +89 -5
  30. data/lib/HDLRuby/std/clocks.rb +118 -50
  31. data/lib/HDLRuby/std/std.rb +5 -0
  32. data/lib/HDLRuby/ui/hruby_board.rb +1079 -0
  33. data/lib/HDLRuby/version.rb +1 -1
  34. data/lib/c/Rakefile +8 -0
  35. data/lib/c/cHDL.h +12 -0
  36. data/lib/c/extconf.rb +7 -0
  37. data/lib/rubyHDL.rb +33 -0
  38. data/tuto/gui_accum.png +0 -0
  39. data/tuto/gui_board.png +0 -0
  40. data/tuto/tutorial_sw.html +2263 -1890
  41. data/tuto/tutorial_sw.md +957 -62
  42. metadata +24 -5
  43. data/README.pdf +0 -0
  44. data/tuto/tutorial_sw.pdf +0 -0
@@ -1,3 +1,3 @@
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  module HDLRuby
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- VERSION = "3.2.0"
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+ VERSION = "3.3.0"
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  end
data/lib/c/Rakefile ADDED
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+ require 'rake/extensiontask'
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+
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+ Rake::ExtensionTask.new do |ext|
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+ ext.name = C_PROGRAM
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+ ext.ext_dir = './'
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+ ext.lib_dir = './'
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+ end
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+
data/lib/c/cHDL.h ADDED
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+ /**
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+ * Interface for C program with HDLRuby hardware.
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+ **/
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+
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+ /** The wrapper for getting an interface port for C software. */
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+ extern void* c_get_port(const char* name);
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+
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+ /** The wrapper for getting a value from a port. */
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+ extern unsigned long long c_read_port(void* port);
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+
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+ /** The wrapper for setting a value to a port. */
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+ extern unsigned long long c_write_port(void* port, unsigned long long val);
data/lib/c/extconf.rb ADDED
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+ require 'mkmf'
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+
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+ append_ldflags("-L #{RCSIM_DIR} -l:hruby_sim.so") if Gem.win_platform?
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+
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+ # $LDFLAGS << " -L #{RCSIM_DIR} -l:hruby_sim.so" if Gem.win_platform?
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+
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+ create_makefile(C_PROGRAM)
data/lib/rubyHDL.rb ADDED
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+ require 'hruby_sim/hruby_sim'
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+
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+ ##
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+ # Module for accessing HDLRuby hardware from a ruby program excuted on
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+ # an embedded processor: HDLRuby simulator version.
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+ ########################################################################
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+ module RubyHDL
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+
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+ # Creates a new port 'name' assigned to signal 'sig' for reading.
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+ def self.inport(name,sig)
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+ # Create the accessing methods.
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+ # For reading.
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+ define_singleton_method(name.to_sym) do
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+ RCSim.rcsim_get_signal_fixnum(sig)
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+ end
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+ end
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+
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+ # Creates a new wport 'name' assigned to signal 'sig' for writing.
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+ def self.outport(name,sig)
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+ # For writing.
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+ define_singleton_method(:"#{name}=") do |val|
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+ RCSim.rcsim_transmit_fixnum_to_signal_seq(sig,val)
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+ end
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+ end
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+
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+ # Creates a new program 'name' assign to simulator code 'code'.
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+ def self.program(name,code)
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+ # Create the accessing method.
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+ define_singleton_method(name.to_sym) do
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+ code
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+ end
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+ end
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+ end
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