HDLRuby 2.2.15 → 2.3.2

data/lib/HDLRuby/hruby_verilog.rb

@@ -1630,12 +1630,20 @@ end
 # If it is signed, it outputs signed.
 # Enhance Type with generation of verilog code.
 class Type
-    # Converts the system to Verilog code.
+    # Converts the type to Verilog code.
     def to_verilog
         return self.name == :signed ? "#{self.name.to_s} " : ""
     end
 end
 
+# Replace type by refered type.
+class TypeDef
+    # Converts the type to verilog code.
+    def to_verilog
+        return self.def.to_verilog
+    end
+end
+
 # Use it when collecting.
 class Concat
     def to_verilog    

data/lib/HDLRuby/sim/hruby_sim.h

@@ -157,6 +157,13 @@ extern Value mul_value(Value src0, Value src1, Value dst);
  *  @return dst */
 extern Value div_value(Value src0, Value src1, Value dst);
 
+/** Computes the modulo of two general values.
+ *  @param src0 the first source value of the addition
+ *  @param src1 the second source value of the addition
+ *  @param dst the destination value
+ *  @return dst */
+extern Value mod_value(Value src0, Value src1, Value dst);
+
 /** Computes the not of a value.
  *  @param src the source value of the not
  *  @param dst the destination value

data/lib/HDLRuby/sim/hruby_sim_calc.c

@@ -5,6 +5,10 @@
 #include <limits.h>
 #include "hruby_sim.h"
 
+#ifndef alloca
+#define alloca(x)  __builtin_alloca(x)
+#endif
+
 
 /**
  *  The HDLRuby simulation calculation engine, to be used with C code
@@ -393,6 +397,9 @@ static Value set_undefined_bitstring(Value dst) {
 
     /* set the type and size of the destination. */
     dst->numeric = 0;
+    /* Ensures the buffer of dst has the write size (in cas it was a fromer
+     * numeric for example). */
+    resize_value(dst,width);
 
     /* Get access to the destination data. */
     char* dst_data = dst->data_str;
@@ -600,7 +607,7 @@ static Value mul_value_defined_bitstring(Value src0, Value src1, Value dst) {
     dst->type = src0->type;
     dst->numeric = 1;
 
-    /* Perform the addition. */
+    /* Perform the multiplication. */
     dst->data_int = value2integer(src0) * value2integer(src1);
     return dst;
 }
@@ -616,12 +623,29 @@ static Value div_value_defined_bitstring(Value src0, Value src1, Value dst) {
     dst->type = src0->type;
     dst->numeric = 1;
 
-    /* Perform the addition. */
+    /* Perform the division. */
     dst->data_int = value2integer(src0) / value2integer(src1);
     return dst;
 }
 
 
+/** Computes the modulo of two defined bitstring values.
+ *  @param src0 the first source value of the addition
+ *  @param src1 the second source value of the addition
+ *  @param dst the destination value
+ *  @return dst */
+static Value mod_value_defined_bitstring(Value src0, Value src1, Value dst) {
+    /* Sets state of the destination using the first source. */
+    dst->type = src0->type;
+    dst->numeric = 1;
+
+    /* Perform the modulo. */
+    // printf("modulo with src0=%lld src1=%lld, result=%lld\n",value2integer(src0),value2integer(src1),value2integer(src0) % value2integer(src1));
+    dst->data_int = value2integer(src0) % value2integer(src1);
+    return dst;
+}
+
+
 /** Computes the lesser comparision of two defined bitstring values.
  *  @param src0 the first source value of the addition
  *  @param src1 the second source value of the addition
@@ -1411,7 +1435,10 @@ fix_numeric_type(Type type, unsigned long long val) {
     /* Get the width of the type. */
     int width = type_width(type);
     /* Compute the base mask. */
-    unsigned long long mask = ((unsigned long long)(-1)) << width;
+    // unsigned long long mask = ((unsigned long long)(-1)) << width;
+    /* NOTE: (ull)-1 << 64 becomes (ull)-1 on Intel processors, this is
+     * totally not what I expected (I expected 0). */
+    unsigned long long mask = width == 64 ? 0 : ((unsigned long long)(-1)) << width;
     // printf("width=%i val=%llu mask=%llx\n",width,val,mask);
 
     /* Is the type signed? */
@@ -1512,6 +1539,23 @@ static Value div_value_numeric(Value src0, Value src1, Value dst) {
 }
 
 
+/** Computes the modulo of two numeric values.
+ *  @param src0 the first source value of the addition
+ *  @param src1 the second source value of the addition
+ *  @param dst the destination value
+ *  @return dst */
+static Value mod_value_numeric(Value src0, Value src1, Value dst) {
+    /* Sets state of the destination using the first source. */
+    dst->type = src0->type;
+    dst->numeric = 1;
+
+    /* Perform the division. */
+    // printf("modulo numeric with src0=%lld src1=%lld, result=%lld\n",src0->data_int, src1->data_int,src0->data_int % src1->data_int);
+    dst->data_int = fix_numeric_type(dst->type, src0->data_int % src1->data_int);
+    return dst;
+}
+
+
 /** Computes the NOT of a numeric value.
  *  @param src the source value of the not
  *  @param dst the destination value
@@ -1686,7 +1730,7 @@ static Value concat_value_numeric_array(int num, int dir,
     unsigned int i,pos;
     /* Compute the bit width of the destination. */
     unsigned int width = 0;
-    // printf("concat_value_numeric with dir=%d\n",dir);
+    // printf("concat_value_numeric with dir=%d and width=%llu\n",dir,type_width(args[0]->type));
     for(i=0; i<num; ++i) width += type_width(args[i]->type);
 
     /* Sets state of the destination using the bit width. */
@@ -1710,6 +1754,7 @@ static Value concat_value_numeric_array(int num, int dir,
         pos += arg_width;
     }
     /* Return the destination. */
+    // printf("Result is dst=%llx\n",dst->data_int);
     return dst;
 }
 
@@ -1720,6 +1765,7 @@ static Value concat_value_numeric_array(int num, int dir,
  *  @param dst the destination value
  *  @return dst */
 static Value cast_value_numeric(Value src, Type type, Value dst) {
+    // printf("cast_value_numeric with src=%llx",src->data_int);
     /* Copy the source to the destination. */
     dst->data_int = src->data_int;
     /* Update the destination type to the cast. */
@@ -1779,6 +1825,7 @@ static int same_content_value_range_numeric(Value value0,
  *  @return dst */
 Value read_range_numeric(Value value, long long first, long long last,
         Type base, Value dst) {
+    /* printf("read_range_numeric with value=%llx and first=%llu and last=%llu\n",value->data_int,first,last); */
     /* Ensure first is the smaller. */
     if (first > last) {
         long long tmp = last;
@@ -1791,15 +1838,18 @@ Value read_range_numeric(Value value, long long first, long long last,
     unsigned long long bw = type_width(base);
     /* Scale the range according to the base type. */
     first *= bw;
+    last  *= bw;
     length *= bw;
-    // printf("first=%lld last=%lld bw=%llu length=%lld\n",first,last,bw,length);
+    /* printf("first=%lld last=%lld bw=%llu length=%lld\n",first,last,bw,length); */
 
     /* Set the type and size of the destination from the type of the source.*/
     dst->type = make_type_vector(get_type_bit(),length);
     dst->numeric = 1;
 
     /* Compute the read mask. */
-    unsigned long long mask = ((-1LL) << first) & (~((-1LL) << (last+1)));
+    // unsigned long long mask = ((-1LL) << first) & (~((-1LL) << (last+1)));
+    /* NOTE: once again, << 64 does not work like expected. */
+    unsigned long long mask = mask+bw < 64 ? (~((-1LL) << (last+bw))) : -1LL;
     /* Performs the read. */
     unsigned long long data = (value->data_int & mask) >> first;
     /* Write it to the destination. */
@@ -1995,6 +2045,33 @@ Value div_value(Value src0, Value src1, Value dst) {
 }
 
 
+/** Computes the modulo of two general values.
+ *  @param src0 the first source value of the addition
+ *  @param src1 the second source value of the addition
+ *  @param dst the destination value
+ *  @return dst */
+Value mod_value(Value src0, Value src1, Value dst) {
+    /* Might allocate a new value so save the current pool state. */
+    unsigned int pos = get_value_pos();
+    /* Do a numeric computation if possible, otherwise fallback to bitstring
+     * computation. */
+    if (src0->numeric && src1->numeric) {
+        /* Both sources are numeric. */
+        return mod_value_numeric(src0,src1,dst);
+    } else if (is_defined_value(src0) && is_defined_value(src1)) {
+        /* Both sources can be converted to numeric values. */
+        return mod_value_defined_bitstring(src0,src1,dst);
+    } else {
+        /* Cannot compute (for now), simply undefines the destination. */
+        /* First ensure dst has the right shape. */
+        copy_value(src0,dst);
+        /* Then make it undefined. */
+        set_undefined_bitstring(dst);
+    }
+    return dst;
+}
+
+
 /** Computes the NOT of a general value.
  *  @param src the source value of the not
  *  @param dst the destination value

data/lib/HDLRuby/std/channel.rb

@@ -81,9 +81,17 @@ module HDLRuby::High::Std
     end
 
 
-    ##
-    #  Module for wrapping channel ports.
-    module ChannelPortWrapping
+    # ##
+    # #  Module for wrapping channel ports.
+    # module ChannelPortWrapping
+    #     # Wrap with +args+ arguments.
+    #     def wrap(*args)
+    #         return ChannelPortB.new(self,*args)
+    #     end
+    # end
+
+    ## Describes a channel port.
+    class ChannelPort
         # Wrap with +args+ arguments.
         def wrap(*args)
             return ChannelPortB.new(self,*args)
@@ -93,8 +101,8 @@ module HDLRuby::High::Std
 
     ##
     # Describes a read port to a channel.
-    class ChannelPortR
-        include ChannelPortWrapping
+    class ChannelPortR < ChannelPort
+        # include ChannelPortWrapping
 
         # Creates a new channel reader running in +namespace+ and
         # reading using +reader_proc+ and reseting using +reseter_proc+.
@@ -137,8 +145,8 @@ module HDLRuby::High::Std
 
     ##
     # Describes a writer port to a channel.
-    class ChannelPortW
-        include ChannelPortWrapping
+    class ChannelPortW < ChannelPort
+        # include ChannelPortWrapping
 
         # Creates a new channel writer running in +namespace+ and
         # writing using +writer_proc+ and reseting using +reseter_proc+.
@@ -181,8 +189,8 @@ module HDLRuby::High::Std
 
     ##
     # Describes an access port to a channel.
-    class ChannelPortA
-        include ChannelPortWrapping
+    class ChannelPortA < ChannelPort
+        # include ChannelPortWrapping
 
         # Creates a new channel accesser running in +namespace+
         # and reading using +reader_proc+, writing using +writer_proc+,
@@ -243,8 +251,8 @@ module HDLRuby::High::Std
 
     ##
     # Describes port wrapper (Box) for fixing arugments.
-    class ChannelPortB
-        include ChannelPortWrapping
+    class ChannelPortB < ChannelPort
+        # include ChannelPortWrapping
 
         # Creates a new channel box over channel port +port+ fixing +args+
         # as arguments.
@@ -600,13 +608,23 @@ module HDLRuby::High::Std
 
         # Defines a branch in the channel named +name+ built executing
         # +ruby_block+.
-        def brancher(name,&ruby_block)
+        # Alternatively, a ready channel instance can be passed as argument
+        # as +channelI+.
+        def brancher(name,channelI = nil,&ruby_block)
             # Ensure name is a symbol.
             name = name.to_s unless name.respond_to?(:to_sym)
             name = name.to_sym
-            # Create the branch.
-            channelI = HDLRuby::High.channel_instance(name, &ruby_block)
+            # Is there a ready channel instance.
+            if channelI then
+                # Yes, use it directly.
+                @branches[name] = channelI
+                return self
+            end
+            # No, create the branch.
+            # channelI = HDLRuby::High.channel_instance(name, &ruby_block)
+            channelI = HDLRuby::High::Std.channel_instance(name, &ruby_block)
             @branches[name] = channelI
+            return self
         end
 
 
@@ -619,6 +637,7 @@ module HDLRuby::High::Std
             name = name.to_s unless name.respond_to?(:to_sym)
             name = name.to_sym
             # Get the branch.
+            channelI = @branches[name]
             return @branches[name]
         end
 
@@ -902,7 +921,7 @@ module HDLRuby::High::Std
 
 
     # Wrapper to make an object run like a channel port.
-    class ChannelPortObject
+    class ChannelPortObject < ChannelPort
         # Create a new object wrapper for +obj+.
         def initialize(obj)
             @obj = obj
@@ -946,9 +965,13 @@ module HDLRuby::High::Std
 
 
     # Wrap object +obj+ to act like a channel port.
-    def channel_port(obj)
+    def self.channel_port(obj)
+        return obj if obj.is_a?(ChannelPort) # No need to wrap.
         return ChannelPortObject.new(obj)
     end
+    def channel_port(obj)
+        return HDLRuby::High::Std.channel_port(obj)
+    end
 end
 
 

data/lib/HDLRuby/std/fixpoint.rb

@@ -15,53 +15,64 @@ module HDLRuby::High::Std
     def self.included(base)
         # Performs the previous included
         res = self.send(:_included_fixpoint,base)
-        # Now modify the Type class
-        ::HDLRuby::High::Type.class_eval do
-            # Saves the former type generation method.
-            alias_method :"_[]_fixpoint", :[]
+        # Now modify the Type class if not already modified.
+        unless ::HDLRuby::High::Type.instance_methods.include?(:"_[]_fixpoint") then
+            ::HDLRuby::High::Type.class_eval do
+                # Saves the former type generation method.
+                alias_method :"_[]_fixpoint", :[]
 
-            # Redefine the type generation method for supporting fixed point
-            # type generation.
-            def [](*args)
-                if args.size == 1 then
-                    return self.send(:"_[]_fixpoint",*args)
-                else
-                    # Handle the arguments.
-                    arg0,arg1 = *args
-                    if arg0.respond_to?(:to_i) then
-                        arg0 = (arg0.to_i.abs-1)..0
-                    end
-                    if arg1.respond_to?(:to_i) then
-                        arg1 = (arg1.to_i.abs-1)..0
-                    end
-                    # Compute the fix point sizes.
-                    isize = (arg0.first-arg0.last).abs+1
-                    fsize = (arg1.first-arg1.last).abs+1
-                    # Build the type.
-                    case(self.name)
-                    when :bit
-                        typ = bit[isize+fsize].typedef(::HDLRuby.uniq_name)
-                    when :unsigned
-                        typ = unsigned[isize+fsize].typedef(::HDLRuby.uniq_name)
-                    when :signed
-                        typ = signed[isize+fsize].typedef(::HDLRuby.uniq_name)
+                # Redefine the type generation method for supporting fixed point
+                # type generation.
+                def [](*args)
+                    if args.size == 1 then
+                        return self.send(:"_[]_fixpoint",*args)
                     else
-                        raise "Invalid type for generating a fixed point type: #{self.name}"
-                    end
-                    # Redefine the multiplication and division for fixed point.
-                    typ.define_operator(:*) do |left,right|
-                        (left.as([isize+fsize*2])*right) >> fsize
+                        # Handle the arguments and compute the fix point sizes.
+                        arg0,arg1 = *args
+                        if arg0.respond_to?(:to_i) then
+                            isize = arg0
+                        else
+                            isize = (arg0.first-arg0.last).abs+1
+                        end
+                        if arg1.respond_to?(:to_i) then
+                            fsize = arg1
+                        else
+                            fsize = (arg1.first-arg1.last).abs+1
+                        end
+                        # Build the type.
+                        case(self.name)
+                        when :bit
+                            typ = bit[isize+fsize].typedef(::HDLRuby.uniq_name)
+                        when :unsigned
+                            typ = unsigned[isize+fsize].typedef(::HDLRuby.uniq_name)
+                        when :signed
+                            typ = signed[isize+fsize].typedef(::HDLRuby.uniq_name)
+                        else
+                            raise "Invalid type for generating a fixed point type: #{self.name}"
+                        end
+                        # Redefine the multiplication and division for fixed point.
+                        typ.define_operator(:*) do |left,right|
+                            (left.as([isize+fsize*2])*right) >> fsize
+                        end
+                        typ.define_operator(:/) do |left,right|
+                            (left.as([isize+fsize*2]) << fsize) / right
+                        end
+                        typ
                     end
-                    typ.define_operator(:/) do |left,right|
-                        (left.as([isize+fsize*2]) << fsize) / right
-                    end
-                    typ
                 end
+                return res
             end
-            return res
         end
     end
 
+    # Extends the Numeric class for conversion to fixed point litteral.
+    class ::Numeric
+        # Convert to fixed point value with +dec+ digits after the decimal
+        # point.
+        def to_fix(dec)
+            return (self * (2**dec.to_i)).to_i
+        end
+    end
 
 
 end

data/lib/HDLRuby/std/linear.rb

@@ -8,6 +8,51 @@ module HDLRuby::High::Std
     #
     ########################################################################
 
+    # Controller of the linear operator.
+    # - +num+: the number of computation cycles.
+    # - +ev+: event to synchronize the controller on.
+    # - +req+: the request to start the linear computation.
+    # - +ack+: the ack signal that is set to 1 when the computation completes.
+    # - +ruby_block+: the code of the linear computation kernel, it takes
+    #                 as argument +ev+, and its own req and ack signals
+    #                 (resp. +req_ker+ +ack_ker+).
+    function :linearun do |num,ev,req,ack,ruby_block|
+        # Ensure ev is really an event.
+        ev = ev.posedge unless ev.is_a?(Event)
+
+        # Creates the kernel.
+        inner :req_ker, :ack_ker
+
+        HDLRuby::High.top_user.instance_exec(ev,req_ker,ack_ker,&ruby_block)
+
+        # The computation counter.
+        [num.width].inner :count
+        # Run flag
+        inner :run
+        par(ev) do
+            req_ker <= 0
+            ack <= 0
+            count <= 1
+            run <= 0
+            hif(req | run) do
+                run <= 1
+                req_ker <= 1
+                # Is one linear computation completed?
+                hif(ack_ker) do
+                    # Yes.
+                    count <= count + 1
+                end
+                # Is the full computation completed?
+                hif(count == num) do
+                    # Yes.
+                    ack <= 1
+                    run <= 0
+                    req_ker <= 0
+                end
+            end
+        end
+    end
+
 
     # Delcares a vector product by a scalar value.
     #
@@ -111,7 +156,7 @@ module HDLRuby::High::Std
         mul = proc { |x,y| x*y }, add = proc { |x,y| x+y }|
         # Ensure ev is really an event.
         ev = ev.posedge unless ev.is_a?(Event)
-        # Left value and right value.
+        # Left value, right value and computation temp value.
         typ.inner :lv, :rv, :av
         # lv and rv are valid.
         inner :lvok, :rvok
@@ -125,18 +170,21 @@ module HDLRuby::High::Std
                 # Computation request.
                 left.read(lv)  { lvok <= 1 }
                 right.read(rv) { rvok <= 1 }
-                # ( acc <= add.(acc,mul.(lv,rv)) ).hif(lvok & rvok)
-                acc.read(av)
                 hif(lvok & rvok) do
                     ack <= 1
                     run <= 0
-                    acc.write(add.(av,mul.(lv,rv)))
+                    # acc.write(add.(av,mul.(lv,rv)))
+                    seq do
+                        av <= add.(av,mul.(lv,rv))
+                        acc.write(av)
+                    end
                 end
             end
             helse do
                 lvok <= 0
                 rvok <= 0
-                acc.write(0)
+                # acc.write(0)
+                av <= 0
             end
         end
     end
@@ -172,13 +220,15 @@ module HDLRuby::High::Std
                 right.read(rv) { rvok <= 1 }
                 lefts.each_with_index do |left,i|
                     left.read(lvs[i])  { lvoks[i] <= 1 }
-                    # accs.read(i,avs[i])
-                    accs[i].read(avs[i])
+                    # accs[i].read(avs[i])
                     hif(lvoks[i] & rvok) do
                         ack <= 1
                         run <= 0
-                        # accs.write(i,add.(avs[i],mul.(lvs[i],rv)))
-                        accs[i].write(add.(avs[i],mul.(lvs[i],rv)))
+                        # accs[i].write(add.(avs[i],mul.(lvs[i],rv)))
+                        seq do
+                            avs[i] <= add.(avs[i],mul.(lvs[i],rv))
+                            accs[i].write(avs[i])
+                        end
                     end
                 end
             end
@@ -186,12 +236,82 @@ module HDLRuby::High::Std
                 rvok <= 0
                 lefts.each_with_index do |left,i|
                     lvoks[i] <= 0
-                    # accs.write(i,0)
-                    accs[i].write(0)
+                    # accs[i].write(0)
+                    avs[i] <= 0
                 end
             end
         end
     end
 
 
+    # Declares a simple pipelined multiple mac with single right data.
+    #
+    # Can be used for the product of a martix-vector product.
+    function :mac_np do |typ,ev,req,ack,lefts, rights, last,
+        mul = proc { |x,y| x*y }, add = proc { |x,y| x+y }|
+        # Ensure ev is really an event.
+        ev = ev.posedge unless ev.is_a?(Event)
+        # Ensures lefts is an array.
+        lefts = lefts.to_a
+        # Ensures rights is an array.
+        rights = rights.to_a
+        # Get the size of the pipeline and ensure lefts and rights have the
+        # same.
+        size = lefts.size
+        if (rights.size != size) then
+            raise "Incompatible lefts and rights sizes: lefts size is #{size} and rights size is #{rights.size}"
+        end
+        # Declares the accumulators.
+        accs = size.times.map { |i| typ.inner :"acc#{i}" }
+        # Left value and right value.
+        lvs = lefts.each_with_index.map { |left,i| typ.inner :"lv#{i}" }
+        rvs = rights.each_with_index.map { |right,i| typ.inner :"rv#{i}" }
+        # typ.inner :rv
+        # lv and rv are valid.
+        lvoks = lefts.each_with_index.map { |left,i| inner :"lvok#{i}" }
+        # inner :rvok
+        rvoks = rights.each_with_index.map { |right,i| inner :"rvok#{i}" }
+        # Run flag
+        inner :run
+        par(ev) do
+            ack <= 0
+            run <= 0
+            hif(req | run) do
+                run <= 1
+                # Computation request.
+                lefts.zip(rights).each_with_index do |(left,right),i|
+                    left.read(lvs[i])  { lvoks[i] <= 1 }
+                    right.read(rvs[i]) { rvoks[i] <= 1 }
+                    hif(lvoks[i] & rvoks[i]) do
+                        ack <= 1
+                        run <= 0
+                        if (i < lefts.size-1) then
+                            if (i>0) then 
+                                accs[i] <= add.(accs[i],mul.(lvs[i],rvs[i])) +
+                                    accs[i-1]
+                            else
+                                accs[i] <= add.(accs[i],mul.(lvs[i],rvs[i]))
+                            end
+                        else
+                            # The last is reached
+                            seq do
+                                accs[i] <= add.(accs[i],mul.(lvs[i],rvs[i]))
+                                last.write(accs[i])
+                            end
+                        end
+                    end
+                end
+            end
+            helse do
+                lefts.each_with_index do |left,i|
+                    lvoks[i] <= 0
+                    rvoks[i] <= 0
+                    accs[i] <= 0
+                end
+            end
+        end
+    end
+
+
+
 end