HDLRuby 2.2.13 → 2.3.0

data/lib/HDLRuby/std/channel.rb

@@ -81,11 +81,19 @@ module HDLRuby::High::Std
     end
 
 
-    ##
-    #  Module for boxing channel ports.
-    module ChannelPortBoxing
-        # Box with +args+ arguments.
-        def box(*args)
+    # ##
+    # #  Module for wrapping channel ports.
+    # module ChannelPortWrapping
+    #     # Wrap with +args+ arguments.
+    #     def wrap(*args)
+    #         return ChannelPortB.new(self,*args)
+    #     end
+    # end
+
+    ## Describes a channel port.
+    class ChannelPort
+        # Wrap with +args+ arguments.
+        def wrap(*args)
             return ChannelPortB.new(self,*args)
         end
     end
@@ -93,8 +101,8 @@ module HDLRuby::High::Std
 
     ##
     # Describes a read port to a channel.
-    class ChannelPortR
-        include ChannelPortBoxing
+    class ChannelPortR < ChannelPort
+        # include ChannelPortWrapping
 
         # Creates a new channel reader running in +namespace+ and
         # reading using +reader_proc+ and reseting using +reseter_proc+.
@@ -137,8 +145,8 @@ module HDLRuby::High::Std
 
     ##
     # Describes a writer port to a channel.
-    class ChannelPortW
-        include ChannelPortBoxing
+    class ChannelPortW < ChannelPort
+        # include ChannelPortWrapping
 
         # Creates a new channel writer running in +namespace+ and
         # writing using +writer_proc+ and reseting using +reseter_proc+.
@@ -181,8 +189,8 @@ module HDLRuby::High::Std
 
     ##
     # Describes an access port to a channel.
-    class ChannelPortA
-        include ChannelPortBoxing
+    class ChannelPortA < ChannelPort
+        # include ChannelPortWrapping
 
         # Creates a new channel accesser running in +namespace+
         # and reading using +reader_proc+, writing using +writer_proc+,
@@ -242,32 +250,61 @@ module HDLRuby::High::Std
 
 
     ##
-    # Describes port box (wrapper) for fixing arugments.
-    class ChannelPortB
-        include ChannelPortBoxing
+    # Describes port wrapper (Box) for fixing arugments.
+    class ChannelPortB < ChannelPort
+        # include ChannelPortWrapping
 
         # Creates a new channel box over channel port +port+ fixing +args+
         # as arguments.
+        # +args+ is a list of arguments to apply to all read, write
+        # and access procedure, nil values meaning that the corresponding
+        # argument is not overwritten.
+        # It can also be three lists for seperate read, write and access
+        # procedures using named arguments as:
+        # read: <read arguments>, write: <write arguments>,
+        # access: <access arguments>
         def initialize(port,*args)
             # Ensure port is a channel port.
             unless port.is_a?(ChannelPortR) || port.is_a?(ChannelPortW) ||
-                   port.is_a?(ChannelPortA)
+                    port.is_a?(ChannelPortA) || port.is_a?(ChannelPortB)
                 raise "Invalid class for a channel port: #{port.class}"
             end
             @port = port
-            @args = args
+            # Process the arguments.
+            if args.size == 1 && args[0].is_a?(Hash) then
+                # Read, write and access are separated.
+                @args_read = args[0][:read]
+                @args_write = args[0][:write]
+                @args_access = args[0][:access]
+            else
+                @args_read = args
+                @args_write = args.clone
+                @args_access = args.clone
+            end
         end
 
         ## Performs a read on the channel using +args+ and +ruby_block+
         #  as arguments.
         def read(*args,&ruby_block)
-            @port.read(*@args,*args)
+            # Generate the final arguments: fills the nil with arguments
+            # from args
+            rargs = @args_read.clone
+            rargs.map! { |arg| arg == nil ? args.shift : arg }
+            # And add the remaining at the tail.
+            rargs += args
+            @port.read(*rargs,&ruby_block)
         end
 
         ## Performs a write on the channel using +args+ and +ruby_block+
         #  as arguments.
         def write(*args,&ruby_block)
-            @port.write(*@args,*args)
+            # Generate the final arguments: fills the nil with arguments
+            # from args
+            rargs = @args_write.clone
+            rargs.map! { |arg| arg == nil ? args.shift : arg }
+            # And add the remaining at the tail.
+            rargs += args
+            @port.write(*rargs,&ruby_block)
         end
 
         ## Performs a reset on the channel using +args+ and +ruby_block+
@@ -571,13 +608,23 @@ module HDLRuby::High::Std
 
         # Defines a branch in the channel named +name+ built executing
         # +ruby_block+.
-        def brancher(name,&ruby_block)
+        # Alternatively, a ready channel instance can be passed as argument
+        # as +channelI+.
+        def brancher(name,channelI = nil,&ruby_block)
             # Ensure name is a symbol.
             name = name.to_s unless name.respond_to?(:to_sym)
             name = name.to_sym
-            # Create the branch.
-            channelI = HDLRuby::High.channel_instance(name, &ruby_block)
+            # Is there a ready channel instance.
+            if channelI then
+                # Yes, use it directly.
+                @branches[name] = channelI
+                return self
+            end
+            # No, create the branch.
+            # channelI = HDLRuby::High.channel_instance(name, &ruby_block)
+            channelI = HDLRuby::High::Std.channel_instance(name, &ruby_block)
             @branches[name] = channelI
+            return self
         end
 
 
@@ -590,6 +637,7 @@ module HDLRuby::High::Std
             name = name.to_s unless name.respond_to?(:to_sym)
             name = name.to_sym
             # Get the branch.
+            channelI = @branches[name]
             return @branches[name]
         end
 
@@ -872,29 +920,81 @@ module HDLRuby::High::Std
     end
 
 
-end
-
-
-module HDLRuby::High
+    # Wrapper to make an object run like a channel port.
+    class ChannelPortObject < ChannelPort
+        # Create a new object wrapper for +obj+.
+        def initialize(obj)
+            @obj = obj
+        end
 
-    ## Enhance expressions with possibility to act like a reading branch.
-    module HExpression
-        ## Transmits the expression to +target+ and execute +ruby_block+ if
-        #  any.
-        def read(target,&ruby_block)
-            target <= self
-            ruby_block.call if ruby_block
+        # Port read with arguments +args+ executing +ruby_block+ in
+        # case of success.
+        def read(*args,&ruby_block)
+            # Get the target from the arguments.
+            target = args.pop
+            # Is there any argument left?
+            unless (args.empty?) then
+                # There are arguments left, perform an array access.
+                target <= @obj[*args]
+            else
+                # There are no argument left, perform a direct access.
+                target <= @obj
+            end
+            # Execute the ruby_block if any.
+            ruby_block.call if ruby_block 
+        end
+
+        # Port write with argumnet +Args+ executing +ruby_block+ in
+        # case of success.
+        def write(*args,&ruby_block)
+            # Get the value to write from the arguments.
+            value = args.pop
+            # Is there any argument left?
+            unless (args.empty?) then
+                # There are arguments left, perform an array access.
+                @obj[*args] <= value
+            else
+                # There are no argument left, perform a direct access.
+                @obj <= value
+            end
+            # Execute the ruby_block if any.
+            ruby_block.call if ruby_block 
         end
+
     end
 
 
-    ## Enhance references with possibility to act like a writing branch.
-    module HRef
-        ## Transmits +target+ to the reference and execute +ruby_block+ if
-        #  any.
-        def write(target,&ruby_block)
-            self <= target
-            ruby_block.call if ruby_block
-        end
+    # Wrap object +obj+ to act like a channel port.
+    def self.channel_port(obj)
+        return obj if obj.is_a?(ChannelPort) # No need to wrap.
+        return ChannelPortObject.new(obj)
+    end
+    def channel_port(obj)
+        return HDLRuby::High::Std.channel_port(obj)
     end
 end
+
+
+# module HDLRuby::High
+# 
+#     ## Enhance expressions with possibility to act like a reading branch.
+#     module HExpression
+#         ## Transmits the expression to +target+ and execute +ruby_block+ if
+#         #  any.
+#         def read(target,&ruby_block)
+#             target <= self
+#             ruby_block.call if ruby_block
+#         end
+#     end
+# 
+# 
+#     ## Enhance references with possibility to act like a writing branch.
+#     module HRef
+#         ## Transmits +target+ to the reference and execute +ruby_block+ if
+#         #  any.
+#         def write(target,&ruby_block)
+#             self <= target
+#             ruby_block.call if ruby_block
+#         end
+#     end
+# end

data/lib/HDLRuby/std/fixpoint.rb

@@ -26,17 +26,18 @@ module HDLRuby::High::Std
                 if args.size == 1 then
                     return self.send(:"_[]_fixpoint",*args)
                 else
-                    # Handle the arguments.
+                    # Handle the arguments and compute the fix point sizes.
                     arg0,arg1 = *args
                     if arg0.respond_to?(:to_i) then
-                        arg0 = (arg0.to_i.abs-1)..0
+                        isize = arg0
+                    else
+                        isize = (arg0.first-arg0.last).abs+1
                     end
                     if arg1.respond_to?(:to_i) then
-                        arg1 = (arg1.to_i.abs-1)..0
+                        fsize = arg1
+                    else
+                        fsize = (arg1.first-arg1.last).abs+1
                     end
-                    # Compute the fix point sizes.
-                    isize = (arg0.first-arg0.last).abs+1
-                    fsize = (arg1.first-arg1.last).abs+1
                     # Build the type.
                     case(self.name)
                     when :bit
@@ -62,6 +63,14 @@ module HDLRuby::High::Std
         end
     end
 
+    # Extends the Numeric class for conversion to fixed point litteral.
+    class ::Numeric
+        # Convert to fixed point value with +dec+ digits after the decimal
+        # point.
+        def to_fix(dec)
+            return (self * (2**dec.to_i)).to_i
+        end
+    end
 
 
 end

data/lib/HDLRuby/std/linear.rb

@@ -0,0 +1,317 @@
+module HDLRuby::High::Std
+
+
+    ##
+    # Standard HDLRuby::High library: linear algebra functions.
+    #
+    # NOTE: require channel-like interface.
+    #
+    ########################################################################
+
+    # Controller of the linear operator.
+    # - +num+: the number of computation cycles.
+    # - +ev+: event to synchronize the controller on.
+    # - +req+: the request to start the linear computation.
+    # - +ack+: the ack signal that is set to 1 when the computation completes.
+    # - +ruby_block+: the code of the linear computation kernel, it takes
+    #                 as argument +ev+, and its own req and ack signals
+    #                 (resp. +req_ker+ +ack_ker+).
+    function :linearun do |num,ev,req,ack,ruby_block|
+        # Ensure ev is really an event.
+        ev = ev.posedge unless ev.is_a?(Event)
+
+        # Creates the kernel.
+        inner :req_ker, :ack_ker
+
+        HDLRuby::High.top_user.instance_exec(ev,req_ker,ack_ker,&ruby_block)
+
+        # The computation counter.
+        [num.width].inner :count
+        # Run flag
+        inner :run
+        par(ev) do
+            req_ker <= 0
+            ack <= 0
+            count <= 1
+            run <= 0
+            hif(req | run) do
+                run <= 1
+                req_ker <= 1
+                # Is one linear computation completed?
+                hif(ack_ker) do
+                    # Yes.
+                    count <= count + 1
+                end
+                # Is the full computation completed?
+                hif(count == num) do
+                    # Yes.
+                    ack <= 1
+                    run <= 0
+                    req_ker <= 0
+                end
+            end
+        end
+    end
+
+
+    # Delcares a vector product by a scalar value.
+    #
+    # Can be used for scaling a vector.
+    function :scale do |typ,ev,req,ack,left,rights,prods,
+                        mul = proc { |x,y| x*y }|
+        # Ensure ev is really an event.
+        ev = ev.posedge unless ev.is_a?(Event)
+        # Ensures rights and prods are arrays.
+        rights = rights.to_a
+        prods = prods.to_a
+        # Left value (the scale) and right value.
+        typ.inner :lv
+        rvs = rights.each_with_index.map { |left,i| typ.inner :"rv#{i}" }
+        # lv and rv are valid.
+        inner :lvok
+        rvoks = rights.each_with_index.map { |left,i| inner :"rvok#{i}" }
+        # Run flag
+        inner :run
+        par(ev) do
+            ack <= 0
+            run <= 0
+            hif(req | run) do
+                run <= 1
+                # Computation request.
+                left.read(lv) { lvok <= 1 }
+                rights.each_with_index do |right,i|
+                    right.read(rvs[i]) { rvoks[i] <= 1 }
+                    hif(lvok & rvoks[i]) do
+                        ack <= 1
+                        run <= 0
+                        prods[i].write(mul.(lv,rvs[i]))
+                    end
+                end
+            end
+            helse do
+                lvok <= 0
+                rights.each_with_index do |right,i|
+                    rvoks[i] <= 0
+                end
+            end
+        end
+    end
+
+
+    # Declares a 1-dimension vector adder.
+    #
+    # Can be used for the sum of two vectors.
+    function :add_n do |typ,ev,req,ack,lefts, rights, sums,
+                        add = proc { |x,y| x+y }|
+        # Ensure ev is really an event.
+        ev = ev.posedge unless ev.is_a?(Event)
+        # Ensures lefts and rights and sums are arrays.
+        lefts = lefts.to_a
+        rights = rights.to_a
+        sums = sums.to_a
+        # Left value and right value.
+        lvs = lefts.each_with_index.map { |left,i| typ.inner :"lv#{i}" }
+        rvs = lefts.each_with_index.map { |left,i| typ.inner :"rv#{i}" }
+        # lv and rv are valid.
+        lvoks = lefts.each_with_index.map { |left,i| inner :"lvok#{i}" }
+        rvoks = lefts.each_with_index.map { |left,i| inner :"rvok#{i}" }
+        # Run flag.
+        inner :run
+        par(ev) do
+            ack <= 0
+            run <= 0
+            hif(req | run) do
+                run <= 1
+                # Computation request.
+                lefts.zip(rights).each_with_index do |(left,right),i|
+                    left.read(lvs[i])  { lvoks[i] <= 1 }
+                    right.read(rvs[i]) { rvoks[i] <= 1 }
+                    hif(lvoks[i] & rvoks[i]) do
+                        run <= 0
+                        ack <= 1
+                        sums[i].write(add.(lvs[i],rvs[i]))
+                    end
+                end
+            end
+            helse do
+                lefts.each_with_index do |left,i|
+                    lvoks[i] <= 0
+                    rvoks[i] <= 0
+                end
+            end
+        end
+    end
+
+    # Declares a 1-dimension vector element-wise multiplier.
+    function :mul_n do |typ,ev,req,ack,lefts, rights, prods,
+                        mul = proc { |x,y| x*y }|
+        add_n(typ,ev,req,ack,lefts,rights,prods,mul)
+    end
+
+
+    # Declares a simple multiplier accumulator.
+    #
+    # Can be used for the scalar product of two vectors.
+    function :mac do |typ,ev,req,ack,left, right, acc,
+        mul = proc { |x,y| x*y }, add = proc { |x,y| x+y }|
+        # Ensure ev is really an event.
+        ev = ev.posedge unless ev.is_a?(Event)
+        # Left value, right value and computation temp value.
+        typ.inner :lv, :rv, :av
+        # lv and rv are valid.
+        inner :lvok, :rvok
+        # Run flag
+        inner :run
+        par(ev) do
+            ack <= 0
+            run <= 0
+            hif(req | run) do
+                run <= 1
+                # Computation request.
+                left.read(lv)  { lvok <= 1 }
+                right.read(rv) { rvok <= 1 }
+                hif(lvok & rvok) do
+                    ack <= 1
+                    run <= 0
+                    # acc.write(add.(av,mul.(lv,rv)))
+                    seq do
+                        av <= add.(av,mul.(lv,rv))
+                        acc.write(av)
+                    end
+                end
+            end
+            helse do
+                lvok <= 0
+                rvok <= 0
+                # acc.write(0)
+                av <= 0
+            end
+        end
+    end
+
+
+    # Declares a simple multiple mac with single right data.
+    #
+    # Can be used for the product of a martix-vector product.
+    function :mac_n1 do |typ,ev,req,ack,lefts, right, accs,
+        mul = proc { |x,y| x*y }, add = proc { |x,y| x+y }|
+        # Ensure ev is really an event.
+        ev = ev.posedge unless ev.is_a?(Event)
+        # Ensures lefts is an array.
+        lefts = lefts.to_a
+        # Ensures accs is an array.
+        accs = accs.to_a
+        # Left value and right value.
+        lvs = lefts.each_with_index.map { |left,i| typ.inner :"lv#{i}" }
+        # Accumutated values.
+        avs = lefts.each_with_index.map { |left,i| typ.inner :"av#{i}" }
+        typ.inner :rv
+        # lv and rv are valid.
+        lvoks = lefts.each_with_index.map { |left,i| inner :"lvok#{i}" }
+        inner :rvok
+        # Run flag
+        inner :run
+        par(ev) do
+            ack <= 0
+            run <= 0
+            hif(req | run) do
+                run <= 1
+                # Computation request.
+                right.read(rv) { rvok <= 1 }
+                lefts.each_with_index do |left,i|
+                    left.read(lvs[i])  { lvoks[i] <= 1 }
+                    # accs[i].read(avs[i])
+                    hif(lvoks[i] & rvok) do
+                        ack <= 1
+                        run <= 0
+                        # accs[i].write(add.(avs[i],mul.(lvs[i],rv)))
+                        seq do
+                            avs[i] <= add.(avs[i],mul.(lvs[i],rv))
+                            accs[i].write(avs[i])
+                        end
+                    end
+                end
+            end
+            helse do
+                rvok <= 0
+                lefts.each_with_index do |left,i|
+                    lvoks[i] <= 0
+                    # accs[i].write(0)
+                    avs[i] <= 0
+                end
+            end
+        end
+    end
+
+
+    # Declares a simple pipelined multiple mac with single right data.
+    #
+    # Can be used for the product of a martix-vector product.
+    function :mac_np do |typ,ev,req,ack,lefts, rights, last,
+        mul = proc { |x,y| x*y }, add = proc { |x,y| x+y }|
+        # Ensure ev is really an event.
+        ev = ev.posedge unless ev.is_a?(Event)
+        # Ensures lefts is an array.
+        lefts = lefts.to_a
+        # Ensures rights is an array.
+        rights = rights.to_a
+        # Get the size of the pipeline and ensure lefts and rights have the
+        # same.
+        size = lefts.size
+        if (rights.size != size) then
+            raise "Incompatible lefts and rights sizes: lefts size is #{size} and rights size is #{rights.size}"
+        end
+        # Declares the accumulators.
+        accs = size.times.map { |i| typ.inner :"acc#{i}" }
+        # Left value and right value.
+        lvs = lefts.each_with_index.map { |left,i| typ.inner :"lv#{i}" }
+        rvs = rights.each_with_index.map { |right,i| typ.inner :"rv#{i}" }
+        # typ.inner :rv
+        # lv and rv are valid.
+        lvoks = lefts.each_with_index.map { |left,i| inner :"lvok#{i}" }
+        # inner :rvok
+        rvoks = rights.each_with_index.map { |right,i| inner :"rvok#{i}" }
+        # Run flag
+        inner :run
+        par(ev) do
+            ack <= 0
+            run <= 0
+            hif(req | run) do
+                run <= 1
+                # Computation request.
+                lefts.zip(rights).each_with_index do |(left,right),i|
+                    left.read(lvs[i])  { lvoks[i] <= 1 }
+                    right.read(rvs[i]) { rvoks[i] <= 1 }
+                    hif(lvoks[i] & rvoks[i]) do
+                        ack <= 1
+                        run <= 0
+                        if (i < lefts.size-1) then
+                            if (i>0) then 
+                                accs[i] <= add.(accs[i],mul.(lvs[i],rvs[i])) +
+                                    accs[i-1]
+                            else
+                                accs[i] <= add.(accs[i],mul.(lvs[i],rvs[i]))
+                            end
+                        else
+                            # The last is reached
+                            seq do
+                                accs[i] <= add.(accs[i],mul.(lvs[i],rvs[i]))
+                                last.write(accs[i])
+                            end
+                        end
+                    end
+                end
+            end
+            helse do
+                lefts.each_with_index do |left,i|
+                    lvoks[i] <= 0
+                    rvoks[i] <= 0
+                    accs[i] <= 0
+                end
+            end
+        end
+    end
+
+
+
+end