tinygrad 0.10.0__py3-none-any.whl → 0.10.2__py3-none-any.whl

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (88) hide show
  1. tinygrad/codegen/devectorizer.py +247 -0
  2. tinygrad/codegen/expander.py +121 -0
  3. tinygrad/codegen/kernel.py +141 -201
  4. tinygrad/codegen/linearize.py +223 -84
  5. tinygrad/codegen/lowerer.py +60 -42
  6. tinygrad/codegen/symbolic.py +476 -0
  7. tinygrad/codegen/transcendental.py +22 -13
  8. tinygrad/device.py +187 -47
  9. tinygrad/dtype.py +39 -28
  10. tinygrad/engine/jit.py +83 -65
  11. tinygrad/engine/memory.py +4 -5
  12. tinygrad/engine/multi.py +161 -0
  13. tinygrad/engine/realize.py +62 -108
  14. tinygrad/engine/schedule.py +396 -357
  15. tinygrad/engine/search.py +55 -66
  16. tinygrad/gradient.py +73 -0
  17. tinygrad/helpers.py +81 -59
  18. tinygrad/nn/__init__.py +30 -32
  19. tinygrad/nn/datasets.py +1 -2
  20. tinygrad/nn/optim.py +22 -26
  21. tinygrad/nn/state.py +91 -66
  22. tinygrad/ops.py +492 -641
  23. tinygrad/renderer/__init__.py +95 -36
  24. tinygrad/renderer/cstyle.py +99 -92
  25. tinygrad/renderer/llvmir.py +83 -34
  26. tinygrad/renderer/ptx.py +83 -99
  27. tinygrad/renderer/wgsl.py +95 -0
  28. tinygrad/runtime/autogen/amd_gpu.py +39507 -12
  29. tinygrad/runtime/autogen/comgr.py +2 -0
  30. tinygrad/runtime/autogen/kfd.py +4 -3
  31. tinygrad/runtime/autogen/kgsl.py +1 -1
  32. tinygrad/runtime/autogen/libc.py +404 -71
  33. tinygrad/runtime/autogen/llvm.py +11379 -0
  34. tinygrad/runtime/autogen/pci.py +1333 -0
  35. tinygrad/runtime/autogen/vfio.py +891 -0
  36. tinygrad/runtime/autogen/webgpu.py +6985 -0
  37. tinygrad/runtime/graph/cuda.py +8 -9
  38. tinygrad/runtime/graph/hcq.py +84 -79
  39. tinygrad/runtime/graph/metal.py +40 -43
  40. tinygrad/runtime/ops_amd.py +498 -334
  41. tinygrad/runtime/ops_cloud.py +34 -34
  42. tinygrad/runtime/ops_cpu.py +24 -0
  43. tinygrad/runtime/ops_cuda.py +30 -27
  44. tinygrad/runtime/ops_disk.py +62 -63
  45. tinygrad/runtime/ops_dsp.py +159 -42
  46. tinygrad/runtime/ops_gpu.py +30 -30
  47. tinygrad/runtime/ops_hip.py +29 -31
  48. tinygrad/runtime/ops_llvm.py +48 -41
  49. tinygrad/runtime/ops_metal.py +149 -113
  50. tinygrad/runtime/ops_npy.py +2 -2
  51. tinygrad/runtime/ops_nv.py +238 -273
  52. tinygrad/runtime/ops_python.py +55 -50
  53. tinygrad/runtime/ops_qcom.py +129 -157
  54. tinygrad/runtime/ops_webgpu.py +225 -0
  55. tinygrad/runtime/support/allocator.py +94 -0
  56. tinygrad/runtime/support/am/__init__.py +0 -0
  57. tinygrad/runtime/support/am/amdev.py +396 -0
  58. tinygrad/runtime/support/am/ip.py +463 -0
  59. tinygrad/runtime/support/compiler_cuda.py +4 -2
  60. tinygrad/runtime/support/elf.py +28 -4
  61. tinygrad/runtime/support/hcq.py +256 -324
  62. tinygrad/runtime/support/llvm.py +26 -0
  63. tinygrad/shape/shapetracker.py +85 -53
  64. tinygrad/shape/view.py +104 -140
  65. tinygrad/spec.py +155 -0
  66. tinygrad/tensor.py +835 -527
  67. tinygrad/viz/assets/cdnjs.cloudflare.com/ajax/libs/highlight.js/11.10.0/highlight.min.js +1232 -0
  68. tinygrad/viz/assets/cdnjs.cloudflare.com/ajax/libs/highlight.js/11.10.0/languages/cpp.min.js +47 -0
  69. tinygrad/viz/assets/cdnjs.cloudflare.com/ajax/libs/highlight.js/11.10.0/languages/python.min.js +42 -0
  70. tinygrad/viz/assets/cdnjs.cloudflare.com/ajax/libs/highlight.js/11.10.0/styles/default.min.css +9 -0
  71. tinygrad/viz/assets/d3js.org/d3.v5.min.js +2 -0
  72. tinygrad/viz/assets/dagrejs.github.io/project/dagre-d3/latest/dagre-d3.min.js +4816 -0
  73. tinygrad/viz/assets/unpkg.com/@highlightjs/cdn-assets@11.10.0/styles/tokyo-night-dark.min.css +8 -0
  74. tinygrad/viz/index.html +544 -0
  75. tinygrad/viz/perfetto.html +178 -0
  76. tinygrad/viz/serve.py +205 -0
  77. {tinygrad-0.10.0.dist-info → tinygrad-0.10.2.dist-info}/METADATA +48 -25
  78. tinygrad-0.10.2.dist-info/RECORD +99 -0
  79. {tinygrad-0.10.0.dist-info → tinygrad-0.10.2.dist-info}/WHEEL +1 -1
  80. tinygrad/codegen/uopgraph.py +0 -506
  81. tinygrad/engine/lazy.py +0 -228
  82. tinygrad/function.py +0 -212
  83. tinygrad/multi.py +0 -177
  84. tinygrad/runtime/graph/clang.py +0 -39
  85. tinygrad/runtime/ops_clang.py +0 -35
  86. tinygrad-0.10.0.dist-info/RECORD +0 -77
  87. {tinygrad-0.10.0.dist-info → tinygrad-0.10.2.dist-info}/LICENSE +0 -0
  88. {tinygrad-0.10.0.dist-info → tinygrad-0.10.2.dist-info}/top_level.txt +0 -0
@@ -0,0 +1,891 @@
1
+ # mypy: ignore-errors
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+ # -*- coding: utf-8 -*-
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+ #
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+ # TARGET arch is: []
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+ # WORD_SIZE is: 8
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+ # POINTER_SIZE is: 8
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+ # LONGDOUBLE_SIZE is: 16
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+ #
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+ import ctypes
10
+
11
+
12
+ from tinygrad.runtime.support.hcq import HWInterface
13
+ import functools
14
+
15
+ def _do_ioctl_io(__idir, __base, __nr, __fd:HWInterface, val=0, __len=0):
16
+ return __fd.ioctl((__idir<<30) | (__len<<16) | (__base<<8) | __nr, val)
17
+
18
+ def _do_ioctl(__idir, __base, __nr, __user_struct, __fd:HWInterface, __val=None, **kwargs):
19
+ ret = __fd.ioctl((__idir<<30) | (ctypes.sizeof(made := (__made or __user_struct(**kwargs)))<<16) | (__base<<8) | __nr, made)
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+ if ret != 0: raise RuntimeError(f"ioctl returned {ret}")
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+ return made
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+
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+ def _IO(base, nr): return functools.partial(_do_ioctl_io, 0, ord(base) if isinstance(base, str) else base, nr)
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+ def _IOW(base, nr, type): return functools.partial(_do_ioctl, 1, ord(base) if isinstance(base, str) else base, nr, type)
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+ def _IOR(base, nr, type): return functools.partial(_do_ioctl, 2, ord(base) if isinstance(base, str) else base, nr, type)
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+ def _IOWR(base, nr, type): return functools.partial(_do_ioctl, 3, ord(base) if isinstance(base, str) else base, nr, type)
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+
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+ class AsDictMixin:
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+ @classmethod
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+ def as_dict(cls, self):
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+ result = {}
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+ if not isinstance(self, AsDictMixin):
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+ # not a structure, assume it's already a python object
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+ return self
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+ if not hasattr(cls, "_fields_"):
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+ return result
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+ # sys.version_info >= (3, 5)
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+ # for (field, *_) in cls._fields_: # noqa
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+ for field_tuple in cls._fields_: # noqa
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+ field = field_tuple[0]
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+ if field.startswith('PADDING_'):
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+ continue
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+ value = getattr(self, field)
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+ type_ = type(value)
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+ if hasattr(value, "_length_") and hasattr(value, "_type_"):
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+ # array
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+ if not hasattr(type_, "as_dict"):
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+ value = [v for v in value]
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+ else:
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+ type_ = type_._type_
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+ value = [type_.as_dict(v) for v in value]
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+ elif hasattr(value, "contents") and hasattr(value, "_type_"):
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+ # pointer
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+ try:
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+ if not hasattr(type_, "as_dict"):
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+ value = value.contents
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+ else:
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+ type_ = type_._type_
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+ value = type_.as_dict(value.contents)
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+ except ValueError:
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+ # nullptr
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+ value = None
63
+ elif isinstance(value, AsDictMixin):
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+ # other structure
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+ value = type_.as_dict(value)
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+ result[field] = value
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+ return result
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+
69
+
70
+ class Structure(ctypes.Structure, AsDictMixin):
71
+
72
+ def __init__(self, *args, **kwds):
73
+ # We don't want to use positional arguments fill PADDING_* fields
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+
75
+ args = dict(zip(self.__class__._field_names_(), args))
76
+ args.update(kwds)
77
+ super(Structure, self).__init__(**args)
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+
79
+ @classmethod
80
+ def _field_names_(cls):
81
+ if hasattr(cls, '_fields_'):
82
+ return (f[0] for f in cls._fields_ if not f[0].startswith('PADDING'))
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+ else:
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+ return ()
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+
86
+ @classmethod
87
+ def get_type(cls, field):
88
+ for f in cls._fields_:
89
+ if f[0] == field:
90
+ return f[1]
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+ return None
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+
93
+ @classmethod
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+ def bind(cls, bound_fields):
95
+ fields = {}
96
+ for name, type_ in cls._fields_:
97
+ if hasattr(type_, "restype"):
98
+ if name in bound_fields:
99
+ if bound_fields[name] is None:
100
+ fields[name] = type_()
101
+ else:
102
+ # use a closure to capture the callback from the loop scope
103
+ fields[name] = (
104
+ type_((lambda callback: lambda *args: callback(*args))(
105
+ bound_fields[name]))
106
+ )
107
+ del bound_fields[name]
108
+ else:
109
+ # default callback implementation (does nothing)
110
+ try:
111
+ default_ = type_(0).restype().value
112
+ except TypeError:
113
+ default_ = None
114
+ fields[name] = type_((
115
+ lambda default_: lambda *args: default_)(default_))
116
+ else:
117
+ # not a callback function, use default initialization
118
+ if name in bound_fields:
119
+ fields[name] = bound_fields[name]
120
+ del bound_fields[name]
121
+ else:
122
+ fields[name] = type_()
123
+ if len(bound_fields) != 0:
124
+ raise ValueError(
125
+ "Cannot bind the following unknown callback(s) {}.{}".format(
126
+ cls.__name__, bound_fields.keys()
127
+ ))
128
+ return cls(**fields)
129
+
130
+
131
+ class Union(ctypes.Union, AsDictMixin):
132
+ pass
133
+
134
+
135
+
136
+
137
+
138
+ VFIO_H = True # macro
139
+ VFIO_API_VERSION = 0 # macro
140
+ VFIO_TYPE1_IOMMU = 1 # macro
141
+ VFIO_SPAPR_TCE_IOMMU = 2 # macro
142
+ VFIO_TYPE1v2_IOMMU = 3 # macro
143
+ VFIO_DMA_CC_IOMMU = 4 # macro
144
+ VFIO_EEH = 5 # macro
145
+ VFIO_TYPE1_NESTING_IOMMU = 6 # macro
146
+ VFIO_SPAPR_TCE_v2_IOMMU = 7 # macro
147
+ VFIO_NOIOMMU_IOMMU = 8 # macro
148
+ VFIO_UNMAP_ALL = 9 # macro
149
+ VFIO_UPDATE_VADDR = 10 # macro
150
+ VFIO_TYPE = (';') # macro
151
+ VFIO_BASE = 100 # macro
152
+ VFIO_GET_API_VERSION = _IO ( ( ';' ) , 100 + 0 ) # macro (from list)
153
+ VFIO_CHECK_EXTENSION = _IO ( ( ';' ) , 100 + 1 ) # macro (from list)
154
+ VFIO_SET_IOMMU = _IO ( ( ';' ) , 100 + 2 ) # macro (from list)
155
+ VFIO_GROUP_FLAGS_VIABLE = (1<<0) # macro
156
+ VFIO_GROUP_FLAGS_CONTAINER_SET = (1<<1) # macro
157
+ VFIO_GROUP_GET_STATUS = _IO ( ( ';' ) , 100 + 3 ) # macro (from list)
158
+ VFIO_GROUP_SET_CONTAINER = _IO ( ( ';' ) , 100 + 4 ) # macro (from list)
159
+ VFIO_GROUP_UNSET_CONTAINER = _IO ( ( ';' ) , 100 + 5 ) # macro (from list)
160
+ VFIO_GROUP_GET_DEVICE_FD = _IO ( ( ';' ) , 100 + 6 ) # macro (from list)
161
+ VFIO_DEVICE_FLAGS_RESET = (1<<0) # macro
162
+ VFIO_DEVICE_FLAGS_PCI = (1<<1) # macro
163
+ VFIO_DEVICE_FLAGS_PLATFORM = (1<<2) # macro
164
+ VFIO_DEVICE_FLAGS_AMBA = (1<<3) # macro
165
+ VFIO_DEVICE_FLAGS_CCW = (1<<4) # macro
166
+ VFIO_DEVICE_FLAGS_AP = (1<<5) # macro
167
+ VFIO_DEVICE_FLAGS_FSL_MC = (1<<6) # macro
168
+ VFIO_DEVICE_FLAGS_CAPS = (1<<7) # macro
169
+ VFIO_DEVICE_GET_INFO = _IO ( ( ';' ) , 100 + 7 ) # macro (from list)
170
+ VFIO_DEVICE_API_PCI_STRING = "vfio-pci" # macro
171
+ VFIO_DEVICE_API_PLATFORM_STRING = "vfio-platform" # macro
172
+ VFIO_DEVICE_API_AMBA_STRING = "vfio-amba" # macro
173
+ VFIO_DEVICE_API_CCW_STRING = "vfio-ccw" # macro
174
+ VFIO_DEVICE_API_AP_STRING = "vfio-ap" # macro
175
+ VFIO_DEVICE_INFO_CAP_ZPCI_BASE = 1 # macro
176
+ VFIO_DEVICE_INFO_CAP_ZPCI_GROUP = 2 # macro
177
+ VFIO_DEVICE_INFO_CAP_ZPCI_UTIL = 3 # macro
178
+ VFIO_DEVICE_INFO_CAP_ZPCI_PFIP = 4 # macro
179
+ VFIO_REGION_INFO_FLAG_READ = (1<<0) # macro
180
+ VFIO_REGION_INFO_FLAG_WRITE = (1<<1) # macro
181
+ VFIO_REGION_INFO_FLAG_MMAP = (1<<2) # macro
182
+ VFIO_REGION_INFO_FLAG_CAPS = (1<<3) # macro
183
+ VFIO_DEVICE_GET_REGION_INFO = _IO ( ( ';' ) , 100 + 8 ) # macro (from list)
184
+ VFIO_REGION_INFO_CAP_SPARSE_MMAP = 1 # macro
185
+ VFIO_REGION_INFO_CAP_TYPE = 2 # macro
186
+ VFIO_REGION_TYPE_PCI_VENDOR_TYPE = (1<<31) # macro
187
+ VFIO_REGION_TYPE_PCI_VENDOR_MASK = (0xffff) # macro
188
+ VFIO_REGION_TYPE_GFX = (1) # macro
189
+ VFIO_REGION_TYPE_CCW = (2) # macro
190
+ VFIO_REGION_TYPE_MIGRATION = (3) # macro
191
+ VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION = (1) # macro
192
+ VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG = (2) # macro
193
+ VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG = (3) # macro
194
+ VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM = (1) # macro
195
+ VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD = (1) # macro
196
+ VFIO_REGION_SUBTYPE_GFX_EDID = (1) # macro
197
+ VFIO_DEVICE_GFX_LINK_STATE_UP = 1 # macro
198
+ VFIO_DEVICE_GFX_LINK_STATE_DOWN = 2 # macro
199
+ VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD = (1) # macro
200
+ VFIO_REGION_SUBTYPE_CCW_SCHIB = (2) # macro
201
+ VFIO_REGION_SUBTYPE_CCW_CRW = (3) # macro
202
+ VFIO_REGION_SUBTYPE_MIGRATION = (1) # macro
203
+ VFIO_DEVICE_STATE_STOP = (0) # macro
204
+ VFIO_DEVICE_STATE_RUNNING = (1<<0) # macro
205
+ VFIO_DEVICE_STATE_SAVING = (1<<1) # macro
206
+ VFIO_DEVICE_STATE_RESUMING = (1<<2) # macro
207
+ VFIO_DEVICE_STATE_MASK = ((1<<0)|(1<<1)|(1<<2)) # macro
208
+ # def VFIO_DEVICE_STATE_VALID(state): # macro
209
+ # return (state&(1<<2)?(state&((1<<0)|(1<<1)|(1<<2)))==(1<<2):1)
210
+ def VFIO_DEVICE_STATE_IS_ERROR(state): # macro
211
+ return ((state&((1<<0)|(1<<1)|(1<<2)))==((1<<1)|(1<<2)))
212
+ # def VFIO_DEVICE_STATE_SET_ERROR(state): # macro
213
+ # return ((state&~((1<<0)|(1<<1)|(1<<2)))|VFIO_DEVICE_SATE_SAVING|(1<<2))
214
+ VFIO_REGION_INFO_CAP_MSIX_MAPPABLE = 3 # macro
215
+ VFIO_REGION_INFO_CAP_NVLINK2_SSATGT = 4 # macro
216
+ VFIO_REGION_INFO_CAP_NVLINK2_LNKSPD = 5 # macro
217
+ VFIO_IRQ_INFO_EVENTFD = (1<<0) # macro
218
+ VFIO_IRQ_INFO_MASKABLE = (1<<1) # macro
219
+ VFIO_IRQ_INFO_AUTOMASKED = (1<<2) # macro
220
+ VFIO_IRQ_INFO_NORESIZE = (1<<3) # macro
221
+ VFIO_DEVICE_GET_IRQ_INFO = _IO ( ( ';' ) , 100 + 9 ) # macro (from list)
222
+ VFIO_IRQ_SET_DATA_NONE = (1<<0) # macro
223
+ VFIO_IRQ_SET_DATA_BOOL = (1<<1) # macro
224
+ VFIO_IRQ_SET_DATA_EVENTFD = (1<<2) # macro
225
+ VFIO_IRQ_SET_ACTION_MASK = (1<<3) # macro
226
+ VFIO_IRQ_SET_ACTION_UNMASK = (1<<4) # macro
227
+ VFIO_IRQ_SET_ACTION_TRIGGER = (1<<5) # macro
228
+ VFIO_DEVICE_SET_IRQS = _IO ( ( ';' ) , 100 + 10 ) # macro (from list)
229
+ VFIO_IRQ_SET_DATA_TYPE_MASK = ((1<<0)|(1<<1)|(1<<2)) # macro
230
+ VFIO_IRQ_SET_ACTION_TYPE_MASK = ((1<<3)|(1<<4)|(1<<5)) # macro
231
+ VFIO_DEVICE_RESET = _IO ( ( ';' ) , 100 + 11 ) # macro (from list)
232
+ VFIO_DEVICE_GET_PCI_HOT_RESET_INFO = _IO ( ( ';' ) , 100 + 12 ) # macro (from list)
233
+ VFIO_DEVICE_PCI_HOT_RESET = _IO ( ( ';' ) , 100 + 13 ) # macro (from list)
234
+ VFIO_GFX_PLANE_TYPE_PROBE = (1<<0) # macro
235
+ VFIO_GFX_PLANE_TYPE_DMABUF = (1<<1) # macro
236
+ VFIO_GFX_PLANE_TYPE_REGION = (1<<2) # macro
237
+ VFIO_DEVICE_QUERY_GFX_PLANE = _IO ( ( ';' ) , 100 + 14 ) # macro (from list)
238
+ VFIO_DEVICE_GET_GFX_DMABUF = _IO ( ( ';' ) , 100 + 15 ) # macro (from list)
239
+ VFIO_DEVICE_IOEVENTFD_8 = (1<<0) # macro
240
+ VFIO_DEVICE_IOEVENTFD_16 = (1<<1) # macro
241
+ VFIO_DEVICE_IOEVENTFD_32 = (1<<2) # macro
242
+ VFIO_DEVICE_IOEVENTFD_64 = (1<<3) # macro
243
+ VFIO_DEVICE_IOEVENTFD_SIZE_MASK = (0xf) # macro
244
+ VFIO_DEVICE_IOEVENTFD = _IO ( ( ';' ) , 100 + 16 ) # macro (from list)
245
+ VFIO_DEVICE_FEATURE_MASK = (0xffff) # macro
246
+ VFIO_DEVICE_FEATURE_GET = (1<<16) # macro
247
+ VFIO_DEVICE_FEATURE_SET = (1<<17) # macro
248
+ VFIO_DEVICE_FEATURE_PROBE = (1<<18) # macro
249
+ VFIO_DEVICE_FEATURE = _IO ( ( ';' ) , 100 + 17 ) # macro (from list)
250
+ VFIO_DEVICE_FEATURE_PCI_VF_TOKEN = (0) # macro
251
+ VFIO_IOMMU_INFO_PGSIZES = (1<<0) # macro
252
+ VFIO_IOMMU_INFO_CAPS = (1<<1) # macro
253
+ VFIO_IOMMU_TYPE1_INFO_CAP_IOVA_RANGE = 1 # macro
254
+ VFIO_IOMMU_TYPE1_INFO_CAP_MIGRATION = 2 # macro
255
+ VFIO_IOMMU_TYPE1_INFO_DMA_AVAIL = 3 # macro
256
+ VFIO_IOMMU_GET_INFO = _IO ( ( ';' ) , 100 + 12 ) # macro (from list)
257
+ VFIO_DMA_MAP_FLAG_READ = (1<<0) # macro
258
+ VFIO_DMA_MAP_FLAG_WRITE = (1<<1) # macro
259
+ VFIO_DMA_MAP_FLAG_VADDR = (1<<2) # macro
260
+ VFIO_IOMMU_MAP_DMA = _IO ( ( ';' ) , 100 + 13 ) # macro (from list)
261
+ VFIO_DMA_UNMAP_FLAG_GET_DIRTY_BITMAP = (1<<0) # macro
262
+ VFIO_DMA_UNMAP_FLAG_ALL = (1<<1) # macro
263
+ VFIO_DMA_UNMAP_FLAG_VADDR = (1<<2) # macro
264
+ VFIO_IOMMU_UNMAP_DMA = _IO ( ( ';' ) , 100 + 14 ) # macro (from list)
265
+ VFIO_IOMMU_ENABLE = _IO ( ( ';' ) , 100 + 15 ) # macro (from list)
266
+ VFIO_IOMMU_DISABLE = _IO ( ( ';' ) , 100 + 16 ) # macro (from list)
267
+ VFIO_IOMMU_DIRTY_PAGES_FLAG_START = (1<<0) # macro
268
+ VFIO_IOMMU_DIRTY_PAGES_FLAG_STOP = (1<<1) # macro
269
+ VFIO_IOMMU_DIRTY_PAGES_FLAG_GET_BITMAP = (1<<2) # macro
270
+ VFIO_IOMMU_DIRTY_PAGES = _IO ( ( ';' ) , 100 + 17 ) # macro (from list)
271
+ VFIO_IOMMU_SPAPR_INFO_DDW = (1<<0) # macro
272
+ VFIO_IOMMU_SPAPR_TCE_GET_INFO = _IO ( ( ';' ) , 100 + 12 ) # macro (from list)
273
+ VFIO_EEH_PE_DISABLE = 0 # macro
274
+ VFIO_EEH_PE_ENABLE = 1 # macro
275
+ VFIO_EEH_PE_UNFREEZE_IO = 2 # macro
276
+ VFIO_EEH_PE_UNFREEZE_DMA = 3 # macro
277
+ VFIO_EEH_PE_GET_STATE = 4 # macro
278
+ VFIO_EEH_PE_STATE_NORMAL = 0 # macro
279
+ VFIO_EEH_PE_STATE_RESET = 1 # macro
280
+ VFIO_EEH_PE_STATE_STOPPED = 2 # macro
281
+ VFIO_EEH_PE_STATE_STOPPED_DMA = 4 # macro
282
+ VFIO_EEH_PE_STATE_UNAVAIL = 5 # macro
283
+ VFIO_EEH_PE_RESET_DEACTIVATE = 5 # macro
284
+ VFIO_EEH_PE_RESET_HOT = 6 # macro
285
+ VFIO_EEH_PE_RESET_FUNDAMENTAL = 7 # macro
286
+ VFIO_EEH_PE_CONFIGURE = 8 # macro
287
+ VFIO_EEH_PE_INJECT_ERR = 9 # macro
288
+ VFIO_EEH_PE_OP = _IO ( ( ';' ) , 100 + 21 ) # macro (from list)
289
+ VFIO_IOMMU_SPAPR_REGISTER_MEMORY = _IO ( ( ';' ) , 100 + 17 ) # macro (from list)
290
+ VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY = _IO ( ( ';' ) , 100 + 18 ) # macro (from list)
291
+ VFIO_IOMMU_SPAPR_TCE_CREATE = _IO ( ( ';' ) , 100 + 19 ) # macro (from list)
292
+ VFIO_IOMMU_SPAPR_TCE_REMOVE = _IO ( ( ';' ) , 100 + 20 ) # macro (from list)
293
+ class struct_vfio_info_cap_header(Structure):
294
+ pass
295
+
296
+ struct_vfio_info_cap_header._pack_ = 1 # source:False
297
+ struct_vfio_info_cap_header._fields_ = [
298
+ ('id', ctypes.c_uint16),
299
+ ('version', ctypes.c_uint16),
300
+ ('next', ctypes.c_uint32),
301
+ ]
302
+
303
+ class struct_vfio_group_status(Structure):
304
+ pass
305
+
306
+ struct_vfio_group_status._pack_ = 1 # source:False
307
+ struct_vfio_group_status._fields_ = [
308
+ ('argsz', ctypes.c_uint32),
309
+ ('flags', ctypes.c_uint32),
310
+ ]
311
+
312
+ class struct_vfio_device_info(Structure):
313
+ pass
314
+
315
+ struct_vfio_device_info._pack_ = 1 # source:False
316
+ struct_vfio_device_info._fields_ = [
317
+ ('argsz', ctypes.c_uint32),
318
+ ('flags', ctypes.c_uint32),
319
+ ('num_regions', ctypes.c_uint32),
320
+ ('num_irqs', ctypes.c_uint32),
321
+ ('cap_offset', ctypes.c_uint32),
322
+ ]
323
+
324
+ class struct_vfio_region_info(Structure):
325
+ pass
326
+
327
+ struct_vfio_region_info._pack_ = 1 # source:False
328
+ struct_vfio_region_info._fields_ = [
329
+ ('argsz', ctypes.c_uint32),
330
+ ('flags', ctypes.c_uint32),
331
+ ('index', ctypes.c_uint32),
332
+ ('cap_offset', ctypes.c_uint32),
333
+ ('size', ctypes.c_uint64),
334
+ ('offset', ctypes.c_uint64),
335
+ ]
336
+
337
+ class struct_vfio_region_sparse_mmap_area(Structure):
338
+ pass
339
+
340
+ struct_vfio_region_sparse_mmap_area._pack_ = 1 # source:False
341
+ struct_vfio_region_sparse_mmap_area._fields_ = [
342
+ ('offset', ctypes.c_uint64),
343
+ ('size', ctypes.c_uint64),
344
+ ]
345
+
346
+ class struct_vfio_region_info_cap_sparse_mmap(Structure):
347
+ pass
348
+
349
+ struct_vfio_region_info_cap_sparse_mmap._pack_ = 1 # source:False
350
+ struct_vfio_region_info_cap_sparse_mmap._fields_ = [
351
+ ('header', struct_vfio_info_cap_header),
352
+ ('nr_areas', ctypes.c_uint32),
353
+ ('reserved', ctypes.c_uint32),
354
+ ('areas', struct_vfio_region_sparse_mmap_area * 0),
355
+ ]
356
+
357
+ class struct_vfio_region_info_cap_type(Structure):
358
+ pass
359
+
360
+ struct_vfio_region_info_cap_type._pack_ = 1 # source:False
361
+ struct_vfio_region_info_cap_type._fields_ = [
362
+ ('header', struct_vfio_info_cap_header),
363
+ ('type', ctypes.c_uint32),
364
+ ('subtype', ctypes.c_uint32),
365
+ ]
366
+
367
+ class struct_vfio_region_gfx_edid(Structure):
368
+ pass
369
+
370
+ struct_vfio_region_gfx_edid._pack_ = 1 # source:False
371
+ struct_vfio_region_gfx_edid._fields_ = [
372
+ ('edid_offset', ctypes.c_uint32),
373
+ ('edid_max_size', ctypes.c_uint32),
374
+ ('edid_size', ctypes.c_uint32),
375
+ ('max_xres', ctypes.c_uint32),
376
+ ('max_yres', ctypes.c_uint32),
377
+ ('link_state', ctypes.c_uint32),
378
+ ]
379
+
380
+ class struct_vfio_device_migration_info(Structure):
381
+ pass
382
+
383
+ struct_vfio_device_migration_info._pack_ = 1 # source:False
384
+ struct_vfio_device_migration_info._fields_ = [
385
+ ('device_state', ctypes.c_uint32),
386
+ ('reserved', ctypes.c_uint32),
387
+ ('pending_bytes', ctypes.c_uint64),
388
+ ('data_offset', ctypes.c_uint64),
389
+ ('data_size', ctypes.c_uint64),
390
+ ]
391
+
392
+ class struct_vfio_region_info_cap_nvlink2_ssatgt(Structure):
393
+ pass
394
+
395
+ struct_vfio_region_info_cap_nvlink2_ssatgt._pack_ = 1 # source:False
396
+ struct_vfio_region_info_cap_nvlink2_ssatgt._fields_ = [
397
+ ('header', struct_vfio_info_cap_header),
398
+ ('tgt', ctypes.c_uint64),
399
+ ]
400
+
401
+ class struct_vfio_region_info_cap_nvlink2_lnkspd(Structure):
402
+ pass
403
+
404
+ struct_vfio_region_info_cap_nvlink2_lnkspd._pack_ = 1 # source:False
405
+ struct_vfio_region_info_cap_nvlink2_lnkspd._fields_ = [
406
+ ('header', struct_vfio_info_cap_header),
407
+ ('link_speed', ctypes.c_uint32),
408
+ ('__pad', ctypes.c_uint32),
409
+ ]
410
+
411
+ class struct_vfio_irq_info(Structure):
412
+ pass
413
+
414
+ struct_vfio_irq_info._pack_ = 1 # source:False
415
+ struct_vfio_irq_info._fields_ = [
416
+ ('argsz', ctypes.c_uint32),
417
+ ('flags', ctypes.c_uint32),
418
+ ('index', ctypes.c_uint32),
419
+ ('count', ctypes.c_uint32),
420
+ ]
421
+
422
+ class struct_vfio_irq_set(Structure):
423
+ pass
424
+
425
+ struct_vfio_irq_set._pack_ = 1 # source:False
426
+ struct_vfio_irq_set._fields_ = [
427
+ ('argsz', ctypes.c_uint32),
428
+ ('flags', ctypes.c_uint32),
429
+ ('index', ctypes.c_uint32),
430
+ ('start', ctypes.c_uint32),
431
+ ('count', ctypes.c_uint32),
432
+ ('data', ctypes.c_int * 1),
433
+ ]
434
+
435
+
436
+ # values for enumeration 'c__Ea_VFIO_PCI_BAR0_REGION_INDEX'
437
+ c__Ea_VFIO_PCI_BAR0_REGION_INDEX__enumvalues = {
438
+ 0: 'VFIO_PCI_BAR0_REGION_INDEX',
439
+ 1: 'VFIO_PCI_BAR1_REGION_INDEX',
440
+ 2: 'VFIO_PCI_BAR2_REGION_INDEX',
441
+ 3: 'VFIO_PCI_BAR3_REGION_INDEX',
442
+ 4: 'VFIO_PCI_BAR4_REGION_INDEX',
443
+ 5: 'VFIO_PCI_BAR5_REGION_INDEX',
444
+ 6: 'VFIO_PCI_ROM_REGION_INDEX',
445
+ 7: 'VFIO_PCI_CONFIG_REGION_INDEX',
446
+ 8: 'VFIO_PCI_VGA_REGION_INDEX',
447
+ 9: 'VFIO_PCI_NUM_REGIONS',
448
+ }
449
+ VFIO_PCI_BAR0_REGION_INDEX = 0
450
+ VFIO_PCI_BAR1_REGION_INDEX = 1
451
+ VFIO_PCI_BAR2_REGION_INDEX = 2
452
+ VFIO_PCI_BAR3_REGION_INDEX = 3
453
+ VFIO_PCI_BAR4_REGION_INDEX = 4
454
+ VFIO_PCI_BAR5_REGION_INDEX = 5
455
+ VFIO_PCI_ROM_REGION_INDEX = 6
456
+ VFIO_PCI_CONFIG_REGION_INDEX = 7
457
+ VFIO_PCI_VGA_REGION_INDEX = 8
458
+ VFIO_PCI_NUM_REGIONS = 9
459
+ c__Ea_VFIO_PCI_BAR0_REGION_INDEX = ctypes.c_uint32 # enum
460
+
461
+ # values for enumeration 'c__Ea_VFIO_PCI_INTX_IRQ_INDEX'
462
+ c__Ea_VFIO_PCI_INTX_IRQ_INDEX__enumvalues = {
463
+ 0: 'VFIO_PCI_INTX_IRQ_INDEX',
464
+ 1: 'VFIO_PCI_MSI_IRQ_INDEX',
465
+ 2: 'VFIO_PCI_MSIX_IRQ_INDEX',
466
+ 3: 'VFIO_PCI_ERR_IRQ_INDEX',
467
+ 4: 'VFIO_PCI_REQ_IRQ_INDEX',
468
+ 5: 'VFIO_PCI_NUM_IRQS',
469
+ }
470
+ VFIO_PCI_INTX_IRQ_INDEX = 0
471
+ VFIO_PCI_MSI_IRQ_INDEX = 1
472
+ VFIO_PCI_MSIX_IRQ_INDEX = 2
473
+ VFIO_PCI_ERR_IRQ_INDEX = 3
474
+ VFIO_PCI_REQ_IRQ_INDEX = 4
475
+ VFIO_PCI_NUM_IRQS = 5
476
+ c__Ea_VFIO_PCI_INTX_IRQ_INDEX = ctypes.c_uint32 # enum
477
+
478
+ # values for enumeration 'c__Ea_VFIO_CCW_CONFIG_REGION_INDEX'
479
+ c__Ea_VFIO_CCW_CONFIG_REGION_INDEX__enumvalues = {
480
+ 0: 'VFIO_CCW_CONFIG_REGION_INDEX',
481
+ 1: 'VFIO_CCW_NUM_REGIONS',
482
+ }
483
+ VFIO_CCW_CONFIG_REGION_INDEX = 0
484
+ VFIO_CCW_NUM_REGIONS = 1
485
+ c__Ea_VFIO_CCW_CONFIG_REGION_INDEX = ctypes.c_uint32 # enum
486
+
487
+ # values for enumeration 'c__Ea_VFIO_CCW_IO_IRQ_INDEX'
488
+ c__Ea_VFIO_CCW_IO_IRQ_INDEX__enumvalues = {
489
+ 0: 'VFIO_CCW_IO_IRQ_INDEX',
490
+ 1: 'VFIO_CCW_CRW_IRQ_INDEX',
491
+ 2: 'VFIO_CCW_REQ_IRQ_INDEX',
492
+ 3: 'VFIO_CCW_NUM_IRQS',
493
+ }
494
+ VFIO_CCW_IO_IRQ_INDEX = 0
495
+ VFIO_CCW_CRW_IRQ_INDEX = 1
496
+ VFIO_CCW_REQ_IRQ_INDEX = 2
497
+ VFIO_CCW_NUM_IRQS = 3
498
+ c__Ea_VFIO_CCW_IO_IRQ_INDEX = ctypes.c_uint32 # enum
499
+ class struct_vfio_pci_dependent_device(Structure):
500
+ pass
501
+
502
+ struct_vfio_pci_dependent_device._pack_ = 1 # source:False
503
+ struct_vfio_pci_dependent_device._fields_ = [
504
+ ('group_id', ctypes.c_uint32),
505
+ ('segment', ctypes.c_uint16),
506
+ ('bus', ctypes.c_ubyte),
507
+ ('devfn', ctypes.c_ubyte),
508
+ ]
509
+
510
+ class struct_vfio_pci_hot_reset_info(Structure):
511
+ pass
512
+
513
+ struct_vfio_pci_hot_reset_info._pack_ = 1 # source:False
514
+ struct_vfio_pci_hot_reset_info._fields_ = [
515
+ ('argsz', ctypes.c_uint32),
516
+ ('flags', ctypes.c_uint32),
517
+ ('count', ctypes.c_uint32),
518
+ ('devices', struct_vfio_pci_dependent_device * 0),
519
+ ]
520
+
521
+ class struct_vfio_pci_hot_reset(Structure):
522
+ pass
523
+
524
+ struct_vfio_pci_hot_reset._pack_ = 1 # source:False
525
+ struct_vfio_pci_hot_reset._fields_ = [
526
+ ('argsz', ctypes.c_uint32),
527
+ ('flags', ctypes.c_uint32),
528
+ ('count', ctypes.c_uint32),
529
+ ('group_fds', ctypes.c_int32 * 0),
530
+ ]
531
+
532
+ class struct_vfio_device_gfx_plane_info(Structure):
533
+ pass
534
+
535
+ class union_vfio_device_gfx_plane_info_0(Union):
536
+ pass
537
+
538
+ union_vfio_device_gfx_plane_info_0._pack_ = 1 # source:False
539
+ union_vfio_device_gfx_plane_info_0._fields_ = [
540
+ ('region_index', ctypes.c_uint32),
541
+ ('dmabuf_id', ctypes.c_uint32),
542
+ ]
543
+
544
+ struct_vfio_device_gfx_plane_info._pack_ = 1 # source:False
545
+ struct_vfio_device_gfx_plane_info._anonymous_ = ('_0',)
546
+ struct_vfio_device_gfx_plane_info._fields_ = [
547
+ ('argsz', ctypes.c_uint32),
548
+ ('flags', ctypes.c_uint32),
549
+ ('drm_plane_type', ctypes.c_uint32),
550
+ ('drm_format', ctypes.c_uint32),
551
+ ('drm_format_mod', ctypes.c_uint64),
552
+ ('width', ctypes.c_uint32),
553
+ ('height', ctypes.c_uint32),
554
+ ('stride', ctypes.c_uint32),
555
+ ('size', ctypes.c_uint32),
556
+ ('x_pos', ctypes.c_uint32),
557
+ ('y_pos', ctypes.c_uint32),
558
+ ('x_hot', ctypes.c_uint32),
559
+ ('y_hot', ctypes.c_uint32),
560
+ ('_0', union_vfio_device_gfx_plane_info_0),
561
+ ('PADDING_0', ctypes.c_ubyte * 4),
562
+ ]
563
+
564
+ class struct_vfio_device_ioeventfd(Structure):
565
+ pass
566
+
567
+ struct_vfio_device_ioeventfd._pack_ = 1 # source:False
568
+ struct_vfio_device_ioeventfd._fields_ = [
569
+ ('argsz', ctypes.c_uint32),
570
+ ('flags', ctypes.c_uint32),
571
+ ('offset', ctypes.c_uint64),
572
+ ('data', ctypes.c_uint64),
573
+ ('fd', ctypes.c_int32),
574
+ ('PADDING_0', ctypes.c_ubyte * 4),
575
+ ]
576
+
577
+ class struct_vfio_device_feature(Structure):
578
+ pass
579
+
580
+ struct_vfio_device_feature._pack_ = 1 # source:False
581
+ struct_vfio_device_feature._fields_ = [
582
+ ('argsz', ctypes.c_uint32),
583
+ ('flags', ctypes.c_uint32),
584
+ ('data', ctypes.c_ubyte * 0),
585
+ ]
586
+
587
+ class struct_vfio_iommu_type1_info(Structure):
588
+ pass
589
+
590
+ struct_vfio_iommu_type1_info._pack_ = 1 # source:False
591
+ struct_vfio_iommu_type1_info._fields_ = [
592
+ ('argsz', ctypes.c_uint32),
593
+ ('flags', ctypes.c_uint32),
594
+ ('iova_pgsizes', ctypes.c_uint64),
595
+ ('cap_offset', ctypes.c_uint32),
596
+ ('PADDING_0', ctypes.c_ubyte * 4),
597
+ ]
598
+
599
+ class struct_vfio_iova_range(Structure):
600
+ pass
601
+
602
+ struct_vfio_iova_range._pack_ = 1 # source:False
603
+ struct_vfio_iova_range._fields_ = [
604
+ ('start', ctypes.c_uint64),
605
+ ('end', ctypes.c_uint64),
606
+ ]
607
+
608
+ class struct_vfio_iommu_type1_info_cap_iova_range(Structure):
609
+ pass
610
+
611
+ struct_vfio_iommu_type1_info_cap_iova_range._pack_ = 1 # source:False
612
+ struct_vfio_iommu_type1_info_cap_iova_range._fields_ = [
613
+ ('header', struct_vfio_info_cap_header),
614
+ ('nr_iovas', ctypes.c_uint32),
615
+ ('reserved', ctypes.c_uint32),
616
+ ('iova_ranges', struct_vfio_iova_range * 0),
617
+ ]
618
+
619
+ class struct_vfio_iommu_type1_info_cap_migration(Structure):
620
+ pass
621
+
622
+ struct_vfio_iommu_type1_info_cap_migration._pack_ = 1 # source:False
623
+ struct_vfio_iommu_type1_info_cap_migration._fields_ = [
624
+ ('header', struct_vfio_info_cap_header),
625
+ ('flags', ctypes.c_uint32),
626
+ ('PADDING_0', ctypes.c_ubyte * 4),
627
+ ('pgsize_bitmap', ctypes.c_uint64),
628
+ ('max_dirty_bitmap_size', ctypes.c_uint64),
629
+ ]
630
+
631
+ class struct_vfio_iommu_type1_info_dma_avail(Structure):
632
+ pass
633
+
634
+ struct_vfio_iommu_type1_info_dma_avail._pack_ = 1 # source:False
635
+ struct_vfio_iommu_type1_info_dma_avail._fields_ = [
636
+ ('header', struct_vfio_info_cap_header),
637
+ ('avail', ctypes.c_uint32),
638
+ ]
639
+
640
+ class struct_vfio_iommu_type1_dma_map(Structure):
641
+ pass
642
+
643
+ struct_vfio_iommu_type1_dma_map._pack_ = 1 # source:False
644
+ struct_vfio_iommu_type1_dma_map._fields_ = [
645
+ ('argsz', ctypes.c_uint32),
646
+ ('flags', ctypes.c_uint32),
647
+ ('vaddr', ctypes.c_uint64),
648
+ ('iova', ctypes.c_uint64),
649
+ ('size', ctypes.c_uint64),
650
+ ]
651
+
652
+ class struct_vfio_bitmap(Structure):
653
+ pass
654
+
655
+ struct_vfio_bitmap._pack_ = 1 # source:False
656
+ struct_vfio_bitmap._fields_ = [
657
+ ('pgsize', ctypes.c_uint64),
658
+ ('size', ctypes.c_uint64),
659
+ ('data', ctypes.POINTER(ctypes.c_uint64)),
660
+ ]
661
+
662
+ class struct_vfio_iommu_type1_dma_unmap(Structure):
663
+ pass
664
+
665
+ struct_vfio_iommu_type1_dma_unmap._pack_ = 1 # source:False
666
+ struct_vfio_iommu_type1_dma_unmap._fields_ = [
667
+ ('argsz', ctypes.c_uint32),
668
+ ('flags', ctypes.c_uint32),
669
+ ('iova', ctypes.c_uint64),
670
+ ('size', ctypes.c_uint64),
671
+ ('data', ctypes.c_ubyte * 0),
672
+ ]
673
+
674
+ class struct_vfio_iommu_type1_dirty_bitmap(Structure):
675
+ pass
676
+
677
+ struct_vfio_iommu_type1_dirty_bitmap._pack_ = 1 # source:False
678
+ struct_vfio_iommu_type1_dirty_bitmap._fields_ = [
679
+ ('argsz', ctypes.c_uint32),
680
+ ('flags', ctypes.c_uint32),
681
+ ('data', ctypes.c_ubyte * 0),
682
+ ]
683
+
684
+ class struct_vfio_iommu_type1_dirty_bitmap_get(Structure):
685
+ pass
686
+
687
+ struct_vfio_iommu_type1_dirty_bitmap_get._pack_ = 1 # source:False
688
+ struct_vfio_iommu_type1_dirty_bitmap_get._fields_ = [
689
+ ('iova', ctypes.c_uint64),
690
+ ('size', ctypes.c_uint64),
691
+ ('bitmap', struct_vfio_bitmap),
692
+ ]
693
+
694
+ class struct_vfio_iommu_spapr_tce_ddw_info(Structure):
695
+ pass
696
+
697
+ struct_vfio_iommu_spapr_tce_ddw_info._pack_ = 1 # source:False
698
+ struct_vfio_iommu_spapr_tce_ddw_info._fields_ = [
699
+ ('pgsizes', ctypes.c_uint64),
700
+ ('max_dynamic_windows_supported', ctypes.c_uint32),
701
+ ('levels', ctypes.c_uint32),
702
+ ]
703
+
704
+ class struct_vfio_iommu_spapr_tce_info(Structure):
705
+ pass
706
+
707
+ struct_vfio_iommu_spapr_tce_info._pack_ = 1 # source:False
708
+ struct_vfio_iommu_spapr_tce_info._fields_ = [
709
+ ('argsz', ctypes.c_uint32),
710
+ ('flags', ctypes.c_uint32),
711
+ ('dma32_window_start', ctypes.c_uint32),
712
+ ('dma32_window_size', ctypes.c_uint32),
713
+ ('ddw', struct_vfio_iommu_spapr_tce_ddw_info),
714
+ ]
715
+
716
+ class struct_vfio_eeh_pe_err(Structure):
717
+ pass
718
+
719
+ struct_vfio_eeh_pe_err._pack_ = 1 # source:False
720
+ struct_vfio_eeh_pe_err._fields_ = [
721
+ ('type', ctypes.c_uint32),
722
+ ('func', ctypes.c_uint32),
723
+ ('addr', ctypes.c_uint64),
724
+ ('mask', ctypes.c_uint64),
725
+ ]
726
+
727
+ class struct_vfio_eeh_pe_op(Structure):
728
+ pass
729
+
730
+ class union_vfio_eeh_pe_op_0(Union):
731
+ _pack_ = 1 # source:False
732
+ _fields_ = [
733
+ ('err', struct_vfio_eeh_pe_err),
734
+ ]
735
+
736
+ struct_vfio_eeh_pe_op._pack_ = 1 # source:False
737
+ struct_vfio_eeh_pe_op._anonymous_ = ('_0',)
738
+ struct_vfio_eeh_pe_op._fields_ = [
739
+ ('argsz', ctypes.c_uint32),
740
+ ('flags', ctypes.c_uint32),
741
+ ('op', ctypes.c_uint32),
742
+ ('PADDING_0', ctypes.c_ubyte * 4),
743
+ ('_0', union_vfio_eeh_pe_op_0),
744
+ ]
745
+
746
+ class struct_vfio_iommu_spapr_register_memory(Structure):
747
+ pass
748
+
749
+ struct_vfio_iommu_spapr_register_memory._pack_ = 1 # source:False
750
+ struct_vfio_iommu_spapr_register_memory._fields_ = [
751
+ ('argsz', ctypes.c_uint32),
752
+ ('flags', ctypes.c_uint32),
753
+ ('vaddr', ctypes.c_uint64),
754
+ ('size', ctypes.c_uint64),
755
+ ]
756
+
757
+ class struct_vfio_iommu_spapr_tce_create(Structure):
758
+ pass
759
+
760
+ struct_vfio_iommu_spapr_tce_create._pack_ = 1 # source:False
761
+ struct_vfio_iommu_spapr_tce_create._fields_ = [
762
+ ('argsz', ctypes.c_uint32),
763
+ ('flags', ctypes.c_uint32),
764
+ ('page_shift', ctypes.c_uint32),
765
+ ('__resv1', ctypes.c_uint32),
766
+ ('window_size', ctypes.c_uint64),
767
+ ('levels', ctypes.c_uint32),
768
+ ('__resv2', ctypes.c_uint32),
769
+ ('start_addr', ctypes.c_uint64),
770
+ ]
771
+
772
+ class struct_vfio_iommu_spapr_tce_remove(Structure):
773
+ pass
774
+
775
+ struct_vfio_iommu_spapr_tce_remove._pack_ = 1 # source:False
776
+ struct_vfio_iommu_spapr_tce_remove._fields_ = [
777
+ ('argsz', ctypes.c_uint32),
778
+ ('flags', ctypes.c_uint32),
779
+ ('start_addr', ctypes.c_uint64),
780
+ ]
781
+
782
+ __all__ = \
783
+ ['VFIO_API_VERSION', 'VFIO_BASE', 'VFIO_CCW_CONFIG_REGION_INDEX',
784
+ 'VFIO_CCW_CRW_IRQ_INDEX', 'VFIO_CCW_IO_IRQ_INDEX',
785
+ 'VFIO_CCW_NUM_IRQS', 'VFIO_CCW_NUM_REGIONS',
786
+ 'VFIO_CCW_REQ_IRQ_INDEX', 'VFIO_DEVICE_API_AMBA_STRING',
787
+ 'VFIO_DEVICE_API_AP_STRING', 'VFIO_DEVICE_API_CCW_STRING',
788
+ 'VFIO_DEVICE_API_PCI_STRING', 'VFIO_DEVICE_API_PLATFORM_STRING',
789
+ 'VFIO_DEVICE_FEATURE_GET', 'VFIO_DEVICE_FEATURE_MASK',
790
+ 'VFIO_DEVICE_FEATURE_PCI_VF_TOKEN', 'VFIO_DEVICE_FEATURE_PROBE',
791
+ 'VFIO_DEVICE_FEATURE_SET', 'VFIO_DEVICE_FLAGS_AMBA',
792
+ 'VFIO_DEVICE_FLAGS_AP', 'VFIO_DEVICE_FLAGS_CAPS',
793
+ 'VFIO_DEVICE_FLAGS_CCW', 'VFIO_DEVICE_FLAGS_FSL_MC',
794
+ 'VFIO_DEVICE_FLAGS_PCI', 'VFIO_DEVICE_FLAGS_PLATFORM',
795
+ 'VFIO_DEVICE_FLAGS_RESET', 'VFIO_DEVICE_GFX_LINK_STATE_DOWN',
796
+ 'VFIO_DEVICE_GFX_LINK_STATE_UP', 'VFIO_DEVICE_INFO_CAP_ZPCI_BASE',
797
+ 'VFIO_DEVICE_INFO_CAP_ZPCI_GROUP',
798
+ 'VFIO_DEVICE_INFO_CAP_ZPCI_PFIP',
799
+ 'VFIO_DEVICE_INFO_CAP_ZPCI_UTIL', 'VFIO_DEVICE_IOEVENTFD_16',
800
+ 'VFIO_DEVICE_IOEVENTFD_32', 'VFIO_DEVICE_IOEVENTFD_64',
801
+ 'VFIO_DEVICE_IOEVENTFD_8', 'VFIO_DEVICE_IOEVENTFD_SIZE_MASK',
802
+ 'VFIO_DEVICE_STATE_MASK', 'VFIO_DEVICE_STATE_RESUMING',
803
+ 'VFIO_DEVICE_STATE_RUNNING', 'VFIO_DEVICE_STATE_SAVING',
804
+ 'VFIO_DEVICE_STATE_STOP', 'VFIO_DMA_CC_IOMMU',
805
+ 'VFIO_DMA_MAP_FLAG_READ', 'VFIO_DMA_MAP_FLAG_VADDR',
806
+ 'VFIO_DMA_MAP_FLAG_WRITE', 'VFIO_DMA_UNMAP_FLAG_ALL',
807
+ 'VFIO_DMA_UNMAP_FLAG_GET_DIRTY_BITMAP',
808
+ 'VFIO_DMA_UNMAP_FLAG_VADDR', 'VFIO_EEH', 'VFIO_EEH_PE_CONFIGURE',
809
+ 'VFIO_EEH_PE_DISABLE', 'VFIO_EEH_PE_ENABLE',
810
+ 'VFIO_EEH_PE_GET_STATE', 'VFIO_EEH_PE_INJECT_ERR',
811
+ 'VFIO_EEH_PE_RESET_DEACTIVATE', 'VFIO_EEH_PE_RESET_FUNDAMENTAL',
812
+ 'VFIO_EEH_PE_RESET_HOT', 'VFIO_EEH_PE_STATE_NORMAL',
813
+ 'VFIO_EEH_PE_STATE_RESET', 'VFIO_EEH_PE_STATE_STOPPED',
814
+ 'VFIO_EEH_PE_STATE_STOPPED_DMA', 'VFIO_EEH_PE_STATE_UNAVAIL',
815
+ 'VFIO_EEH_PE_UNFREEZE_DMA', 'VFIO_EEH_PE_UNFREEZE_IO',
816
+ 'VFIO_GFX_PLANE_TYPE_DMABUF', 'VFIO_GFX_PLANE_TYPE_PROBE',
817
+ 'VFIO_GFX_PLANE_TYPE_REGION', 'VFIO_GROUP_FLAGS_CONTAINER_SET',
818
+ 'VFIO_GROUP_FLAGS_VIABLE', 'VFIO_H',
819
+ 'VFIO_IOMMU_DIRTY_PAGES_FLAG_GET_BITMAP',
820
+ 'VFIO_IOMMU_DIRTY_PAGES_FLAG_START',
821
+ 'VFIO_IOMMU_DIRTY_PAGES_FLAG_STOP', 'VFIO_IOMMU_INFO_CAPS',
822
+ 'VFIO_IOMMU_INFO_PGSIZES', 'VFIO_IOMMU_SPAPR_INFO_DDW',
823
+ 'VFIO_IOMMU_TYPE1_INFO_CAP_IOVA_RANGE',
824
+ 'VFIO_IOMMU_TYPE1_INFO_CAP_MIGRATION',
825
+ 'VFIO_IOMMU_TYPE1_INFO_DMA_AVAIL', 'VFIO_IRQ_INFO_AUTOMASKED',
826
+ 'VFIO_IRQ_INFO_EVENTFD', 'VFIO_IRQ_INFO_MASKABLE',
827
+ 'VFIO_IRQ_INFO_NORESIZE', 'VFIO_IRQ_SET_ACTION_MASK',
828
+ 'VFIO_IRQ_SET_ACTION_TRIGGER', 'VFIO_IRQ_SET_ACTION_TYPE_MASK',
829
+ 'VFIO_IRQ_SET_ACTION_UNMASK', 'VFIO_IRQ_SET_DATA_BOOL',
830
+ 'VFIO_IRQ_SET_DATA_EVENTFD', 'VFIO_IRQ_SET_DATA_NONE',
831
+ 'VFIO_IRQ_SET_DATA_TYPE_MASK', 'VFIO_NOIOMMU_IOMMU',
832
+ 'VFIO_PCI_BAR0_REGION_INDEX', 'VFIO_PCI_BAR1_REGION_INDEX',
833
+ 'VFIO_PCI_BAR2_REGION_INDEX', 'VFIO_PCI_BAR3_REGION_INDEX',
834
+ 'VFIO_PCI_BAR4_REGION_INDEX', 'VFIO_PCI_BAR5_REGION_INDEX',
835
+ 'VFIO_PCI_CONFIG_REGION_INDEX', 'VFIO_PCI_ERR_IRQ_INDEX',
836
+ 'VFIO_PCI_INTX_IRQ_INDEX', 'VFIO_PCI_MSIX_IRQ_INDEX',
837
+ 'VFIO_PCI_MSI_IRQ_INDEX', 'VFIO_PCI_NUM_IRQS',
838
+ 'VFIO_PCI_NUM_REGIONS', 'VFIO_PCI_REQ_IRQ_INDEX',
839
+ 'VFIO_PCI_ROM_REGION_INDEX', 'VFIO_PCI_VGA_REGION_INDEX',
840
+ 'VFIO_REGION_INFO_CAP_MSIX_MAPPABLE',
841
+ 'VFIO_REGION_INFO_CAP_NVLINK2_LNKSPD',
842
+ 'VFIO_REGION_INFO_CAP_NVLINK2_SSATGT',
843
+ 'VFIO_REGION_INFO_CAP_SPARSE_MMAP', 'VFIO_REGION_INFO_CAP_TYPE',
844
+ 'VFIO_REGION_INFO_FLAG_CAPS', 'VFIO_REGION_INFO_FLAG_MMAP',
845
+ 'VFIO_REGION_INFO_FLAG_READ', 'VFIO_REGION_INFO_FLAG_WRITE',
846
+ 'VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD',
847
+ 'VFIO_REGION_SUBTYPE_CCW_CRW', 'VFIO_REGION_SUBTYPE_CCW_SCHIB',
848
+ 'VFIO_REGION_SUBTYPE_GFX_EDID',
849
+ 'VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD',
850
+ 'VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG',
851
+ 'VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG',
852
+ 'VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION',
853
+ 'VFIO_REGION_SUBTYPE_MIGRATION',
854
+ 'VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM', 'VFIO_REGION_TYPE_CCW',
855
+ 'VFIO_REGION_TYPE_GFX', 'VFIO_REGION_TYPE_MIGRATION',
856
+ 'VFIO_REGION_TYPE_PCI_VENDOR_MASK',
857
+ 'VFIO_REGION_TYPE_PCI_VENDOR_TYPE', 'VFIO_SPAPR_TCE_IOMMU',
858
+ 'VFIO_SPAPR_TCE_v2_IOMMU', 'VFIO_TYPE', 'VFIO_TYPE1_IOMMU',
859
+ 'VFIO_TYPE1_NESTING_IOMMU', 'VFIO_TYPE1v2_IOMMU',
860
+ 'VFIO_UNMAP_ALL', 'VFIO_UPDATE_VADDR', '_IO', '_IOR', '_IOW',
861
+ '_IOWR', 'c__Ea_VFIO_CCW_CONFIG_REGION_INDEX',
862
+ 'c__Ea_VFIO_CCW_IO_IRQ_INDEX', 'c__Ea_VFIO_PCI_BAR0_REGION_INDEX',
863
+ 'c__Ea_VFIO_PCI_INTX_IRQ_INDEX', 'struct_vfio_bitmap',
864
+ 'struct_vfio_device_feature', 'struct_vfio_device_gfx_plane_info',
865
+ 'struct_vfio_device_info', 'struct_vfio_device_ioeventfd',
866
+ 'struct_vfio_device_migration_info', 'struct_vfio_eeh_pe_err',
867
+ 'struct_vfio_eeh_pe_op', 'struct_vfio_group_status',
868
+ 'struct_vfio_info_cap_header',
869
+ 'struct_vfio_iommu_spapr_register_memory',
870
+ 'struct_vfio_iommu_spapr_tce_create',
871
+ 'struct_vfio_iommu_spapr_tce_ddw_info',
872
+ 'struct_vfio_iommu_spapr_tce_info',
873
+ 'struct_vfio_iommu_spapr_tce_remove',
874
+ 'struct_vfio_iommu_type1_dirty_bitmap',
875
+ 'struct_vfio_iommu_type1_dirty_bitmap_get',
876
+ 'struct_vfio_iommu_type1_dma_map',
877
+ 'struct_vfio_iommu_type1_dma_unmap',
878
+ 'struct_vfio_iommu_type1_info',
879
+ 'struct_vfio_iommu_type1_info_cap_iova_range',
880
+ 'struct_vfio_iommu_type1_info_cap_migration',
881
+ 'struct_vfio_iommu_type1_info_dma_avail',
882
+ 'struct_vfio_iova_range', 'struct_vfio_irq_info',
883
+ 'struct_vfio_irq_set', 'struct_vfio_pci_dependent_device',
884
+ 'struct_vfio_pci_hot_reset', 'struct_vfio_pci_hot_reset_info',
885
+ 'struct_vfio_region_gfx_edid', 'struct_vfio_region_info',
886
+ 'struct_vfio_region_info_cap_nvlink2_lnkspd',
887
+ 'struct_vfio_region_info_cap_nvlink2_ssatgt',
888
+ 'struct_vfio_region_info_cap_sparse_mmap',
889
+ 'struct_vfio_region_info_cap_type',
890
+ 'struct_vfio_region_sparse_mmap_area',
891
+ 'union_vfio_device_gfx_plane_info_0', 'union_vfio_eeh_pe_op_0']