tdl-xoa-driver 1.4.0__py3-none-any.whl → 1.5.0__py3-none-any.whl

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (50) hide show
  1. {tdl_xoa_driver-1.4.0.dist-info → tdl_xoa_driver-1.5.0.dist-info}/METADATA +8 -8
  2. {tdl_xoa_driver-1.4.0.dist-info → tdl_xoa_driver-1.5.0.dist-info}/RECORD +49 -36
  3. xoa_driver/__init__.py +2 -2
  4. xoa_driver/enums.py +2 -0
  5. xoa_driver/exceptions.py +2 -0
  6. xoa_driver/functions/anlt.py +2 -0
  7. xoa_driver/functions/anlt_ll_debug.py +2 -0
  8. xoa_driver/functions/cli/__init__.py +21 -0
  9. xoa_driver/functions/cli/_cli_manager.py +541 -0
  10. xoa_driver/functions/cli/_config_block.py +334 -0
  11. xoa_driver/functions/cli/_socket_driver.py +111 -0
  12. xoa_driver/functions/cli/port_config.py +116 -0
  13. xoa_driver/functions/cli/testbed_config.py +179 -0
  14. xoa_driver/functions/cmis/__init__.py +8 -0
  15. xoa_driver/functions/cmis/_constants.py +25 -0
  16. xoa_driver/functions/cmis/_replies.py +600 -0
  17. xoa_driver/functions/cmis/_utils.py +49 -0
  18. xoa_driver/functions/cmis/cdb.py +1266 -0
  19. xoa_driver/functions/exceptions.py +2 -0
  20. xoa_driver/functions/headers.py +2 -0
  21. xoa_driver/functions/mgmt.py +42 -19
  22. xoa_driver/functions/tools.py +9 -3
  23. xoa_driver/hlfuncs.py +6 -2
  24. xoa_driver/internals/commands/c_commands.py +6 -10
  25. xoa_driver/internals/commands/enums.py +25 -1
  26. xoa_driver/internals/commands/p_commands.py +38 -2
  27. xoa_driver/internals/commands/pl1_commands.py +130 -73
  28. xoa_driver/internals/commands/pp_commands.py +44 -55
  29. xoa_driver/internals/commands/pr_commands.py +17 -16
  30. xoa_driver/internals/commands/px_commands.py +54 -54
  31. xoa_driver/internals/core/transporter/logger/__state_on_user.py +1 -1
  32. xoa_driver/internals/exceptions/modules.py +4 -3
  33. xoa_driver/internals/hli/modules/modules_l23/family_edun.py +82 -0
  34. xoa_driver/internals/hli/modules/modules_l23/family_g.py +1 -1
  35. xoa_driver/internals/hli/modules/modules_l23/family_l1.py +19 -0
  36. xoa_driver/internals/hli/ports/port_l23/edun_l1.py +181 -0
  37. xoa_driver/internals/hli/ports/port_l23/family_edun.py +82 -0
  38. xoa_driver/internals/hli/ports/port_l23/family_l1.py +14 -8
  39. xoa_driver/internals/state_storage/modules_state.py +20 -0
  40. xoa_driver/internals/state_storage/testers_state.py +10 -0
  41. xoa_driver/lli.py +1 -0
  42. xoa_driver/misc.py +1 -0
  43. xoa_driver/modules.py +22 -0
  44. xoa_driver/ports.py +22 -0
  45. xoa_driver/testers.py +2 -0
  46. xoa_driver/utils.py +2 -0
  47. xoa_driver/functions/cli.py +0 -581
  48. {tdl_xoa_driver-1.4.0.dist-info → tdl_xoa_driver-1.5.0.dist-info}/WHEEL +0 -0
  49. {tdl_xoa_driver-1.4.0.dist-info → tdl_xoa_driver-1.5.0.dist-info}/licenses/LICENSE +0 -0
  50. {tdl_xoa_driver-1.4.0.dist-info → tdl_xoa_driver-1.5.0.dist-info}/top_level.txt +0 -0
@@ -0,0 +1,82 @@
1
+ import typing
2
+ from xoa_driver import ports
3
+ from xoa_driver.internals.hli import revisions
4
+ from xoa_driver.internals.utils.managers import ports_manager as pm
5
+
6
+ if typing.TYPE_CHECKING:
7
+ from xoa_driver.internals.core import interfaces as itf
8
+ from .. import __interfaces as m_itf
9
+
10
+ from .module_l23_base import ModuleL23
11
+ from xoa_driver.internals.commands import (
12
+ M_CLOCKPPBSWEEP,
13
+ M_CLOCKSWEEPSTATUS,
14
+ M_HEALTH,
15
+ )
16
+
17
+
18
+ class MClockSweep:
19
+ """Test module local clock sweep"""
20
+ def __init__(self, conn: "itf.IConnection", module_id: int) -> None:
21
+ self.config = M_CLOCKPPBSWEEP(conn, module_id)
22
+ """Configure and control the module local clock sweep.
23
+ Representation of M_CLOCKPPBSWEEP
24
+ """
25
+
26
+ self.status = M_CLOCKSWEEPSTATUS(conn, module_id)
27
+ """Status of the module local clock sweep.
28
+ Representation of M_CLOCKSWEEPSTATUS
29
+ """
30
+
31
+ class MHealth:
32
+ """Test module health"""
33
+ def __init__(self, conn: "itf.IConnection", module_id: int) -> None:
34
+ self.all = M_HEALTH(conn, module_id, [])
35
+ """All module health information"""
36
+ self.info = M_HEALTH(conn, module_id, [0])
37
+ """Module identification information"""
38
+ self.cage_insertion = M_HEALTH(conn, module_id, [1])
39
+ """Module cage insertion counter"""
40
+
41
+
42
+ class ModuleFamilyEdun(ModuleL23):
43
+ """Test module Edun family"""
44
+ def __init__(self, conn: "itf.IConnection", init_data: "m_itf.ModuleInitData") -> None:
45
+ super().__init__(conn, init_data)
46
+
47
+ self.clock_sweep = MClockSweep(conn, self.module_id)
48
+ """Clock ppm sweep control"""
49
+
50
+ self.health = MHealth(conn, self.module_id)
51
+ """Module health information"""
52
+
53
+ # region Edun
54
+
55
+ @typing.final
56
+ @revisions.register_valkyrie_module(rev="Edun-800G-3S-1P-SMPX[a]")
57
+ class MEdun800G3S1PSMPX_a(ModuleFamilyEdun):
58
+ """Test module Edun-800G-3S-1P-SMPX[a]"""
59
+ def __init__(self, conn: "itf.IConnection", init_data: "m_itf.ModuleInitData") -> None:
60
+ super().__init__(conn, init_data)
61
+ self.ports: pm.PortsManager[ports.PEdun800G3S1PSMPX_a] = pm.PortsManager(
62
+ conn=conn,
63
+ ports_type=ports.PEdun800G3S1PSMPX_a,
64
+ module_id=self.module_id,
65
+ ports_count=self.ports_count
66
+ )
67
+ """Port Index Manager of Edun-800G-3S-1P-SMPX[a]"""
68
+
69
+
70
+ @typing.final
71
+ @revisions.register_valkyrie_module(rev="Edun-1600G-4S-1P-OSFP[a]")
72
+ class MEdun1600G4S1POSFP_a(ModuleFamilyEdun):
73
+ """Test module Edun-1600G-4S-1P-OSFP[a]"""
74
+ def __init__(self, conn: "itf.IConnection", init_data: "m_itf.ModuleInitData") -> None:
75
+ super().__init__(conn, init_data)
76
+ self.ports: pm.PortsManager[ports.PEdun1600G4S1POSFP_a] = pm.PortsManager(
77
+ conn=conn,
78
+ ports_type=ports.PEdun1600G4S1POSFP_a,
79
+ module_id=self.module_id,
80
+ ports_count=self.ports_count
81
+ )
82
+ """Port Index Manager of Edun-1600G-4S-1P-OSFP[a]"""
@@ -86,7 +86,7 @@ class MLoki100G3S1PB_b(ModuleL23):
86
86
 
87
87
  @typing.final
88
88
  @revisions.register_valkyrie_module(rev="Loki-100G-5S-4P[a]")
89
- class MLoki100G35S4P_a(ModuleL23):
89
+ class MLoki100G5S4P_a(ModuleL23):
90
90
  """Test module Loki-100G-5S-4P[a]"""
91
91
  def __init__(self, conn: "itf.IConnection", init_data: "m_itf.ModuleInitData") -> None:
92
92
  super().__init__(conn, init_data)
@@ -797,4 +797,23 @@ class MFreya800G4S1POSFP_f_g2(ModuleFamilyL1):
797
797
 
798
798
 
799
799
 
800
+ #endregion
801
+
802
+ #region Freya 4S 2P
803
+
804
+ @typing.final
805
+ @revisions.register_valkyrie_module(rev="Freya-800G-4S-2P[a]")
806
+ class MFreya800G4S2P_a(ModuleFamilyL1):
807
+ """Test module Freya-800G-4S-2P[a]"""
808
+ def __init__(self, conn: "itf.IConnection", init_data: "m_itf.ModuleInitData") -> None:
809
+ super().__init__(conn, init_data)
810
+ self.ports: pm.PortsManager[ports.PFreya800G4S2P_a] = pm.PortsManager(
811
+ conn=conn,
812
+ ports_type=ports.PFreya800G4S2P_a,
813
+ module_id=self.module_id,
814
+ ports_count=self.ports_count
815
+ )
816
+ """Port Index Manager of Freya-800G-4S-2P[a]"""
817
+
818
+
800
819
  #endregion
@@ -0,0 +1,181 @@
1
+ from typing import (
2
+ TYPE_CHECKING,
3
+ Tuple,
4
+ )
5
+ if TYPE_CHECKING:
6
+ from xoa_driver.internals.core import interfaces as itf
7
+ from xoa_driver.internals.commands import (
8
+ PP_PRECODING,
9
+ PP_GRAYCODING,
10
+ PL1_PHYTXEQ_LEVEL,
11
+ PL1_PHYTXEQ_COEFF,
12
+ PL1_PCS_VARIANT,
13
+ PL1_PHYTXEQ,
14
+ PL1_CWE_CYCLE,
15
+ PL1_CWE_ERR_SYM_INDICES,
16
+ PL1_CWE_BIT_ERR_MASK,
17
+ PL1_CWE_FEC_ENGINE,
18
+ PL1_CWE_FEC_STATS,
19
+ PL1_CWE_CONTROL,
20
+ PL1_CWE_FEC_STATS_CLEAR,
21
+ PP_PRBSTYPE,
22
+ PL1_PNSWAP_RX,
23
+ PL1_PNSWAP_TX,
24
+ PP_AUTONEG,
25
+ PP_AUTONEGSTATUS,
26
+ PP_LINKTRAIN,
27
+ )
28
+ from .pcs_pma_ghijkl import (
29
+ Prbs,
30
+ )
31
+ from xoa_driver import enums
32
+
33
+ class EdunPMA:
34
+ """Edun PMA"""
35
+
36
+ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None:
37
+ self.precoding = PP_PRECODING(conn, module_id, port_id, serdes_xindex)
38
+ """GET/SET Pre-Coding Configurations.
39
+
40
+ :type: PP_PRECODING
41
+ """
42
+
43
+ self.graycoding = PP_GRAYCODING(conn, module_id, port_id, serdes_xindex)
44
+ """GET/SET Gray-Coding Configurations.
45
+
46
+ :type: PP_GRAYCODING
47
+ """
48
+
49
+ self.pn_swap_rx = PL1_PNSWAP_RX(conn, module_id, port_id, serdes_xindex)
50
+ """GET/SET PN-Swap RX Configurations.
51
+
52
+ :type: PL1_PNSWAP_RX
53
+ """
54
+
55
+ self.pn_swap_tx = PL1_PNSWAP_TX(conn, module_id, port_id, serdes_xindex)
56
+ """GET/SET PN-Swap TX Configurations.
57
+
58
+ :type: PL1_PNSWAP_TX
59
+ """
60
+
61
+ class EdunTxTap:
62
+ """Edun Tx Tap"""
63
+
64
+ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None:
65
+ self.native = PL1_PHYTXEQ(conn, module_id, port_id, serdes_xindex)
66
+ """TX tap native value. (only for Edun)
67
+
68
+ :type: PL1_PHYTXEQ
69
+ """
70
+
71
+ self.level = PL1_PHYTXEQ_LEVEL(conn, module_id, port_id, serdes_xindex)
72
+ """TX tap mV/dB value. (only for Edun)
73
+
74
+ :type: PL1_PHYTXEQ_LEVEL
75
+ """
76
+
77
+ self.ieee = PL1_PHYTXEQ_COEFF(conn, module_id, port_id, serdes_xindex)
78
+ """TX tap IEEE coefficient value. (only for Edun)
79
+
80
+ :type: PL1_PHYTXEQ_COEFF
81
+ """
82
+
83
+ # class EdunRxTap:
84
+ # """Edun Rx tap
85
+ # """
86
+ # def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None:
87
+ # self.status = P_EDUN_RX_STATUS(conn, module_id, port_id, serdes_xindex)
88
+ # """Edun Rx tap status
89
+ # """
90
+
91
+ class EdunMedium:
92
+ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None:
93
+ self.tx = EdunTxTap(conn, module_id, port_id, serdes_xindex)
94
+ """Edun Tx tap
95
+ """
96
+ # self.rx = EdunRxTap(conn, module_id, port_id, serdes_xindex)
97
+ # """Edun Rx tap
98
+ # """
99
+
100
+ class SerDesEdun:
101
+ """L23 high-speed port SerDes configuration and status."""
102
+
103
+ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None:
104
+
105
+ self.prbs = Prbs(conn, module_id, port_id, serdes_xindex)
106
+ """PRBS
107
+ :type: Prbs
108
+ """
109
+
110
+ self.pma = EdunPMA(conn, module_id, port_id, serdes_xindex)
111
+ """Edun PMA
112
+
113
+ :type: EdunPMA
114
+ """
115
+
116
+ self.medium = EdunMedium(conn, module_id, port_id, serdes_xindex)
117
+ """Edun medium
118
+
119
+ :type: EdunMedium
120
+ """
121
+
122
+ class EdunAutoneg:
123
+ """Edun port-level autoneg. For per-serdes configuration and status, use serdes[x]
124
+ """
125
+ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int) -> None:
126
+ self.config = PP_AUTONEG(conn, module_id, port_id)
127
+ """Autoneg config and status
128
+ """
129
+ self.status = PP_AUTONEGSTATUS(conn, module_id, port_id)
130
+ """Autoneg status
131
+ """
132
+
133
+ class EdunFecCodewordErrorInject:
134
+ """Edun FEC Codeword Error Injection
135
+ """
136
+ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int) -> None:
137
+ self.cycle = PL1_CWE_CYCLE(conn, module_id, port_id)
138
+ """FEC codeword error injection cycle.
139
+ """
140
+ self.err_symbols = PL1_CWE_ERR_SYM_INDICES(conn, module_id, port_id)
141
+ """The positions of the errored symbols in errored codewords.
142
+ """
143
+ self.bit_err_mask = PL1_CWE_BIT_ERR_MASK(conn, module_id, port_id)
144
+ """The bit error mask for the errored symbols.
145
+ """
146
+ self.engine = PL1_CWE_FEC_ENGINE(conn, module_id, port_id)
147
+ """The FEC engines to use.
148
+ """
149
+ self.statistics = PL1_CWE_FEC_STATS(conn, module_id, port_id)
150
+ """FEC error injection statistics
151
+ """
152
+ self.clear_stats = PL1_CWE_FEC_STATS_CLEAR(conn, module_id, port_id)
153
+ """Clear FEC codeword injection stats
154
+ """
155
+ self.control = PL1_CWE_CONTROL(conn, module_id, port_id)
156
+ """Control the FEC codeword error injection
157
+ """
158
+
159
+ class Layer1:
160
+ def __init__(self, conn: "itf.IConnection", port) -> None:
161
+ self.serdes: Tuple[SerDesEdun, ...] = tuple(
162
+ SerDesEdun(conn, *port.kind, serdes_xindex=idx)
163
+ for idx in range(port.info.capabilities.serdes_count)
164
+ )
165
+ self.autoneg = EdunAutoneg(conn, *port.kind)
166
+ """Edun port-level autoneg. For per-serdes configuration and status, use serdes[x]
167
+ """
168
+ self.lt = PP_LINKTRAIN(conn, *port.kind)
169
+ """Edun Link Training on serdes level
170
+
171
+ :type: PP_LINKTRAIN
172
+ """
173
+ self.pcs_variant = PL1_PCS_VARIANT(conn, *port.kind)
174
+ """PCS variant configuration
175
+ """
176
+ self.fec_error_inject = EdunFecCodewordErrorInject(conn, *port.kind)
177
+ """FEC codeword error injection
178
+ """
179
+ self.prbs_config = PP_PRBSTYPE(conn, *port.kind)
180
+ """PRBS configuration, including PRBS polynomial, invert mode, and statistic collection mode (for RX).
181
+ """
@@ -0,0 +1,82 @@
1
+
2
+ import functools
3
+ from typing import TYPE_CHECKING, Tuple
4
+ from typing import Self
5
+ from xoa_driver.internals.commands import (
6
+ P_DYNAMIC,
7
+ )
8
+ from xoa_driver import enums
9
+ from xoa_driver.internals.utils import attributes as utils
10
+ if TYPE_CHECKING:
11
+ from xoa_driver.internals.core import interfaces as itf
12
+
13
+ from .bases.port_l23_genuine import BasePortL23Genuine
14
+ from .pcs_pma_ijkl_chimera import PcsPma as PcsPma1
15
+ from .pcs_pma_ghijkl import (
16
+ PcsPma as PcsPma2,
17
+ SerDes,
18
+ )
19
+ from .pcs_pma_l import PcsPma as PcsPma3
20
+ from .edun_l1 import Layer1
21
+
22
+ class PcsPma(PcsPma1, PcsPma2, PcsPma3):
23
+ """Edun PCS/PMA
24
+ """
25
+ def __init__(self, conn: "itf.IConnection", port) -> None:
26
+ PcsPma1.__init__(self, conn, port)
27
+ PcsPma2.__init__(self, conn, port)
28
+ PcsPma3.__init__(self, conn, port)
29
+
30
+ class L1(Layer1):
31
+ """Edun L1
32
+ """
33
+ def __init__(self, conn: "itf.IConnection", port) -> None:
34
+ Layer1.__init__(self, conn, port)
35
+
36
+
37
+ class FamilyEdun(BasePortL23Genuine):
38
+ pcs_pma: PcsPma
39
+ """PCS/PMA layer
40
+
41
+ :type: PcsPma
42
+ """
43
+
44
+ # serdes: Tuple[SerDes, ...]
45
+ # """SerDes index
46
+
47
+ # :type: Tuple[SerDes, ...]
48
+ # """
49
+
50
+ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int) -> None:
51
+ super().__init__(conn, module_id, port_id)
52
+ self.dynamic = P_DYNAMIC(conn, module_id, port_id)
53
+ """L23 port's dynamic traffic change.
54
+
55
+ :type: P_DYNAMIC
56
+ """
57
+
58
+ # self.fault = Fault(conn, module_id, port_id)
59
+
60
+ async def _setup(self) -> Self:
61
+ await super()._setup()
62
+ self.pcs_pma = PcsPma(self._conn, self)
63
+ # self.serdes = tuple(
64
+ # SerDes(self._conn, *self.kind, serdes_xindex=serdes_xindex)
65
+ # for serdes_xindex in range(self.info.capabilities.serdes_count)
66
+ # )
67
+ self.l1 = L1(self._conn, self)
68
+ return self
69
+
70
+ on_dynamic_change = functools.partialmethod(utils.on_event, P_DYNAMIC)
71
+ """Register a callback to the event that the port's dynamic traffic setting changes."""
72
+
73
+
74
+ class PEdun800G3S1PSMPX_a(FamilyEdun):
75
+ """L23 port on Edun-800G-3S-1P-SMPX[a] module.
76
+ """
77
+ ...
78
+
79
+ class PEdun1600G4S1POSFP_a(FamilyEdun):
80
+ """L23 port on Edun-1600G-4S-1P-OSFP[a] module.
81
+ """
82
+ ...
@@ -41,11 +41,11 @@ class FamilyFreya(BasePortL23Genuine):
41
41
  :type: PcsPma
42
42
  """
43
43
 
44
- serdes: Tuple[SerDes, ...]
45
- """SerDes index
44
+ # serdes: Tuple[SerDes, ...]
45
+ # """SerDes index
46
46
 
47
- :type: Tuple[SerDes, ...]
48
- """
47
+ # :type: Tuple[SerDes, ...]
48
+ # """
49
49
 
50
50
  def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int) -> None:
51
51
  super().__init__(conn, module_id, port_id)
@@ -60,10 +60,10 @@ class FamilyFreya(BasePortL23Genuine):
60
60
  async def _setup(self) -> Self:
61
61
  await super()._setup()
62
62
  self.pcs_pma = PcsPma(self._conn, self)
63
- self.serdes = tuple(
64
- SerDes(self._conn, *self.kind, serdes_xindex=serdes_xindex)
65
- for serdes_xindex in range(self.info.capabilities.serdes_count)
66
- )
63
+ # self.serdes = tuple(
64
+ # SerDes(self._conn, *self.kind, serdes_xindex=serdes_xindex)
65
+ # for serdes_xindex in range(self.info.capabilities.serdes_count)
66
+ # )
67
67
  self.l1 = L1(self._conn, self)
68
68
  return self
69
69
 
@@ -130,6 +130,12 @@ class PFreya800G4S1P_f(FamilyFreya):
130
130
  ...
131
131
 
132
132
 
133
+ class PFreya800G4S2P_a(FamilyFreya):
134
+ """L23 port on Freya-800G-4S-2P[a] module.
135
+ """
136
+ ...
137
+
138
+
133
139
  class PFreya800G4S1POSFP_a(FamilyFreya):
134
140
  """L23 port on Freya-800G-4S-1P-OSFP[a] module.
135
141
  """
@@ -23,26 +23,46 @@ class ModuleLocalState:
23
23
  "reservation",
24
24
  "reserved_by",
25
25
  "model",
26
+ "model_name",
27
+ "serial_number",
28
+ "version_string",
29
+ "revision",
26
30
  )
27
31
 
28
32
  def __init__(self) -> None:
29
33
  self.reservation: enums.ReservedStatus = enums.ReservedStatus.RELEASED
30
34
  self.reserved_by: str = ""
31
35
  self.model: str = ""
36
+ self.model_name: str = ""
37
+ self.serial_number: str = ""
38
+ self.version_string: str = ""
39
+ self.revision: str = ""
32
40
 
33
41
  async def initiate(self, module) -> None:
34
42
  (
35
43
  reservation_r,
36
44
  reserved_by_r,
37
45
  model_r,
46
+ model_name_r,
47
+ serial_number_r,
48
+ version_string_r,
49
+ revision_r,
38
50
  ) = await funcs.apply(
39
51
  module.reservation.get(),
40
52
  module.reserved_by.get(),
41
53
  module.model.get(),
54
+ module.model_name.get(),
55
+ module.serial_number.get(),
56
+ module.version_str.get(),
57
+ module.revision.get(),
42
58
  )
43
59
  self.reservation = enums.ReservedStatus(reservation_r.operation)
44
60
  self.reserved_by = reserved_by_r.username
45
61
  self.model = model_r.model
62
+ self.model_name = enums.ModuleModelName(model_name_r.name).name
63
+ self.serial_number = serial_number_r.serial_number
64
+ self.version_string = version_string_r.version_str
65
+ self.revision = revision_r.revision
46
66
 
47
67
  def register_subscriptions(self, module) -> None:
48
68
  module._conn.subscribe(M_RESERVEDBY, utils.Update(self, "reserved_by", "username", module._check_identity))
@@ -34,6 +34,8 @@ class TesterLocalState:
34
34
  "driver_version",
35
35
  "reservation",
36
36
  "reserved_by",
37
+ "version_string",
38
+ "name",
37
39
  )
38
40
 
39
41
  def __init__(self, host: str, port: int) -> None:
@@ -46,6 +48,8 @@ class TesterLocalState:
46
48
  self.driver_version: int = 0
47
49
  self.reservation: enums.ReservedStatus = enums.ReservedStatus.RELEASED
48
50
  self.reserved_by: str = ""
51
+ self.version_string: str = ""
52
+ self.name: str = ""
49
53
 
50
54
  async def initiate(self, tester) -> None:
51
55
  (
@@ -55,6 +59,8 @@ class TesterLocalState:
55
59
  serial_res,
56
60
  reserved_by_res,
57
61
  reservation_resp,
62
+ version_string_res,
63
+ name_res,
58
64
  ) = await funcs.apply(
59
65
  tester.capabilities.get(),
60
66
  tester.model.get(),
@@ -62,6 +68,8 @@ class TesterLocalState:
62
68
  tester.serial_no.get(),
63
69
  tester.reserved_by.get(),
64
70
  tester.reservation.get(),
71
+ tester.version_str.get(),
72
+ tester.name.get(),
65
73
  )
66
74
  self.reserved_by = reserved_by_res.username
67
75
  self.model = model_res.model
@@ -70,6 +78,8 @@ class TesterLocalState:
70
78
  self.serial_number = serial_res.serial_number
71
79
  self.reservation = reservation_resp.operation
72
80
  self.capabilities = capabilities_resp
81
+ self.version_string = version_string_res.version_str
82
+ self.name = name_res.chassis_name
73
83
 
74
84
  def register_subscriptions(self, tester) -> None:
75
85
  tester._conn.subscribe(C_RESERVEDBY, utils.Update(self, "reserved_by", "username"))
xoa_driver/lli.py CHANGED
@@ -1,5 +1,6 @@
1
1
  #: Low-Level interface
2
2
 
3
+ """Low-Level Interface (LLI) components."""
3
4
 
4
5
  from xoa_driver.internals import commands
5
6
  from xoa_driver.internals.core.transporter.registry import get_command
xoa_driver/misc.py CHANGED
@@ -1,5 +1,6 @@
1
1
  #: Other types which are used by ports or as a parameter to attribute set method.
2
2
 
3
+ """Other types used in Xena test ports."""
3
4
 
4
5
  from .internals.core.token import Token
5
6
  from .internals.core.transporter.protocol.payload.types import Hex
xoa_driver/modules.py CHANGED
@@ -1,4 +1,5 @@
1
1
  #: All available test module types.
2
+ """Xena test module types."""
2
3
 
3
4
  from .internals.hli.modules.modules_l23.module_l23_base import ModuleL23
4
5
  from .internals.hli.modules.modules_l23.family_d import (
@@ -31,6 +32,7 @@ from .internals.hli.modules.modules_l23.family_g import (
31
32
  MLoki100G3S1PSE,
32
33
  MLoki100G3S1PB,
33
34
  MLoki100G3S1PB_b,
35
+ MLoki100G5S4P_a,
34
36
  )
35
37
  from .internals.hli.modules.modules_l23.family_h import (
36
38
  MLoki100G5S1P,
@@ -116,6 +118,11 @@ from .internals.hli.modules.module_chimera import (
116
118
  from .internals.hli.modules.module_l47 import ModuleL47
117
119
  from .internals.hli.modules.module_l47ve import ModuleL47VE
118
120
 
121
+ from .internals.hli.modules.modules_l23.family_edun import (
122
+ MEdun800G3S1PSMPX_a,
123
+ MEdun1600G4S1POSFP_a
124
+ )
125
+
119
126
  import typing
120
127
 
121
128
  Z10OdinModule = typing.Union[
@@ -153,6 +160,7 @@ Z100LokiModule = typing.Union[
153
160
  MLoki100G3S1PB_b,
154
161
  MLoki100G5S1P,
155
162
  MLoki100G5S2P,
163
+ MLoki100G5S4P_a,
156
164
  ]
157
165
 
158
166
  Z400ThorModule = typing.Union[
@@ -215,6 +223,11 @@ Z800FreyaModule = typing.Union[
215
223
  MFreya800G4S1POSFP_f_g2,
216
224
  ]
217
225
 
226
+ Z1600EdunModule = typing.Union[
227
+ MEdun800G3S1PSMPX_a,
228
+ MEdun1600G4S1POSFP_a
229
+ ]
230
+
218
231
  E100ChimeraModule = typing.Union[
219
232
  ModuleChimera,
220
233
  MChi100G5S2P,
@@ -261,6 +274,7 @@ GenericL23Module = typing.Union[
261
274
  "MLoki100G3S1PB_b",
262
275
  "MLoki100G5S1P",
263
276
  "MLoki100G5S2P",
277
+ "MLoki100G5S4P_a",
264
278
 
265
279
  "MThor100G5S4P",
266
280
  "MThor400G7S1P",
@@ -317,6 +331,9 @@ GenericL23Module = typing.Union[
317
331
  "MFreya800G4S1POSFP_d_g2",
318
332
  "MFreya800G4S1POSFP_e_g2",
319
333
  "MFreya800G4S1POSFP_f_g2",
334
+
335
+ "MEdun800G3S1PSMPX_a",
336
+ "MEdun1600G4S1POSFP_a",
320
337
  ]
321
338
 
322
339
  GenericAnyModule = typing.Union[
@@ -374,6 +391,7 @@ __all__ = (
374
391
  "MLoki100G3S1PB_b",
375
392
  "MLoki100G5S1P",
376
393
  "MLoki100G5S2P",
394
+ "MLoki100G5S4P_a",
377
395
 
378
396
  "Z400ThorModule",
379
397
  "MThor100G5S4P",
@@ -433,6 +451,10 @@ __all__ = (
433
451
  "MFreya800G4S1POSFP_e_g2",
434
452
  "MFreya800G4S1POSFP_f_g2",
435
453
 
454
+ "Z1600EdunModule",
455
+ "MEdun800G3S1PSMPX_a",
456
+ "MEdun1600G4S1POSFP_a",
457
+
436
458
  "E100ChimeraModule",
437
459
  "ModuleChimera",
438
460
  "MChi100G5S2P",
xoa_driver/ports.py CHANGED
@@ -1,4 +1,5 @@
1
1
  #: All available test port types.
2
+ """Xena test port types."""
2
3
 
3
4
  import typing
4
5
 
@@ -86,6 +87,7 @@ from xoa_driver.internals.hli.ports.port_l23.family_l1 import (
86
87
  PFreya800G4S1P_d,
87
88
  PFreya800G4S1P_e,
88
89
  PFreya800G4S1P_f,
90
+ PFreya800G4S2P_a,
89
91
  PFreya800G4S1POSFP_a,
90
92
  PFreya800G4S1POSFP_b,
91
93
  PFreya800G4S1POSFP_c,
@@ -96,6 +98,11 @@ from xoa_driver.internals.hli.ports.port_l23.family_l1 import (
96
98
 
97
99
  from xoa_driver.internals.hli.ports.port_l23.family_m import POdin1G3S6PT1RJ45
98
100
 
101
+ from xoa_driver.internals.hli.ports.port_l23.family_edun import (
102
+ PEdun800G3S1PSMPX_a,
103
+ PEdun1600G4S1POSFP_a
104
+ )
105
+
99
106
  Z10OdinPort = typing.Union[
100
107
  POdin1G3S2PT,
101
108
  POdin1G3S6P,
@@ -156,6 +163,7 @@ Z800FreyaPort = typing.Union[
156
163
  PFreya800G4S1P_d,
157
164
  PFreya800G4S1P_e,
158
165
  PFreya800G4S1P_f,
166
+ PFreya800G4S2P_a,
159
167
  PFreya800G4S1POSFP_a,
160
168
  PFreya800G4S1POSFP_b,
161
169
  PFreya800G4S1POSFP_c,
@@ -164,6 +172,11 @@ Z800FreyaPort = typing.Union[
164
172
  PFreya800G4S1POSFP_f,
165
173
  ]
166
174
 
175
+ Z1600EdunPort = typing.Union[
176
+ PEdun800G3S1PSMPX_a,
177
+ PEdun1600G4S1POSFP_a
178
+ ]
179
+
167
180
  E100ChimeraPort = typing.Union[
168
181
  PortChimera,
169
182
  PChi100G5S2P,
@@ -230,12 +243,16 @@ GenericL23Port = typing.Union[
230
243
  "PFreya800G4S1P_d",
231
244
  "PFreya800G4S1P_e",
232
245
  "PFreya800G4S1P_f",
246
+ "PFreya800G4S2P_a",
233
247
  "PFreya800G4S1POSFP_a",
234
248
  "PFreya800G4S1POSFP_b",
235
249
  "PFreya800G4S1POSFP_c",
236
250
  "PFreya800G4S1POSFP_d",
237
251
  "PFreya800G4S1POSFP_e",
238
252
  "PFreya800G4S1POSFP_f",
253
+
254
+ "PEdun800G3S1PSMPX_a",
255
+ "PEdun1600G4S1POSFP_a",
239
256
  ]
240
257
 
241
258
  GenericAnyPort = typing.Union[
@@ -314,6 +331,7 @@ __all__ = (
314
331
  "PFreya800G4S1P_d",
315
332
  "PFreya800G4S1P_e",
316
333
  "PFreya800G4S1P_f",
334
+ "PFreya800G4S2P_a",
317
335
  "PFreya800G4S1POSFP_a",
318
336
  "PFreya800G4S1POSFP_b",
319
337
  "PFreya800G4S1POSFP_c",
@@ -321,6 +339,10 @@ __all__ = (
321
339
  "PFreya800G4S1POSFP_e",
322
340
  "PFreya800G4S1POSFP_f",
323
341
 
342
+ "Z1600EdunPort",
343
+ "PEdun800G3S1PSMPX_a",
344
+ "PEdun1600G4S1POSFP_a",
345
+
324
346
  "E100ChimeraPort",
325
347
  "PortChimera",
326
348
  "PChi100G5S2P",