tdl-xoa-driver 1.4.0__py3-none-any.whl → 1.5.0__py3-none-any.whl
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- {tdl_xoa_driver-1.4.0.dist-info → tdl_xoa_driver-1.5.0.dist-info}/METADATA +8 -8
- {tdl_xoa_driver-1.4.0.dist-info → tdl_xoa_driver-1.5.0.dist-info}/RECORD +49 -36
- xoa_driver/__init__.py +2 -2
- xoa_driver/enums.py +2 -0
- xoa_driver/exceptions.py +2 -0
- xoa_driver/functions/anlt.py +2 -0
- xoa_driver/functions/anlt_ll_debug.py +2 -0
- xoa_driver/functions/cli/__init__.py +21 -0
- xoa_driver/functions/cli/_cli_manager.py +541 -0
- xoa_driver/functions/cli/_config_block.py +334 -0
- xoa_driver/functions/cli/_socket_driver.py +111 -0
- xoa_driver/functions/cli/port_config.py +116 -0
- xoa_driver/functions/cli/testbed_config.py +179 -0
- xoa_driver/functions/cmis/__init__.py +8 -0
- xoa_driver/functions/cmis/_constants.py +25 -0
- xoa_driver/functions/cmis/_replies.py +600 -0
- xoa_driver/functions/cmis/_utils.py +49 -0
- xoa_driver/functions/cmis/cdb.py +1266 -0
- xoa_driver/functions/exceptions.py +2 -0
- xoa_driver/functions/headers.py +2 -0
- xoa_driver/functions/mgmt.py +42 -19
- xoa_driver/functions/tools.py +9 -3
- xoa_driver/hlfuncs.py +6 -2
- xoa_driver/internals/commands/c_commands.py +6 -10
- xoa_driver/internals/commands/enums.py +25 -1
- xoa_driver/internals/commands/p_commands.py +38 -2
- xoa_driver/internals/commands/pl1_commands.py +130 -73
- xoa_driver/internals/commands/pp_commands.py +44 -55
- xoa_driver/internals/commands/pr_commands.py +17 -16
- xoa_driver/internals/commands/px_commands.py +54 -54
- xoa_driver/internals/core/transporter/logger/__state_on_user.py +1 -1
- xoa_driver/internals/exceptions/modules.py +4 -3
- xoa_driver/internals/hli/modules/modules_l23/family_edun.py +82 -0
- xoa_driver/internals/hli/modules/modules_l23/family_g.py +1 -1
- xoa_driver/internals/hli/modules/modules_l23/family_l1.py +19 -0
- xoa_driver/internals/hli/ports/port_l23/edun_l1.py +181 -0
- xoa_driver/internals/hli/ports/port_l23/family_edun.py +82 -0
- xoa_driver/internals/hli/ports/port_l23/family_l1.py +14 -8
- xoa_driver/internals/state_storage/modules_state.py +20 -0
- xoa_driver/internals/state_storage/testers_state.py +10 -0
- xoa_driver/lli.py +1 -0
- xoa_driver/misc.py +1 -0
- xoa_driver/modules.py +22 -0
- xoa_driver/ports.py +22 -0
- xoa_driver/testers.py +2 -0
- xoa_driver/utils.py +2 -0
- xoa_driver/functions/cli.py +0 -581
- {tdl_xoa_driver-1.4.0.dist-info → tdl_xoa_driver-1.5.0.dist-info}/WHEEL +0 -0
- {tdl_xoa_driver-1.4.0.dist-info → tdl_xoa_driver-1.5.0.dist-info}/licenses/LICENSE +0 -0
- {tdl_xoa_driver-1.4.0.dist-info → tdl_xoa_driver-1.5.0.dist-info}/top_level.txt +0 -0
xoa_driver/functions/headers.py
CHANGED
xoa_driver/functions/mgmt.py
CHANGED
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@@ -1,13 +1,23 @@
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"""
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The resource management high-level function module,
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including testers, modules, ports, and streams.
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"""
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from __future__ import annotations
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import asyncio
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from typing import (
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TYPE_CHECKING,
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Any,
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Union,
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)
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from xoa_driver import enums, testers
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from xoa_driver.utils import apply
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from xoa_driver.internals.hli.ports.port_l23.
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from xoa_driver.ports import
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from xoa_driver.
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from xoa_driver.
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if TYPE_CHECKING:
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from xoa_driver.internals.hli.ports.port_l23.family_l import FamilyL
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from xoa_driver.internals.hli.ports.port_l23.family_l1 import FamilyFreya
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from xoa_driver.ports import GenericAnyPort, GenericL23Port
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from xoa_driver.modules import GenericAnyModule, GenericL23Module, ModuleChimera, Z800FreyaModule, Z1600EdunModule
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from xoa_driver.testers import GenericAnyTester, L23Tester
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from .exceptions import (
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NotSupportMedia,
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NotSupportPortSpeed,
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@@ -18,10 +28,6 @@ from itertools import chain # type: ignore[Pylance false warning]
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from datetime import datetime
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import json
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PcsPmaSupported = (FamilyL, FamilyFreya)
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AutoNegSupported = (FamilyL, FamilyFreya)
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LinkTrainingSupported = FamilyL
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# region Testers
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async def reserve_tester(tester: GenericAnyTester, force: bool = True) -> None:
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@@ -150,14 +156,14 @@ async def release_module(
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def get_module_supported_media(
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module: GenericL23Module | ModuleChimera,
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) -> list[dict[str,
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) -> list[dict[str, Any]]:
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"""
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Get a list of supported media, port speed and count of the module.
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:param module: The module object
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:type module: GenericAnyModule
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:return: List of supported media, port speed and count
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:rtype: list[dict[str,
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:rtype: list[dict[str, Any]]
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"""
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supported_media_list = []
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item = {}
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async def set_module_media_config(
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module:
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module: Union[GenericL23Module, ModuleChimera],
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media: enums.MediaConfigurationType,
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force: bool = True,
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) -> None:
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async def set_module_port_config(
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module:
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module: Union[GenericL23Module, ModuleChimera],
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port_count: int,
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port_speed: int,
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force: bool = True,
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Set module's port-speed configuration
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:param module: The module object
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:type module:
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:type module: Union[GenericL23Module, ModuleChimera]
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:param port_count: The port count
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:type port_count: int
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:param port_speed: The port speed in Mbps, e.g. 40000 for 40G
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async def set_module_config(
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module:
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module: Union[GenericL23Module, ModuleChimera],
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media: enums.MediaConfigurationType,
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port_count: int,
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port_speed: int,
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"""Change the module configuration to the target media, port count and port speed.
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:param module: the module object
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:type module:
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:type module: Union[GenericL23Module, ModuleChimera]
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:param media: the target media for the module
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:type media: enums.MediaConfigurationType
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:param port_count: the target port count
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return timedelta.days
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from xoa_driver.modules import GenericAnyModule, GenericL23Module, ModuleChimera, Z800FreyaModule, Z1600EdunModule
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async def get_module_cage_insertion_count(module: Union[Z800FreyaModule, Z1600EdunModule], cage_index: int) -> int:
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"""
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Get module cage insertion count
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:param module: The Z800 Freya module object
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:type module: Z800FreyaModule
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:type module: Union[Z800FreyaModule, Z1600EdunModule]
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:param cage_index: The cage index
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:return: Insertion count of the cage
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return result
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async def get_module_cage_count(module: Union[Z800FreyaModule, Z1600EdunModule]) -> int:
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"""
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Get module cage count
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:return: The number of cages in the module
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"""
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resp = await module.health.cage_insertion.get()
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info_js = resp.info
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info_dict = json.loads(info_js)
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result = len(info_dict['1']['data'])
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return result
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# endregion
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xoa_driver/functions/tools.py
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from __future__ import annotations
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from typing import
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from typing import (
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Any,
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)
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if TYPE_CHECKING:
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from xoa_driver.ports import GenericAnyPort
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def dictionize_autoneg_status(
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xoa_driver/hlfuncs.py
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"""High-level functions."""
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cmis,
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Chassis debug command
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Chassis debug command for internal use only.
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E_100_Q_C_CHIMERA = 18
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Z_800_Q_X_C_FREYA = 21
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Z_1604_S_C_EDUN = 22
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Z_1608_O_C_EDUN = 23
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Z_100_Q_X_LOKI = 13
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+
Z_400_Q_X_THOR = 14
|
|
3203
|
+
Z_800_Q_X_FREYA = 15
|
|
3204
|
+
Z_1604_S_EDUN = 16
|
|
3205
|
+
Z_1608_O_EDUN = 17
|
|
3206
|
+
Z_1616_O_EDUN = 18
|
|
3183
3207
|
|
|
3184
3208
|
class ModuleConfigStatus(IntEnum):
|
|
3185
3209
|
UNKNOWN = 0
|
|
@@ -601,7 +601,44 @@ class P_CAPABILITIES:
|
|
|
601
601
|
* Bit 0: Normal modifier (16/24-bit) supports little-endian
|
|
602
602
|
* Bit 1: Extended modifier (32-bit) supports little-endian
|
|
603
603
|
"""
|
|
604
|
-
|
|
604
|
+
capture_bitmask: int = field(XmpInt(), min_version=470)
|
|
605
|
+
"""integer, bitmask indicating capture capabilities.
|
|
606
|
+
|
|
607
|
+
If all bits are 0: CAPTURE_NOT_SUPPORTED
|
|
608
|
+
|
|
609
|
+
Bits [0:11] are for Start triggers:
|
|
610
|
+
|
|
611
|
+
* Bit 0: CAPTURE_START_ON
|
|
612
|
+
* Bit 1: CAPTURE_START_FCSERROR
|
|
613
|
+
* Bit 2: CAPTURE_START_FILTER
|
|
614
|
+
* Bit 3: CAPTURE_START_PLDERROR
|
|
615
|
+
* Bit 4-11: Reserved
|
|
616
|
+
|
|
617
|
+
Bits [12:23] are for Stop triggers:
|
|
618
|
+
|
|
619
|
+
* Bit 12: CAPTURE_STOP_FULL
|
|
620
|
+
* Bit 13: CAPTURE_STOP_FCSERROR
|
|
621
|
+
* Bit 14: CAPTURE_STOP_FILTER
|
|
622
|
+
* Bit 15: CAPTURE_STOP_PLDERROR
|
|
623
|
+
* Bit 16: CAPTURE_STOP_USERSTOP
|
|
624
|
+
* Bit 17-23: Reserved
|
|
625
|
+
|
|
626
|
+
Bits [24:31] are for Keep modes:
|
|
627
|
+
|
|
628
|
+
* Bit 24: CAPTURE_KEEP_ALL
|
|
629
|
+
* Bit 25: CAPTURE_KEEP_FCSERR
|
|
630
|
+
* Bit 26: CAPTURE_KEEP_NOTPLD
|
|
631
|
+
* Bit 27: CAPTURE_KEEP_TPLD
|
|
632
|
+
* Bit 28: CAPTURE_KEEP_FILTER
|
|
633
|
+
* Bit 29: CAPTURE_KEEP_PLDERR
|
|
634
|
+
* Bit 30-31: Reserved
|
|
635
|
+
"""
|
|
636
|
+
num_txeq_pre: int = field(XmpInt(), min_version=470)
|
|
637
|
+
"""The number of postcursors = num_txeq - num_txeq_pre - 1."""
|
|
638
|
+
txeq_max_seq: typing.List[int] = field(XmpSequence(types_chunk=[XmpInt()], length=10), min_version=470)
|
|
639
|
+
"""max value of individual TXEQ taps, SEQuential: <pre-n> <pre-(n-q)> ... <prr1> <main> <post1> <post2> ...."""
|
|
640
|
+
txeq_min_seq: typing.List[int] = field(XmpSequence(types_chunk=[XmpInt()], length=10), min_version=470)
|
|
641
|
+
"""min-value of individual TXEQ taps, SEQuential: <pre-n> <pre-(n-q)> ... <prr1> <main> <post1> <post2> ...."""
|
|
605
642
|
|
|
606
643
|
|
|
607
644
|
def get(self) -> Token[GetDataAttr]:
|
|
@@ -1512,7 +1549,6 @@ class P_XMITONE:
|
|
|
1512
1549
|
A valid Frame Check Sum is written into the final four bytes.
|
|
1513
1550
|
|
|
1514
1551
|
:param hex_data: raw bytes of the packet in hex to transmit
|
|
1515
|
-
:rtype: typing.List[str]
|
|
1516
1552
|
"""
|
|
1517
1553
|
|
|
1518
1554
|
return Token(self._connection, build_set_request(self, module=self._module, port=self._port, hex_data=hex_data))
|
|
@@ -832,7 +832,16 @@ class PL1_PRESET_CONFIG_COEFF:
|
|
|
832
832
|
@dataclass
|
|
833
833
|
class PL1_PHYTXEQ_LEVEL:
|
|
834
834
|
"""
|
|
835
|
-
Control and monitor the equalizer settings of the on-board PHY in the transmission direction (towards the transceiver cage).
|
|
835
|
+
Control and monitor the equalizer settings (mV/dB values) of the on-board PHY in the transmission direction (towards the transceiver cage).
|
|
836
|
+
|
|
837
|
+
This command returns a variable number of tap values with module-dependent ordering:
|
|
838
|
+
|
|
839
|
+
- **Regular Freya**: Original fixed format [pre3, pre2, pre, main, post]
|
|
840
|
+
- **Loki-4P and H-Freya/Edun**: Variable number in N*pre, main, M*post layout
|
|
841
|
+
[pre_n, pre_n-1, ..., pre_1, main, post_1, post_2, ..., post_m]
|
|
842
|
+
|
|
843
|
+
Use P_CAPABILITIES to query ``numtxeqtaps`` and ``numtxeqpretaps`` to determine
|
|
844
|
+
the number of taps and layout.
|
|
836
845
|
|
|
837
846
|
.. note::
|
|
838
847
|
|
|
@@ -849,44 +858,63 @@ class PL1_PHYTXEQ_LEVEL:
|
|
|
849
858
|
_serdes_xindex: int
|
|
850
859
|
|
|
851
860
|
class GetDataAttr(ResponseBodyStruct):
|
|
852
|
-
|
|
853
|
-
"""
|
|
854
|
-
|
|
855
|
-
|
|
856
|
-
|
|
857
|
-
|
|
858
|
-
|
|
859
|
-
|
|
860
|
-
post: int = field(XmpInt())
|
|
861
|
-
"""integer, post tap value in dB/10, ranges from 0 to 187 Default = 0 (neutral)"""
|
|
862
|
-
|
|
861
|
+
tap_values: typing.List[int] = field(XmpSequence(types_chunk=[XmpInt()]))
|
|
862
|
+
"""list of integers, TX EQ tap values in mV/dB. The number and layout depend on the platform:
|
|
863
|
+
|
|
864
|
+
- Regular Freya: [pre3, pre2, pre, main, post] where pre3/pre2 in dB/10 (0-71), pre/post in dB/10 (0-187), main in mV (507-998)
|
|
865
|
+
- Loki-4P and H-Freya/Edun: [pre_n, ..., pre_1, main, post_1, post_2, ..., post_m]
|
|
866
|
+
where N = numtxeqpretaps and M = numtxeqtaps - numtxeqpretaps - 1
|
|
867
|
+
"""
|
|
868
|
+
|
|
863
869
|
class SetDataAttr(RequestBodyStruct):
|
|
864
|
-
|
|
865
|
-
"""
|
|
866
|
-
|
|
867
|
-
|
|
868
|
-
|
|
869
|
-
|
|
870
|
-
|
|
871
|
-
"""integer, main tap value in mV, ranges from 507 to 998."""
|
|
872
|
-
post: int = field(XmpInt())
|
|
873
|
-
"""integer, post tap value in dB/10, ranges from 0 to 187 Default = 0 (neutral)"""
|
|
870
|
+
tap_values: typing.List[int] = field(XmpSequence(types_chunk=[XmpInt()]))
|
|
871
|
+
"""list of integers, TX EQ tap values in mV/dB. The number and layout depend on the platform:
|
|
872
|
+
|
|
873
|
+
- Regular Freya: [pre3, pre2, pre, main, post] where pre3/pre2 in dB/10 (0-71), pre/post in dB/10 (0-187), main in mV (507-998)
|
|
874
|
+
- Loki-4P and H-Freya/Edun: [pre_n, ..., pre_1, main, post_1, post_2, ..., post_m]
|
|
875
|
+
where N = numtxeqpretaps and M = numtxeqtaps - numtxeqpretaps - 1
|
|
876
|
+
"""
|
|
874
877
|
|
|
875
878
|
def get(self) -> Token[GetDataAttr]:
|
|
879
|
+
"""Get the TX equalizer settings (mV/dB values) of the on-board PHY.
|
|
880
|
+
|
|
881
|
+
The returned tap values layout depends on the platform. Query P_CAPABILITIES
|
|
882
|
+
for ``numtxeqtaps`` and ``numtxeqpretaps`` to determine the format.
|
|
883
|
+
|
|
884
|
+
:return: list of TX EQ tap values in mV/dB
|
|
885
|
+
:rtype: PL1_PHYTXEQ_LEVEL.GetDataAttr
|
|
886
|
+
"""
|
|
876
887
|
|
|
877
888
|
return Token(self._connection, build_get_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex]))
|
|
878
889
|
|
|
879
|
-
def set(self,
|
|
890
|
+
def set(self, tap_values: typing.List[int]) -> Token[None]:
|
|
891
|
+
"""Set the TX equalizer settings (mV/dB values) of the on-board PHY.
|
|
892
|
+
|
|
893
|
+
The tap values layout depends on the platform. Query P_CAPABILITIES
|
|
894
|
+
for ``numtxeqtaps`` and ``numtxeqpretaps`` to determine the required format.
|
|
895
|
+
|
|
896
|
+
:param tap_values: list of TX EQ tap values in mV/dB in platform-specific order
|
|
897
|
+
:type tap_values: typing.List[int]
|
|
898
|
+
"""
|
|
880
899
|
|
|
881
900
|
return Token(
|
|
882
901
|
self._connection,
|
|
883
|
-
build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex],
|
|
884
|
-
|
|
902
|
+
build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex], tap_values=tap_values))
|
|
903
|
+
|
|
885
904
|
@register_command
|
|
886
905
|
@dataclass
|
|
887
906
|
class PL1_PHYTXEQ_COEFF:
|
|
888
907
|
"""
|
|
889
|
-
Control and monitor the equalizer settings of the on-board PHY in the transmission direction (towards the transceiver cage).
|
|
908
|
+
Control and monitor the equalizer settings (IEEE coefficient values) of the on-board PHY in the transmission direction (towards the transceiver cage).
|
|
909
|
+
|
|
910
|
+
This command returns a variable number of tap values with module-dependent ordering:
|
|
911
|
+
|
|
912
|
+
- **Regular Freya**: Original fixed format [pre3, pre2, pre, main, post]
|
|
913
|
+
- **Loki-4P and H-Freya/Edun**: Variable number in N*pre, main, M*post layout
|
|
914
|
+
[pre_n, pre_n-1, ..., pre_1, main, post_1, post_2, ..., post_m]
|
|
915
|
+
|
|
916
|
+
Use P_CAPABILITIES to query ``numtxeqtaps`` and ``numtxeqpretaps`` to determine
|
|
917
|
+
the number of taps and layout.
|
|
890
918
|
|
|
891
919
|
.. note::
|
|
892
920
|
|
|
@@ -913,38 +941,48 @@ class PL1_PHYTXEQ_COEFF:
|
|
|
913
941
|
_serdes_xindex: int
|
|
914
942
|
|
|
915
943
|
class GetDataAttr(ResponseBodyStruct):
|
|
916
|
-
|
|
917
|
-
"""
|
|
918
|
-
|
|
919
|
-
|
|
920
|
-
|
|
921
|
-
|
|
922
|
-
|
|
923
|
-
|
|
924
|
-
post: int = field(XmpInt())
|
|
925
|
-
"""integer, post tap value, negative, scaled by 1E3. Default = 0 (neutral)"""
|
|
926
|
-
|
|
944
|
+
tap_values: typing.List[int] = field(XmpSequence(types_chunk=[XmpInt()]))
|
|
945
|
+
"""list of integers, TX EQ tap values as IEEE coefficients scaled by 1E3. The number and layout depend on the platform:
|
|
946
|
+
|
|
947
|
+
- Regular Freya: [pre3, pre2, pre, main, post] where pre3/pre/post are negative, pre2/main are positive
|
|
948
|
+
- Loki-4P and H-Freya/Edun: [pre_n, ..., pre_1, main, post_1, ..., post_m]
|
|
949
|
+
where N = numtxeqpretaps and M = numtxeqtaps - numtxeqpretaps - 1
|
|
950
|
+
"""
|
|
951
|
+
|
|
927
952
|
class SetDataAttr(RequestBodyStruct):
|
|
928
|
-
|
|
929
|
-
"""
|
|
930
|
-
|
|
931
|
-
|
|
932
|
-
|
|
933
|
-
|
|
934
|
-
|
|
935
|
-
"""integer, main tap value, positive, scaled by 1E3. Default = 1000"""
|
|
936
|
-
post: int = field(XmpInt())
|
|
937
|
-
"""integer, post tap value, negative, scaled by 1E3. Default = 0 (neutral)"""
|
|
953
|
+
tap_values: typing.List[int] = field(XmpSequence(types_chunk=[XmpInt()]))
|
|
954
|
+
"""list of integers, TX EQ tap values as IEEE coefficients scaled by 1E3. The number and layout depend on the platform:
|
|
955
|
+
|
|
956
|
+
- Regular Freya: [pre3, pre2, pre, main, post] where pre3/pre/post are negative, pre2/main are positive
|
|
957
|
+
- Loki-4P and H-Freya/Edun: [pre_n, ..., pre_1, main, post_1, ..., post_m]
|
|
958
|
+
where N = numtxeqpretaps and M = numtxeqtaps - numtxeqpretaps - 1
|
|
959
|
+
"""
|
|
938
960
|
|
|
939
961
|
def get(self) -> Token[GetDataAttr]:
|
|
962
|
+
"""Get the TX equalizer settings (IEEE coefficient values) of the on-board PHY.
|
|
963
|
+
|
|
964
|
+
The returned tap values layout depends on the platform. Query P_CAPABILITIES
|
|
965
|
+
for ``numtxeqtaps`` and ``numtxeqpretaps`` to determine the format.
|
|
966
|
+
|
|
967
|
+
:return: list of TX EQ tap values as IEEE coefficients scaled by 1E3
|
|
968
|
+
:rtype: PL1_PHYTXEQ_COEFF.GetDataAttr
|
|
969
|
+
"""
|
|
940
970
|
|
|
941
971
|
return Token(self._connection, build_get_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex]))
|
|
942
972
|
|
|
943
|
-
def set(self,
|
|
973
|
+
def set(self, tap_values: typing.List[int]) -> Token[None]:
|
|
974
|
+
"""Set the TX equalizer settings (IEEE coefficient values) of the on-board PHY.
|
|
975
|
+
|
|
976
|
+
The tap values layout depends on the platform. Query P_CAPABILITIES
|
|
977
|
+
for ``numtxeqtaps`` and ``numtxeqpretaps`` to determine the required format.
|
|
978
|
+
|
|
979
|
+
:param tap_values: list of TX EQ tap values as IEEE coefficients scaled by 1E3 in platform-specific order
|
|
980
|
+
:type tap_values: typing.List[int]
|
|
981
|
+
"""
|
|
944
982
|
|
|
945
983
|
return Token(
|
|
946
984
|
self._connection,
|
|
947
|
-
build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex],
|
|
985
|
+
build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex], tap_values=tap_values))
|
|
948
986
|
|
|
949
987
|
@register_command
|
|
950
988
|
@dataclass
|
|
@@ -1345,7 +1383,16 @@ class PL1_ANLT:
|
|
|
1345
1383
|
@dataclass
|
|
1346
1384
|
class PL1_PHYTXEQ:
|
|
1347
1385
|
"""
|
|
1348
|
-
Control and monitor the equalizer settings of the on-board PHY in the transmission direction (towards the transceiver cage).
|
|
1386
|
+
Control and monitor the equalizer settings (native values) of the on-board PHY in the transmission direction (towards the transceiver cage).
|
|
1387
|
+
|
|
1388
|
+
This command returns a variable number of tap values with module-dependent ordering:
|
|
1389
|
+
|
|
1390
|
+
- **Regular Freya**: Original fixed format [pre3, pre2, pre, main, post]
|
|
1391
|
+
- **Loki-4P and H-Freya/Edun**: Variable number in N*pre, main, M*post layout
|
|
1392
|
+
[pre_n, pre_n-1, ..., pre_1, main, post_1, post_2, ..., post_m]
|
|
1393
|
+
|
|
1394
|
+
Use P_CAPABILITIES to query ``numtxeqtaps`` and ``numtxeqpretaps`` to determine
|
|
1395
|
+
the number of taps and layout.
|
|
1349
1396
|
|
|
1350
1397
|
.. note::
|
|
1351
1398
|
|
|
@@ -1362,38 +1409,48 @@ class PL1_PHYTXEQ:
|
|
|
1362
1409
|
_serdes_xindex: int
|
|
1363
1410
|
|
|
1364
1411
|
class GetDataAttr(ResponseBodyStruct):
|
|
1365
|
-
|
|
1366
|
-
"""
|
|
1367
|
-
|
|
1368
|
-
|
|
1369
|
-
|
|
1370
|
-
|
|
1371
|
-
|
|
1372
|
-
|
|
1373
|
-
post: int = field(XmpInt())
|
|
1374
|
-
"""integer, post tap value. Default = 0 (neutral)"""
|
|
1375
|
-
|
|
1412
|
+
tap_values: typing.List[int] = field(XmpSequence(types_chunk=[XmpInt()]))
|
|
1413
|
+
"""list of integers, TX EQ tap values (native values). The number and layout depend on the platform:
|
|
1414
|
+
|
|
1415
|
+
- Regular Freya: [pre3, pre2, pre, main, post]
|
|
1416
|
+
- Loki-4P and H-Freya/Edun: [pre_n, ..., pre_1, main, post_1, ..., post_m]
|
|
1417
|
+
where N = numtxeqpretaps and M = numtxeqtaps - numtxeqpretaps - 1
|
|
1418
|
+
"""
|
|
1419
|
+
|
|
1376
1420
|
class SetDataAttr(RequestBodyStruct):
|
|
1377
|
-
|
|
1378
|
-
"""
|
|
1379
|
-
|
|
1380
|
-
|
|
1381
|
-
|
|
1382
|
-
|
|
1383
|
-
|
|
1384
|
-
"""integer, main tap value."""
|
|
1385
|
-
post: int = field(XmpInt())
|
|
1386
|
-
"""integer, post tap value. Default = 0 (neutral)"""
|
|
1421
|
+
tap_values: typing.List[int] = field(XmpSequence(types_chunk=[XmpInt()]))
|
|
1422
|
+
"""list of integers, TX EQ tap values (native values). The number and layout depend on the platform:
|
|
1423
|
+
|
|
1424
|
+
- Regular Freya: [pre3, pre2, pre, main, post]
|
|
1425
|
+
- Loki-4P and H-Freya/Edun: [pre_n, ..., pre_1, main, post_1, ..., post_m]
|
|
1426
|
+
where N = numtxeqpretaps and M = numtxeqtaps - numtxeqpretaps - 1
|
|
1427
|
+
"""
|
|
1387
1428
|
|
|
1388
1429
|
def get(self) -> Token[GetDataAttr]:
|
|
1430
|
+
"""Get the TX equalizer settings (native values) of the on-board PHY.
|
|
1431
|
+
|
|
1432
|
+
The returned tap values layout depends on the platform. Query P_CAPABILITIES
|
|
1433
|
+
for ``numtxeqtaps`` and ``numtxeqpretaps`` to determine the format.
|
|
1434
|
+
|
|
1435
|
+
:return: list of TX EQ tap values (native values)
|
|
1436
|
+
:rtype: PL1_PHYTXEQ.GetDataAttr
|
|
1437
|
+
"""
|
|
1389
1438
|
|
|
1390
1439
|
return Token(self._connection, build_get_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex]))
|
|
1391
1440
|
|
|
1392
|
-
def set(self,
|
|
1441
|
+
def set(self, tap_values: typing.List[int]) -> Token[None]:
|
|
1442
|
+
"""Set the TX equalizer settings (native values) of the on-board PHY.
|
|
1443
|
+
|
|
1444
|
+
The tap values layout depends on the platform. Query P_CAPABILITIES
|
|
1445
|
+
for ``numtxeqtaps`` and ``numtxeqpretaps`` to determine the required format.
|
|
1446
|
+
|
|
1447
|
+
:param tap_values: list of TX EQ tap values (native values) in platform-specific order
|
|
1448
|
+
:type tap_values: typing.List[int]
|
|
1449
|
+
"""
|
|
1393
1450
|
|
|
1394
1451
|
return Token(
|
|
1395
1452
|
self._connection,
|
|
1396
|
-
build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex],
|
|
1453
|
+
build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex], tap_values=tap_values))
|
|
1397
1454
|
|
|
1398
1455
|
@register_command
|
|
1399
1456
|
@dataclass
|