siliconcompiler 0.35.4__py3-none-any.whl → 0.36.1__py3-none-any.whl

siliconcompiler/tools/openroad/repair_design.py

@@ -1,3 +1,5 @@
+from typing import Optional, Union
+
 from siliconcompiler.tools.openroad._apr import APRTask
 from siliconcompiler.tools.openroad._apr import OpenROADSTAParameter, OpenROADRSZDRVParameter
 
@@ -20,6 +22,45 @@ class RepairDesignTask(APRTask, OpenROADSTAParameter, OpenROADRSZDRVParameter):
                            "true/false, when true enables adding buffers to the output ports",
                            defvalue=False)
 
+    def set_openroad_tieseparation(self, separation: float,
+                                   step: Optional[str] = None,
+                                   index: Optional[Union[int, str]] = None):
+        """
+        Sets the maximum distance between tie high/low cells.
+
+        Args:
+            separation (float): The separation distance in microns.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "ifp_tie_separation", separation, step=step, index=index)
+
+    def set_openroad_bufferinputs(self, enable: bool,
+                                  step: Optional[str] = None,
+                                  index: Optional[Union[int, str]] = None):
+        """
+        Enables or disables adding buffers to the input ports.
+
+        Args:
+            enable (bool): True to enable, False to disable.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "rsz_buffer_inputs", enable, step=step, index=index)
+
+    def set_openroad_bufferoutputs(self, enable: bool,
+                                   step: Optional[str] = None,
+                                   index: Optional[Union[int, str]] = None):
+        """
+        Enables or disables adding buffers to the output ports.
+
+        Args:
+            enable (bool): True to enable, False to disable.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "rsz_buffer_outputs", enable, step=step, index=index)
+
     def task(self):
         return "repair_design"
 

siliconcompiler/tools/openroad/repair_timing.py

@@ -1,3 +1,5 @@
+from typing import Optional, Union
+
 from siliconcompiler.tools.openroad._apr import APRTask
 from siliconcompiler.tools.openroad._apr import OpenROADSTAParameter, OpenROADDPLParameter, \
     OpenROADRSZDRVParameter, OpenROADRSZTimingParameter, OpenROADFillCellsParameter
@@ -21,6 +23,58 @@ class RepairTimingTask(APRTask, OpenROADSTAParameter, OpenROADDPLParameter,
         self.add_parameter("rsz_skip_recover_power", "bool", "skip power recovery",
                            defvalue=False)
 
+    def set_openroad_skipdrvrepair(self, skip: bool,
+                                   step: Optional[str] = None,
+                                   index: Optional[Union[int, str]] = None):
+        """
+        Enables or disables skipping design rule violation repair.
+
+        Args:
+            skip (bool): True to skip repair, False to perform it.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "rsz_skip_drv_repair", skip, step=step, index=index)
+
+    def set_openroad_skipsetuprepair(self, skip: bool,
+                                     step: Optional[str] = None,
+                                     index: Optional[Union[int, str]] = None):
+        """
+        Enables or disables skipping setup timing repair.
+
+        Args:
+            skip (bool): True to skip repair, False to perform it.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "rsz_skip_setup_repair", skip, step=step, index=index)
+
+    def set_openroad_skipholdrepair(self, skip: bool,
+                                    step: Optional[str] = None,
+                                    index: Optional[Union[int, str]] = None):
+        """
+        Enables or disables skipping hold timing repair.
+
+        Args:
+            skip (bool): True to skip repair, False to perform it.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "rsz_skip_hold_repair", skip, step=step, index=index)
+
+    def set_openroad_skiprecoverpower(self, skip: bool,
+                                      step: Optional[str] = None,
+                                      index: Optional[Union[int, str]] = None):
+        """
+        Enables or disables skipping power recovery.
+
+        Args:
+            skip (bool): True to skip recovery, False to perform it.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "rsz_skip_recover_power", skip, step=step, index=index)
+
     def task(self):
         return "repair_timing"
 

siliconcompiler/tools/openroad/screenshot.py

@@ -1,3 +1,5 @@
+from typing import Optional, Union
+
 from siliconcompiler import ScreenshotTask
 from siliconcompiler.tools.openroad.show import ShowTask
 
@@ -9,10 +11,38 @@ class ScreenshotTask(ScreenshotTask, ShowTask):
     def __init__(self):
         super().__init__()
 
-        self.add_parameter("show_vertical_resolution", "int", "blah", defvalue=1024)
+        self.add_parameter("show_vertical_resolution", "int",
+                           "Vertical resolution of the screenshot image",
+                           defvalue=1024)
         self.add_parameter("include_report_images", "bool",
                            "true/false, include the images in reports/", defvalue=False)
 
+    def set_openroad_verticalresolution(self, value: int,
+                                        step: Optional[str] = None,
+                                        index: Optional[Union[int, str]] = None):
+        """
+        Set the vertical resolution for OpenROAD screenshots.
+
+        Args:
+            value (int): The vertical resolution in pixels.
+            step (Optional[str]): The step in the flow where this setting applies.
+            index (Optional[Union[int, str]]): The index for multiple runs or configurations.
+        """
+        self.set("var", "show_vertical_resolution", value, step=step, index=index)
+
+    def set_openroad_includereportimages(self, value: bool,
+                                         step: Optional[str] = None,
+                                         index: Optional[Union[int, str]] = None):
+        """
+        Set whether to include report images in the output.
+
+        Args:
+            value (bool): Whether to include report images.
+            step (Optional[str]): The step in the flow where this setting applies.
+            index (Optional[Union[int, str]]): The index for multiple runs or configurations.
+        """
+        self.set("var", "include_report_images", value, step=step, index=index)
+
     def setup(self):
         super().setup()
 

siliconcompiler/tools/openroad/scripts/apr/preamble.tcl

@@ -92,3 +92,11 @@ tee -file reports/global_connections.start.rpt {report_global_connect}
 if { [sc_cfg_tool_task_check_in_list report_buffers var reports] && [sc_check_version 23264] } {
     tee -quiet -file reports/report_buffers.rpt {report_buffers -filtered}
 }
+tee -quiet -file reports/report_units.rpt {report_units}
+
+tee -quiet -file reports/report_layer_rc.rpt {report_layer_rc}
+foreach corner [sta::corners] {
+    set corner_name [$corner name]
+    tee -quiet -append -file reports/report_layer_rc.rpt "puts \"Corner: $corner_name\""
+    tee -quiet -append -file reports/report_layer_rc.rpt "report_layer_rc -corner $corner_name"
+}

siliconcompiler/tools/openroad/scripts/apr/sc_init_floorplan.tcl

@@ -149,7 +149,7 @@ set sc_hpinmetal [sc_get_layer_name [sc_cfg_tool_task_get var pin_layer_horizont
 set sc_vpinmetal [sc_get_layer_name [sc_cfg_tool_task_get var pin_layer_vertical]]
 
 if { [sc_cfg_exists constraint pin] } {
-    source "[sc_cfg_tool_task_get file sc_pin_constraint]"
+    source [sc_cfg_tool_task_get var sc_pin_constraints_tcl]
 
     proc sc_pin_print { arg } { utl::warn FLW 1 $arg }
     proc sc_pin_layer_select { pin } {
@@ -299,6 +299,8 @@ if { [sc_cfg_exists constraint component] } {
     set x_grid [ord::dbu_to_microns $x_grid]
     set y_grid [ord::dbu_to_microns $y_grid]
 
+    set sc_placed_insts []
+
     dict for {name params} [sc_cfg_get constraint component] {
         set location [dict get $params placement]
         set rotation [sc_convert_rotation [dict get $params rotation]]
@@ -308,11 +310,27 @@ if { [sc_cfg_exists constraint component] } {
         } else {
             set cell ""
         }
+        set halo {}
         if { [llength [dict get $params halo]] != 0 } {
-            utl::warn FLW 1 "Halo is not supported in OpenROAD"
+            if { [llength [dict get $params halo]] == 2 } {
+                set halo [dict get $params halo]
+            } else {
+                utl::warn FLW 1 "Halo must be a list of 2 elements"
+            }
         }
 
-        set inst [[ord::get_db_block] findInst $name]
+        set stainst [get_cells -quiet $name]
+        if { $stainst != {} } {
+            if { [llength $stainst] > 1 } {
+                utl::error FLW 1 "Multiple cells found for instance $name"
+            }
+            set inst [sta::sta_to_db_inst $stainst]
+        } else {
+            set inst "NULL"
+        }
+        if { $inst == "NULL" } {
+            set inst [[ord::get_db_block] findInst $name]
+        }
         if { $inst == "NULL" } {
             utl::warn FLW 1 "Could not find instance: $name"
 
@@ -324,23 +342,44 @@ if { [sc_cfg_exists constraint component] } {
             set cell ""
         }
 
-        set x_loc [expr { round([lindex $location 0] / $x_grid) * $x_grid }]
-        set y_loc [expr { round([lindex $location 1] / $y_grid) * $y_grid }]
+        if { $inst != "NULL" } {
+            set name [$inst getName]
+        }
+
+        if { [llength $location] == 2 } {
+            # Only place if location is specified
+            set x_loc [expr { round([lindex $location 0] / $x_grid) * $x_grid }]
+            set y_loc [expr { round([lindex $location 1] / $y_grid) * $y_grid }]
+
+            set place_inst_args []
+            if { $cell != "" } {
+                lappend place_inst_args -cell $cell
+            }
 
-        set place_inst_args []
-        if { $cell != "" } {
-            lappend place_inst_args -cell $cell
+            place_inst \
+                -name $name \
+                -origin "$x_loc $y_loc" \
+                -orient $rotation \
+                -status FIRM \
+                {*}$place_inst_args
         }
 
-        place_inst \
-            -name $name \
-            -location "$x_loc $y_loc" \
-            -orient $rotation \
-            -status FIRM \
-            {*}$place_inst_args
+        if { $halo != {} } {
+            set inst [[ord::get_db_block] findInst $name]
+            set halo_box [$inst getHalo]
+            if { $halo_box != "NULL" } {
+                odb::dbBox_destroy $halo_box
+            }
+            odb::dbBox_create $inst \
+                [ord::microns_to_dbu [lindex $halo 0]] \
+                [ord::microns_to_dbu [lindex $halo 1]] \
+                [ord::microns_to_dbu [lindex $halo 0]] \
+                [ord::microns_to_dbu [lindex $halo 1]]
+        }
+        lappend sc_placed_insts $name
     }
 
-    sc_print_macro_information
+    sc_print_macro_information $sc_placed_insts
 }
 
 if { [sc_check_version 23008] } {

siliconcompiler/tools/openroad/scripts/apr/sc_irdrop.tcl

@@ -89,7 +89,8 @@ foreach net $nets {
     foreach corner $sc_scenarios {
         analyze_power_grid -net $net -corner $corner -allow_reuse
 
-        save_animated_gif -start "reports/${net}/${corner}.gif"
+        set gif [save_animated_gif -start "reports/${net}/${corner}.gif"]
+        set gif_log [save_animated_gif -start "reports/${net}/${corner}_log.gif"]
 
         foreach layer [[ord::get_db_tech] getLayers] {
             if { [$layer getRoutingLevel] == 0 } {
@@ -123,7 +124,7 @@ foreach net $nets {
             sc_save_image \
                 "IR drop for $net on $layer_name for $corner heatmap" \
                 reports/${net}/${corner}.${layer_name}.png \
-                true
+                $gif
 
             gui::set_heatmap IRDrop LogScale 1
             gui::set_heatmap IRDrop rebuild
@@ -131,7 +132,7 @@ foreach net $nets {
             sc_save_image \
                 "IR drop for $net on $layer_name for $corner heatmap" \
                 reports/${net}/${corner}.${layer_name}_log.png \
-                false
+                $gif_log
 
             gui::set_display_controls "Heat Maps/IR Drop" visible false
 
@@ -139,7 +140,8 @@ foreach net $nets {
                 gui::delete_label $label
             }
         }
-        save_animated_gif -end
+        save_animated_gif -end -key $gif
+        save_animated_gif -end -key $gif_log
     }
 }
 

siliconcompiler/tools/openroad/scripts/apr/sc_write_data.tcl

@@ -60,7 +60,7 @@ if { [sc_cfg_tool_task_get var write_spef] } {
     if { [sc_cfg_tool_task_get var use_spef] } {
         set lib_pex [dict create]
         foreach scenario $sc_scenarios {
-            set pexcorner [sc_cfg_get constraint timing $scenario pexcorner]
+            set pexcorner [sc_cfg_get constraint timing scenario $scenario pexcorner]
 
             dict set lib_pex $scenario $pexcorner
         }
@@ -107,11 +107,11 @@ foreach corner $sc_scenarios {
 ###############################
 
 foreach corner $sc_scenarios {
-    if { [sc_cfg_exists constraint timing $corner voltage] } {
-        foreach net [dict keys [sc_cfg_get constraint timing $corner voltage]] {
+    if { [sc_cfg_exists constraint timing scenario $corner voltage] } {
+        foreach net [dict keys [sc_cfg_get constraint timing scenario $corner voltage]] {
             set_pdnsim_net_voltage -corner $corner \
                 -net $net \
-                -voltage [sc_cfg_get constraint timing $corner voltage $net]
+                -voltage [sc_cfg_get constraint timing scenario $corner voltage $net]
         }
     }
 }

siliconcompiler/tools/openroad/scripts/common/procs.tcl

@@ -238,10 +238,10 @@ proc sc_design_has_unplaced_macros { } {
 # Print macros placement
 ###########################
 
-proc sc_print_macro_information { } {
+proc sc_print_macro_information { { insts [] } } {
     set print_header "true"
     foreach inst [[ord::get_db_block] getInsts] {
-        if { [$inst isBlock] } {
+        if { [$inst isBlock] || [lsearch -exact $insts [$inst getName]] != -1 } {
             set master [$inst getMaster]
             set status [$inst getPlacementStatus]
 
@@ -388,17 +388,22 @@ proc sc_psm_check_nets { } {
 # Save an image
 ###########################
 
-proc sc_save_image { title path { gif false } { pixels 1000 } } {
+proc sc_save_image { title path { gif -1 } { pixels 1000 } } {
     utl::info FLW 1 "Saving \"$title\" to $path"
 
     save_image -resolution [sc_image_resolution $pixels] \
         -area [sc_image_area] \
         $path
 
-    if { $gif } {
+    if { $gif >= 0 } {
+        set gif_args []
+        if { [sc_check_version 26866] } {
+            lappend gif_args -key $gif
+        }
         save_animated_gif -add \
             -resolution [sc_image_resolution $pixels] \
-            -area [sc_image_area]
+            -area [sc_image_area] \
+            {*}$gif_args
     }
 }
 
@@ -458,6 +463,10 @@ proc sc_image_setup_default { } {
     gui::set_display_controls "Nets/*" visible true
     gui::set_display_controls "Instances/*" visible true
     gui::set_display_controls "Shape Types/*" visible true
+    if { [llength [[ord::get_db_block] getBTerms]] > 10000 } {
+        # Avoid performance issues with too many IOs
+        gui::set_display_controls "Shape Types/Pins" visible false
+    }
     gui::set_display_controls "Misc/Instances/*" visible true
     gui::set_display_controls "Misc/Instances/Pin Names" visible false
     gui::set_display_controls "Misc/Scale bar" visible true

siliconcompiler/tools/openroad/scripts/common/read_liberty.tcl

@@ -1,4 +1,4 @@
-set sc_scenarios [dict keys [sc_cfg_get constraint timing]]
+set sc_scenarios [dict keys [sc_cfg_get constraint timing scenario]]
 set sc_delaymodel [sc_cfg_get asic delaymodel]
 
 # Read Liberty
@@ -7,7 +7,7 @@ define_corners {*}$sc_scenarios
 foreach corner $sc_scenarios {
     foreach lib $sc_logiclibs {
         set lib_filesets []
-        foreach libcorner [sc_cfg_get constraint timing $corner libcorner] {
+        foreach libcorner [sc_cfg_get constraint timing scenario $corner libcorner] {
             if { [sc_cfg_exists library $lib asic libcornerfileset $libcorner $sc_delaymodel] } {
                 lappend lib_filesets \
                     {*}[sc_cfg_get library $lib asic libcornerfileset $libcorner $sc_delaymodel]

siliconcompiler/tools/openroad/scripts/common/reports.tcl

@@ -84,13 +84,16 @@ if { [sc_cfg_tool_task_check_in_list drv_violations var reports] } {
 }
 
 puts "$PREFIX floating nets"
-tee -file reports/floating_nets.rpt \
+puts "Reporting floating nets: reports/floating_nets.rpt"
+tee -quiet -file reports/floating_nets.rpt \
     "report_floating_nets -verbose"
 if { [sc_check_version 19048] } {
     puts "$PREFIX overdriven nets"
-    tee -file reports/overdriven_nets.rpt \
+    puts "Reporting overdriven nets: reports/overdriven_nets.rpt"
+    tee -quiet -file reports/overdriven_nets.rpt \
         "report_overdriven_nets -verbose"
-    tee -file reports/overdriven_nets_with_parallel.rpt \
+    puts "Reporting overdriven nets: reports/overdriven_nets_with_parallel.rpt"
+    tee -quiet -file reports/overdriven_nets_with_parallel.rpt \
         "report_overdriven_nets -include_parallel_driven -verbose"
 }
 

siliconcompiler/tools/openroad/scripts/common/screenshot.tcl

@@ -5,7 +5,7 @@ sc_image_setup_default
 sc_save_image \
     "screenshot" \
     "outputs/${sc_topmodule}.png" \
-    false \
+    -1 \
     [sc_cfg_tool_task_get var show_vertical_resolution]
 
 gui::restore_display_controls

siliconcompiler/tools/openroad/scripts/common/write_data_physical.tcl

@@ -1,3 +1,11 @@
 write_db "outputs/${sc_topmodule}.odb"
 write_def "outputs/${sc_topmodule}.def"
 write_verilog -include_pwr_gnd "outputs/${sc_topmodule}.vg"
+
+set remove_cells []
+foreach lib [sc_cfg_get asic asiclib] {
+    foreach celltype "decap tie filler tap endcap antenna physicalonly" {
+        lappend remove_cells {*}[sc_cfg_get library $lib asic cells $celltype]
+    }
+}
+write_verilog -remove_cells $remove_cells "outputs/${sc_topmodule}.lec.vg"

siliconcompiler/tools/openroad/scripts/common/write_images.tcl

@@ -1,6 +1,6 @@
 # Adopted from https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/3f9740e6b3643835e918d78ae1d377d65af0f0fb/flow/scripts/save_images.tcl
 
-proc sc_image_heatmap { name ident image_name title { gif false } { allow_bin_adjust 1 } } {
+proc sc_image_heatmap { name ident image_name title { gif -1 } { allow_bin_adjust 1 } } {
     lassign [sc_cfg_tool_task_get var ord_heatmap_bins] ord_heatmap_bins_x ord_heatmap_bins_y
 
     file mkdir reports/images/heatmap
@@ -124,12 +124,12 @@ proc sc_image_irdrop { net corner } {
         return
     }
 
-    set gif false
+    set gif -1
     if { [sc_check_version 21574] } {
-        set gif true
-    }
-    if { $gif } {
-        save_animated_gif -start "reports/images/heatmap/irdrop/${net}.${corner}.gif"
+        set gif [save_animated_gif -start "reports/images/heatmap/irdrop/${net}.${corner}.gif"]
+        if { $gif == "" } {
+            set gif 0
+        }
     }
     foreach layer [[ord::get_db_tech] getLayers] {
         if { [$layer getRoutingLevel] == 0 } {
@@ -160,8 +160,12 @@ proc sc_image_irdrop { net corner } {
             gui::delete_label $label
         }
     }
-    if { $gif } {
-        save_animated_gif -end
+    if { $gif >= 0 } {
+        if { [sc_check_version 26866] } {
+            save_animated_gif -end -key $gif
+        } else {
+            save_animated_gif -end
+        }
     }
 }
 
@@ -176,7 +180,7 @@ proc sc_image_routing_congestion { } {
         "Routing" \
         "routing_congestion.png" \
         "routing congestion" \
-        0 \
+        -1 \
         0
 }
 
@@ -194,7 +198,7 @@ proc sc_image_estimated_routing_congestion { } {
             "RUDY" \
             "estimated_routing_congestion.png" \
             "estimated routing congestion" \
-            0 \
+            -1 \
             0
     } err
     unsuppress_message GRT 10
@@ -342,7 +346,7 @@ proc sc_image_timing_histograms { } {
 
     if { [sc_cfg_tool_task_check_in_list setup var reports] } {
         set path reports/images/timing/setup.histogram.png
-        utl::info FLW 1 "Saving setup timing histogram to $path"
+        utl::info FLW 1 "Saving \"setup timing histogram\" to $path"
         save_histogram_image $path \
             -mode setup \
             -width 500 \
@@ -350,7 +354,7 @@ proc sc_image_timing_histograms { } {
     }
     if { [sc_cfg_tool_task_check_in_list hold var reports] } {
         set path reports/images/timing/hold.histogram.png
-        utl::info FLW 1 "Saving hold timing histogram to $path"
+        utl::info FLW 1 "Saving \"hold timing histogram\" to $path"
         save_histogram_image $path \
             -mode hold \
             -width 500 \

siliconcompiler/tools/openroad/scripts/sc_rdlroute.tcl

@@ -149,5 +149,7 @@ utl::pop_metrics_stage
 ###############################
 
 utl::push_metrics_stage "sc__write__{}"
-source "$sc_refdir/common/write_data_physical.tcl"
+write_db "outputs/${sc_topmodule}.odb"
+write_def "outputs/${sc_topmodule}.def"
+write_verilog -include_pwr_gnd "outputs/${sc_topmodule}.vg"
 utl::pop_metrics_stage

siliconcompiler/tools/openroad/write_data.py

@@ -1,3 +1,5 @@
+from typing import Optional
+
 from siliconcompiler.tools.openroad._apr import APRTask
 from siliconcompiler.tools.openroad._apr import OpenROADSTAParameter, OpenROADPSMParameter
 
@@ -32,6 +34,80 @@ class WriteViewsTask(APRTask, OpenROADSTAParameter, OpenROADPSMParameter):
 
         self.add_parameter("pex_corners", "{str}", "set of pex corners to perform extraction on")
 
+    def set_openroad_abstractlefbloatlayers(self, enable: bool,
+                                            step: Optional[str] = None,
+                                            index: Optional[str] = None):
+        """
+        Enables or disables filling all layers when writing the abstract LEF.
+
+        Args:
+            enable (bool): True to enable, False to disable.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "ord_abstract_lef_bloat_layers", enable, step=step, index=index)
+
+    def set_openroad_abstractlefbloatfactor(self, factor: int,
+                                            step: Optional[str] = None,
+                                            index: Optional[str] = None):
+        """
+        Sets the bloat factor to apply when writing the abstract LEF.
+
+        Args:
+            factor (int): The bloat factor.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "ord_abstract_lef_bloat_factor", factor, step=step, index=index)
+
+    def set_openroad_writecdl(self, enable: bool,
+                              step: Optional[str] = None, index: Optional[str] = None):
+        """
+        Enables or disables writing the CDL file.
+
+        Args:
+            enable (bool): True to enable, False to disable.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "write_cdl", enable, step=step, index=index)
+
+    def set_openroad_writespef(self, enable: bool,
+                               step: Optional[str] = None, index: Optional[str] = None):
+        """
+        Enables or disables writing the SPEF file.
+
+        Args:
+            enable (bool): True to enable, False to disable.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "write_spef", enable, step=step, index=index)
+
+    def set_openroad_writeliberty(self, enable: bool,
+                                  step: Optional[str] = None, index: Optional[str] = None):
+        """
+        Enables or disables writing the Liberty timing model.
+
+        Args:
+            enable (bool): True to enable, False to disable.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "write_liberty", enable, step=step, index=index)
+
+    def set_openroad_writesdf(self, enable: bool,
+                              step: Optional[str] = None, index: Optional[str] = None):
+        """
+        Enables or disables writing the SDF timing model.
+
+        Args:
+            enable (bool): True to enable, False to disable.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "write_sdf", enable, step=step, index=index)
+
     def task(self):
         return "write_data"
 
@@ -74,10 +150,10 @@ class WriteViewsTask(APRTask, OpenROADSTAParameter, OpenROADPSMParameter):
             for corner in self.get("var", "pex_corners"):
                 self.add_output_file(ext=f"{corner}.spef")
         if self.get("var", "write_liberty"):
-            for corner in self.project.getkeys("constraint", "timing"):
+            for corner in self.project.getkeys("constraint", "timing", "scenario"):
                 self.add_output_file(ext=f"{corner}.lib")
         if self.get("var", "write_sdf"):
-            for corner in self.project.getkeys("constraint", "timing"):
+            for corner in self.project.getkeys("constraint", "timing", "scenario"):
                 self.add_output_file(ext=f"{corner}.sdf")
 
         self.add_required_key("var", "ord_abstract_lef_bloat_layers")

siliconcompiler/tools/opensta/scripts/sc_check_library.tcl

@@ -22,7 +22,7 @@ set sc_design [sc_top]
 # APR Parameters
 set sc_targetlibs [sc_get_asic_libraries logic]
 set sc_delaymodel [sc_cfg_get asic delaymodel]
-set sc_scenarios [dict keys [sc_cfg_get constraint timing]]
+set sc_scenarios [dict keys [sc_cfg_get constraint timing scenario]]
 
 ###############################
 # Optional
@@ -41,7 +41,7 @@ define_corners {*}$sc_scenarios
 foreach lib "$sc_targetlibs $sc_macrolibs" {
     #Liberty
     foreach corner $sc_scenarios {
-        foreach libcorner [sc_cfg_get constraint timing $corner libcorner] {
+        foreach libcorner [sc_cfg_get constraint timing scenario $corner libcorner] {
             if { [sc_cfg_exists library $lib output $libcorner $sc_delaymodel] } {
                 foreach lib_file [sc_cfg_get library $lib output $libcorner $sc_delaymodel] {
                     puts "Reading liberty file for ${corner} ($libcorner): ${lib_file}"