siliconcompiler 0.34.2__py3-none-any.whl → 0.34.3__py3-none-any.whl

siliconcompiler/fpga.py

@@ -1,19 +1,142 @@
+"""
+Schema definitions for FPGA-related configurations in SiliconCompiler.
+
+This module defines classes and functions for managing FPGA-specific
+parameters, such as part names, LUT sizes, and vendor information,
+within the SiliconCompiler schema. It includes schemas for both
+tool-library and temporary configurations.
+"""
+
 from siliconcompiler.schema import BaseSchema
 from siliconcompiler.schema import EditableSchema, Parameter, Scope
 from siliconcompiler.schema.utils import trim
 
+from siliconcompiler import ToolLibrarySchema
+
+
+class FPGASchema(ToolLibrarySchema):
+    """
+    A schema for configuring FPGA-related parameters.
+
+    This class extends ToolLibrarySchema to provide a structured way
+    to define and access FPGA-specific settings like part name and LUT size.
+    """
+    def __init__(self, name: str = None):
+        """
+        Initializes the FPGASchema.
+
+        Args:
+            name (str, optional): The name of the schema. Defaults to None.
+        """
+        super().__init__()
+        self.set_name(name)
+
+        schema = EditableSchema(self)
+        schema.insert(
+            "fpga", 'partname',
+            Parameter(
+                'str',
+                scope=Scope.GLOBAL,
+                shorthelp="FPGA: part name",
+                switch="-fpga_partname <str>",
+                example=["cli: -fpga_partname fpga64k",
+                         "api: chip.set('fpga', 'partname', 'fpga64k')"],
+                help=trim("""
+                Complete part name used as a device target by the FPGA compilation
+                tool. The part name must be an exact string match to the partname
+                hard coded within the FPGA EDA tool.""")))
+
+        schema.insert(
+            "fpga", 'lutsize',
+            Parameter(
+                'int',
+                scope=Scope.GLOBAL,
+                shorthelp="FPGA: lutsize",
+                switch="-fpga_lutsize 'partname <int>'",
+                example=["cli: -fpga_lutsize 'fpga64k 4'",
+                         "api: chip.set('fpga', 'fpga64k', 'lutsize', '4')"],
+                help=trim("""
+                Specify the number of inputs in each lookup table (LUT) for the
+                FPGA partname.  For architectures with fracturable LUTs, this is
+                the number of inputs of the unfractured LUT.""")))
+
+    def set_partname(self, name: str):
+        """
+        Sets the FPGA part name.
+
+        Args:
+            name (str): The name of the FPGA part.
+
+        Returns:
+            Any: The result of the `set` operation.
+        """
+        return self.set("fpga", "partname", name)
+
+    def set_lutsize(self, lut: int):
+        """
+        Sets the LUT size for the FPGA.
 
-class FPGASchema(BaseSchema):
+        Args:
+            lut (int): The number of inputs for the lookup table.
+
+        Returns:
+            Any: The result of the `set` operation.
+        """
+        return self.set("fpga", "lutsize", lut)
+
+    @classmethod
+    def _getdict_type(cls) -> str:
+        """
+        Returns the meta data for getdict.
+
+        Returns:
+            str: The name of the class.
+        """
+
+        return FPGASchema.__name__
+
+
+class FPGASchemaTmp(BaseSchema):
+    """
+    A temporary schema for FPGA configurations.
+
+    This class is used for temporary storage of FPGA-related settings.
+    It extends BaseSchema and uses the `schema_fpga` function to populate
+    its fields.
+    """
     def __init__(self):
+        """
+        Initializes the FPGASchemaTmp.
+        """
         super().__init__()
 
         schema_fpga(self)
 
+    @classmethod
+    def _getdict_type(cls) -> str:
+        """
+        Returns the meta data for getdict.
+
+        Returns:
+            str: The name of the class.
+        """
+
+        return FPGASchemaTmp.__name__
+
 
 ###############################################################################
 # FPGA
 ###############################################################################
 def schema_fpga(schema):
+    """
+    Adds FPGA-related parameters to a given schema.
+
+    This function defines and inserts various FPGA configuration parameters
+    into the provided schema object.
+
+    Args:
+        schema: The schema object to which the parameters will be added.
+    """
     schema = EditableSchema(schema)
 
     partname = 'default'

siliconcompiler/library.py

@@ -1,20 +1,46 @@
 from typing import final, Union, List
 
-from siliconcompiler.design import DesignSchema
+from siliconcompiler import PackageSchema
+
+from siliconcompiler.dependencyschema import DependencySchema
+from siliconcompiler.filesetschema import FileSetSchema
+from siliconcompiler.schema import NamedSchema
 
 from siliconcompiler.schema import EditableSchema, Parameter, Scope, PerNode
 from siliconcompiler.schema.utils import trim
 
 
-class LibrarySchema(DesignSchema):
+class LibrarySchema(FileSetSchema, PackageSchema, NamedSchema):
+    """
+    A class for managing library schemas.
+    """
     def __init__(self, name: str = None):
+        """
+        Initializes a LibrarySchema object.
+
+        Args:
+            name (str, optional): The name of the library. Defaults to None.
+        """
         super().__init__()
         self.set_name(name)
 
+    @classmethod
+    def _getdict_type(cls) -> str:
+        """
+        Returns the meta data for getdict.
+        """
+
+        return LibrarySchema.__name__
+
+
+class ToolLibrarySchema(LibrarySchema):
+    """
+    A class for managing tool-related library schemas.
+    """
     @final
     def define_tool_parameter(self, tool: str, name: str, type: str, help: str, **kwargs):
         """
-        Define a new tool parameter for the library
+        Define a new tool parameter for the library.
 
         Args:
             tool (str): name of the tool
@@ -40,22 +66,118 @@ class LibrarySchema(DesignSchema):
             Parameter(type, **kwargs)
         )
 
+    @classmethod
+    def _getdict_type(cls) -> str:
+        """
+        Returns the meta data for getdict.
+        """
+
+        return ToolLibrarySchema.__name__
+
+    def _from_dict(self, manifest, keypath, version=None):
+        """
+        Constructs a schema from a dictionary.
+
+        Args:
+            manifest (dict): Dictionary to construct from.
+            keypath (list): List of keys representing the path to the current dictionary.
+            version (str, optional): Version of the manifest. Defaults to None.
+
+        Returns:
+            dict: The constructed dictionary.
+        """
+        if "tool" in manifest:
+            # collect tool keys
+            tool_keys = self.allkeys("tool")
+
+            # collect manifest
+            manifest_keys = set()
+            for tool, tool_var in manifest["tool"].items():
+                for var in tool_var:
+                    manifest_keys.add((tool, var))
+
+            edit = EditableSchema(self)
+            for tool, var in sorted(manifest_keys.difference(tool_keys)):
+                edit.insert("tool", tool, var,
+                            Parameter.from_dict(
+                                manifest["tool"][tool][var],
+                                keypath=keypath + [tool, var],
+                                version=version))
+                del manifest["tool"][tool][var]
+                if not manifest["tool"][tool]:
+                    del manifest["tool"][tool]
+
+            if not manifest["tool"]:
+                del manifest["tool"]
 
-class StdCellLibrarySchema(LibrarySchema):
+        return super()._from_dict(manifest, keypath, version)
+
+
+class StdCellLibrarySchema(ToolLibrarySchema, DependencySchema):
+    """
+    A class for managing standard cell library schemas.
+    """
     def __init__(self, name: str = None):
+        """
+        Initializes a StdCellLibrarySchema object.
+
+        Args:
+            name (str, optional): The name of the standard cell library. Defaults to None.
+        """
         super().__init__()
         self.set_name(name)
 
         schema = EditableSchema(self)
 
         schema.insert(
-            'asic', 'cornerfilesets', 'default',
+            "asic", "pdk",
             Parameter(
-                '[str]',
+                "str",
+                scope=Scope.GLOBAL,
+                shorthelp="ASIC: ",
+                example=[
+                    "api: schema.set('asic', 'libcornerfileset', 'slow', 'nldm', 'timing.slow')"],
+                help=trim("""""")))
+
+        schema.insert(
+            "asic", "stackup",
+            Parameter(
+                "{str}",
+                scope=Scope.GLOBAL,
+                shorthelp="ASIC: ",
+                example=[
+                    "api: schema.set('asic', 'libcornerfileset', 'slow', 'nldm', 'timing.slow')"],
+                help=trim("""Set of supported stackups""")))
+
+        schema.insert(
+            'asic', 'libcornerfileset', 'default', 'default',
+            Parameter(
+                '{str}',
+                scope=Scope.GLOBAL,
+                shorthelp="ASIC: map of filesets to timing corners",
+                example=[
+                    "api: schema.set('asic', 'libcornerfileset', 'slow', 'nldm', 'timing.slow')"],
+                help=trim("""Map between filesets and timing corners.""")))
+
+        schema.insert(
+            'asic', 'pexcornerfileset', 'default',
+            Parameter(
+                '{str}',
+                scope=Scope.GLOBAL,
+                shorthelp="ASIC: map of filesets to pex corners",
+                example=[
+                    "api: schema.set('asic', 'pexcornerfileset', 'slow', 'timing.slow')"],
+                help=trim("""Map between filesets and pex corners.""")))
+
+        schema.insert(
+            'asic', 'aprfileset',
+            Parameter(
+                '{str}',
                 scope=Scope.GLOBAL,
-                shorthelp="ASIC: map of filesets to timing or pex corners",
-                example=["api: schema.set('asic', 'cornerfilesets', 'slow', 'timing.slow')"],
-                help=trim("""Map between filesets and timing or pex corners.""")))
+                shorthelp="ASIC: map of filesets to APR files",
+                example=[
+                    "api: schema.set('asic', 'aprfileset', 'model.lef')"],
+                help=trim("""Map between filesets and automated place and route tool files.""")))
 
         # TODO: Expand on the exact definitions of these types of cells.
         # minimize typing
@@ -93,26 +215,95 @@ class StdCellLibrarySchema(LibrarySchema):
                 example=["api: schema.set('asic', 'site', 'Site_12T')"],
                 help="Site names for a given library architecture."))
 
-    def add_asic_corner_fileset(self, corner: str, fileset: str = None):
+    def add_asic_pdk(self, pdk, default: bool = True):
+        """
+        Adds the PDK associated with this library.
+
+        Args:
+            pdk (class:`PDKSchema`): pdk to associate
+            default (bool): if True, sets this PDK in [asic,pdk]
+        """
+        from siliconcompiler import PDKSchema
+        if isinstance(pdk, PDKSchema):
+            pdk_name = pdk.name
+            self.add_dep(pdk)
+
+            if pdk.get("pdk", "stackup"):
+                # copy over stackup information
+                self.add_asic_stackup(pdk.get("pdk", "stackup"))
+        elif default:
+            if isinstance(pdk, str):
+                pdk_name = pdk
+            else:
+                raise TypeError("pdk must be a PDK object or string")
+        else:
+            raise TypeError("pdk must be a PDK object")
+
+        if default:
+            return self.set("asic", "pdk", pdk_name)
+
+    def add_asic_stackup(self, stackup: Union[str, List[str]]):
+        """
+        Set the stackups supported by this library.
+
+        Args:
+            stackup (str or list of str): stackups supported
+        """
+        return self.add("asic", "stackup", stackup)
+
+    def add_asic_libcornerfileset(self, corner: str, model: str, fileset: str = None):
         """
-        Adds a mapping between filesets a corners defined in the library
+        Adds a mapping between filesets a corners defined in the library.
 
         Args:
             corner (str): name of the timing or parasitic corner
+            model (str): type of delay modeling used, eg. ccs, nldm, etc.
             fileset (str): name of the fileset
         """
         if not fileset:
             fileset = self._get_active("fileset")
 
-        if not isinstance(fileset, str):
-            raise TypeError("fileset must be a string")
+        if not isinstance(model, str):
+            raise TypeError("model must be a string")
 
-        if fileset not in self.getkeys("fileset"):
-            raise ValueError(f"{fileset} is not defined")
+        self._assert_fileset(fileset)
 
-        return self.add("asic", "cornerfilesets", corner, fileset)
+        return self.add("asic", "libcornerfileset", corner, model, fileset)
 
-    def add_asic_cell_list(self, type: str, cells: Union[List[str], str]):
+    def add_asic_pexcornerfileset(self, corner: str, model: str, fileset: str = None):
+        """
+        Adds a mapping between filesets a corners defined in the library.
+
+        Args:
+            corner (str): name of the timing or parasitic corner
+            model(str): type of delay modeling used, eg. spice, etc.
+            fileset (str): name of the fileset
+        """
+        if not fileset:
+            fileset = self._get_active("fileset")
+
+        if not isinstance(model, str):
+            raise TypeError("model must be a string")
+
+        self._assert_fileset(fileset)
+
+        return self.add("asic", "pexcornerfileset", corner, model, fileset)
+
+    def add_asic_aprfileset(self, fileset: str = None):
+        """
+        Adds a mapping between filesets defined in the library.
+
+        Args:
+            fileset (str): name of the fileset
+        """
+        if not fileset:
+            fileset = self._get_active("fileset")
+
+        self._assert_fileset(fileset)
+
+        return self.add("asic", "aprfileset", fileset)
+
+    def add_asic_celllist(self, type: str, cells: Union[List[str], str]):
         """
         Adds a standard cell library to the specified type.
 
@@ -124,10 +315,17 @@ class StdCellLibrarySchema(LibrarySchema):
 
     def add_asic_site(self, site: Union[List[str], str]):
         """
-        Adds a standard site to the library
+        Adds a standard site to the library.
 
         Args:
-            type (str): category of cell type
-            cells (list of str): cells to add
+            site (list of str or str): sites to add
         """
         return self.add("asic", "site", site)
+
+    @classmethod
+    def _getdict_type(cls) -> str:
+        """
+        Returns the meta data for getdict.
+        """
+
+        return StdCellLibrarySchema.__name__