siliconcompiler 0.29.4__py3-none-any.whl → 0.31.0__py3-none-any.whl

siliconcompiler/tools/klayout/klayout_utils.py

@@ -1,5 +1,6 @@
 import pya
 import importlib.util as importlib_util
+import json
 import os
 import shutil
 import sys
@@ -180,3 +181,25 @@ def get_schema(manifest):
     spec.loader.exec_module(module)
     # Return schema
     return module.Schema(manifest=manifest)
+
+
+def generate_metrics():
+    metrics = {}
+
+    main_window = pya.MainWindow.instance()
+    if not main_window:
+        return
+    layout_view = main_window.current_view()
+    if not layout_view:
+        return
+    cell_view = layout_view.active_cellview()
+    if not cell_view:
+        return
+    cell = cell_view.cell
+    if not cell:
+        return
+
+    metrics["area"] = cell.dbbox().area()
+
+    with open('reports/metrics.json', 'w') as f:
+        json.dump(metrics, f, indent=2)

siliconcompiler/tools/klayout/operations.py

@@ -1,6 +1,7 @@
 import os
 from siliconcompiler import SiliconCompilerError
 from siliconcompiler.tools.klayout.klayout import setup as setup_tool
+from siliconcompiler.tools.klayout.klayout import process_metrics
 from siliconcompiler.tools.klayout.klayout import runtime_options as runtime_options_tool
 from siliconcompiler.tools._common import input_provides, get_tool_task
 
@@ -202,3 +203,7 @@ def runtime_options(chip):
     return runtime_options_tool(chip) + [
         '-rd', f'SC_TOOLS_ROOT={os.path.dirname(os.path.dirname(__file__))}'
     ]
+
+
+def post_process(chip):
+    process_metrics(chip)

siliconcompiler/tools/magic/magic.py

@@ -87,7 +87,7 @@ def process_file(file_type, chip, *key):
     index = chip.get('arg', 'index')
     tool, task = get_tool_task(chip, step, index)
 
-    if chip.get(*key, field='pernode') == 'never':
+    if chip.get(*key, field='pernode').is_never():
         files = chip.find_files(*key)
     else:
         files = chip.find_files(*key, step=step, index=index)

siliconcompiler/tools/openroad/_apr.py

@@ -128,6 +128,8 @@ def extract_metrics(chip):
         "drvs": [
             "timing/drv_violators.rpt",
             "floating_nets.rpt",
+            "overdriven_nets.rpt",
+            "overdriven_nets_with_parallel.rpt",
             f"{chip.design}_antenna.rpt",
             f"{chip.design}_antenna_post_repair.rpt"
         ],
@@ -195,13 +197,15 @@ def extract_metrics(chip):
             has_timing = metrics['sc__metric__timing__clocks'] > 0
 
         for metric, or_metric, or_use, or_unit in [
+            ('vias', 'sc__step__global_route__vias', True, None),
             ('vias', 'sc__step__route__vias', True, None),
+            ('wirelength', 'sc__step__global_route__wirelength', True, 'distance'),
             ('wirelength', 'sc__step__route__wirelength', True, 'distance'),
             ('cellarea', 'sc__metric__design__instance__area', True, 'area'),
             ('stdcellarea', 'sc__metric__design__instance__area__stdcell', True, 'area'),
             ('macroarea', 'sc__metric__design__instance__area__macros', True, 'area'),
             ('padcellarea', 'sc__metric__design__instance__area__padcells', True, 'area'),
-            ('totalarea', 'sc__metric__design__core__area', True, 'area'),
+            ('totalarea', 'sc__metric__design__die__area', True, 'area'),
             ('utilization', 'sc__metric__design__instance__utilization', True, 100.0),
             ('setuptns', 'sc__metric__timing__setup__tns', has_timing, 'time'),
             ('holdtns', 'sc__metric__timing__hold__tns', has_timing, 'time'),
@@ -281,6 +285,10 @@ def extract_metrics(chip):
                 'sc__metric__timing__drv__max_slew',
                 'sc__metric__timing__drv__max_cap',
                 'sc__metric__timing__drv__max_fanout',
+                'sc__metric__timing__drv__max_fanout',
+                'sc__metric__timing__drv__floating__nets',
+                'sc__metric__timing__drv__floating__pins',
+                'sc__metric__timing__drv__overdriven__nets',
                 'sc__metric__antenna__violating__nets',
                 'sc__metric__antenna__violating__pins']:
             if metric in metrics:
@@ -757,6 +765,10 @@ def define_drt_params(chip):
                       schelp='list of layers to treat as unidirectional regardless of '
                              'what the tech lef specifies')
 
+    set_tool_task_var(chip, param_key='drt_report_interval',
+                      default_value=5,
+                      schelp='reporting interval in steps for generating a DRC report.')
+
 
 def define_sta_params(chip):
     step = chip.get('arg', 'step')
@@ -862,6 +874,10 @@ def define_mpl_params(chip):
     set_tool_task_var(chip, param_key='rtlmp_fence_weight',
                       schelp='Weight for fence cost, or how far the macro is from zero '
                              'fence violation')
+    set_tool_task_var(chip, param_key='rtlmp_boundary_weight',
+                      schelp='Weight for the boundary, or how far the hard macro clusters are from '
+                             'boundaries. Note that mixed macro clusters are not pushed, thus not '
+                             'considered in this cost.')
     set_tool_task_var(chip, param_key='rtlmp_blockage_weight',
                       schelp='Weight for the boundary, or how far the hard macro clusters are '
                              'from boundaries')
@@ -974,7 +990,8 @@ def set_reports(chip, reports):
         "ir_drop",
         "clock_placement",
         "clock_trees",
-        "optimization_placement"
+        "optimization_placement",
+        "module_view"
     )
 
     chip.set('tool', tool, 'task', task, 'var', 'reports',
@@ -988,7 +1005,7 @@ def set_reports(chip, reports):
         for key in (('tool', tool, 'task', task, 'var', f'skip_{type}'),
                     ('option', 'var', f'openroad_skip_{type}')):
             if chip.valid(*key):
-                if chip.get(*key, field='pernode') == 'never':
+                if chip.get(*key, field='pernode').is_never():
                     if chip.get(*key) == ["true"]:
                         return False
                     elif chip.get(*key, step=step, index=index) == ["true"]:

siliconcompiler/tools/openroad/antenna_repair.py

@@ -54,7 +54,8 @@ def setup(chip):
         'power_density',
         'optimization_placement',
         'clock_placement',
-        'clock_trees'
+        'clock_trees',
+        'module_view'
     ])
 
 

siliconcompiler/tools/openroad/clock_tree_synthesis.py

@@ -51,7 +51,8 @@ def setup(chip):
         'power_density',
         'optimization_placement',
         'clock_placement',
-        'clock_trees'
+        'clock_trees',
+        'module_view'
     ])
 
 

siliconcompiler/tools/openroad/detailed_placement.py

@@ -46,7 +46,8 @@ def setup(chip):
         'placement_density',
         'routing_congestion',
         'power_density',
-        'optimization_placement'
+        'optimization_placement',
+        'module_view'
     ])
 
 

siliconcompiler/tools/openroad/detailed_route.py

@@ -52,6 +52,14 @@ def setup(chip):
         'clock_trees'
     ])
 
+    chip.set('tool', tool, 'task', task, 'var', 'drt_end_iteration',
+             'end iteration for detail routing',
+             field='help')
+    if chip.get('tool', tool, 'task', task, 'var', 'drt_end_iteration', step=step, index=index):
+        chip.add('tool', tool, 'task', task, 'require',
+                 ','.join(['tool', tool, 'task', task, 'var', 'drt_end_iteration']),
+                 step=step, index=index)
+
 
 def pre_process(chip):
     define_ord_files(chip)

siliconcompiler/tools/openroad/fillercell_insertion.py

@@ -45,7 +45,8 @@ def setup(chip):
         # Images
         'placement_density',
         'routing_congestion',
-        'power_density'
+        'power_density',
+        'module_view'
     ])
 
 

siliconcompiler/tools/openroad/global_placement.py

@@ -48,7 +48,8 @@ def setup(chip):
         # Images
         'placement_density',
         'routing_congestion',
-        'power_density'
+        'power_density',
+        'module_view'
     ])
 
     set_tool_task_var(chip, param_key='enable_multibit_clustering',

siliconcompiler/tools/openroad/macro_placement.py

@@ -43,6 +43,15 @@ def setup(chip):
         'unconstrained'
     ])
 
+    chip.set('tool', tool, 'task', task, 'file', 'rtlmp_constraints',
+             'contraints script for macro placement',
+             field='help')
+
+    if chip.get('tool', tool, 'task', task, 'file', 'rtlmp_constraints', step=step, index=index):
+        chip.add('tool', tool, 'task', task, 'require',
+                 ",".join(['tool', tool, 'task', task, 'file', 'rtlmp_constraints']),
+                 step=step, index=index)
+
 
 def pre_process(chip):
     step = chip.get('arg', 'step')

siliconcompiler/tools/openroad/pin_placement.py

@@ -42,7 +42,8 @@ def setup(chip):
         # Images
         'placement_density',
         'routing_congestion',
-        'power_density'
+        'power_density',
+        'module_view'
     ])
 
 

siliconcompiler/tools/openroad/power_grid.py

@@ -1,6 +1,7 @@
 from siliconcompiler import NodeStatus
 
 from siliconcompiler.tools._common import get_tool_task, has_pre_post_script
+from siliconcompiler.tools._common.asic import set_tool_task_var
 
 from siliconcompiler.tools.openroad._apr import setup as apr_setup
 from siliconcompiler.tools.openroad._apr import set_reports, set_pnr_inputs, set_pnr_outputs
@@ -39,6 +40,11 @@ def setup(chip):
     define_pdn_params(chip)
     define_psm_params(chip)
 
+    set_tool_task_var(chip, param_key='fixed_pin_keepout',
+                      default_value=0,
+                      schelp='if > 0, applies a blockage in multiples of the routing pitch '
+                             'to each fixed pin to ensure there is room for routing.')
+
     set_reports(chip, [])
 
 

siliconcompiler/tools/openroad/repair_design.py

@@ -46,7 +46,8 @@ def setup(chip):
         'placement_density',
         'routing_congestion',
         'power_density',
-        'optimization_placement'
+        'optimization_placement',
+        'module_view'
     ])
 
 

siliconcompiler/tools/openroad/repair_timing.py

@@ -50,7 +50,8 @@ def setup(chip):
         'power_density',
         'optimization_placement',
         'clock_placement',
-        'clock_trees'
+        'clock_trees',
+        'module_view'
     ])
 
 

siliconcompiler/tools/openroad/scripts/apr/preamble.tcl

@@ -65,6 +65,12 @@ sc_set_dont_use
 
 sc_setup_global_routing
 
+# Store incoming markers to avoid rewriting them
+set sc_starting_markers []
+foreach markerdb [[ord::get_db_block] getMarkerCategories] {
+    lappend sc_starting_markers [$markerdb getName]
+}
+
 ###############################
 # Source Step Script
 ###############################

siliconcompiler/tools/openroad/scripts/apr/sc_clock_tree_synthesis.tcl

@@ -36,6 +36,7 @@ if { [llength [all_clocks]] > 0 } {
 
     set cts_distance_between_buffers \
         [lindex [sc_cfg_tool_task_get var cts_distance_between_buffers] 0]
+    sc_report_args -command clock_tree_synthesis -args $sc_cts_arguments
     clock_tree_synthesis \
         -sink_clustering_enable \
         -sink_clustering_size [lindex [sc_cfg_tool_task_get var cts_cluster_size] 0] \
@@ -43,6 +44,8 @@ if { [llength [all_clocks]] > 0 } {
         -distance_between_buffers $cts_distance_between_buffers \
         {*}$sc_cts_arguments
 
+    tee -file reports/cts.rpt {report_cts}
+
     set_propagated_clock [all_clocks]
 
     estimate_parasitics -placement

siliconcompiler/tools/openroad/scripts/apr/sc_detailed_route.tcl

@@ -15,6 +15,8 @@ source -echo "$sc_refdir/apr/preamble.tcl"
 # Detailed Routing
 ###############################
 
+sc_setup_detailed_route
+
 set drt_arguments []
 if { [lindex [sc_cfg_tool_task_get {var} drt_disable_via_gen] 0] == "true" } {
     lappend drt_arguments "-disable_via_gen"
@@ -38,12 +40,20 @@ set drt_repair_pdn_vias \
 if { $drt_repair_pdn_vias != "" } {
     lappend drt_arguments "-repair_pdn_vias" $drt_repair_pdn_vias
 }
+set drt_end_iteration [lindex [sc_cfg_tool_task_get {var} drt_end_iteration] 0]
+if { $drt_end_iteration != "" } {
+    lappend drt_arguments "-droute_end_iter" $drt_end_iteration
+}
+lappend drt_arguments \
+    -drc_report_iter_step \
+    [lindex [sc_cfg_tool_task_get {var} drt_report_interval] 0]
 
 set sc_minmetal [sc_cfg_get pdk $sc_pdk minlayer $sc_stackup]
 set sc_minmetal [sc_get_layer_name $sc_minmetal]
 set sc_maxmetal [sc_cfg_get pdk $sc_pdk maxlayer $sc_stackup]
 set sc_maxmetal [sc_get_layer_name $sc_maxmetal]
 
+sc_report_args -command detailed_route -args $drt_arguments
 detailed_route \
     -save_guide_updates \
     -output_drc "reports/${sc_design}_drc.rpt" \

siliconcompiler/tools/openroad/scripts/apr/sc_global_placement.tcl

@@ -41,6 +41,7 @@ if { [lindex [sc_cfg_tool_task_get var enable_scan_chains] 0] == "true" } {
             [lindex [sc_cfg_tool_task_get var scan_enable_port_pattern] 0]
     }
 
+    sc_report_args -command set_dft_config -args $dft_args
     set_dft_config -clock_mixing clock_mix {*}$dft_args
     tee -file reports/scan_chain_config.rpt {report_dft_config}
     scan_replace

siliconcompiler/tools/openroad/scripts/apr/sc_global_route.tcl

@@ -16,6 +16,8 @@ source -echo "$sc_refdir/apr/preamble.tcl"
 ###############################
 
 if { [lindex [sc_cfg_tool_task_get {var} grt_use_pin_access] 0] == "true" } {
+    sc_setup_detailed_route
+
     set sc_minmetal [sc_cfg_get pdk $sc_pdk minlayer $sc_stackup]
     set sc_minmetal [sc_get_layer_name $sc_minmetal]
     set sc_maxmetal [sc_cfg_get pdk $sc_pdk maxlayer $sc_stackup]
@@ -27,6 +29,7 @@ if { [lindex [sc_cfg_tool_task_get {var} grt_use_pin_access] 0] == "true" } {
             [lindex [sc_cfg_tool_task_get {var} drt_process_node] 0]
     }
 
+    sc_report_args -command pin_access -args $pin_access_args
     pin_access \
         -bottom_routing_layer $sc_minmetal \
         -top_routing_layer $sc_maxmetal \
@@ -45,11 +48,20 @@ if { [lindex [sc_cfg_tool_task_get {var} grt_allow_overflow] 0] == "true" } {
     lappend sc_grt_arguments "-allow_overflow"
 }
 
-global_route -guide_file "reports/route.guide" \
-    -congestion_iterations [lindex [sc_cfg_tool_task_get {var} grt_overflow_iter] 0] \
-    -congestion_report_file "reports/${sc_design}_congestion.rpt" \
-    -verbose \
-    {*}$sc_grt_arguments
+sc_report_args -command global_route -args $sc_grt_arguments
+if {
+    [catch {
+        global_route -guide_file "reports/route.guide" \
+            -congestion_iterations [lindex [sc_cfg_tool_task_get {var} grt_overflow_iter] 0] \
+            -congestion_report_file "reports/${sc_design}_congestion.rpt" \
+            -verbose \
+            {*}$sc_grt_arguments
+    }]
+} {
+    write_db "reports/${sc_design}.globalroute-error.odb"
+    utl::error FLW 1 \
+        "Global routing failed, saving database to reports/${sc_design}.globalroute-error.odb"
+}
 
 # estimate for metrics
 estimate_parasitics -global_routing

siliconcompiler/tools/openroad/scripts/apr/sc_macro_placement.tcl

@@ -11,6 +11,14 @@ source ./sc_manifest.tcl > /dev/null
 set sc_refdir [sc_cfg_tool_task_get refdir]
 source -echo "$sc_refdir/apr/preamble.tcl"
 
+###############################
+# Macro placement constraints
+###############################
+foreach script [sc_cfg_tool_task_get file rtlmp_constraints] {
+    puts "Sourcing macro placement constraints: $script"
+    source -echo $script
+}
+
 # Need to check if we have any macros before performing macro placement,
 # since we get an error otherwise.
 if { [sc_design_has_unplaced_macros] } {
@@ -77,6 +85,10 @@ if { [sc_design_has_unplaced_macros] } {
     if { $rtlmp_guidance_weight != "" } {
         lappend rtlmp_args -guidance_weight $rtlmp_guidance_weight
     }
+    set rtlmp_boundary_weight [lindex [sc_cfg_tool_task_get var rtlmp_boundary_weight] 0]
+    if { $rtlmp_boundary_weight != "" } {
+        lappend rtlmp_args -boundary_weight $rtlmp_boundary_weight
+    }
     set rtlmp_fence_weight [lindex [sc_cfg_tool_task_get var rtlmp_fence_weight] 0]
     if { $rtlmp_fence_weight != "" } {
         lappend rtlmp_args -fence_weight $rtlmp_fence_weight
@@ -90,11 +102,12 @@ if { [sc_design_has_unplaced_macros] } {
         lappend rtlmp_args -blockage_weight $rtlmp_blockage_weight
     }
 
+    sc_report_args -command rtl_macro_placer -args $rtlmp_args
     rtl_macro_placer \
         -report_directory reports/rtlmp \
         -halo_width $halo_x \
         -halo_height $halo_y \
-        -target_util [sc_global_placement_density] \
+        -target_util [sc_global_placement_density -exclude_padding] \
         {*}$rtlmp_args
 }
 

siliconcompiler/tools/openroad/scripts/apr/sc_power_grid.tcl

@@ -19,6 +19,48 @@ if { [sc_design_has_unplaced_macros] } {
     utl::error FLW 1 "Design contains unplaced macros."
 }
 
+###############################
+# Add blockages
+###############################
+
+set pdn_blockages []
+set pdn_pin_keepout [lindex [sc_cfg_tool_task_get var fixed_pin_keepout] 0]
+if { $pdn_pin_keepout > 0 } {
+    foreach bterm [[ord::get_db_block] getBTerms] {
+        foreach bpin [$bterm getBPins] {
+            if {
+                [$bpin getPlacementStatus] != "FIRM" &&
+                [$bpin getPlacementStatus] != "LOCKED"
+            } {
+                continue
+            }
+
+            foreach box [$bpin getBoxes] {
+                set layer [$box getTechLayer]
+                if { $layer == "NULL" } {
+                    continue
+                }
+
+                set tech_pitch [expr { [$layer getPitch] * $pdn_pin_keepout }]
+
+                set xmin [expr { [$box xMin] - $tech_pitch }]
+                set xmax [expr { [$box xMax] + $tech_pitch }]
+                set ymin [expr { [$box yMin] - $tech_pitch }]
+                set ymax [expr { [$box yMax] + $tech_pitch }]
+
+                set blockage [odb::dbObstruction_create \
+                    [ord::get_db_block] \
+                    $layer \
+                    $xmin $ymin \
+                    $xmax $ymax]
+                lappend pdn_blockages $blockage
+            }
+        }
+    }
+
+    utl::info FLW 1 "Added [llength $pdn_blockages] obstructions to pins"
+}
+
 ###############################
 # Power Network
 ###############################
@@ -57,6 +99,7 @@ foreach net [sc_psm_check_nets] {
         lappend check_args -dont_require_terminals
     }
 
+    sc_report_args -command check_power_grid -args $check_args
     check_power_grid \
         -floorplanning \
         -error_file "reports/power_grid_${net}.rpt" \
@@ -64,6 +107,17 @@ foreach net [sc_psm_check_nets] {
         {*}$check_args
 }
 
+###############################
+# Remove blockages
+###############################
+
+if { [llength $pdn_blockages] > 0 } {
+    foreach obstruction $pdn_blockages {
+        odb::dbObstruction_destroy $obstruction
+    }
+    utl::info FLW 1 "Deleted [llength $pdn_blockages] obstructions"
+}
+
 ###############################
 # Task Postamble
 ###############################

siliconcompiler/tools/openroad/scripts/apr/sc_repair_design.tcl

@@ -41,6 +41,7 @@ if { $rsz_slew_margin != "false" } {
     lappend repair_design_args "-slew_margin" $rsz_slew_margin
 }
 
+sc_report_args -command repair_design -args $repair_design_args
 repair_design \
     -verbose \
     {*}$repair_design_args

siliconcompiler/tools/openroad/scripts/apr/sc_repair_timing.tcl

@@ -40,6 +40,7 @@ if { [lindex [sc_cfg_tool_task_get var rsz_skip_setup_repair] 0] != "true" } {
 
     estimate_parasitics -placement
 
+    sc_report_args -command repair_timing -args $repair_timing_args
     repair_timing \
         -setup \
         -verbose \
@@ -64,6 +65,7 @@ if { [lindex [sc_cfg_tool_task_get var rsz_skip_hold_repair] 0] != "true" } {
     # Enable hold cells
     sc_set_dont_use -hold -scanchain -multibit -report dont_use.repair_timing.hold
 
+    sc_report_args -command repair_timing -args $repair_timing_args
     repair_timing \
         -hold \
         -verbose \
@@ -88,6 +90,7 @@ if { [lindex [sc_cfg_tool_task_get var rsz_skip_recover_power] 0] != "true" } {
     # Enable cells
     sc_set_dont_use -hold -scanchain -multibit -report dont_use.repair_timing.power
 
+    sc_report_args -command repair_timing -args $repair_timing_args
     repair_timing \
         -recover_power $rsz_recover_power \
         -verbose \

siliconcompiler/tools/openroad/scripts/common/procs.tcl

@@ -2,15 +2,24 @@
 # Global Placement
 #######################
 
-proc sc_global_placement_density { } {
-    set gpl_padding [lindex [sc_cfg_tool_task_get var pad_global_place] 0]
+proc sc_global_placement_density { args } {
+    sta::parse_key_args "sc_global_placement_density" args \
+        keys {} \
+        flags {-exclude_padding}
+    sta::check_argc_eq0 "sc_global_placement_density" $args
+
     set gpl_place_density [lindex [sc_cfg_tool_task_get var place_density] 0]
     set gpl_uniform_placement_adjustment \
         [lindex [sc_cfg_tool_task_get var gpl_uniform_placement_adjustment] 0]
 
-    set or_uniform_density [gpl::get_global_placement_uniform_density \
-        -pad_left $gpl_padding \
-        -pad_right $gpl_padding]
+    set density_args []
+    if { ![info exists flags(-exclude_padding)] } {
+        set gpl_padding [lindex [sc_cfg_tool_task_get var pad_global_place] 0]
+
+        lappend density_args -pad_left $gpl_padding
+        lappend density_args -pad_right $gpl_padding
+    }
+    set or_uniform_density [gpl::get_global_placement_uniform_density {*}$density_args]
 
     # Small adder to ensure requested density is slightly over the uniform density
     set or_adjust_density_adder 0.001
@@ -77,6 +86,7 @@ proc sc_global_placement { args } {
 
     set density [sc_global_placement_density]
 
+    sc_report_args -command global_placement -args $gpl_args
     global_placement {*}$gpl_args \
         -density $density \
         -pad_left $gpl_padding \
@@ -101,6 +111,7 @@ proc sc_detailed_placement { } {
         lappend dpl_args "-disallow_one_site_gaps"
     }
 
+    sc_report_args -command detailed_placement -args $dpl_args
     detailed_placement \
         -max_displacement $dpl_max_displacement \
         {*}$dpl_args
@@ -117,15 +128,6 @@ proc sc_pin_placement { args } {
         flags {-random}
     sta::check_argc_eq0 "sc_pin_placement" $args
 
-    global sc_pdk
-    global sc_stackup
-    global sc_tool
-
-    set sc_hpinmetal [sc_cfg_get pdk $sc_pdk {var} $sc_tool pin_layer_horizontal $sc_stackup]
-    set sc_hpinmetal [sc_get_layer_name $sc_hpinmetal]
-    set sc_vpinmetal [sc_cfg_get pdk $sc_pdk {var} $sc_tool pin_layer_vertical $sc_stackup]
-    set sc_vpinmetal [sc_get_layer_name $sc_vpinmetal]
-
     if { [sc_cfg_tool_task_exists var pin_thickness_h] } {
         set h_mult [lindex [sc_cfg_tool_task_get var pin_thickness_h] 0]
         set_pin_thick_multiplier -hor_multiplier $h_mult
@@ -146,9 +148,19 @@ proc sc_pin_placement { args } {
         lappend ppl_args "-random"
     }
 
-    place_pins -hor_layers $sc_hpinmetal \
-        -ver_layers $sc_vpinmetal \
-        {*}[sc_cfg_tool_task_get {var} ppl_arguments] \
+    lappend ppl_args {*}[sc_cfg_tool_task_get {var} ppl_arguments]
+
+    global sc_pdk
+    global sc_stackup
+    global sc_tool
+
+    set sc_hpinmetal [sc_cfg_get pdk $sc_pdk {var} $sc_tool pin_layer_horizontal $sc_stackup]
+    set sc_vpinmetal [sc_cfg_get pdk $sc_pdk {var} $sc_tool pin_layer_vertical $sc_stackup]
+
+    sc_report_args -command place_pins -args $ppl_args
+    place_pins \
+        -hor_layers [sc_get_layer_name $sc_hpinmetal] \
+        -ver_layers [sc_get_layer_name $sc_vpinmetal] \
         {*}$ppl_args
 }
 
@@ -762,3 +774,29 @@ proc sc_set_dont_use { args } {
         tee -quiet -file reports/$keys(-report).rpt {report_dont_use}
     }
 }
+
+proc sc_setup_detailed_route { } {
+    foreach via [sc_cfg_tool_task_get var detailed_route_default_via] {
+        utl::info FLW 1 "Marking $via a default routing via"
+        detailed_route_set_default_via $via
+    }
+    foreach layer [sc_cfg_tool_task_get var detailed_route_unidirectional_layer] {
+        set layer [sc_get_layer_name $layer]
+        utl::info FLW 1 "Marking $layer as a unidirectional routing layer"
+        detailed_route_set_unidirectional_layer $layer
+    }
+}
+
+proc sc_report_args { args } {
+    sta::parse_key_args "sc_report_args" args \
+        keys {-command -args} \
+        flags {}
+
+    sta::check_argc_eq0 "sc_report_args" $args
+
+    if { [llength $keys(-args)] == 0 } {
+        return
+    }
+
+    puts "$keys(-command) siliconcompiler arguments: $keys(-args)"
+}