sequenzo 0.1.24__cp311-cp311-macosx_10_9_x86_64.whl

sequenzo/dissimilarity_measures/src/xsimd/include/xsimd/config/xsimd_arch.hpp

@@ -0,0 +1,240 @@
+/***************************************************************************
+ * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and         *
+ * Martin Renou                                                             *
+ * Copyright (c) QuantStack                                                 *
+ * Copyright (c) Serge Guelton                                              *
+ *                                                                          *
+ * Distributed under the terms of the BSD 3-Clause License.                 *
+ *                                                                          *
+ * The full license is in the file LICENSE, distributed with this software. *
+ ****************************************************************************/
+
+#ifndef XSIMD_ARCH_HPP
+#define XSIMD_ARCH_HPP
+
+#include <initializer_list>
+#include <type_traits>
+#include <utility>
+
+#include "../types/xsimd_all_registers.hpp"
+#include "./xsimd_config.hpp"
+#include "./xsimd_cpuid.hpp"
+
+namespace xsimd
+{
+
+    /**
+     * @ingroup architectures
+     *
+     * Dummy architectures that only appears in a list of architecture when no
+     * other architecture has been detected.
+     */
+    struct unavailable
+    {
+        static constexpr bool supported() noexcept { return false; }
+        static constexpr bool available() noexcept { return false; }
+        static constexpr std::size_t alignment() noexcept { return 0; }
+        static constexpr bool requires_alignment() noexcept { return false; }
+        static constexpr char const* name() noexcept { return "<none>"; }
+    };
+
+    namespace detail
+    {
+        // Checks whether T appears in Tys.
+        template <class T, class... Tys>
+        struct contains;
+
+        template <class T>
+        struct contains<T> : std::false_type
+        {
+        };
+
+        template <class T, class Ty, class... Tys>
+        struct contains<T, Ty, Tys...>
+            : std::conditional<std::is_same<Ty, T>::value, std::true_type,
+                               contains<T, Tys...>>::type
+        {
+        };
+
+        template <typename T>
+        XSIMD_INLINE constexpr T max_of(T value) noexcept
+        {
+            return value;
+        }
+
+        template <typename T, typename... Ts>
+        XSIMD_INLINE constexpr T max_of(T head0, T head1, Ts... tail) noexcept
+        {
+            return max_of((head0 > head1 ? head0 : head1), tail...);
+        }
+
+        template <typename... Ts>
+        struct head;
+
+        template <typename T, typename... Ts>
+        struct head<T, Ts...>
+        {
+            using type = T;
+        };
+
+        template <>
+        struct head<>
+        {
+            using type = unavailable;
+        };
+
+    } // namespace detail
+
+    // An arch_list is a list of architectures.
+    template <class... Archs>
+    struct arch_list
+    {
+        using best = typename detail::head<Archs...>::type;
+
+        template <class Arch>
+        using add = arch_list<Archs..., Arch>;
+
+        template <class... OtherArchs>
+        using extend = arch_list<Archs..., OtherArchs...>;
+
+        template <class Arch>
+        static constexpr bool contains() noexcept
+        {
+            return detail::contains<Arch, Archs...>::value;
+        }
+
+        template <class F>
+        static XSIMD_INLINE void for_each(F&& f) noexcept
+        {
+            (void)std::initializer_list<bool> { (f(Archs {}), true)... };
+        }
+
+        static constexpr std::size_t alignment() noexcept
+        {
+            // all alignments are a power of two
+            return detail::max_of(Archs::alignment()..., static_cast<size_t>(0));
+        }
+    };
+
+    namespace detail
+    {
+
+        // Filter archlists Archs, picking only supported archs and adding
+        // them to L.
+        template <class L, class... Archs>
+        struct supported_helper;
+
+        template <class L>
+        struct supported_helper<L, arch_list<>>
+        {
+            using type = L;
+        };
+
+        template <class L, class Arch, class... Archs>
+        struct supported_helper<L, arch_list<Arch, Archs...>>
+            : supported_helper<
+                  typename std::conditional<Arch::supported(),
+                                            typename L::template add<Arch>, L>::type,
+                  arch_list<Archs...>>
+        {
+        };
+
+        template <class... Archs>
+        struct supported : supported_helper<arch_list<>, Archs...>
+        {
+        };
+
+        // Joins all arch_list Archs in a single arch_list.
+        template <class... Archs>
+        struct join;
+
+        template <class Arch>
+        struct join<Arch>
+        {
+            using type = Arch;
+        };
+
+        template <class Arch, class... Archs, class... Args>
+        struct join<Arch, arch_list<Archs...>, Args...>
+            : join<typename Arch::template extend<Archs...>, Args...>
+        {
+        };
+    } // namespace detail
+
+    using all_x86_architectures = arch_list<
+        avx512vnni<avx512vbmi2>, avx512vbmi2, avx512vbmi, avx512ifma, avx512pf, avx512vnni<avx512bw>, avx512bw, avx512er, avx512dq, avx512cd, avx512f,
+        avxvnni, fma3<avx2>, avx2, fma3<avx>, avx, fma4, fma3<sse4_2>,
+        sse4_2, sse4_1, /*sse4a,*/ ssse3, sse3, sse2>;
+
+    using all_sve_architectures = arch_list<detail::sve<512>, detail::sve<256>, detail::sve<128>>;
+    using all_rvv_architectures = arch_list<detail::rvv<512>, detail::rvv<256>, detail::rvv<128>>;
+    using all_arm_architectures = typename detail::join<all_sve_architectures, arch_list<i8mm<neon64>, neon64, neon>>::type;
+    using all_power_architectures = arch_list<vsx>;
+    using all_riscv_architectures = all_rvv_architectures;
+    using all_wasm_architectures = arch_list<wasm>;
+    using all_architectures = typename detail::join<all_power_architectures, all_riscv_architectures, all_wasm_architectures, all_arm_architectures, all_x86_architectures>::type;
+
+    using supported_architectures = typename detail::supported<all_architectures>::type;
+
+    using x86_arch = typename detail::supported<all_x86_architectures>::type::best;
+    using arm_arch = typename detail::supported<all_arm_architectures>::type::best;
+    using power_arch = typename detail::supported<all_power_architectures>::type::best;
+    using riscv_arch = typename detail::supported<all_riscv_architectures>::type::best;
+    using best_arch = typename supported_architectures::best;
+
+#ifdef XSIMD_DEFAULT_ARCH
+    using default_arch = XSIMD_DEFAULT_ARCH;
+#else
+    using default_arch = best_arch;
+#endif
+
+    namespace detail
+    {
+        template <class F, class ArchList>
+        class dispatcher
+        {
+
+            const decltype(available_architectures()) availables_archs;
+            F functor;
+
+            template <class Arch, class... Tys>
+            XSIMD_INLINE auto walk_archs(arch_list<Arch>, Tys&&... args) noexcept -> decltype(functor(Arch {}, std::forward<Tys>(args)...))
+            {
+                assert(Arch::available() && "At least one arch must be supported during dispatch");
+                return functor(Arch {}, std::forward<Tys>(args)...);
+            }
+
+            template <class Arch, class ArchNext, class... Archs, class... Tys>
+            XSIMD_INLINE auto walk_archs(arch_list<Arch, ArchNext, Archs...>, Tys&&... args) noexcept -> decltype(functor(Arch {}, std::forward<Tys>(args)...))
+            {
+                if (availables_archs.has(Arch {}))
+                    return functor(Arch {}, std::forward<Tys>(args)...);
+                else
+                    return walk_archs(arch_list<ArchNext, Archs...> {}, std::forward<Tys>(args)...);
+            }
+
+        public:
+            XSIMD_INLINE dispatcher(F f) noexcept
+                : availables_archs(available_architectures())
+                , functor(f)
+            {
+            }
+
+            template <class... Tys>
+            XSIMD_INLINE auto operator()(Tys&&... args) noexcept -> decltype(functor(default_arch {}, std::forward<Tys>(args)...))
+            {
+                return walk_archs(ArchList {}, std::forward<Tys>(args)...);
+            }
+        };
+    }
+
+    // Generic function dispatch, à la ifunc
+    template <class ArchList = supported_architectures, class F>
+    XSIMD_INLINE detail::dispatcher<F, ArchList> dispatch(F&& f) noexcept
+    {
+        return { std::forward<F>(f) };
+    }
+
+} // namespace xsimd
+
+#endif

sequenzo/dissimilarity_measures/src/xsimd/include/xsimd/config/xsimd_config.hpp

@@ -0,0 +1,484 @@
+/***************************************************************************
+ * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and         *
+ * Martin Renou                                                             *
+ * Copyright (c) QuantStack                                                 *
+ * Copyright (c) Serge Guelton                                              *
+ *                                                                          *
+ * Distributed under the terms of the BSD 3-Clause License.                 *
+ *                                                                          *
+ * The full license is in the file LICENSE, distributed with this software. *
+ ****************************************************************************/
+
+#ifndef XSIMD_CONFIG_HPP
+#define XSIMD_CONFIG_HPP
+
+#define XSIMD_VERSION_MAJOR 13
+#define XSIMD_VERSION_MINOR 2
+#define XSIMD_VERSION_PATCH 0
+
+/**
+ * high level free functions
+ *
+ * @defgroup xsimd_config_macro Instruction Set Detection
+ */
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if SSE2 is available at compile-time, to 0 otherwise.
+ */
+#ifdef __SSE2__
+#define XSIMD_WITH_SSE2 1
+#else
+#define XSIMD_WITH_SSE2 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if SSE3 is available at compile-time, to 0 otherwise.
+ */
+#ifdef __SSE3__
+#define XSIMD_WITH_SSE3 1
+#else
+#define XSIMD_WITH_SSE3 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if SSSE3 is available at compile-time, to 0 otherwise.
+ */
+#ifdef __SSSE3__
+#define XSIMD_WITH_SSSE3 1
+#else
+#define XSIMD_WITH_SSSE3 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if SSE4.1 is available at compile-time, to 0 otherwise.
+ */
+#ifdef __SSE4_1__
+#define XSIMD_WITH_SSE4_1 1
+#else
+#define XSIMD_WITH_SSE4_1 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if SSE4.2 is available at compile-time, to 0 otherwise.
+ */
+#ifdef __SSE4_2__
+#define XSIMD_WITH_SSE4_2 1
+#else
+#define XSIMD_WITH_SSE4_2 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX__
+#define XSIMD_WITH_AVX 1
+#else
+#define XSIMD_WITH_AVX 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX2 is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX2__
+#define XSIMD_WITH_AVX2 1
+#else
+#define XSIMD_WITH_AVX2 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVXVNNI is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVXVNNI__
+#define XSIMD_WITH_AVXVNNI 1
+#else
+#define XSIMD_WITH_AVXVNNI 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if FMA3 for SSE is available at compile-time, to 0 otherwise.
+ */
+#ifdef __FMA__
+
+#if defined(__SSE__)
+#ifndef XSIMD_WITH_FMA3_SSE // Leave the opportunity to manually disable it, see #643
+#define XSIMD_WITH_FMA3_SSE 1
+#endif
+#else
+
+#if XSIMD_WITH_FMA3_SSE
+#error "Manually set XSIMD_WITH_FMA3_SSE is incompatible with current compiler flags"
+#endif
+
+#define XSIMD_WITH_FMA3_SSE 0
+#endif
+
+#else
+
+#if XSIMD_WITH_FMA3_SSE
+#error "Manually set XSIMD_WITH_FMA3_SSE is incompatible with current compiler flags"
+#endif
+
+#define XSIMD_WITH_FMA3_SSE 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if FMA3 for AVX is available at compile-time, to 0 otherwise.
+ */
+#ifdef __FMA__
+
+#if defined(__AVX__)
+#ifndef XSIMD_WITH_FMA3_AVX // Leave the opportunity to manually disable it, see #643
+#define XSIMD_WITH_FMA3_AVX 1
+#endif
+#else
+
+#if XSIMD_WITH_FMA3_AVX
+#error "Manually set XSIMD_WITH_FMA3_AVX is incompatible with current compiler flags"
+#endif
+
+#define XSIMD_WITH_FMA3_AVX 0
+#endif
+
+#if defined(__AVX2__)
+#ifndef XSIMD_WITH_FMA3_AVX2 // Leave the opportunity to manually disable it, see #643
+#define XSIMD_WITH_FMA3_AVX2 1
+#endif
+#else
+
+#if XSIMD_WITH_FMA3_AVX2
+#error "Manually set XSIMD_WITH_FMA3_AVX2 is incompatible with current compiler flags"
+#endif
+
+#define XSIMD_WITH_FMA3_AVX2 0
+#endif
+
+#else
+
+#if XSIMD_WITH_FMA3_AVX
+#error "Manually set XSIMD_WITH_FMA3_AVX is incompatible with current compiler flags"
+#endif
+
+#if XSIMD_WITH_FMA3_AVX2
+#error "Manually set XSIMD_WITH_FMA3_AVX2 is incompatible with current compiler flags"
+#endif
+
+#define XSIMD_WITH_FMA3_AVX 0
+#define XSIMD_WITH_FMA3_AVX2 0
+
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if FMA4 is available at compile-time, to 0 otherwise.
+ */
+#ifdef __FMA4__
+#define XSIMD_WITH_FMA4 1
+#else
+#define XSIMD_WITH_FMA4 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX512F is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX512F__
+// AVX512 instructions are supported starting with gcc 6
+// see https://www.gnu.org/software/gcc/gcc-6/changes.html
+// check clang first, newer clang always defines __GNUC__ = 4
+#if defined(__clang__) && __clang_major__ >= 6
+#define XSIMD_WITH_AVX512F 1
+#elif defined(__GNUC__) && __GNUC__ < 6
+#define XSIMD_WITH_AVX512F 0
+#else
+#define XSIMD_WITH_AVX512F 1
+#if __GNUC__ == 6
+#define XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY 1
+#endif
+#endif
+#else
+#define XSIMD_WITH_AVX512F 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX512CD is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX512CD__
+// Avoids repeating the GCC workaround over and over
+#define XSIMD_WITH_AVX512CD XSIMD_WITH_AVX512F
+#else
+#define XSIMD_WITH_AVX512CD 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX512DQ is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX512DQ__
+#define XSIMD_WITH_AVX512DQ XSIMD_WITH_AVX512F
+#else
+#define XSIMD_WITH_AVX512DQ 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX512BW is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX512BW__
+#define XSIMD_WITH_AVX512BW XSIMD_WITH_AVX512F
+#else
+#define XSIMD_WITH_AVX512BW 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX512ER is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX512ER__
+#define XSIMD_WITH_AVX512ER XSIMD_WITH_AVX512F
+#else
+#define XSIMD_WITH_AVX512ER 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX512PF is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX512PF__
+#define XSIMD_WITH_AVX512PF XSIMD_WITH_AVX512F
+#else
+#define XSIMD_WITH_AVX512PF 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX512IFMA is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX512IFMA__
+#define XSIMD_WITH_AVX512IFMA XSIMD_WITH_AVX512F
+#else
+#define XSIMD_WITH_AVX512IFMA 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX512VBMI is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX512VBMI__
+#define XSIMD_WITH_AVX512VBMI XSIMD_WITH_AVX512F
+#else
+#define XSIMD_WITH_AVX512VBMI 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX512VBMI2 is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX512VBMI2__
+#define XSIMD_WITH_AVX512VBMI2 XSIMD_WITH_AVX512F
+#else
+#define XSIMD_WITH_AVX512VBMI2 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if AVX512VNNI is available at compile-time, to 0 otherwise.
+ */
+#ifdef __AVX512VNNI__
+
+#if XSIMD_WITH_AVX512VBMI2
+#define XSIMD_WITH_AVX512VNNI_AVX512VBMI2 XSIMD_WITH_AVX512F
+#define XSIMD_WITH_AVX512VNNI_AVX512BW XSIMD_WITH_AVX512F
+#else
+#define XSIMD_WITH_AVX512VNNI_AVX512VBMI2 0
+#define XSIMD_WITH_AVX512VNNI_AVX512BW XSIMD_WITH_AVX512F
+#endif
+
+#else
+
+#define XSIMD_WITH_AVX512VNNI_AVX512VBMI2 0
+#define XSIMD_WITH_AVX512VNNI_AVX512BW 0
+
+#endif
+
+#ifdef __ARM_NEON
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if NEON is available at compile-time, to 0 otherwise.
+ */
+#if __ARM_ARCH >= 7
+#define XSIMD_WITH_NEON 1
+#else
+#define XSIMD_WITH_NEON 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if NEON64 is available at compile-time, to 0 otherwise.
+ */
+#ifdef __aarch64__
+#define XSIMD_WITH_NEON64 1
+#else
+#define XSIMD_WITH_NEON64 0
+#endif
+#else
+#define XSIMD_WITH_NEON 0
+#define XSIMD_WITH_NEON64 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if i8mm neon64 extension is available at compile-time, to 0 otherwise.
+ */
+#if defined(__ARM_FEATURE_MATMUL_INT8)
+#define XSIMD_WITH_I8MM_NEON64 1
+#else
+#define XSIMD_WITH_I8MM_NEON64 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if SVE is available and bit width is pre-set at compile-time, to 0 otherwise.
+ */
+#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FEATURE_SVE_BITS) && __ARM_FEATURE_SVE_BITS > 0
+#define XSIMD_WITH_SVE 1
+#define XSIMD_SVE_BITS __ARM_FEATURE_SVE_BITS
+#else
+#define XSIMD_WITH_SVE 0
+#define XSIMD_SVE_BITS 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if RVV is available and bit width is pre-set at compile-time, to 0 otherwise.
+ */
+#if defined(__riscv_vector) && defined(__riscv_v_fixed_vlen) && __riscv_v_fixed_vlen > 0
+#define XSIMD_WITH_RVV 1
+#define XSIMD_RVV_BITS __riscv_v_fixed_vlen
+#else
+#define XSIMD_WITH_RVV 0
+#define XSIMD_RVV_BITS 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if WebAssembly SIMD is available at compile-time, to 0 otherwise.
+ */
+#ifdef __EMSCRIPTEN__
+#define XSIMD_WITH_WASM 1
+#else
+#define XSIMD_WITH_WASM 0
+#endif
+
+/**
+ * @ingroup xsimd_config_macro
+ *
+ * Set to 1 if VMX with VSX extension is available at compile-time, to 0 otherwise.
+ */
+#if defined(__VEC__) && defined(__VSX__)
+#define XSIMD_WITH_VSX 1
+#else
+#define XSIMD_WITH_VSX 0
+#endif
+
+// Workaround for MSVC compiler
+#ifdef _MSC_VER
+
+#if XSIMD_WITH_AVX512
+
+#undef XSIMD_WITH_AVX2
+#define XSIMD_WITH_AVX2 1
+
+#endif
+
+#if XSIMD_WITH_AVX2
+
+#undef XSIMD_WITH_AVX
+#define XSIMD_WITH_AVX 1
+
+#undef XSIMD_WITH_FMA3_AVX
+#define XSIMD_WITH_FMA3_AVX 1
+
+#undef XSIMD_WITH_FMA3_AVX2
+#define XSIMD_WITH_FMA3_AVX2 1
+
+#endif
+
+#if XSIMD_WITH_AVX
+
+#undef XSIMD_WITH_SSE4_2
+#define XSIMD_WITH_SSE4_2 1
+
+#endif
+
+#if XSIMD_WITH_SSE4_2
+
+#undef XSIMD_WITH_SSE4_1
+#define XSIMD_WITH_SSE4_1 1
+
+#endif
+
+#if XSIMD_WITH_SSE4_1
+
+#undef XSIMD_WITH_SSSE3
+#define XSIMD_WITH_SSSE3 1
+
+#endif
+
+#if XSIMD_WITH_SSSE3
+
+#undef XSIMD_WITH_SSE3
+#define XSIMD_WITH_SSE3 1
+
+#endif
+
+#if XSIMD_WITH_SSE3 || ((defined(_M_AMD64) || defined(_M_X64)) && !defined(_M_ARM64EC)) || (defined(_M_IX86_FP) && _M_IX86_FP >= 2)
+#undef XSIMD_WITH_SSE2
+#define XSIMD_WITH_SSE2 1
+#endif
+
+#endif
+
+#if !XSIMD_WITH_SSE2 && !XSIMD_WITH_SSE3 && !XSIMD_WITH_SSSE3 && !XSIMD_WITH_SSE4_1 && !XSIMD_WITH_SSE4_2 && !XSIMD_WITH_AVX && !XSIMD_WITH_AVX2 && !XSIMD_WITH_AVXVNNI && !XSIMD_WITH_FMA3_SSE && !XSIMD_WITH_FMA4 && !XSIMD_WITH_FMA3_AVX && !XSIMD_WITH_FMA3_AVX2 && !XSIMD_WITH_AVX512F && !XSIMD_WITH_AVX512CD && !XSIMD_WITH_AVX512DQ && !XSIMD_WITH_AVX512BW && !XSIMD_WITH_AVX512ER && !XSIMD_WITH_AVX512PF && !XSIMD_WITH_AVX512IFMA && !XSIMD_WITH_AVX512VBMI && !XSIMD_WITH_AVX512VBMI2 && !XSIMD_WITH_NEON && !XSIMD_WITH_NEON64 && !XSIMD_WITH_SVE && !XSIMD_WITH_RVV && !XSIMD_WITH_WASM && !XSIMD_WITH_VSX && !XSIMD_WITH_EMULATED
+#define XSIMD_NO_SUPPORTED_ARCHITECTURE
+#endif
+
+#endif