qiskit 1.3.0__cp39-abi3-win32.whl → 1.3.0b1__cp39-abi3-win32.whl

qiskit/transpiler/passes/utils/gate_direction.py

@@ -10,17 +10,40 @@
 # copyright notice, and modified files need to carry a notice indicating
 # that they have been altered from the originals.
 
-"""Rearrange the direction of the 2-qubit gate nodes to match the directed coupling map."""
+"""Rearrange the direction of the cx nodes to match the directed coupling map."""
+
+from math import pi
 
 from qiskit.transpiler.basepasses import TransformationPass
-from qiskit._accelerate.gate_direction import fix_gate_direction_coupling, fix_gate_direction_target
+from qiskit.transpiler.exceptions import TranspilerError
+
+from qiskit.converters import dag_to_circuit, circuit_to_dag
+from qiskit.circuit import QuantumRegister, ControlFlowOp
+from qiskit.dagcircuit import DAGCircuit, DAGOpNode
+from qiskit.circuit.library.standard_gates import (
+    SGate,
+    SdgGate,
+    SXGate,
+    HGate,
+    CXGate,
+    CZGate,
+    ECRGate,
+    RXXGate,
+    RYYGate,
+    RZZGate,
+    RZXGate,
+    SwapGate,
+)
+
+
+def _swap_node_qargs(node):
+    return DAGOpNode(node.op, node.qargs[::-1], node.cargs)
 
 
 class GateDirection(TransformationPass):
     """Modify asymmetric gates to match the hardware coupling direction.
 
-    This pass supports replacements for the `cx`, `cz`, `ecr`, `swap`, `rzx`, `rxx`, `ryy` and
-    `rzz` gates, using the following identities::
+    This pass makes use of the following identities::
 
                              ┌───┐┌───┐┌───┐
         q_0: ──■──      q_0: ┤ H ├┤ X ├┤ H ├
@@ -35,9 +58,6 @@ class GateDirection(TransformationPass):
              │  ECR │  =       ┌┴───┴┐├────┤└┬───┬┘│  Ecr │├───┤
         q_1: ┤1     ├     q_1: ┤ Sdg ├┤ √X ├─┤ S ├─┤0     ├┤ H ├
              └──────┘          └─────┘└────┘ └───┘ └──────┘└───┘
-        Note: This is done in terms of less-efficient S/SX/Sdg gates instead of the more natural
-        `RY(pi /2)` so we have a chance for basis translation to keep things in a discrete basis
-        during resynthesis, if that's what's being asked for.
 
 
              ┌──────┐          ┌───┐┌──────┐┌───┐
@@ -46,18 +66,18 @@ class GateDirection(TransformationPass):
         q_1: ┤1     ├     q_1: ┤ H ├┤0     ├┤ H ├
              └──────┘          └───┘└──────┘└───┘
 
-        cz, swap, rxx, ryy and rzz directions are fixed by reversing their qargs order.
-
     This pass assumes that the positions of the qubits in the :attr:`.DAGCircuit.qubits` attribute
     are the physical qubit indices. For example if ``dag.qubits[0]`` is qubit 0 in the
     :class:`.CouplingMap` or :class:`.Target`.
     """
 
+    _KNOWN_REPLACEMENTS = frozenset(["cx", "cz", "ecr", "swap", "rzx", "rxx", "ryy", "rzz"])
+
     def __init__(self, coupling_map, target=None):
         """GateDirection pass.
 
         Args:
-            coupling_map (CouplingMap): Directed graph representing a coupling map.
+            coupling_map (CouplingMap): Directed graph represented a coupling map.
             target (Target): The backend target to use for this pass. If this is specified
                 it will be used instead of the coupling map
         """
@@ -65,6 +85,248 @@ class GateDirection(TransformationPass):
         self.coupling_map = coupling_map
         self.target = target
 
+        # Create the replacement dag and associated register.
+        self._cx_dag = DAGCircuit()
+        qr = QuantumRegister(2)
+        self._cx_dag.add_qreg(qr)
+        self._cx_dag.apply_operation_back(HGate(), [qr[0]], [])
+        self._cx_dag.apply_operation_back(HGate(), [qr[1]], [])
+        self._cx_dag.apply_operation_back(CXGate(), [qr[1], qr[0]], [])
+        self._cx_dag.apply_operation_back(HGate(), [qr[0]], [])
+        self._cx_dag.apply_operation_back(HGate(), [qr[1]], [])
+
+        # This is done in terms of less-efficient S/SX/Sdg gates instead of the more natural
+        # `RY(pi /2)` so we have a chance for basis translation to keep things in a discrete basis
+        # during resynthesis, if that's what's being asked for.
+        self._ecr_dag = DAGCircuit()
+        qr = QuantumRegister(2)
+        self._ecr_dag.global_phase = -pi / 2
+        self._ecr_dag.add_qreg(qr)
+        self._ecr_dag.apply_operation_back(SGate(), [qr[0]], [])
+        self._ecr_dag.apply_operation_back(SXGate(), [qr[0]], [])
+        self._ecr_dag.apply_operation_back(SdgGate(), [qr[0]], [])
+        self._ecr_dag.apply_operation_back(SdgGate(), [qr[1]], [])
+        self._ecr_dag.apply_operation_back(SXGate(), [qr[1]], [])
+        self._ecr_dag.apply_operation_back(SGate(), [qr[1]], [])
+        self._ecr_dag.apply_operation_back(ECRGate(), [qr[1], qr[0]], [])
+        self._ecr_dag.apply_operation_back(HGate(), [qr[0]], [])
+        self._ecr_dag.apply_operation_back(HGate(), [qr[1]], [])
+
+        self._cz_dag = DAGCircuit()
+        qr = QuantumRegister(2)
+        self._cz_dag.add_qreg(qr)
+        self._cz_dag.apply_operation_back(CZGate(), [qr[1], qr[0]], [])
+
+        self._swap_dag = DAGCircuit()
+        qr = QuantumRegister(2)
+        self._swap_dag.add_qreg(qr)
+        self._swap_dag.apply_operation_back(SwapGate(), [qr[1], qr[0]], [])
+
+        # If adding more replacements (either static or dynamic), also update the class variable
+        # `_KNOWN_REPLACMENTS` to include them in the error messages.
+        self._static_replacements = {
+            "cx": self._cx_dag,
+            "cz": self._cz_dag,
+            "ecr": self._ecr_dag,
+            "swap": self._swap_dag,
+        }
+
+    @staticmethod
+    def _rzx_dag(parameter):
+        _rzx_dag = DAGCircuit()
+        qr = QuantumRegister(2)
+        _rzx_dag.add_qreg(qr)
+        _rzx_dag.apply_operation_back(HGate(), [qr[0]], [])
+        _rzx_dag.apply_operation_back(HGate(), [qr[1]], [])
+        _rzx_dag.apply_operation_back(RZXGate(parameter), [qr[1], qr[0]], [])
+        _rzx_dag.apply_operation_back(HGate(), [qr[0]], [])
+        _rzx_dag.apply_operation_back(HGate(), [qr[1]], [])
+        return _rzx_dag
+
+    @staticmethod
+    def _rxx_dag(parameter):
+        _rxx_dag = DAGCircuit()
+        qr = QuantumRegister(2)
+        _rxx_dag.add_qreg(qr)
+        _rxx_dag.apply_operation_back(RXXGate(parameter), [qr[1], qr[0]], [])
+        return _rxx_dag
+
+    @staticmethod
+    def _ryy_dag(parameter):
+        _ryy_dag = DAGCircuit()
+        qr = QuantumRegister(2)
+        _ryy_dag.add_qreg(qr)
+        _ryy_dag.apply_operation_back(RYYGate(parameter), [qr[1], qr[0]], [])
+        return _ryy_dag
+
+    @staticmethod
+    def _rzz_dag(parameter):
+        _rzz_dag = DAGCircuit()
+        qr = QuantumRegister(2)
+        _rzz_dag.add_qreg(qr)
+        _rzz_dag.apply_operation_back(RZZGate(parameter), [qr[1], qr[0]], [])
+        return _rzz_dag
+
+    def _run_coupling_map(self, dag, wire_map, edges=None):
+        if edges is None:
+            edges = set(self.coupling_map.get_edges())
+        if not edges:
+            return dag
+        # Don't include directives to avoid things like barrier, which are assumed always supported.
+        for node in dag.op_nodes(include_directives=False):
+            if isinstance(node.op, ControlFlowOp):
+                new_op = node.op.replace_blocks(
+                    dag_to_circuit(
+                        self._run_coupling_map(
+                            circuit_to_dag(block),
+                            {
+                                inner: wire_map[outer]
+                                for outer, inner in zip(node.qargs, block.qubits)
+                            },
+                            edges,
+                        )
+                    )
+                    for block in node.op.blocks
+                )
+                dag.substitute_node(node, new_op, propagate_condition=False)
+                continue
+            if len(node.qargs) != 2:
+                continue
+            if dag.has_calibration_for(node):
+                continue
+            qargs = (wire_map[node.qargs[0]], wire_map[node.qargs[1]])
+            if qargs not in edges and (qargs[1], qargs[0]) not in edges:
+                raise TranspilerError(
+                    f"The circuit requires a connection between physical qubits {qargs}"
+                )
+            if qargs not in edges:
+                replacement = self._static_replacements.get(node.name)
+                if replacement is not None:
+                    dag.substitute_node_with_dag(node, replacement)
+                elif node.name == "rzx":
+                    dag.substitute_node_with_dag(node, self._rzx_dag(*node.op.params))
+                elif node.name == "rxx":
+                    dag.substitute_node_with_dag(node, self._rxx_dag(*node.op.params))
+                elif node.name == "ryy":
+                    dag.substitute_node_with_dag(node, self._ryy_dag(*node.op.params))
+                elif node.name == "rzz":
+                    dag.substitute_node_with_dag(node, self._rzz_dag(*node.op.params))
+                else:
+                    raise TranspilerError(
+                        f"'{node.name}' would be supported on '{qargs}' if the direction were"
+                        f" swapped, but no rules are known to do that."
+                        f" {list(self._KNOWN_REPLACEMENTS)} can be automatically flipped."
+                    )
+        return dag
+
+    def _run_target(self, dag, wire_map):
+        # Don't include directives to avoid things like barrier, which are assumed always supported.
+        for node in dag.op_nodes(include_directives=False):
+            if isinstance(node.op, ControlFlowOp):
+                new_op = node.op.replace_blocks(
+                    dag_to_circuit(
+                        self._run_target(
+                            circuit_to_dag(block),
+                            {
+                                inner: wire_map[outer]
+                                for outer, inner in zip(node.qargs, block.qubits)
+                            },
+                        )
+                    )
+                    for block in node.op.blocks
+                )
+                dag.substitute_node(node, new_op, propagate_condition=False)
+                continue
+            if len(node.qargs) != 2:
+                continue
+            if dag.has_calibration_for(node):
+                continue
+            qargs = (wire_map[node.qargs[0]], wire_map[node.qargs[1]])
+            swapped = (qargs[1], qargs[0])
+            if node.name in self._static_replacements:
+                if self.target.instruction_supported(node.name, qargs):
+                    continue
+                if self.target.instruction_supported(node.name, swapped):
+                    dag.substitute_node_with_dag(node, self._static_replacements[node.name])
+                else:
+                    raise TranspilerError(
+                        f"The circuit requires a connection between physical qubits {qargs}"
+                        f" for {node.name}"
+                    )
+            elif node.name == "rzx":
+                if self.target.instruction_supported(
+                    qargs=qargs, operation_class=RZXGate, parameters=node.op.params
+                ):
+                    continue
+                if self.target.instruction_supported(
+                    qargs=swapped, operation_class=RZXGate, parameters=node.op.params
+                ):
+                    dag.substitute_node_with_dag(node, self._rzx_dag(*node.op.params))
+                else:
+                    raise TranspilerError(
+                        f"The circuit requires a connection between physical qubits {qargs}"
+                        f" for {node.name}"
+                    )
+            elif node.name == "rxx":
+                if self.target.instruction_supported(
+                    qargs=qargs, operation_class=RXXGate, parameters=node.op.params
+                ):
+                    continue
+                if self.target.instruction_supported(
+                    qargs=swapped, operation_class=RXXGate, parameters=node.op.params
+                ):
+                    dag.substitute_node_with_dag(node, self._rxx_dag(*node.op.params))
+                else:
+                    raise TranspilerError(
+                        f"The circuit requires a connection between physical qubits {qargs}"
+                        f" for {node.name}"
+                    )
+            elif node.name == "ryy":
+                if self.target.instruction_supported(
+                    qargs=qargs, operation_class=RYYGate, parameters=node.op.params
+                ):
+                    continue
+                if self.target.instruction_supported(
+                    qargs=swapped, operation_class=RYYGate, parameters=node.op.params
+                ):
+                    dag.substitute_node_with_dag(node, self._ryy_dag(*node.op.params))
+                else:
+                    raise TranspilerError(
+                        f"The circuit requires a connection between physical qubits {qargs}"
+                        f" for {node.name}"
+                    )
+            elif node.name == "rzz":
+                if self.target.instruction_supported(
+                    qargs=qargs, operation_class=RZZGate, parameters=node.op.params
+                ):
+                    continue
+                if self.target.instruction_supported(
+                    qargs=swapped, operation_class=RZZGate, parameters=node.op.params
+                ):
+                    dag.substitute_node_with_dag(node, self._rzz_dag(*node.op.params))
+                else:
+                    raise TranspilerError(
+                        f"The circuit requires a connection between physical qubits {qargs}"
+                        f" for {node.name}"
+                    )
+            elif self.target.instruction_supported(node.name, qargs):
+                continue
+            elif self.target.instruction_supported(node.name, swapped) or dag.has_calibration_for(
+                _swap_node_qargs(node)
+            ):
+                raise TranspilerError(
+                    f"'{node.name}' would be supported on '{qargs}' if the direction were"
+                    f" swapped, but no rules are known to do that."
+                    f" {list(self._KNOWN_REPLACEMENTS)} can be automatically flipped."
+                )
+            else:
+                raise TranspilerError(
+                    f"'{node.name}' with parameters '{node.op.params}' is not supported on qubits"
+                    f" '{qargs}' in either direction."
+                )
+
+        return dag
+
     def run(self, dag):
         """Run the GateDirection pass on `dag`.
 
@@ -81,6 +343,7 @@ class GateDirection(TransformationPass):
             TranspilerError: If the circuit cannot be mapped just by flipping the
                 cx nodes.
         """
+        layout_map = {bit: i for i, bit in enumerate(dag.qubits)}
         if self.target is None:
-            return fix_gate_direction_coupling(dag, set(self.coupling_map.get_edges()))
-        return fix_gate_direction_target(dag, self.target)
+            return self._run_coupling_map(dag, layout_map)
+        return self._run_target(dag, layout_map)

qiskit/transpiler/passes/utils/gates_basis.py

@@ -12,13 +12,9 @@
 
 """Check if all gates in the DAGCircuit are in the specified basis gates."""
 
+from qiskit.converters import circuit_to_dag
 from qiskit.transpiler.basepasses import AnalysisPass
 
-from qiskit._accelerate.gates_in_basis import (
-    any_gate_missing_from_basis,
-    any_gate_missing_from_target,
-)
-
 
 class GatesInBasis(AnalysisPass):
     """Check if all gates in a DAG are in a given set of gates"""
@@ -44,8 +40,35 @@ class GatesInBasis(AnalysisPass):
         if self._basis_gates is None and self._target is None:
             self.property_set["all_gates_in_basis"] = True
             return
+        gates_out_of_basis = False
         if self._target is not None:
-            gates_out_of_basis = any_gate_missing_from_target(dag, self._target)
+
+            def _visit_target(dag, wire_map):
+                for gate in dag.op_nodes():
+                    # Barrier and store are assumed universal and supported by all backends
+                    if gate.name in ("barrier", "store"):
+                        continue
+                    if not self._target.instruction_supported(
+                        gate.name, tuple(wire_map[bit] for bit in gate.qargs)
+                    ):
+                        return True
+                    # Control-flow ops still need to be supported, so don't skip them in the
+                    # previous checks.
+                    if gate.is_control_flow():
+                        for block in gate.op.blocks:
+                            inner_wire_map = {
+                                inner: wire_map[outer]
+                                for outer, inner in zip(gate.qargs, block.qubits)
+                            }
+                            if _visit_target(circuit_to_dag(block), inner_wire_map):
+                                return True
+                return False
+
+            qubit_map = {qubit: index for index, qubit in enumerate(dag.qubits)}
+            gates_out_of_basis = _visit_target(dag, qubit_map)
         else:
-            gates_out_of_basis = any_gate_missing_from_basis(dag, self._basis_gates)
+            for gate in dag.count_ops(recurse=True):
+                if gate not in self._basis_gates:
+                    gates_out_of_basis = True
+                    break
         self.property_set["all_gates_in_basis"] = not gates_out_of_basis

qiskit/transpiler/passes/utils/merge_adjacent_barriers.py

@@ -40,8 +40,7 @@ class MergeAdjacentBarriers(TransformationPass):
 
     i.e,
 
-    .. code-block:: text
-
+    .. parsed-literal::
               ░  ░             ░  ░
         q_0: ─░──░─      q_0: ─░──░─
               ░  ░             ░  ░

qiskit/transpiler/passmanager_config.py

@@ -13,17 +13,14 @@
 """Pass Manager Configuration class."""
 
 import pprint
-import warnings
 
 from qiskit.transpiler.coupling import CouplingMap
 from qiskit.transpiler.instruction_durations import InstructionDurations
-from qiskit.utils.deprecate_pulse import deprecate_pulse_arg
 
 
 class PassManagerConfig:
     """Pass Manager Configuration."""
 
-    @deprecate_pulse_arg("inst_map", predicate=lambda inst_map: inst_map is not None)
     def __init__(
         self,
         initial_layout=None,
@@ -116,17 +113,11 @@ class PassManagerConfig:
     def from_backend(cls, backend, _skip_target=False, **pass_manager_options):
         """Construct a configuration based on a backend and user input.
 
-        This method automatically generates a PassManagerConfig object based on the backend's
+        This method automatically gererates a PassManagerConfig object based on the backend's
         features. User options can be used to overwrite the configuration.
 
-        .. deprecated:: 1.3
-            The method ``PassManagerConfig.from_backend`` will stop supporting inputs of type
-            :class:`.BackendV1` in the `backend` parameter in a future release no
-            earlier than 2.0. :class:`.BackendV1` is deprecated and implementations should move
-            to :class:`.BackendV2`.
-
         Args:
-            backend (BackendV1 or BackendV2): The backend that provides the configuration.
+            backend (BackendV1): The backend that provides the configuration.
             pass_manager_options: User-defined option-value pairs.
 
         Returns:
@@ -135,21 +126,12 @@ class PassManagerConfig:
         Raises:
             AttributeError: If the backend does not support a `configuration()` method.
         """
+        res = cls(**pass_manager_options)
         backend_version = getattr(backend, "version", 0)
-        if backend_version == 1:
-            warnings.warn(
-                "The method PassManagerConfig.from_backend will stop supporting inputs of "
-                f"type `BackendV1` ( {backend} ) in the `backend` parameter in a future "
-                "release no earlier than 2.0. `BackendV1` is deprecated and implementations "
-                "should move to `BackendV2`.",
-                category=DeprecationWarning,
-                stacklevel=2,
-            )
         if not isinstance(backend_version, int):
             backend_version = 0
         if backend_version < 2:
             config = backend.configuration()
-        res = cls(**pass_manager_options)
         if res.basis_gates is None:
             if backend_version < 2:
                 res.basis_gates = getattr(config, "basis_gates", None)
@@ -162,7 +144,7 @@ class PassManagerConfig:
                     if defaults is not None:
                         res.inst_map = defaults.instruction_schedule_map
             else:
-                res.inst_map = backend._instruction_schedule_map
+                res.inst_map = backend.instruction_schedule_map
         if res.coupling_map is None:
             if backend_version < 2:
                 cmap_edge_list = getattr(config, "coupling_map", None)

qiskit/transpiler/preset_passmanagers/builtin_plugins.py

@@ -13,7 +13,6 @@
 """Built-in transpiler stage plugins for preset pass managers."""
 
 import os
-import warnings
 
 from qiskit.transpiler.passes.optimization.split_2q_unitaries import Split2QUnitaries
 from qiskit.transpiler.passmanager import PassManager
@@ -40,9 +39,9 @@ from qiskit.transpiler.preset_passmanagers.plugin import (
 from qiskit.transpiler.passes.optimization import (
     Optimize1qGatesDecomposition,
     CommutativeCancellation,
+    Collect2qBlocks,
     ConsolidateBlocks,
     InverseCancellation,
-    RemoveIdentityEquivalent,
 )
 from qiskit.transpiler.passes import Depth, Size, FixedPoint, MinimumPoint
 from qiskit.transpiler.passes.utils.gates_basis import GatesInBasis
@@ -154,16 +153,8 @@ class DefaultInitPassManager(PassManagerStagePlugin):
                 pass_manager_config.hls_config,
                 pass_manager_config.qubits_initially_zero,
             )
-            if pass_manager_config.routing_method != "none":
-                init.append(ElidePermutations())
+            init.append(ElidePermutations())
             init.append(RemoveDiagonalGatesBeforeMeasure())
-            # Target not set on RemoveIdentityEquivalent because we haven't applied a Layout
-            # yet so doing anything relative to an error rate in the target is not valid.
-            init.append(
-                RemoveIdentityEquivalent(
-                    approximation_degree=pass_manager_config.approximation_degree
-                )
-            )
             init.append(
                 InverseCancellation(
                     [
@@ -183,6 +174,7 @@ class DefaultInitPassManager(PassManagerStagePlugin):
                 )
             )
             init.append(CommutativeCancellation())
+            init.append(Collect2qBlocks())
             init.append(ConsolidateBlocks())
             # If approximation degree is None that indicates a request to approximate up to the
             # error rates in the target. However, in the init stage we don't yet know the target
@@ -588,10 +580,6 @@ class OptimizationPassManager(PassManagerStagePlugin):
 
             elif optimization_level == 2:
                 _opt = [
-                    RemoveIdentityEquivalent(
-                        approximation_degree=pass_manager_config.approximation_degree,
-                        target=pass_manager_config.target,
-                    ),
                     Optimize1qGatesDecomposition(
                         basis=pass_manager_config.basis_gates, target=pass_manager_config.target
                     ),
@@ -600,6 +588,7 @@ class OptimizationPassManager(PassManagerStagePlugin):
             elif optimization_level == 3:
                 # Steps for optimization level 3
                 _opt = [
+                    Collect2qBlocks(),
                     ConsolidateBlocks(
                         basis_gates=pass_manager_config.basis_gates,
                         target=pass_manager_config.target,
@@ -614,10 +603,6 @@ class OptimizationPassManager(PassManagerStagePlugin):
                         plugin_config=pass_manager_config.unitary_synthesis_plugin_config,
                         target=pass_manager_config.target,
                     ),
-                    RemoveIdentityEquivalent(
-                        approximation_degree=pass_manager_config.approximation_degree,
-                        target=pass_manager_config.target,
-                    ),
                     Optimize1qGatesDecomposition(
                         basis=pass_manager_config.basis_gates, target=pass_manager_config.target
                     ),
@@ -647,6 +632,7 @@ class OptimizationPassManager(PassManagerStagePlugin):
             elif optimization_level == 2:
                 optimization.append(
                     [
+                        Collect2qBlocks(),
                         ConsolidateBlocks(
                             basis_gates=pass_manager_config.basis_gates,
                             target=pass_manager_config.target,
@@ -689,13 +675,9 @@ class AlapSchedulingPassManager(PassManagerStagePlugin):
         inst_map = pass_manager_config.inst_map
         target = pass_manager_config.target
 
-        with warnings.catch_warnings():
-            warnings.simplefilter(action="ignore", category=DeprecationWarning)
-            # Passing `inst_map` to `generate_scheduling` is deprecated in Qiskit 1.3
-            # so filtering these warning when building pass managers
-            return common.generate_scheduling(
-                instruction_durations, scheduling_method, timing_constraints, inst_map, target
-            )
+        return common.generate_scheduling(
+            instruction_durations, scheduling_method, timing_constraints, inst_map, target
+        )
 
 
 class AsapSchedulingPassManager(PassManagerStagePlugin):
@@ -710,13 +692,9 @@ class AsapSchedulingPassManager(PassManagerStagePlugin):
         inst_map = pass_manager_config.inst_map
         target = pass_manager_config.target
 
-        with warnings.catch_warnings():
-            warnings.simplefilter(action="ignore", category=DeprecationWarning)
-            # Passing `inst_map` to `generate_scheduling` is deprecated in Qiskit 1.3
-            # so filtering these warning when building pass managers
-            return common.generate_scheduling(
-                instruction_durations, scheduling_method, timing_constraints, inst_map, target
-            )
+        return common.generate_scheduling(
+            instruction_durations, scheduling_method, timing_constraints, inst_map, target
+        )
 
 
 class DefaultSchedulingPassManager(PassManagerStagePlugin):
@@ -731,13 +709,9 @@ class DefaultSchedulingPassManager(PassManagerStagePlugin):
         inst_map = pass_manager_config.inst_map
         target = pass_manager_config.target
 
-        with warnings.catch_warnings():
-            warnings.simplefilter(action="ignore", category=DeprecationWarning)
-            # Passing `inst_map` to `generate_scheduling` is deprecated in Qiskit 1.3
-            # so filtering these warning when building pass managers
-            return common.generate_scheduling(
-                instruction_durations, scheduling_method, timing_constraints, inst_map, target
-            )
+        return common.generate_scheduling(
+            instruction_durations, scheduling_method, timing_constraints, inst_map, target
+        )
 
 
 class DefaultLayoutPassManager(PassManagerStagePlugin):

qiskit/transpiler/preset_passmanagers/common.py

@@ -24,9 +24,9 @@ from qiskit.transpiler.passmanager import PassManager
 from qiskit.transpiler.passes import Error
 from qiskit.transpiler.passes import BasisTranslator
 from qiskit.transpiler.passes import Unroll3qOrMore
-from qiskit.transpiler.passes import ConsolidateBlocks
-from qiskit.transpiler.passes import Collect1qRuns
 from qiskit.transpiler.passes import Collect2qBlocks
+from qiskit.transpiler.passes import Collect1qRuns
+from qiskit.transpiler.passes import ConsolidateBlocks
 from qiskit.transpiler.passes import UnitarySynthesis
 from qiskit.transpiler.passes import HighLevelSynthesis
 from qiskit.transpiler.passes import CheckMap
@@ -52,7 +52,6 @@ from qiskit.transpiler.passes.layout.vf2_layout import VF2LayoutStopReason
 from qiskit.transpiler.passes.layout.vf2_post_layout import VF2PostLayoutStopReason
 from qiskit.transpiler.exceptions import TranspilerError
 from qiskit.transpiler.layout import Layout
-from qiskit.utils.deprecate_pulse import deprecate_pulse_arg
 
 
 _ControlFlowState = collections.namedtuple("_ControlFlowState", ("working", "not_working"))
@@ -530,7 +529,6 @@ def generate_translation_passmanager(
     return PassManager(unroll)
 
 
-@deprecate_pulse_arg("inst_map", predicate=lambda inst_map: inst_map is not None)
 def generate_scheduling(
     instruction_durations, scheduling_method, timing_constraints, inst_map, target=None
 ):
@@ -542,7 +540,7 @@ def generate_scheduling(
             ``'asap'``/``'as_soon_as_possible'`` or
             ``'alap'``/``'as_late_as_possible'``
         timing_constraints (TimingConstraints): Hardware time alignment restrictions.
-        inst_map (InstructionScheduleMap): DEPRECATED. Mapping object that maps gate to schedule.
+        inst_map (InstructionScheduleMap): Mapping object that maps gate to schedule.
         target (Target): The :class:`~.Target` object representing the backend
 
     Returns: