qiskit 1.0.2__cp38-abi3-win32.whl → 1.1.0__cp38-abi3-win32.whl

qiskit/transpiler/passes/synthesis/unitary_synthesis.py

@@ -24,7 +24,6 @@ Unitary Synthesis Plugin (in :mod:`qiskit.transpiler.passes.synthesis.unitary_sy
 from __future__ import annotations
 from math import pi, inf, isclose
 from typing import Any
-from copy import deepcopy
 from itertools import product
 from functools import partial
 import numpy as np
@@ -35,10 +34,12 @@ from qiskit.transpiler.basepasses import TransformationPass
 from qiskit.transpiler.exceptions import TranspilerError
 from qiskit.dagcircuit.dagcircuit import DAGCircuit
 from qiskit.synthesis.one_qubit import one_qubit_decompose
+from qiskit.transpiler.passes.optimization.optimize_1q_decomposition import _possible_decomposers
 from qiskit.synthesis.two_qubit.xx_decompose import XXDecomposer, XXEmbodiments
 from qiskit.synthesis.two_qubit.two_qubit_decompose import (
     TwoQubitBasisDecomposer,
     TwoQubitWeylDecomposition,
+    GATE_NAME_MAP,
 )
 from qiskit.quantum_info import Operator
 from qiskit.circuit import ControlFlowOp, Gate, Parameter
@@ -84,23 +85,16 @@ def _choose_kak_gate(basis_gates):
 def _choose_euler_basis(basis_gates):
     """Choose the first available 1q basis to use in the Euler decomposition."""
     basis_set = set(basis_gates or [])
-
-    for basis, gates in one_qubit_decompose.ONE_QUBIT_EULER_BASIS_GATES.items():
-
-        if set(gates).issubset(basis_set):
-            return basis
-
+    decomposers = _possible_decomposers(basis_set)
+    if decomposers:
+        return decomposers[0]
     return "U"
 
 
 def _find_matching_euler_bases(target, qubit):
     """Find matching available 1q basis to use in the Euler decomposition."""
-    euler_basis_gates = []
     basis_set = target.operation_names_for_qargs((qubit,))
-    for basis, gates in one_qubit_decompose.ONE_QUBIT_EULER_BASIS_GATES.items():
-        if set(gates).issubset(basis_set):
-            euler_basis_gates.append(basis)
-    return euler_basis_gates
+    return _possible_decomposers(basis_set)
 
 
 def _choose_bases(basis_gates, basis_dict=None):
@@ -153,20 +147,26 @@ def _error(circuit, target=None, qubits=None):
     of circuit as a weak proxy for error.
     """
     if target is None:
-        return len(circuit)
+        if isinstance(circuit, DAGCircuit):
+            return len(circuit.op_nodes())
+        else:
+            return len(circuit)
     gate_fidelities = []
     gate_durations = []
-    for inst in circuit:
-        inst_qubits = tuple(qubits[circuit.find_bit(q).index] for q in inst.qubits)
+
+    def score_instruction(inst, inst_qubits):
         try:
             keys = target.operation_names_for_qargs(inst_qubits)
             for key in keys:
                 target_op = target.operation_from_name(key)
-                if isinstance(target_op, inst.operation.base_class) and (
+                if isinstance(circuit, DAGCircuit):
+                    op = inst.op
+                else:
+                    op = inst.operation
+                if isinstance(target_op, op.base_class) and (
                     target_op.is_parameterized()
                     or all(
-                        isclose(float(p1), float(p2))
-                        for p1, p2 in zip(target_op.params, inst.operation.params)
+                        isclose(float(p1), float(p2)) for p1, p2 in zip(target_op.params, op.params)
                     )
                 ):
                     inst_props = target[key].get(inst_qubits, None)
@@ -183,10 +183,22 @@ def _error(circuit, target=None, qubits=None):
             else:
                 raise KeyError
         except KeyError as error:
+            if isinstance(circuit, DAGCircuit):
+                op = inst.op
+            else:
+                op = inst.operation
             raise TranspilerError(
-                f"Encountered a bad synthesis. "
-                f"Target has no {inst.operation} on qubits {qubits}."
+                f"Encountered a bad synthesis. " f"Target has no {op} on qubits {qubits}."
             ) from error
+
+    if isinstance(circuit, DAGCircuit):
+        for inst in circuit.topological_op_nodes():
+            inst_qubits = tuple(qubits[circuit.find_bit(q).index] for q in inst.qargs)
+            score_instruction(inst, inst_qubits)
+    else:
+        for inst in circuit:
+            inst_qubits = tuple(qubits[circuit.find_bit(q).index] for q in inst.qubits)
+            score_instruction(inst, inst_qubits)
     # TODO:return np.sum(gate_durations)
     return 1 - np.prod(gate_fidelities)
 
@@ -282,7 +294,7 @@ class UnitarySynthesis(TransformationPass):
         natural_direction: bool | None = None,
         synth_gates: list[str] | None = None,
         method: str = "default",
-        min_qubits: int = None,
+        min_qubits: int = 0,
         plugin_config: dict = None,
         target: Target = None,
     ):
@@ -488,27 +500,55 @@ class UnitarySynthesis(TransformationPass):
                 ]
             )
 
-        for node in dag.named_nodes(*self._synth_gates):
-            if self._min_qubits is not None and len(node.qargs) < self._min_qubits:
-                continue
-            synth_dag = None
-            unitary = node.op.to_matrix()
-            n_qubits = len(node.qargs)
-            if (plugin_method.max_qubits is not None and n_qubits > plugin_method.max_qubits) or (
-                plugin_method.min_qubits is not None and n_qubits < plugin_method.min_qubits
-            ):
-                method, kwargs = default_method, default_kwargs
+        out_dag = dag.copy_empty_like()
+        for node in dag.topological_op_nodes():
+            if node.op.name == "unitary" and len(node.qargs) >= self._min_qubits:
+                synth_dag = None
+                unitary = node.op.to_matrix()
+                n_qubits = len(node.qargs)
+                if (
+                    plugin_method.max_qubits is not None and n_qubits > plugin_method.max_qubits
+                ) or (plugin_method.min_qubits is not None and n_qubits < plugin_method.min_qubits):
+                    method, kwargs = default_method, default_kwargs
+                else:
+                    method, kwargs = plugin_method, plugin_kwargs
+                if method.supports_coupling_map:
+                    kwargs["coupling_map"] = (
+                        self._coupling_map,
+                        [qubit_indices[x] for x in node.qargs],
+                    )
+                synth_dag = method.run(unitary, **kwargs)
+                if synth_dag is None:
+                    out_dag.apply_operation_back(node.op, node.qargs, node.cargs, check=False)
+                    continue
+                if isinstance(synth_dag, DAGCircuit):
+                    qubit_map = dict(zip(synth_dag.qubits, node.qargs))
+                    for node in synth_dag.topological_op_nodes():
+                        out_dag.apply_operation_back(
+                            node.op, (qubit_map[x] for x in node.qargs), check=False
+                        )
+                    out_dag.global_phase += synth_dag.global_phase
+                else:
+                    node_list, global_phase, gate = synth_dag
+                    qubits = node.qargs
+                    for (
+                        op_name,
+                        params,
+                        qargs,
+                    ) in node_list:
+                        if op_name == "USER_GATE":
+                            op = gate
+                        else:
+                            op = GATE_NAME_MAP[op_name](*params)
+                        out_dag.apply_operation_back(
+                            op,
+                            (qubits[x] for x in qargs),
+                            check=False,
+                        )
+                    out_dag.global_phase += global_phase
             else:
-                method, kwargs = plugin_method, plugin_kwargs
-            if method.supports_coupling_map:
-                kwargs["coupling_map"] = (
-                    self._coupling_map,
-                    [qubit_indices[x] for x in node.qargs],
-                )
-            synth_dag = method.run(unitary, **kwargs)
-            if synth_dag is not None:
-                dag.substitute_node_with_dag(node, synth_dag)
-        return dag
+                out_dag.apply_operation_back(node.op, node.qargs, node.cargs, check=False)
+        return out_dag
 
 
 def _build_gate_lengths(props=None, target=None):
@@ -777,6 +817,13 @@ class DefaultUnitarySynthesis(plugin.UnitarySynthesisPlugin):
             )
             decomposers.append(decomposer)
 
+        # If our 2q basis gates are a subset of cx, ecr, or cz then we know TwoQubitBasisDecomposer
+        # is an ideal decomposition and there is no need to bother calculating the XX embodiments
+        # or try the XX decomposer
+        if {"cx", "cz", "ecr"}.issuperset(available_2q_basis):
+            self._decomposer_cache[qubits_tuple] = decomposers
+            return decomposers
+
         # possible controlled decomposers (i.e. XXDecomposer)
         controlled_basis = {k: v for k, v in available_2q_basis.items() if is_controlled(v)}
         basis_2q_fidelity = {}
@@ -808,10 +855,23 @@ class DefaultUnitarySynthesis(plugin.UnitarySynthesisPlugin):
         if basis_2q_fidelity:
             for basis_1q in available_1q_basis:
                 if isinstance(pi2_basis, CXGate) and basis_1q == "ZSX":
+                    # If we're going to use the pulse optimal decomposition
+                    # in TwoQubitBasisDecomposer we need to compute the basis
+                    # fidelity to use for the decomposition. Either use the
+                    # cx error rate if approximation degree is None, or
+                    # the approximation degree value if it's a float
+                    if approximation_degree is None:
+                        props = target["cx"].get(qubits_tuple)
+                        if props is not None:
+                            fidelity = 1.0 - getattr(props, "error", 0.0)
+                        else:
+                            fidelity = 1.0
+                    else:
+                        fidelity = approximation_degree
                     pi2_decomposer = TwoQubitBasisDecomposer(
                         pi2_basis,
                         euler_basis=basis_1q,
-                        basis_fidelity=basis_2q_fidelity,
+                        basis_fidelity=fidelity,
                         pulse_optimize=True,
                     )
                     embodiments.update({pi / 2: XXEmbodiments[pi2_decomposer.gate.base_class]})
@@ -862,6 +922,20 @@ class DefaultUnitarySynthesis(plugin.UnitarySynthesisPlugin):
                 decomposers2q = [decomposer2q] if decomposer2q is not None else []
             # choose the cheapest output among synthesized circuits
             synth_circuits = []
+            # If we have a single TwoQubitBasisDecomposer skip dag creation as we don't need to
+            # store and can instead manually create the synthesized gates directly in the output dag
+            if len(decomposers2q) == 1 and isinstance(decomposers2q[0], TwoQubitBasisDecomposer):
+                preferred_direction = _preferred_direction(
+                    decomposers2q[0],
+                    qubits,
+                    natural_direction,
+                    coupling_map,
+                    gate_lengths,
+                    gate_errors,
+                )
+                return self._synth_su4_no_dag(
+                    unitary, decomposers2q[0], preferred_direction, approximation_degree
+                )
             for decomposer2q in decomposers2q:
                 preferred_direction = _preferred_direction(
                     decomposer2q, qubits, natural_direction, coupling_map, gate_lengths, gate_errors
@@ -882,24 +956,57 @@ class DefaultUnitarySynthesis(plugin.UnitarySynthesisPlugin):
 
             # only decompose if needed. TODO: handle basis better
             synth_circuit = qs_decomposition(unitary) if (basis_gates or target) else None
+        if synth_circuit is None:
+            return None
+        if isinstance(synth_circuit, DAGCircuit):
+            return synth_circuit
+        return circuit_to_dag(synth_circuit)
 
-        synth_dag = circuit_to_dag(synth_circuit) if synth_circuit is not None else None
-        return synth_dag
-
-    def _synth_su4(self, su4_mat, decomposer2q, preferred_direction, approximation_degree):
+    def _synth_su4_no_dag(self, unitary, decomposer2q, preferred_direction, approximation_degree):
         approximate = not approximation_degree == 1.0
-        synth_circ = decomposer2q(su4_mat, approximate=approximate)
+        synth_circ = decomposer2q._inner_decomposer(unitary, approximate=approximate)
+        if not preferred_direction:
+            return (synth_circ, synth_circ.global_phase, decomposer2q.gate)
 
+        synth_direction = None
         # if the gates in synthesis are in the opposite direction of the preferred direction
         # resynthesize a new operator which is the original conjugated by swaps.
         # this new operator is doubly mirrored from the original and is locally equivalent.
+        for op_name, _params, qubits in synth_circ:
+            if op_name in {"USER_GATE", "cx"}:
+                synth_direction = qubits
+        if synth_direction is not None and synth_direction != preferred_direction:
+            # TODO: Avoid using a dag to correct the synthesis direction
+            return self._reversed_synth_su4(unitary, decomposer2q, approximation_degree)
+        return (synth_circ, synth_circ.global_phase, decomposer2q.gate)
+
+    def _synth_su4(self, su4_mat, decomposer2q, preferred_direction, approximation_degree):
+        approximate = not approximation_degree == 1.0
+        synth_circ = decomposer2q(su4_mat, approximate=approximate, use_dag=True)
+        if not preferred_direction:
+            return synth_circ
         synth_direction = None
-        for inst in synth_circ:
-            if inst.operation.num_qubits == 2:
-                synth_direction = [synth_circ.find_bit(q).index for q in inst.qubits]
-        if preferred_direction and synth_direction != preferred_direction:
-            su4_mat_mm = deepcopy(su4_mat)
-            su4_mat_mm[[1, 2]] = su4_mat_mm[[2, 1]]
-            su4_mat_mm[:, [1, 2]] = su4_mat_mm[:, [2, 1]]
-            synth_circ = decomposer2q(su4_mat_mm, approximate=approximate).reverse_bits()
+        # if the gates in synthesis are in the opposite direction of the preferred direction
+        # resynthesize a new operator which is the original conjugated by swaps.
+        # this new operator is doubly mirrored from the original and is locally equivalent.
+        for inst in synth_circ.topological_op_nodes():
+            if inst.op.num_qubits == 2:
+                synth_direction = [synth_circ.find_bit(q).index for q in inst.qargs]
+        if synth_direction is not None and synth_direction != preferred_direction:
+            return self._reversed_synth_su4(su4_mat, decomposer2q, approximation_degree)
         return synth_circ
+
+    def _reversed_synth_su4(self, su4_mat, decomposer2q, approximation_degree):
+        approximate = not approximation_degree == 1.0
+        su4_mat_mm = su4_mat.copy()
+        su4_mat_mm[[1, 2]] = su4_mat_mm[[2, 1]]
+        su4_mat_mm[:, [1, 2]] = su4_mat_mm[:, [2, 1]]
+        synth_circ = decomposer2q(su4_mat_mm, approximate=approximate, use_dag=True)
+        out_dag = DAGCircuit()
+        out_dag.global_phase = synth_circ.global_phase
+        out_dag.add_qubits(list(reversed(synth_circ.qubits)))
+        flip_bits = out_dag.qubits[::-1]
+        for node in synth_circ.topological_op_nodes():
+            qubits = tuple(flip_bits[synth_circ.find_bit(x).index] for x in node.qargs)
+            out_dag.apply_operation_back(node.op, qubits, check=False)
+        return out_dag

qiskit/transpiler/passes/utils/gates_basis.py

@@ -32,7 +32,7 @@ class GatesInBasis(AnalysisPass):
         self._basis_gates = None
         if basis_gates is not None:
             self._basis_gates = set(basis_gates).union(
-                {"measure", "reset", "barrier", "snapshot", "delay"}
+                {"measure", "reset", "barrier", "snapshot", "delay", "store"}
             )
         self._target = target
 
@@ -46,8 +46,8 @@ class GatesInBasis(AnalysisPass):
 
             def _visit_target(dag, wire_map):
                 for gate in dag.op_nodes():
-                    # Barrier is universal and supported by all backends
-                    if gate.name == "barrier":
+                    # Barrier and store are assumed universal and supported by all backends
+                    if gate.name in ("barrier", "store"):
                         continue
                     if not self._target.instruction_supported(
                         gate.name, tuple(wire_map[bit] for bit in gate.qargs)

qiskit/transpiler/passmanager.py

@@ -29,7 +29,7 @@ from qiskit.passmanager.flow_controllers import FlowControllerLinear
 from qiskit.passmanager.exceptions import PassManagerError
 from .basepasses import BasePass
 from .exceptions import TranspilerError
-from .layout import TranspileLayout
+from .layout import TranspileLayout, Layout
 
 _CircuitsT = Union[List[QuantumCircuit], QuantumCircuit]
 
@@ -69,6 +69,7 @@ class PassManager(BasePassManager):
     ) -> QuantumCircuit:
         out_program = dag_to_circuit(passmanager_ir, copy_operations=False)
 
+        self._finalize_layouts(passmanager_ir)
         out_name = kwargs.get("output_name", None)
         if out_name is not None:
             out_program.name = out_name
@@ -96,6 +97,48 @@ class PassManager(BasePassManager):
 
         return out_program
 
+    def _finalize_layouts(self, dag):
+        if (virtual_permutation_layout := self.property_set["virtual_permutation_layout"]) is None:
+            return
+
+        self.property_set.pop("virtual_permutation_layout")
+
+        # virtual_permutation_layout is usually created before extending the layout with ancillas,
+        # so we extend the permutation to be identity on ancilla qubits
+        original_qubit_indices = self.property_set.get("original_qubit_indices", None)
+        for oq in original_qubit_indices:
+            if oq not in virtual_permutation_layout:
+                virtual_permutation_layout[oq] = original_qubit_indices[oq]
+
+        t_qubits = dag.qubits
+
+        if (t_initial_layout := self.property_set.get("layout", None)) is None:
+            t_initial_layout = Layout(dict(enumerate(t_qubits)))
+
+        if (t_final_layout := self.property_set.get("final_layout", None)) is None:
+            t_final_layout = Layout(dict(enumerate(t_qubits)))
+
+        # Ordered list of original qubits
+        original_qubits_reverse = {v: k for k, v in original_qubit_indices.items()}
+        original_qubits = []
+        for i in range(len(original_qubits_reverse)):
+            original_qubits.append(original_qubits_reverse[i])
+
+        virtual_permutation_layout_inv = virtual_permutation_layout.inverse(
+            original_qubits, original_qubits
+        )
+
+        t_initial_layout_inv = t_initial_layout.inverse(original_qubits, t_qubits)
+
+        # ToDo: this can possibly be made simpler
+        new_final_layout = t_initial_layout_inv
+        new_final_layout = new_final_layout.compose(virtual_permutation_layout_inv, original_qubits)
+        new_final_layout = new_final_layout.compose(t_initial_layout, original_qubits)
+        new_final_layout = new_final_layout.compose(t_final_layout, t_qubits)
+
+        self.property_set["layout"] = t_initial_layout
+        self.property_set["final_layout"] = new_final_layout
+
     def append(
         self,
         passes: Task | list[Task],

qiskit/transpiler/preset_passmanagers/__init__.py

@@ -115,7 +115,7 @@ def generate_preset_pass_manager(
 
         backend (Backend): An optional backend object which can be used as the
             source of the default values for the ``basis_gates``, ``inst_map``,
-            ``couplig_map``, ``backend_properties``, ``instruction_durations``,
+            ``coupling_map``, ``backend_properties``, ``instruction_durations``,
             ``timing_constraints``, and ``target``. If any of those other arguments
             are specified in addition to ``backend`` they will take precedence
             over the value contained in the backend.
@@ -136,11 +136,11 @@ def generate_preset_pass_manager(
         instruction_durations (InstructionDurations): Dictionary of duration
             (in dt) for each instruction.
         timing_constraints (TimingConstraints): Hardware time alignment restrictions.
-        initial_layout (Layout): Initial position of virtual qubits on
+        initial_layout (Layout | List[int]): Initial position of virtual qubits on
             physical qubits.
         layout_method (str): The :class:`~.Pass` to use for choosing initial qubit
             placement. Valid choices are ``'trivial'``, ``'dense'``,
-            and ``'sabre'``, representing :class:`~.TrivialLayout`, :class:`~DenseLayout` and
+            and ``'sabre'``, representing :class:`~.TrivialLayout`, :class:`~.DenseLayout` and
             :class:`~.SabreLayout` respectively. This can also
             be the external plugin name to use for the ``layout`` stage of the output
             :class:`~.StagedPassManager`. You can see a list of installed plugins by using

qiskit/transpiler/preset_passmanagers/builtin_plugins.py

@@ -26,7 +26,7 @@ from qiskit.transpiler.passes import DenseLayout
 from qiskit.transpiler.passes import TrivialLayout
 from qiskit.transpiler.passes import CheckMap
 from qiskit.transpiler.passes import BarrierBeforeFinalMeasurements
-from qiskit.transpiler.passes import OptimizeSwapBeforeMeasure
+from qiskit.transpiler.passes import ElidePermutations
 from qiskit.transpiler.passes import RemoveDiagonalGatesBeforeMeasure
 from qiskit.transpiler.preset_passmanagers import common
 from qiskit.transpiler.preset_passmanagers.plugin import (
@@ -87,7 +87,7 @@ class DefaultInitPassManager(PassManagerStagePlugin):
                     pass_manager_config.unitary_synthesis_plugin_config,
                     pass_manager_config.hls_config,
                 )
-        elif optimization_level in {1, 2}:
+        elif optimization_level == 1:
             init = PassManager()
             if (
                 pass_manager_config.initial_layout
@@ -124,7 +124,7 @@ class DefaultInitPassManager(PassManagerStagePlugin):
                 )
             )
 
-        elif optimization_level == 3:
+        elif optimization_level in {2, 3}:
             init = common.generate_unroll_3q(
                 pass_manager_config.target,
                 pass_manager_config.basis_gates,
@@ -133,7 +133,7 @@ class DefaultInitPassManager(PassManagerStagePlugin):
                 pass_manager_config.unitary_synthesis_plugin_config,
                 pass_manager_config.hls_config,
             )
-            init.append(OptimizeSwapBeforeMeasure())
+            init.append(ElidePermutations())
             init.append(RemoveDiagonalGatesBeforeMeasure())
             init.append(
                 InverseCancellation(
@@ -153,9 +153,9 @@ class DefaultInitPassManager(PassManagerStagePlugin):
                     ]
                 )
             )
-
+            init.append(CommutativeCancellation())
         else:
-            return TranspilerError(f"Invalid optimization level {optimization_level}")
+            raise TranspilerError(f"Invalid optimization level {optimization_level}")
         return init
 
 
@@ -540,16 +540,13 @@ class OptimizationPassManager(PassManagerStagePlugin):
                         ]
                     ),
                 ]
+
             elif optimization_level == 2:
-                # Steps for optimization level 2
                 _opt = [
                     Optimize1qGatesDecomposition(
                         basis=pass_manager_config.basis_gates, target=pass_manager_config.target
                     ),
-                    CommutativeCancellation(
-                        basis_gates=pass_manager_config.basis_gates,
-                        target=pass_manager_config.target,
-                    ),
+                    CommutativeCancellation(target=pass_manager_config.target),
                 ]
             elif optimization_level == 3:
                 # Steps for optimization level 3
@@ -595,6 +592,27 @@ class OptimizationPassManager(PassManagerStagePlugin):
 
             if optimization_level == 3:
                 optimization.append(_minimum_point_check)
+            elif optimization_level == 2:
+                optimization.append(
+                    [
+                        Collect2qBlocks(),
+                        ConsolidateBlocks(
+                            basis_gates=pass_manager_config.basis_gates,
+                            target=pass_manager_config.target,
+                            approximation_degree=pass_manager_config.approximation_degree,
+                        ),
+                        UnitarySynthesis(
+                            pass_manager_config.basis_gates,
+                            approximation_degree=pass_manager_config.approximation_degree,
+                            coupling_map=pass_manager_config.coupling_map,
+                            backend_props=pass_manager_config.backend_properties,
+                            method=pass_manager_config.unitary_synthesis_method,
+                            plugin_config=pass_manager_config.unitary_synthesis_plugin_config,
+                            target=pass_manager_config.target,
+                        ),
+                    ]
+                )
+                optimization.append(_depth_check + _size_check)
             else:
                 optimization.append(_depth_check + _size_check)
             opt_loop = (
@@ -746,7 +764,7 @@ class DefaultLayoutPassManager(PassManagerStagePlugin):
                 call_limit=int(5e6),  # Set call limit to ~10s with rustworkx 0.10.2
                 properties=pass_manager_config.backend_properties,
                 target=pass_manager_config.target,
-                max_trials=25000,  # Limits layout scoring to < 10s on ~400 qubit devices
+                max_trials=2500,  # Limits layout scoring to < 600ms on ~400 qubit devices
             )
             layout.append(
                 ConditionalController(choose_layout_0, condition=_choose_layout_condition)
@@ -755,8 +773,8 @@ class DefaultLayoutPassManager(PassManagerStagePlugin):
                 coupling_map,
                 max_iterations=2,
                 seed=pass_manager_config.seed_transpiler,
-                swap_trials=10,
-                layout_trials=10,
+                swap_trials=20,
+                layout_trials=20,
                 skip_routing=pass_manager_config.routing_method is not None
                 and pass_manager_config.routing_method != "sabre",
             )
@@ -908,8 +926,8 @@ class SabreLayoutPassManager(PassManagerStagePlugin):
                 coupling_map,
                 max_iterations=2,
                 seed=pass_manager_config.seed_transpiler,
-                swap_trials=10,
-                layout_trials=10,
+                swap_trials=20,
+                layout_trials=20,
                 skip_routing=pass_manager_config.routing_method is not None
                 and pass_manager_config.routing_method != "sabre",
             )

qiskit/transpiler/preset_passmanagers/common.py

@@ -584,6 +584,7 @@ def generate_scheduling(
             InstructionDurationCheck(
                 acquire_alignment=timing_constraints.acquire_alignment,
                 pulse_alignment=timing_constraints.pulse_alignment,
+                target=target,
             )
         )
         scheduling.append(
@@ -591,6 +592,7 @@ def generate_scheduling(
                 ConstrainedReschedule(
                     acquire_alignment=timing_constraints.acquire_alignment,
                     pulse_alignment=timing_constraints.pulse_alignment,
+                    target=target,
                 ),
                 condition=_require_alignment,
             )
@@ -599,6 +601,7 @@ def generate_scheduling(
             ValidatePulseGates(
                 granularity=timing_constraints.granularity,
                 min_length=timing_constraints.min_length,
+                target=target,
             )
         )
     if scheduling_method:
@@ -624,16 +627,11 @@ def get_vf2_limits(
     """
     limits = VF2Limits(None, None)
     if layout_method is None and initial_layout is None:
-        if optimization_level == 1:
+        if optimization_level in {1, 2}:
             limits = VF2Limits(
                 int(5e4),  # Set call limit to ~100ms with rustworkx 0.10.2
                 2500,  # Limits layout scoring to < 600ms on ~400 qubit devices
             )
-        elif optimization_level == 2:
-            limits = VF2Limits(
-                int(5e6),  # Set call limit to ~10 sec with rustworkx 0.10.2
-                25000,  # Limits layout scoring to < 6 sec on ~400 qubit devices
-            )
         elif optimization_level == 3:
             limits = VF2Limits(
                 int(3e7),  # Set call limit to ~60 sec with rustworkx 0.10.2

qiskit/transpiler/preset_passmanagers/plugin.py

@@ -68,7 +68,15 @@ load external plugins via corresponding entry points.
        connectivity constraints of the target backend. This does not necessarily
        need to match the directionality of the edges in the target as a later
        stage typically will adjust directional gates to match that constraint
-       (but there is no penalty for doing that in the ``routing`` stage).
+       (but there is no penalty for doing that in the ``routing`` stage). The output
+       of this stage is also expected to have the ``final_layout`` property set field
+       set with a :class:`~.Layout` object that maps the :class:`.Qubit` to the
+       output final position of that qubit in the circuit. If there is an
+       existing ``final_layout`` entry in the property set (such as might be set
+       by an optimization pass that introduces a permutation) it is expected
+       that the final layout will be the composition of the two layouts (this
+       can be computed using :meth:`.DAGCircuit.compose`, for example:
+       ``second_final_layout.compose(first_final_layout, dag.qubits)``).
    * - ``translation``
      - ``qiskit.transpiler.translation``
      - ``translator``, ``synthesis``, ``unroller``

qiskit/utils/__init__.py

@@ -44,7 +44,7 @@ Multiprocessing
 .. autofunction:: local_hardware_info
 .. autofunction:: is_main_process
 
-A helper function for calling a custom function with python
+A helper function for calling a custom function with Python
 :class:`~concurrent.futures.ProcessPoolExecutor`. Tasks can be executed in parallel using this function.
 
 .. autofunction:: parallel_map
@@ -70,7 +70,7 @@ from .lazy_tester import LazyDependencyManager, LazyImportTester, LazySubprocess
 
 from . import optionals
 
-from .parallel import parallel_map
+from .parallel import parallel_map, should_run_in_parallel
 
 __all__ = [
     "LazyDependencyManager",
@@ -85,4 +85,5 @@ __all__ = [
     "is_main_process",
     "apply_prefix",
     "parallel_map",
+    "should_run_in_parallel",
 ]

qiskit/utils/optionals.py

@@ -307,8 +307,12 @@ HAS_Z3 = _LazyImportTester("z3", install="pip install z3-solver")
 
 HAS_GRAPHVIZ = _LazySubprocessTester(
     ("dot", "-V"),
-    name="graphviz",
-    install="'brew install graphviz' if on Mac, or by downloding it from their website",
+    name="Graphviz",
+    msg=(
+        "To install, follow the instructions at https://graphviz.org/download/."
+        " Qiskit needs the Graphviz binaries, which the 'graphviz' package on pip does not install."
+        " You must install the actual Graphviz software"
+    ),
 )
 HAS_PDFLATEX = _LazySubprocessTester(
     ("pdflatex", "-version"),