pyvex 9.2.189__cp311-cp311-macosx_11_0_arm64.whl

pyvex/include/libvex_basictypes.h

@@ -0,0 +1,236 @@
+
+/*---------------------------------------------------------------*/
+/*--- begin                               libvex_basictypes.h ---*/
+/*---------------------------------------------------------------*/
+
+/*
+   This file is part of Valgrind, a dynamic binary instrumentation
+   framework.
+
+   Copyright (C) 2004-2015 OpenWorks LLP
+      info@open-works.net
+
+   This program is free software; you can redistribute it and/or
+   modify it under the terms of the GNU General Public License as
+   published by the Free Software Foundation; either version 2 of the
+   License, or (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+   02110-1301, USA.
+
+   The GNU General Public License is contained in the file COPYING.
+
+   Neither the names of the U.S. Department of Energy nor the
+   University of California nor the names of its contributors may be
+   used to endorse or promote products derived from this software
+   without prior written permission.
+*/
+
+#ifndef __LIBVEX_BASICTYPES_H
+#define __LIBVEX_BASICTYPES_H
+
+/* This is where we bootstrap msvc compatibility */
+#ifndef _MSC_VER /* gcc/clang/etc stuff */
+#define LIKELY(x)       __builtin_expect(!!(x), 1)
+#define UNLIKELY(x)     __builtin_expect(!!(x), 0)
+#define CAST_AS(x)      (__typeof__(x))
+
+#else /* msvc stuff */
+#define LIKELY(x)       (x)
+#define UNLIKELY(x)     (x)
+#define CAST_AS(x)
+
+#define __builtin_memset memset
+#define __builtin_memcpy memcpy
+#define __PRETTY_FUNCTION__ __FUNCDNAME__
+
+#define __attribute__(x)
+#define __attribute(x)
+#define __inline__
+#define inline
+#endif
+
+/* It is important that the sizes of the following data types (on the
+   host) are as stated.  LibVEX_Init therefore checks these at
+   startup. */
+
+/* Always 8 bits. */
+typedef  unsigned char   UChar;
+typedef    signed char   Char;
+typedef           char   HChar; /* signfulness depends on host */
+                                /* Only to be used for printf etc 
+                                   format strings */
+
+/* Always 16 bits. */
+typedef  unsigned short  UShort;
+typedef    signed short  Short;
+
+/* Always 32 bits. */
+typedef  unsigned int    UInt;
+typedef    signed int    Int;
+
+/* Always 64 bits. */
+typedef  unsigned long long int   ULong;
+typedef    signed long long int   Long;
+
+/* Equivalent of C's size_t type. The type is unsigned and has this
+   storage requirement:
+   32 bits on a 32-bit architecture
+   64 bits on a 64-bit architecture. */
+typedef  unsigned long SizeT;
+
+/* Always 128 bits. */
+typedef  UInt  U128[4];
+
+/* Always 256 bits. */
+typedef  UInt  U256[8];
+
+/* A union for doing 128-bit vector primitives conveniently. */
+typedef
+   union {
+      UChar  w8[16];
+      UShort w16[8];
+      UInt   w32[4];
+      ULong  w64[2];
+   }
+   V128;
+
+/* A union for doing 256-bit vector primitives conveniently. */
+typedef
+   union {
+      UChar  w8[32];
+      UShort w16[16];
+      UInt   w32[8];
+      ULong  w64[4];
+   }
+   V256;
+
+/* Floating point. */
+typedef  float   Float;    /* IEEE754 single-precision (32-bit) value */
+typedef  double  Double;   /* IEEE754 double-precision (64-bit) value */
+
+/* Bool is always 8 bits. */
+typedef  unsigned char  Bool;
+#define  True   ((Bool)1)
+#define  False  ((Bool)0)
+
+/* Use this to coerce the result of a C comparison to a Bool.  This is
+   useful when compiling with Intel icc with ultra-paranoid
+   compilation flags (-Wall). */
+static inline Bool toBool ( Int x ) {
+   Int r = (x == 0) ? False : True;
+   return (Bool)r;
+}
+static inline UChar toUChar ( Int x ) {
+   x &= 0xFF;
+   return (UChar)x;
+}
+static inline HChar toHChar ( Int x ) {
+   x &= 0xFF;
+   return (HChar)x;
+}
+static inline UShort toUShort ( Int x ) {
+   x &= 0xFFFF;
+   return (UShort)x;
+}
+static inline Short toShort ( Int x ) {
+   x &= 0xFFFF;
+   return (Short)x;
+}
+static inline UInt toUInt ( Long x ) {
+   x &= 0xFFFFFFFFLL;
+   return (UInt)x;
+}
+
+/* 32/64 bit addresses. */
+typedef  UInt      Addr32;
+typedef  ULong     Addr64;
+
+/* An address. In order to analyze 64-bit guests on 32-bit hosts, this must be
+   64 bits wide. */
+typedef Addr64 Addr;
+
+
+/* Something which has the same size as void* on the host.  That is,
+   it is 32 bits on a 32-bit host and 64 bits on a 64-bit host, and so
+   it can safely be coerced to and from a pointer type on the host
+   machine. */
+#ifdef _WIN64
+typedef  unsigned long long HWord;
+#else
+typedef  unsigned long HWord;
+#endif
+
+/* Set up VEX_HOST_WORDSIZE and VEX_REGPARM. */
+#undef VEX_HOST_WORDSIZE
+#undef VEX_REGPARM
+
+/* The following 4 work OK for Linux. */
+#if defined(__x86_64__) || defined(_WIN64)
+#   define VEX_HOST_WORDSIZE 8
+#   define VEX_REGPARM(_n) /* */
+
+#elif defined(__i386__)
+#   define VEX_HOST_WORDSIZE 4
+#   define VEX_REGPARM(_n) __attribute__((regparm(_n)))
+
+#elif defined(_WIN32) && !defined(_WIN64)
+#   define VEX_HOST_WORDSIZE 4
+#   define VEX_REGPARM(_n) /* ought to be __fastcall */
+
+#elif defined(__powerpc__) && defined(__powerpc64__)
+#   define VEX_HOST_WORDSIZE 8
+#   define VEX_REGPARM(_n) /* */
+
+#elif defined(__powerpc__) && !defined(__powerpc64__)
+#   define VEX_HOST_WORDSIZE 4
+#   define VEX_REGPARM(_n) /* */
+
+#elif defined(__arm__) && !defined(__aarch64__)
+#   define VEX_HOST_WORDSIZE 4
+#   define VEX_REGPARM(_n) /* */
+
+#elif defined(__aarch64__) && !defined(__arm__)
+#   define VEX_HOST_WORDSIZE 8
+#   define VEX_REGPARM(_n) /* */
+
+#elif defined(__s390x__)
+#   define VEX_HOST_WORDSIZE 8
+#   define VEX_REGPARM(_n) /* */
+
+#elif defined(__mips__) && (__mips == 64)
+#   define VEX_HOST_WORDSIZE 8
+#   define VEX_REGPARM(_n) /* */
+
+#elif defined(__mips__) && (__mips != 64)
+#   define VEX_HOST_WORDSIZE 4
+#   define VEX_REGPARM(_n) /* */
+
+#elif defined(__riscv) && defined(__riscv_xlen)
+#   if (__riscv_xlen == 64)
+#       define VEX_HOST_WORDSIZE 8
+#       define VEX_REGPARM(_n) /* */
+#   endif
+
+#elif defined(__tilegx__)
+#   define VEX_HOST_WORDSIZE 8
+#   define VEX_REGPARM(_n) /* */
+
+#else
+#   error "Vex: Fatal: Can't establish the host architecture"
+#endif
+
+
+#endif /* ndef __LIBVEX_BASICTYPES_H */
+
+/*---------------------------------------------------------------*/
+/*---                                     libvex_basictypes.h ---*/
+/*---------------------------------------------------------------*/
+

pyvex/include/libvex_emnote.h

@@ -0,0 +1,142 @@
+
+/*---------------------------------------------------------------*/
+/*--- begin                                   libvex_emnote.h ---*/
+/*---------------------------------------------------------------*/
+
+/*
+   This file is part of Valgrind, a dynamic binary instrumentation
+   framework.
+
+   Copyright (C) 2004-2015 OpenWorks LLP
+      info@open-works.net
+
+   This program is free software; you can redistribute it and/or
+   modify it under the terms of the GNU General Public License as
+   published by the Free Software Foundation; either version 2 of the
+   License, or (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+   02110-1301, USA.
+
+   The GNU General Public License is contained in the file COPYING.
+
+   Neither the names of the U.S. Department of Energy nor the
+   University of California nor the names of its contributors may be
+   used to endorse or promote products derived from this software
+   without prior written permission.
+*/
+
+#ifndef __LIBVEX_EMNOTE_H
+#define __LIBVEX_EMNOTE_H
+
+#include "libvex_basictypes.h"
+
+/* VEX can sometimes generate code which returns to the dispatcher
+   with the guest state pointer set to VEX_TRC_JMP_EMWARN or 
+   VEX_TRC_JMP_EMFAIL.  This means that VEX is trying to tell Valgrind
+   something noteworthy about emulation progress. For example, that Valgrind
+   is doing imprecise emulation in some sense.  The guest's pseudo-register
+   "guest_EMNOTE" will hold a value of type VexEmNote, which describes
+   the nature of the warning.  Currently the limitations that are
+   warned about apply primarily to floating point support.
+
+   All guest states must have a 32-bit (UInt) guest_EMNOTE pseudo-
+   register, that emulation warnings can be written in to.
+
+   Note that guest_EMNOTE only carries a valid value at the jump
+   marked as VEX_TRC_JMP_EMWARN / VEX_TRC_JMP_EMFAIL.  You can't assume
+   it will continue to carry a valid value from any amount of time after
+   the jump.
+*/
+
+typedef
+   enum {
+      /* no note indicated */
+      EmNote_NONE=0,
+
+      /* unmasking x87 FP exceptions is not supported */
+      EmWarn_X86_x87exns,
+
+      /* change of x87 FP precision away from 64-bit (mantissa) */
+      EmWarn_X86_x87precision,
+
+      /* unmasking SSE FP exceptions is not supported */
+      EmWarn_X86_sseExns,
+      
+      /* setting mxcsr.fz is not supported */
+      EmWarn_X86_fz,
+      
+      /* setting mxcsr.daz is not supported */
+      EmWarn_X86_daz,
+
+      /* settings to %eflags.ac (alignment check) are noted but ignored */
+      EmWarn_X86_acFlag,
+      
+      /* unmasking PPC32/64 FP exceptions is not supported */
+      EmWarn_PPCexns,
+
+      /* overflow/underflow of the PPC64 _REDIR stack (ppc64 only) */
+      EmWarn_PPC64_redir_overflow,
+      EmWarn_PPC64_redir_underflow,
+
+      /* insn specifies a rounding mode other than "according to FPC"
+         which requires the floating point extension facility. But that
+         facility is not available on this host */
+      EmWarn_S390X_fpext_rounding,
+
+      /* insn (e.g. srnmb) specifies an invalid rounding mode */
+      EmWarn_S390X_invalid_rounding,
+
+      /* stfle insn is not supported on this host */
+      EmFail_S390X_stfle,
+
+      /* stckf insn is not supported on this host */
+      EmFail_S390X_stckf,
+
+      /* ecag insn is not supported on this host */
+      EmFail_S390X_ecag,
+
+      /* pfpo insn is not supported on this host */
+      EmFail_S390X_pfpo,
+
+      /* DFP insns are not supported on this host */
+      EmFail_S390X_DFP_insn,
+
+      /* insn needs floating point extension facility which is not
+         available on this host */
+      EmFail_S390X_fpext,
+
+      /* GPR 0 contains invalid rounding mode for PFPO instruction */
+      EmFail_S390X_invalid_PFPO_rounding_mode,
+
+      /* The function code specified in GPR 0 executed by PFPO
+         instruction is invalid */
+      EmFail_S390X_invalid_PFPO_function,
+
+      /* some insn needs vector facility which is not available on this host */
+      EmFail_S390X_vx,
+
+      /* ppno insn is not supported on this host */
+      EmFail_S390X_ppno,
+
+      EmNote_NUMBER
+   }
+   VexEmNote;
+
+
+/* Produces a short string describing the warning. */
+extern const HChar* LibVEX_EmNote_string ( VexEmNote );
+
+
+#endif /* ndef __LIBVEX_EMNOTE_H */
+
+/*---------------------------------------------------------------*/
+/*---                                         libvex_emnote.h ---*/
+/*---------------------------------------------------------------*/

pyvex/include/libvex_guest_amd64.h

@@ -0,0 +1,252 @@
+
+/*---------------------------------------------------------------*/
+/*--- begin                              libvex_guest_amd64.h ---*/
+/*---------------------------------------------------------------*/
+
+/*
+   This file is part of Valgrind, a dynamic binary instrumentation
+   framework.
+
+   Copyright (C) 2004-2015 OpenWorks LLP
+      info@open-works.net
+
+   This program is free software; you can redistribute it and/or
+   modify it under the terms of the GNU General Public License as
+   published by the Free Software Foundation; either version 2 of the
+   License, or (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+   02110-1301, USA.
+
+   The GNU General Public License is contained in the file COPYING.
+
+   Neither the names of the U.S. Department of Energy nor the
+   University of California nor the names of its contributors may be
+   used to endorse or promote products derived from this software
+   without prior written permission.
+*/
+
+#ifndef __LIBVEX_PUB_GUEST_AMD64_H
+#define __LIBVEX_PUB_GUEST_AMD64_H
+
+#include "libvex_basictypes.h"
+#include "libvex_emnote.h"
+
+
+/*---------------------------------------------------------------*/
+/*--- Vex's representation of the AMD64 CPU state.            ---*/
+/*---------------------------------------------------------------*/
+
+/* See detailed comments at the top of libvex_guest_x86.h for
+   further info.  This representation closely follows the
+   x86 representation.
+*/
+
+
+typedef
+   struct {
+      /* Event check fail addr, counter, and padding to make RAX 16
+         aligned. */
+      /*   0 */ ULong  host_EvC_FAILADDR;
+      /*   8 */ UInt   host_EvC_COUNTER;
+      /*  12 */ UInt   pad0;
+      /*  16 */ ULong  guest_RAX;
+      /*  24 */ ULong  guest_RCX;
+      /*  32 */ ULong  guest_RDX;
+      /*  40 */ ULong  guest_RBX;
+      /*  48 */ ULong  guest_RSP;
+      /*  56 */ ULong  guest_RBP;
+      /*  64 */ ULong  guest_RSI;
+      /*  72 */ ULong  guest_RDI;
+      /*  80 */ ULong  guest_R8;
+      /*  88 */ ULong  guest_R9;
+      /*  96 */ ULong  guest_R10;
+      /* 104 */ ULong  guest_R11;
+      /* 112 */ ULong  guest_R12;
+      /* 120 */ ULong  guest_R13;
+      /* 128 */ ULong  guest_R14;
+      /* 136 */ ULong  guest_R15;
+      /* 4-word thunk used to calculate O S Z A C P flags. */
+      /* 144 */ ULong  guest_CC_OP;
+      /* 152 */ ULong  guest_CC_DEP1;
+      /* 160 */ ULong  guest_CC_DEP2;
+      /* 168 */ ULong  guest_CC_NDEP;
+      /* The D flag is stored here, encoded as either -1 or +1 */
+      /* 176 */ ULong  guest_DFLAG;
+      /* 184 */ ULong  guest_RIP;
+      /* Bit 18 (AC) of eflags stored here, as either 0 or 1. */
+      /* ... */ ULong  guest_ACFLAG;
+      /* Bit 21 (ID) of eflags stored here, as either 0 or 1. */
+      /* 192 */ ULong guest_IDFLAG;
+      /* Probably a lot more stuff too. 
+         D,ID flags
+         16  128-bit SSE registers
+         all the old x87 FPU gunk
+         segment registers */
+
+      /* HACK to e.g. make tls on amd64-linux/solaris work.  %fs only ever seems
+         to hold a constant value (zero on linux main thread, 0x63 in other
+         threads), and so guest_FS_CONST holds
+         the 64-bit offset associated with this constant %fs value. */
+      /* 200 */ ULong guest_FS_CONST;
+
+      /* YMM registers.  Note that these must be allocated
+         consecutively in order that the SSE4.2 PCMP{E,I}STR{I,M}
+         helpers can treat them as an array.  YMM16 is a fake reg used
+         as an intermediary in handling aforementioned insns. */
+      /* 208 */ULong guest_SSEROUND;
+      /* 216 */U256  guest_YMM0;
+      U256  guest_YMM1;
+      U256  guest_YMM2;
+      U256  guest_YMM3;
+      U256  guest_YMM4;
+      U256  guest_YMM5;
+      U256  guest_YMM6;
+      U256  guest_YMM7;
+      U256  guest_YMM8;
+      U256  guest_YMM9;
+      U256  guest_YMM10;
+      U256  guest_YMM11;
+      U256  guest_YMM12;
+      U256  guest_YMM13;
+      U256  guest_YMM14;
+      U256  guest_YMM15;
+      U256  guest_YMM16;
+
+      // Control registers
+      ULong guest_CR0;
+      ULong guest_CR1;
+      ULong guest_CR2;
+      ULong guest_CR3;
+      ULong guest_CR4;
+      ULong guest_CR5;
+      ULong guest_CR6;
+      ULong guest_CR7;
+      ULong guest_CR8;
+      ULong guest_CR9;
+      ULong guest_CR10;
+      ULong guest_CR11;
+      ULong guest_CR12;
+      ULong guest_CR13;
+      ULong guest_CR14;
+      ULong guest_CR15;
+
+      /* FPU */
+      /* Note.  Setting guest_FTOP to be ULong messes up the
+         delicately-balanced PutI/GetI optimisation machinery.
+         Therefore best to leave it as a UInt. */
+      UInt  guest_FTOP;
+      UInt  pad1;
+      ULong guest_FPREG[8];
+      UChar guest_FPTAG[8];
+      ULong guest_FPROUND;
+      ULong guest_FC3210;
+
+      /* Emulation notes */
+      UInt  guest_EMNOTE;
+      UInt  pad2;
+
+      /* Translation-invalidation area description.  Not used on amd64
+         (there is no invalidate-icache insn), but needed so as to
+         allow users of the library to uniformly assume that the guest
+         state contains these two fields -- otherwise there is
+         compilation breakage.  On amd64, these two fields are set to
+         zero by LibVEX_GuestAMD64_initialise and then should be
+         ignored forever thereafter. */
+      ULong guest_CMSTART;
+      ULong guest_CMLEN;
+
+      /* Used to record the unredirected guest address at the start of
+         a translation whose start has been redirected.  By reading
+         this pseudo-register shortly afterwards, the translation can
+         find out what the corresponding no-redirection address was.
+         Note, this is only set for wrap-style redirects, not for
+         replace-style ones. */
+      ULong guest_NRADDR;
+
+      /* Used for Darwin syscall dispatching. */
+      ULong guest_SC_CLASS;
+
+      /* HACK to make e.g. tls on darwin work, wine on linux work, ...
+         %gs only ever seems to hold a constant value (e.g. 0x60 on darwin,
+         0x6b on linux), and so guest_GS_CONST holds the 64-bit offset
+         associated with this constant %gs value.  (A direct analogue
+         of the %fs-const hack for amd64-linux/solaris). */
+      ULong guest_GS_CONST;
+
+      /* Needed for Darwin (but mandated for all guest architectures):
+         RIP at the last syscall insn (int 0x80/81/82, sysenter,
+         syscall).  Used when backing up to restart a syscall that has
+         been interrupted by a signal. */
+      ULong guest_IP_AT_SYSCALL;
+
+      /* Segment registers. */
+      UShort guest_CS;
+      UShort guest_DS;
+      UShort guest_ES;
+      UShort guest_FS;
+      UShort guest_GS;
+      UShort guest_SS;
+
+      /* Padding to make it have an 16-aligned size */
+      UInt pad4;
+      ULong pad3;
+   }
+   VexGuestAMD64State;
+
+
+
+/*---------------------------------------------------------------*/
+/*--- Utility functions for amd64 guest stuff.                ---*/
+/*---------------------------------------------------------------*/
+
+/* ALL THE FOLLOWING ARE VISIBLE TO LIBRARY CLIENT */
+
+/* Initialise all guest amd64 state.  The FPU is put in default
+   mode. */
+extern
+void LibVEX_GuestAMD64_initialise ( /*OUT*/VexGuestAMD64State* vex_state );
+
+
+/* Extract from the supplied VexGuestAMD64State structure the
+   corresponding native %rflags value. */
+extern 
+ULong LibVEX_GuestAMD64_get_rflags ( /*IN*/const VexGuestAMD64State* vex_state );
+
+/* Put rflags into the given state. */
+extern
+void LibVEX_GuestAMD64_put_rflags ( ULong rflags,
+                                    /*MOD*/VexGuestAMD64State* vex_state );
+
+/* Set the carry flag in the given state to 'new_carry_flag', which
+   should be zero or one. */
+extern
+void
+LibVEX_GuestAMD64_put_rflag_c ( ULong new_carry_flag,
+                                /*MOD*/VexGuestAMD64State* vex_state );
+
+/* Do FXSAVE from the supplied VexGuestAMD64tate structure and store the
+   result at the given address which represents a buffer of at least 416
+   bytes. */
+extern
+void LibVEX_GuestAMD64_fxsave ( /*IN*/VexGuestAMD64State* gst,
+                                /*OUT*/HWord fp_state );
+
+/* Do FXRSTOR from the supplied address and store read values to the given
+   VexGuestAMD64State structure. */
+extern
+VexEmNote LibVEX_GuestAMD64_fxrstor ( /*IN*/HWord fp_state,
+                                      /*MOD*/VexGuestAMD64State* gst );
+
+#endif /* ndef __LIBVEX_PUB_GUEST_AMD64_H */
+
+/*---------------------------------------------------------------*/
+/*---                                    libvex_guest_amd64.h ---*/
+/*---------------------------------------------------------------*/