yosys2digitaljs 0.7.0 → 0.9.0

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package/dist/core.js ADDED
@@ -0,0 +1,1036 @@
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+ #!/usr/bin/env node
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+ "use strict";
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+ Object.defineProperty(exports, "__esModule", { value: true });
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+ exports.yosys2digitaljs = yosys2digitaljs;
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+ exports.io_ui = io_ui;
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+ const HashMap = require("hashmap");
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+ const bigInt = require("big-integer");
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+ const _3vl_1 = require("3vl");
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+ const topsort = require('topsort');
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+ function assert_fallback(val, msg) {
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+ if (!val)
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+ throw new Error(msg || "Assertion failed");
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+ }
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+ const isNode = typeof process !== "undefined" &&
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+ process.versions != null &&
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+ process.versions.node != null;
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+ const assert = isNode
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+ ? require('assert')
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+ : assert_fallback;
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+ ;
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+ var Yosys;
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+ (function (Yosys) {
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+ Yosys.ConstChars = ["0", "1", "x", "z"];
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+ })(Yosys || (Yosys = {}));
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+ ;
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+ const unary_gates = new Set([
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+ '$not', '$neg', '$pos', '$reduce_and', '$reduce_or', '$reduce_xor',
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+ '$reduce_xnor', '$reduce_bool', '$logic_not'
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+ ]);
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+ const binary_gates = new Set([
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+ '$and', '$or', '$xor', '$xnor',
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+ '$add', '$sub', '$mul', '$div', '$mod', '$pow',
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+ '$lt', '$le', '$eq', '$ne', '$ge', '$gt', '$eqx', '$nex',
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+ '$shl', '$shr', '$sshl', '$sshr', '$shift', '$shiftx',
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+ '$logic_and', '$logic_or'
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+ ]);
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+ const gate_subst = new Map([
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+ ['$not', 'Not'],
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+ ['$and', 'And'],
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+ ['$nand', 'Nand'],
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+ ['$or', 'Or'],
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+ ['$nor', 'Nor'],
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+ ['$xor', 'Xor'],
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+ ['$xnor', 'Xnor'],
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+ ['$reduce_and', 'AndReduce'],
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+ ['$reduce_nand', 'NandReduce'],
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+ ['$reduce_or', 'OrReduce'],
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+ ['$reduce_nor', 'NorReduce'],
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+ ['$reduce_xor', 'XorReduce'],
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+ ['$reduce_xnor', 'XnorReduce'],
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+ ['$reduce_bool', 'OrReduce'],
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+ ['$logic_not', 'NorReduce'],
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+ ['$repeater', 'Repeater'],
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+ ['$shl', 'ShiftLeft'],
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+ ['$shr', 'ShiftRight'],
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+ ['$lt', 'Lt'],
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+ ['$le', 'Le'],
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+ ['$eq', 'Eq'],
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+ ['$ne', 'Ne'],
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+ ['$gt', 'Gt'],
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+ ['$ge', 'Ge'],
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+ ['$constant', 'Constant'],
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+ ['$neg', 'Negation'],
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+ ['$pos', 'UnaryPlus'],
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+ ['$add', 'Addition'],
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+ ['$sub', 'Subtraction'],
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+ ['$mul', 'Multiplication'],
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+ ['$div', 'Division'],
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+ ['$mod', 'Modulo'],
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+ ['$pow', 'Power'],
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+ ['$mux', 'Mux'],
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+ ['$pmux', 'Mux1Hot'],
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+ ['$mem', 'Memory'],
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+ ['$mem_v2', 'Memory'],
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+ ['$lut', 'Memory'],
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+ ['$fsm', 'FSM'],
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+ ['$clock', 'Clock'],
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+ ['$button', 'Button'],
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+ ['$lamp', 'Lamp'],
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+ ['$numdisplay', 'NumDisplay'],
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+ ['$numentry', 'NumEntry'],
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+ ['$input', 'Input'],
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+ ['$output', 'Output'],
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+ ['$busgroup', 'BusGroup'],
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+ ['$busungroup', 'BusUngroup'],
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+ ['$busslice', 'BusSlice'],
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+ ['$zeroextend', 'ZeroExtend'],
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+ ['$signextend', 'SignExtend'],
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+ ['$reduce_bool', 'OrReduce'],
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+ ['$eqx', 'Eq'],
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+ ['$nex', 'Ne'],
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+ ['$sshl', 'ShiftLeft'],
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+ ['$sshr', 'ShiftRight'],
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+ ['$shift', 'ShiftRight'],
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+ ['$shiftx', 'ShiftRight'],
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+ ['$logic_and', 'And'],
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+ ['$logic_or', 'Or'],
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+ ['$dff', 'Dff'],
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+ ['$dffe', 'Dff'],
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+ ['$adff', 'Dff'],
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+ ['$adffe', 'Dff'],
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+ ['$sdff', 'Dff'],
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+ ['$sdffe', 'Dff'],
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+ ['$sdffce', 'Dff'],
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+ ['$dlatch', 'Dff'],
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+ ['$adlatch', 'Dff'],
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+ ['$sr', 'Dff'],
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+ ['$dffsr', 'Dff'],
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+ ['$dffsre', 'Dff'],
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+ ['$aldff', 'Dff'],
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+ ['$aldffe', 'Dff']
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+ ]);
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+ function module_deps(data) {
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+ const out = [];
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+ for (const [name, mod] of Object.entries(data.modules)) {
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+ out.push([name, 1 / 0]);
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+ for (const cname in mod.cells) {
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+ const cell = mod.cells[cname];
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+ if (cell.type in data.modules)
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+ out.push([cell.type, name]);
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+ }
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+ }
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+ return out;
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+ }
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+ function order_ports(data) {
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+ const unmap = { A: 'in', Y: 'out' };
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+ const binmap = { A: 'in1', B: 'in2', Y: 'out' };
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+ const out = {
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+ '$mux': { A: 'in0', B: 'in1', S: 'sel', Y: 'out' },
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+ '$dff': { CLK: 'clk', D: 'in', Q: 'out' },
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+ '$dffe': { CLK: 'clk', EN: 'en', D: 'in', Q: 'out' },
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+ '$adff': { CLK: 'clk', ARST: 'arst', D: 'in', Q: 'out' },
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+ '$adffe': { CLK: 'clk', EN: 'en', ARST: 'arst', D: 'in', Q: 'out' },
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+ '$sdff': { CLK: 'clk', SRST: 'srst', D: 'in', Q: 'out' },
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+ '$sdffe': { CLK: 'clk', EN: 'en', SRST: 'srst', D: 'in', Q: 'out' },
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+ '$sdffce': { CLK: 'clk', EN: 'en', SRST: 'srst', D: 'in', Q: 'out' },
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+ '$dlatch': { EN: 'en', D: 'in', Q: 'out' },
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+ '$adlatch': { EN: 'en', ARST: 'arst', D: 'in', Q: 'out' },
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+ '$dffsr': { CLK: 'clk', SET: 'set', CLR: 'clr', D: 'in', Q: 'out' },
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+ '$dffsre': { CLK: 'clk', EN: 'en', SET: 'set', CLR: 'clr', D: 'in', Q: 'out' },
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+ '$aldff': { CLK: 'clk', ALOAD: 'aload', AD: 'ain', D: 'in', Q: 'out' },
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+ '$aldffe': { CLK: 'clk', EN: 'en', ALOAD: 'aload', AD: 'ain', D: 'in', Q: 'out' },
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+ '$sr': { SET: 'set', CLR: 'clr', Q: 'out' },
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+ '$fsm': { ARST: 'arst', CLK: 'clk', CTRL_IN: 'in', CTRL_OUT: 'out' }
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+ };
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+ binary_gates.forEach((nm) => out[nm] = binmap);
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+ unary_gates.forEach((nm) => out[nm] = unmap);
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+ for (const [name, mod] of Object.entries(data.modules)) {
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+ const portmap = {};
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+ const ins = [], outs = [];
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+ for (const pname in mod.ports) {
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+ portmap[pname] = pname;
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+ }
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+ out[name] = portmap;
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+ }
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+ return out;
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+ }
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+ function decode_json_bigint(param) {
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+ if (typeof param == 'string')
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+ return bigInt(param, 2);
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+ else if (typeof param == 'number')
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+ return bigInt(param);
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+ else
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+ assert(false);
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+ }
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+ function decode_json_number(param) {
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+ if (typeof param == 'string')
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+ return Number.parseInt(param, 2);
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+ else if (typeof param == 'number')
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+ return param;
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+ else
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+ assert(false);
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+ }
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+ function decode_json_bigint_as_array(param) {
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+ return decode_json_bigint(param).toArray(2).value;
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+ }
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+ function decode_json_constant(param, bits, fill = '0') {
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+ if (typeof param == 'number')
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+ return bigInt(param).toArray(2).value.map(String).reverse()
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+ .concat(Array(bits).fill(fill)).slice(0, bits).reverse().join('');
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+ else
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+ return param;
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+ }
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+ function parse_source_positions(str) {
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+ const ret = [];
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+ for (const entry of str.split('|')) {
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+ const colonIdx = entry.lastIndexOf(':');
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+ const name = entry.slice(0, colonIdx);
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+ const pos = entry.slice(colonIdx + 1);
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+ const [from, to] = pos.split('-').map(s => s.split('.').map(v => Number(v))).map(([line, column]) => ({ line, column }));
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+ ret.push({ name, from, to });
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+ }
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+ return ret;
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+ }
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+ function yosys_to_digitaljs(data, portmaps, options = {}) {
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+ const out = {};
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+ for (const [name, mod] of Object.entries(data.modules)) {
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+ out[name] = yosys_to_digitaljs_mod(name, mod, portmaps, options);
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+ }
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+ return out;
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+ }
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+ function yosys_to_digitaljs_mod(name, mod, portmaps, options = {}) {
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+ function constbit(bit) {
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+ return Yosys.ConstChars.includes(bit.toString());
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+ }
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+ const nets = new HashMap();
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+ const netnames = new HashMap();
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+ const netsrc = new HashMap();
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+ const bits = new Map();
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+ const devnets = new Map();
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+ let n = 0, pn = 0;
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+ function gen_name() {
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+ const nm = `dev${n++}`;
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+ devnets.set(nm, new Map());
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+ return nm;
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+ }
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+ function gen_bitname() {
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+ return `bit${pn++}`;
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+ }
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+ function get_net(k) {
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+ // create net if does not exist yet
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+ if (!nets.has(k)) {
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+ const nms = netnames.get(k);
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+ const src = netsrc.get(k);
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+ nets.set(k, { source: undefined, targets: [], name: nms ? nms[0] : undefined, source_positions: src || [] });
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+ }
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+ return nets.get(k);
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+ }
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+ function add_net_source(k, d, p, primary = false) {
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+ if (k.length == 0)
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+ return; // for unconnected ports
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+ const net = get_net(k);
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+ if (net.source !== undefined) {
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+ // multiple sources driving one net, disallowed in digitaljs
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+ throw Error('Multiple sources driving net: ' + net.name);
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+ }
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+ net.source = { id: d, port: p };
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+ if (primary)
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+ for (const [nbit, bit] of k.entries()) {
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+ bits.set(bit, { id: d, port: p, num: nbit });
241
+ }
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+ devnets.get(d).set(p, k);
243
+ }
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+ function add_net_target(k, d, p) {
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+ if (k.length == 0)
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+ return; // for unconnected ports
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+ const net = get_net(k);
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+ net.targets.push({ id: d, port: p });
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+ devnets.get(d).set(p, k);
250
+ }
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+ const mout = {
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+ devices: {},
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+ connectors: []
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+ };
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+ function add_device(dev) {
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+ const dname = gen_name();
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+ if (options.propagation !== undefined)
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+ dev.propagation = options.propagation;
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+ mout.devices[dname] = dev;
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+ return dname;
261
+ }
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+ function add_busgroup(nbits, groups) {
263
+ if (get_net(nbits).source !== undefined)
264
+ return; // the bits were already grouped
265
+ const dname = add_device({
266
+ type: 'BusGroup',
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+ groups: groups.map(g => g.length)
268
+ });
269
+ add_net_source(nbits, dname, 'out');
270
+ for (const [gn, group] of groups.entries()) {
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+ add_net_target(group, dname, 'in' + gn);
272
+ }
273
+ }
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+ function connect_device(dname, cell, portmap) {
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+ for (const [pname, pdir] of Object.entries(cell.port_directions)) {
276
+ const pconn = cell.connections[pname];
277
+ switch (pdir) {
278
+ case 'input':
279
+ add_net_target(pconn, dname, portmap[pname]);
280
+ break;
281
+ case 'output':
282
+ add_net_source(pconn, dname, portmap[pname], true);
283
+ break;
284
+ default:
285
+ throw Error('Invalid port direction: ' + pdir);
286
+ }
287
+ }
288
+ }
289
+ function connect_pmux(dname, cell) {
290
+ add_net_target(cell.connections.A, dname, 'in0');
291
+ add_net_target(cell.connections.S.slice().reverse(), dname, 'sel');
292
+ add_net_source(cell.connections.Y, dname, 'out', true);
293
+ for (const i of Array(decode_json_number(cell.parameters.S_WIDTH)).keys()) {
294
+ const p = (decode_json_number(cell.parameters.S_WIDTH) - i - 1) * decode_json_number(cell.parameters.WIDTH);
295
+ add_net_target(cell.connections.B.slice(p, p + decode_json_number(cell.parameters.WIDTH)), dname, 'in' + (i + 1));
296
+ }
297
+ }
298
+ function connect_mem(dname, cell, dev) {
299
+ for (const [k, port] of dev.rdports.entries()) {
300
+ const portname = "rd" + k;
301
+ add_net_target(cell.connections.RD_ADDR.slice(dev.abits * k, dev.abits * (k + 1)), dname, portname + "addr");
302
+ add_net_source(cell.connections.RD_DATA.slice(dev.bits * k, dev.bits * (k + 1)), dname, portname + "data", true);
303
+ if ('clock_polarity' in port)
304
+ add_net_target([cell.connections.RD_CLK[k]], dname, portname + "clk");
305
+ if ('enable_polarity' in port)
306
+ add_net_target([cell.connections.RD_EN[k]], dname, portname + "en");
307
+ if ('arst_polarity' in port)
308
+ add_net_target([cell.connections.RD_ARST[k]], dname, portname + "arst");
309
+ if ('srst_polarity' in port)
310
+ add_net_target([cell.connections.RD_SRST[k]], dname, portname + "srst");
311
+ }
312
+ for (const [k, port] of dev.wrports.entries()) {
313
+ const portname = "wr" + k;
314
+ add_net_target(cell.connections.WR_ADDR.slice(dev.abits * k, dev.abits * (k + 1)), dname, portname + "addr");
315
+ add_net_target(cell.connections.WR_DATA.slice(dev.bits * k, dev.bits * (k + 1)), dname, portname + "data");
316
+ if ('clock_polarity' in port)
317
+ add_net_target([cell.connections.WR_CLK[k]], dname, portname + "clk");
318
+ if ('enable_polarity' in port) {
319
+ if (port.no_bit_enable)
320
+ add_net_target([cell.connections.WR_EN[dev.bits * k]], dname, portname + "en");
321
+ else
322
+ add_net_target(cell.connections.WR_EN.slice(dev.bits * k, dev.bits * (k + 1)), dname, portname + "en");
323
+ }
324
+ }
325
+ }
326
+ // Find net names
327
+ for (const [nname, data] of Object.entries(mod.netnames)) {
328
+ if (data.hide_name)
329
+ continue;
330
+ let l = netnames.get(data.bits);
331
+ if (l === undefined) {
332
+ l = [];
333
+ netnames.set(data.bits, l);
334
+ }
335
+ l.push(nname);
336
+ if (typeof data.attributes == 'object' && data.attributes.src) {
337
+ let l = netsrc.get(data.bits);
338
+ if (l === undefined) {
339
+ l = [];
340
+ netsrc.set(data.bits, l);
341
+ }
342
+ const positions = parse_source_positions(data.attributes.src);
343
+ l.push(...positions);
344
+ }
345
+ }
346
+ // Add inputs/outputs
347
+ for (const [pname, port] of Object.entries(mod.ports)) {
348
+ const dir = port.direction == "input" ? "Input" :
349
+ port.direction == "output" ? "Output" :
350
+ undefined;
351
+ const dname = add_device({
352
+ type: dir,
353
+ net: pname,
354
+ order: n,
355
+ bits: port.bits.length
356
+ });
357
+ switch (port.direction) {
358
+ case 'input':
359
+ add_net_source(port.bits, dname, 'out', true);
360
+ break;
361
+ case 'output':
362
+ add_net_target(port.bits, dname, 'in');
363
+ break;
364
+ default: throw Error('Invalid port direction: ' + port.direction);
365
+ }
366
+ }
367
+ // Add gates
368
+ for (const [cname, cell] of Object.entries(mod.cells)) {
369
+ const dev = {
370
+ label: cname,
371
+ type: gate_subst.get(cell.type)
372
+ };
373
+ if (dev.type == undefined) {
374
+ dev.type = 'Subcircuit';
375
+ dev.celltype = cell.type;
376
+ }
377
+ if (typeof cell.attributes == 'object' && cell.attributes.src) {
378
+ dev.source_positions = parse_source_positions(cell.attributes.src);
379
+ }
380
+ const dname = add_device(dev);
381
+ function match_port(con, nsig, sz) {
382
+ const sig = decode_json_number(nsig);
383
+ if (con.length > sz)
384
+ con.splice(sz);
385
+ else if (con.length < sz) {
386
+ const ccon = con.slice();
387
+ const pad = sig ? con.slice(-1)[0] : '0';
388
+ con.splice(con.length, 0, ...Array(sz - con.length).fill(pad));
389
+ if (!con.every(constbit) && get_net(con).source === undefined) {
390
+ // WARNING: potentially troublesome hack for readability
391
+ // handled generally in the grouping phase,
392
+ // but it's hard to add sign extensions there
393
+ const extname = add_device({
394
+ type: sig ? 'SignExtend' : 'ZeroExtend',
395
+ extend: { input: ccon.length, output: con.length }
396
+ });
397
+ add_net_target(ccon, extname, 'in');
398
+ add_net_source(con, extname, 'out');
399
+ }
400
+ }
401
+ }
402
+ function zero_extend_output(con) {
403
+ if (con.length > 1) {
404
+ const ccon = con.slice();
405
+ con.splice(1);
406
+ const extname = add_device({
407
+ type: 'ZeroExtend',
408
+ extend: { input: con.length, output: ccon.length }
409
+ });
410
+ add_net_source(ccon, extname, 'out');
411
+ add_net_target(con, extname, 'in');
412
+ }
413
+ }
414
+ if (unary_gates.has(cell.type)) {
415
+ assert(cell.connections.A.length == decode_json_number(cell.parameters.A_WIDTH));
416
+ assert(cell.connections.Y.length == decode_json_number(cell.parameters.Y_WIDTH));
417
+ assert(cell.port_directions.A == 'input');
418
+ assert(cell.port_directions.Y == 'output');
419
+ }
420
+ if (binary_gates.has(cell.type)) {
421
+ assert(cell.connections.A.length == decode_json_number(cell.parameters.A_WIDTH));
422
+ assert(cell.connections.B.length == decode_json_number(cell.parameters.B_WIDTH));
423
+ assert(cell.connections.Y.length == decode_json_number(cell.parameters.Y_WIDTH));
424
+ assert(cell.port_directions.A == 'input');
425
+ assert(cell.port_directions.B == 'input');
426
+ assert(cell.port_directions.Y == 'output');
427
+ }
428
+ if (['$dff', '$dffe', '$adff', '$adffe', '$sdff', '$sdffe', '$sdffce', '$dlatch', '$adlatch', '$dffsr', '$dffsre', '$aldff', '$aldffe'].includes(cell.type)) {
429
+ assert(cell.connections.D.length == decode_json_number(cell.parameters.WIDTH));
430
+ assert(cell.connections.Q.length == decode_json_number(cell.parameters.WIDTH));
431
+ assert(cell.port_directions.D == 'input');
432
+ assert(cell.port_directions.Q == 'output');
433
+ if (cell.type != '$dlatch' && cell.type != '$adlatch') {
434
+ assert(cell.connections.CLK.length == 1);
435
+ assert(cell.port_directions.CLK == 'input');
436
+ }
437
+ }
438
+ if (['$dffe', '$adffe', '$sdffe', '$sdffce', '$dffsre', '$aldffe', '$dlatch', '$adlatch'].includes(cell.type)) {
439
+ assert(cell.connections.EN.length == 1);
440
+ assert(cell.port_directions.EN == 'input');
441
+ }
442
+ if (['$adff', '$adffe', '$adlatch'].includes(cell.type)) {
443
+ assert(cell.connections.ARST.length == 1);
444
+ assert(cell.port_directions.ARST == 'input');
445
+ }
446
+ if (['$sdff', '$sdffe', '$sdffce'].includes(cell.type)) {
447
+ assert(cell.connections.SRST.length == 1);
448
+ assert(cell.port_directions.SRST == 'input');
449
+ }
450
+ if (['$dffsr', '$dffsre'].includes(cell.type)) {
451
+ assert(cell.connections.SET.length == decode_json_number(cell.parameters.WIDTH));
452
+ assert(cell.connections.CLR.length == decode_json_number(cell.parameters.WIDTH));
453
+ assert(cell.port_directions.SET == 'input');
454
+ assert(cell.port_directions.CLR == 'input');
455
+ }
456
+ switch (cell.type) {
457
+ case '$neg':
458
+ case '$pos':
459
+ dev.bits = {
460
+ in: cell.connections.A.length,
461
+ out: cell.connections.Y.length
462
+ };
463
+ dev.signed = Boolean(decode_json_number(cell.parameters.A_SIGNED));
464
+ break;
465
+ case '$not':
466
+ match_port(cell.connections.A, cell.parameters.A_SIGNED, cell.connections.Y.length);
467
+ dev.bits = cell.connections.Y.length;
468
+ break;
469
+ case '$add':
470
+ case '$sub':
471
+ case '$mul':
472
+ case '$div':
473
+ case '$mod':
474
+ case '$pow':
475
+ dev.bits = {
476
+ in1: cell.connections.A.length,
477
+ in2: cell.connections.B.length,
478
+ out: cell.connections.Y.length
479
+ };
480
+ dev.signed = {
481
+ in1: Boolean(decode_json_number(cell.parameters.A_SIGNED)),
482
+ in2: Boolean(decode_json_number(cell.parameters.B_SIGNED))
483
+ };
484
+ break;
485
+ case '$and':
486
+ case '$or':
487
+ case '$xor':
488
+ case '$xnor':
489
+ match_port(cell.connections.A, cell.parameters.A_SIGNED, cell.connections.Y.length);
490
+ match_port(cell.connections.B, cell.parameters.B_SIGNED, cell.connections.Y.length);
491
+ dev.bits = cell.connections.Y.length;
492
+ break;
493
+ case '$reduce_and':
494
+ case '$reduce_or':
495
+ case '$reduce_xor':
496
+ case '$reduce_xnor':
497
+ case '$reduce_bool':
498
+ case '$logic_not':
499
+ dev.bits = cell.connections.A.length;
500
+ zero_extend_output(cell.connections.Y);
501
+ if (dev.bits == 1) {
502
+ if (['$reduce_xnor', '$logic_not'].includes(cell.type))
503
+ dev.type = 'Not';
504
+ else
505
+ dev.type = 'Repeater';
506
+ }
507
+ break;
508
+ case '$eq':
509
+ case '$ne':
510
+ case '$lt':
511
+ case '$le':
512
+ case '$gt':
513
+ case '$ge':
514
+ case '$eqx':
515
+ case '$nex':
516
+ dev.bits = {
517
+ in1: cell.connections.A.length,
518
+ in2: cell.connections.B.length
519
+ };
520
+ dev.signed = {
521
+ in1: Boolean(decode_json_number(cell.parameters.A_SIGNED)),
522
+ in2: Boolean(decode_json_number(cell.parameters.B_SIGNED))
523
+ };
524
+ zero_extend_output(cell.connections.Y);
525
+ break;
526
+ case '$shl':
527
+ case '$shr':
528
+ case '$sshl':
529
+ case '$sshr':
530
+ case '$shift':
531
+ case '$shiftx':
532
+ dev.bits = {
533
+ in1: cell.connections.A.length,
534
+ in2: cell.connections.B.length,
535
+ out: cell.connections.Y.length
536
+ };
537
+ dev.signed = {
538
+ in1: Boolean(decode_json_number(cell.parameters.A_SIGNED)),
539
+ in2: Boolean(decode_json_number(cell.parameters.B_SIGNED) && ['$shift', '$shiftx'].includes(cell.type)),
540
+ out: Boolean(decode_json_number(cell.parameters.A_SIGNED) && ['$sshl', '$sshr'].includes(cell.type))
541
+ };
542
+ dev.fillx = cell.type == '$shiftx';
543
+ break;
544
+ case '$logic_and':
545
+ case '$logic_or': {
546
+ function reduce_input(con) {
547
+ const ccon = con.slice();
548
+ con.splice(0, con.length, gen_bitname());
549
+ const extname = add_device({
550
+ type: 'OrReduce',
551
+ bits: ccon.length
552
+ });
553
+ add_net_source(con, extname, 'out');
554
+ add_net_target(ccon, extname, 'in');
555
+ }
556
+ if (cell.connections.A.length > 1)
557
+ reduce_input(cell.connections.A);
558
+ if (cell.connections.B.length > 1)
559
+ reduce_input(cell.connections.B);
560
+ zero_extend_output(cell.connections.Y);
561
+ break;
562
+ }
563
+ case '$mux':
564
+ assert(cell.connections.A.length == decode_json_number(cell.parameters.WIDTH));
565
+ assert(cell.connections.B.length == decode_json_number(cell.parameters.WIDTH));
566
+ assert(cell.connections.Y.length == decode_json_number(cell.parameters.WIDTH));
567
+ assert(cell.port_directions.A == 'input');
568
+ assert(cell.port_directions.B == 'input');
569
+ assert(cell.port_directions.Y == 'output');
570
+ dev.bits = {
571
+ in: decode_json_number(cell.parameters.WIDTH),
572
+ sel: 1
573
+ };
574
+ break;
575
+ case '$pmux':
576
+ assert(cell.connections.B.length == decode_json_number(cell.parameters.WIDTH) * decode_json_number(cell.parameters.S_WIDTH));
577
+ assert(cell.connections.A.length == decode_json_number(cell.parameters.WIDTH));
578
+ assert(cell.connections.S.length == decode_json_number(cell.parameters.S_WIDTH));
579
+ assert(cell.connections.Y.length == decode_json_number(cell.parameters.WIDTH));
580
+ assert(cell.port_directions.A == 'input');
581
+ assert(cell.port_directions.B == 'input');
582
+ assert(cell.port_directions.S == 'input');
583
+ assert(cell.port_directions.Y == 'output');
584
+ dev.bits = {
585
+ in: decode_json_number(cell.parameters.WIDTH),
586
+ sel: decode_json_number(cell.parameters.S_WIDTH)
587
+ };
588
+ break;
589
+ case '$dff':
590
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
591
+ dev.polarity = {
592
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY))
593
+ };
594
+ break;
595
+ case '$dffe':
596
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
597
+ dev.polarity = {
598
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
599
+ enable: Boolean(decode_json_number(cell.parameters.EN_POLARITY))
600
+ };
601
+ break;
602
+ case '$aldff':
603
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
604
+ dev.polarity = {
605
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
606
+ aload: Boolean(decode_json_number(cell.parameters.ALOAD_POLARITY))
607
+ };
608
+ break;
609
+ case '$aldffe':
610
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
611
+ dev.polarity = {
612
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
613
+ enable: Boolean(decode_json_number(cell.parameters.EN_POLARITY)),
614
+ aload: Boolean(decode_json_number(cell.parameters.ALOAD_POLARITY))
615
+ };
616
+ break;
617
+ case '$adff':
618
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
619
+ dev.polarity = {
620
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
621
+ arst: Boolean(decode_json_number(cell.parameters.ARST_POLARITY))
622
+ };
623
+ dev.arst_value = decode_json_constant(cell.parameters.ARST_VALUE, dev.bits);
624
+ break;
625
+ case '$sdff':
626
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
627
+ dev.polarity = {
628
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
629
+ srst: Boolean(decode_json_number(cell.parameters.SRST_POLARITY))
630
+ };
631
+ dev.srst_value = decode_json_constant(cell.parameters.SRST_VALUE, dev.bits);
632
+ break;
633
+ case '$adffe':
634
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
635
+ dev.polarity = {
636
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
637
+ arst: Boolean(decode_json_number(cell.parameters.ARST_POLARITY)),
638
+ enable: Boolean(decode_json_number(cell.parameters.EN_POLARITY))
639
+ };
640
+ dev.arst_value = decode_json_constant(cell.parameters.ARST_VALUE, dev.bits);
641
+ break;
642
+ case '$sdffe':
643
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
644
+ dev.polarity = {
645
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
646
+ srst: Boolean(decode_json_number(cell.parameters.SRST_POLARITY)),
647
+ enable: Boolean(decode_json_number(cell.parameters.EN_POLARITY))
648
+ };
649
+ dev.srst_value = decode_json_constant(cell.parameters.SRST_VALUE, dev.bits);
650
+ break;
651
+ case '$sdffce':
652
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
653
+ dev.polarity = {
654
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
655
+ srst: Boolean(decode_json_number(cell.parameters.SRST_POLARITY)),
656
+ enable: Boolean(decode_json_number(cell.parameters.EN_POLARITY))
657
+ };
658
+ dev.enable_srst = true;
659
+ dev.srst_value = decode_json_constant(cell.parameters.SRST_VALUE, dev.bits);
660
+ break;
661
+ case '$dlatch':
662
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
663
+ dev.polarity = {
664
+ enable: Boolean(decode_json_number(cell.parameters.EN_POLARITY))
665
+ };
666
+ break;
667
+ case '$adlatch':
668
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
669
+ dev.polarity = {
670
+ enable: Boolean(decode_json_number(cell.parameters.EN_POLARITY)),
671
+ arst: Boolean(decode_json_number(cell.parameters.ARST_POLARITY))
672
+ };
673
+ dev.arst_value = decode_json_constant(cell.parameters.ARST_VALUE, dev.bits);
674
+ break;
675
+ case '$dffsr':
676
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
677
+ dev.polarity = {
678
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
679
+ set: Boolean(decode_json_number(cell.parameters.SET_POLARITY)),
680
+ clr: Boolean(decode_json_number(cell.parameters.CLR_POLARITY))
681
+ };
682
+ break;
683
+ case '$dffsre':
684
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
685
+ dev.polarity = {
686
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
687
+ enable: Boolean(decode_json_number(cell.parameters.EN_POLARITY)),
688
+ set: Boolean(decode_json_number(cell.parameters.SET_POLARITY)),
689
+ clr: Boolean(decode_json_number(cell.parameters.CLR_POLARITY))
690
+ };
691
+ break;
692
+ case '$sr':
693
+ assert(cell.connections.Q.length == decode_json_number(cell.parameters.WIDTH));
694
+ assert(cell.port_directions.Q == 'output');
695
+ dev.no_data = true;
696
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
697
+ dev.polarity = {
698
+ set: Boolean(decode_json_number(cell.parameters.SET_POLARITY)),
699
+ clr: Boolean(decode_json_number(cell.parameters.CLR_POLARITY))
700
+ };
701
+ break;
702
+ case '$fsm': {
703
+ assert(cell.connections.ARST.length == 1);
704
+ assert(cell.connections.CLK.length == 1);
705
+ assert(cell.connections.CTRL_IN.length == decode_json_number(cell.parameters.CTRL_IN_WIDTH));
706
+ assert(cell.connections.CTRL_OUT.length == decode_json_number(cell.parameters.CTRL_OUT_WIDTH));
707
+ const TRANS_NUM = decode_json_number(cell.parameters.TRANS_NUM);
708
+ const STATE_NUM_LOG2 = decode_json_number(cell.parameters.STATE_NUM_LOG2);
709
+ const step = 2 * STATE_NUM_LOG2
710
+ + decode_json_number(cell.parameters.CTRL_IN_WIDTH)
711
+ + decode_json_number(cell.parameters.CTRL_OUT_WIDTH);
712
+ const tt = typeof (cell.parameters.TRANS_TABLE) == "number"
713
+ ? _3vl_1.Vector3vl.fromBin(bigInt(cell.parameters.TRANS_TABLE).toString(2), TRANS_NUM * step).toBin() // workaround for yosys silliness
714
+ : cell.parameters.TRANS_TABLE;
715
+ assert(tt.length == TRANS_NUM * step);
716
+ dev.polarity = {
717
+ clock: Boolean(decode_json_number(cell.parameters.CLK_POLARITY)),
718
+ arst: Boolean(decode_json_number(cell.parameters.ARST_POLARITY))
719
+ };
720
+ dev.wirename = cell.parameters.NAME;
721
+ dev.bits = {
722
+ in: decode_json_number(cell.parameters.CTRL_IN_WIDTH),
723
+ out: decode_json_number(cell.parameters.CTRL_OUT_WIDTH)
724
+ };
725
+ dev.states = decode_json_number(cell.parameters.STATE_NUM);
726
+ dev.init_state = decode_json_number(cell.parameters.STATE_RST);
727
+ dev.trans_table = [];
728
+ for (let i = 0; i < TRANS_NUM; i++) {
729
+ let base = i * step;
730
+ const f = (sz) => {
731
+ const ret = tt.slice(base, base + sz);
732
+ base += sz;
733
+ return ret;
734
+ };
735
+ const o = {
736
+ state_in: parseInt(f(STATE_NUM_LOG2), 2),
737
+ ctrl_in: f(decode_json_number(cell.parameters.CTRL_IN_WIDTH)).replace(/-/g, 'x'),
738
+ state_out: parseInt(f(STATE_NUM_LOG2), 2),
739
+ ctrl_out: f(decode_json_number(cell.parameters.CTRL_OUT_WIDTH))
740
+ };
741
+ dev.trans_table.push(o);
742
+ }
743
+ break;
744
+ }
745
+ case '$mem':
746
+ case '$mem_v2': {
747
+ const RD_PORTS = decode_json_number(cell.parameters.RD_PORTS);
748
+ const WR_PORTS = decode_json_number(cell.parameters.WR_PORTS);
749
+ assert(cell.connections.RD_EN.length == RD_PORTS);
750
+ assert(cell.connections.RD_CLK.length == RD_PORTS);
751
+ assert(cell.connections.RD_DATA.length == RD_PORTS * decode_json_number(cell.parameters.WIDTH));
752
+ assert(cell.connections.RD_ADDR.length == RD_PORTS * decode_json_number(cell.parameters.ABITS));
753
+ assert(cell.connections.WR_EN.length == WR_PORTS * decode_json_number(cell.parameters.WIDTH));
754
+ assert(cell.connections.WR_CLK.length == WR_PORTS);
755
+ assert(cell.connections.WR_DATA.length == WR_PORTS * decode_json_number(cell.parameters.WIDTH));
756
+ assert(cell.connections.WR_ADDR.length == WR_PORTS * decode_json_number(cell.parameters.ABITS));
757
+ if (cell.type == "$mem_v2") {
758
+ assert(cell.connections.RD_ARST.length == RD_PORTS);
759
+ assert(cell.connections.RD_SRST.length == RD_PORTS);
760
+ }
761
+ dev.bits = decode_json_number(cell.parameters.WIDTH);
762
+ dev.abits = decode_json_number(cell.parameters.ABITS);
763
+ dev.words = decode_json_number(cell.parameters.SIZE);
764
+ dev.offset = decode_json_number(cell.parameters.OFFSET);
765
+ dev.rdports = [];
766
+ dev.wrports = [];
767
+ const rdpol = decode_json_bigint_as_array(cell.parameters.RD_CLK_POLARITY).reverse();
768
+ const rden = decode_json_bigint_as_array(cell.parameters.RD_CLK_ENABLE).reverse();
769
+ const rdtr = cell.type == "$mem_v2"
770
+ ? []
771
+ : decode_json_bigint_as_array(cell.parameters.RD_TRANSPARENT).reverse();
772
+ const wrpol = decode_json_bigint_as_array(cell.parameters.WR_CLK_POLARITY).reverse();
773
+ const wren = decode_json_bigint_as_array(cell.parameters.WR_CLK_ENABLE).reverse();
774
+ const init = typeof (cell.parameters.INIT) == 'number'
775
+ ? bigInt(cell.parameters.INIT).toArray(2).value.map(String).reverse()
776
+ : cell.parameters.INIT.split('').reverse();
777
+ const v2_feature = (param) => cell.type == "$mem_v2" ? decode_json_bigint_as_array(param).reverse() : [];
778
+ const v2_feature_const = (param, size) => cell.type == "$mem_v2" ? decode_json_constant(param, size) : "";
779
+ const rdtrmask = v2_feature(cell.parameters.RD_TRANSPARENCY_MASK);
780
+ const rdcolmask = v2_feature(cell.parameters.RD_COLLISION_X_MASK);
781
+ const rdensrst = v2_feature(cell.parameters.RD_CE_OVER_SRST);
782
+ const rdinit = v2_feature_const(cell.parameters.RD_INIT_VALUE, dev.bits * RD_PORTS);
783
+ const rdarst = v2_feature_const(cell.parameters.RD_ARST_VALUE, dev.bits * RD_PORTS);
784
+ const rdsrst = v2_feature_const(cell.parameters.RD_SRST_VALUE, dev.bits * RD_PORTS);
785
+ if (cell.parameters.INIT) {
786
+ const l = init.slice(-1)[0] == 'x' ? 'x' : '0';
787
+ const memdata = new _3vl_1.Mem3vl(dev.bits, dev.words);
788
+ for (const k of Array(dev.words).keys()) {
789
+ const wrd = init.slice(dev.bits * k, dev.bits * (k + 1));
790
+ while (wrd.length < dev.bits)
791
+ wrd.push(l);
792
+ memdata.set(k, _3vl_1.Vector3vl.fromBin(wrd.reverse().join('')));
793
+ }
794
+ dev.memdata = memdata.toJSON();
795
+ }
796
+ for (const k of Array(RD_PORTS).keys()) {
797
+ const port = {};
798
+ if (rden[k]) {
799
+ port.clock_polarity = Boolean(rdpol[k]);
800
+ if (cell.connections.RD_EN[k] != '1')
801
+ port.enable_polarity = true;
802
+ }
803
+ ;
804
+ if (rdtr[k])
805
+ port.transparent = true;
806
+ if (cell.type == "$mem_v2") {
807
+ if (rdensrst[k])
808
+ port.enable_srst = true;
809
+ function mk_init(s, f) {
810
+ const v = s.slice(dev.bits * k, dev.bits * (k + 1));
811
+ if (!v.split('').every(c => c == 'x'))
812
+ f(v);
813
+ }
814
+ ;
815
+ mk_init(rdinit, v => port.init_value = v);
816
+ if (cell.connections.RD_ARST[k] != '0') {
817
+ port.arst_polarity = true;
818
+ mk_init(rdarst, v => port.arst_value = v);
819
+ }
820
+ if (cell.connections.RD_SRST[k] != '0') {
821
+ port.srst_polarity = true;
822
+ mk_init(rdsrst, v => port.srst_value = v);
823
+ }
824
+ function mk_mask(s, f) {
825
+ const v = Array(WR_PORTS).fill(0);
826
+ s.slice(WR_PORTS * k, WR_PORTS * (k + 1)).map((c, i) => { v[i] = c; });
827
+ if (v.every(c => c))
828
+ f(true);
829
+ else if (v.some(c => c))
830
+ f(v.map(c => Boolean(c)));
831
+ }
832
+ mk_mask(rdtrmask, v => port.transparent = v);
833
+ mk_mask(rdcolmask, v => port.collision = v);
834
+ }
835
+ dev.rdports.push(port);
836
+ }
837
+ for (const k of Array(WR_PORTS).keys()) {
838
+ const port = {};
839
+ if (wren[k]) {
840
+ port.clock_polarity = Boolean(wrpol[k]);
841
+ const wr_en_connections = cell.connections.WR_EN.slice(dev.bits * k, dev.bits * (k + 1));
842
+ if (wr_en_connections.some(z => z != '1')) {
843
+ port.enable_polarity = true;
844
+ if (wr_en_connections.every(z => z == wr_en_connections[0]))
845
+ port.no_bit_enable = true;
846
+ }
847
+ }
848
+ ;
849
+ dev.wrports.push(port);
850
+ }
851
+ break;
852
+ }
853
+ case '$lut':
854
+ assert(cell.connections.A.length == decode_json_number(cell.parameters.WIDTH));
855
+ assert(cell.connections.Y.length == 1);
856
+ assert(cell.port_directions.A == 'input');
857
+ assert(cell.port_directions.Y == 'output');
858
+ dev.abits = cell.connections.A.length;
859
+ dev.bits = cell.connections.Y.length;
860
+ dev.rdports = [{}];
861
+ dev.wrports = [];
862
+ dev.memdata = cell.parameters.LUT.split('').reverse();
863
+ assert(dev.memdata.length == Math.pow(2, dev.abits));
864
+ // Rewrite cell connections to be $mem compatible for port mapping
865
+ cell.connections.RD_ADDR = cell.connections.A;
866
+ cell.connections.RD_DATA = cell.connections.Y;
867
+ delete cell.connections.A;
868
+ delete cell.connections.Y;
869
+ break;
870
+ default:
871
+ }
872
+ if (dev.type == 'Dff') {
873
+ // find register initial value, if exists
874
+ // Yosys puts initial values in net attributes; there can be many for single actual net!
875
+ const nms = netnames.get(cell.connections.Q);
876
+ if (nms !== undefined) {
877
+ for (const nm of nms) {
878
+ if (mod.netnames[nm].attributes.init !== undefined)
879
+ dev.initial = decode_json_constant(mod.netnames[nm].attributes.init, dev.bits);
880
+ }
881
+ }
882
+ }
883
+ const portmap = portmaps[cell.type];
884
+ if (portmap)
885
+ connect_device(dname, cell, portmap);
886
+ else if (cell.type == '$pmux')
887
+ connect_pmux(dname, cell);
888
+ else if (cell.type == '$mem')
889
+ connect_mem(dname, cell, dev);
890
+ else if (cell.type == '$mem_v2')
891
+ connect_mem(dname, cell, dev);
892
+ else if (cell.type == '$lut')
893
+ connect_mem(dname, cell, dev);
894
+ else
895
+ throw Error('Invalid cell type: ' + cell.type);
896
+ }
897
+ // Group bits into nets for complex sources
898
+ for (const [nbits, net] of nets.entries()) {
899
+ if (net.source !== undefined)
900
+ continue;
901
+ const groups = [[]];
902
+ let pbitinfo = undefined;
903
+ for (const bit of nbits) {
904
+ let bitinfo = bits.get(bit);
905
+ if (bitinfo == undefined && constbit(bit))
906
+ bitinfo = 'const';
907
+ if (groups.slice(-1)[0].length > 0 &&
908
+ (typeof bitinfo != typeof pbitinfo ||
909
+ typeof bitinfo == 'object' &&
910
+ typeof pbitinfo == 'object' &&
911
+ (bitinfo.id != pbitinfo.id ||
912
+ bitinfo.port != pbitinfo.port ||
913
+ bitinfo.num != pbitinfo.num + 1))) {
914
+ groups.push([]);
915
+ }
916
+ groups.slice(-1)[0].push(bit);
917
+ pbitinfo = bitinfo;
918
+ }
919
+ if (groups.length == 1)
920
+ continue;
921
+ if (groups.slice(-1)[0].every(x => x == '0')) {
922
+ // infer zero-extend
923
+ const ilen = nbits.length - groups.slice(-1)[0].length;
924
+ const dname = add_device({
925
+ type: 'ZeroExtend',
926
+ extend: { output: nbits.length, input: ilen }
927
+ });
928
+ const zbits = nbits.slice(0, ilen);
929
+ add_net_source(nbits, dname, 'out');
930
+ add_net_target(zbits, dname, 'in');
931
+ if (groups.length > 2)
932
+ add_busgroup(zbits, groups.slice(0, groups.length - 1));
933
+ }
934
+ else
935
+ add_busgroup(nbits, groups);
936
+ }
937
+ // Add constants
938
+ for (const [nbits, net] of nets.entries()) {
939
+ if (net.source !== undefined)
940
+ continue;
941
+ if (!nbits.every(constbit))
942
+ continue;
943
+ const dname = add_device({
944
+ // label: String(val), // TODO
945
+ type: 'Constant',
946
+ constant: nbits.slice().reverse().join('')
947
+ });
948
+ add_net_source(nbits, dname, 'out');
949
+ }
950
+ // Select bits from complex targets
951
+ for (const [nbits, net] of nets.entries()) {
952
+ if (net.source !== undefined)
953
+ continue;
954
+ // constants should be already handled!
955
+ assert(nbits.every(x => constbit(x) || (typeof x == 'number' && x > 1)));
956
+ const bitinfos = nbits.map(x => bits.get(x));
957
+ if (!bitinfos.every(x => typeof x == 'object'))
958
+ continue; // ignore not fully driven ports
959
+ // complex sources should be already handled!
960
+ assert(bitinfos.every(info => info.id == bitinfos[0].id &&
961
+ info.port == bitinfos[0].port));
962
+ const cconn = devnets.get(bitinfos[0].id).get(bitinfos[0].port);
963
+ const dname = add_device({
964
+ type: 'BusSlice',
965
+ slice: {
966
+ first: bitinfos[0].num,
967
+ count: bitinfos.length,
968
+ total: cconn.length
969
+ }
970
+ });
971
+ add_net_source(nbits, dname, 'out');
972
+ add_net_target(cconn, dname, 'in');
973
+ }
974
+ // Generate connections between devices
975
+ for (const [nbits, net] of nets.entries()) {
976
+ if (net.source === undefined) {
977
+ console.warn('Undriven net in ' + name + ': ' + nbits);
978
+ continue;
979
+ }
980
+ let first = true;
981
+ for (const target in net.targets) {
982
+ const conn = {
983
+ to: net.targets[target],
984
+ from: net.source
985
+ };
986
+ if (net.name)
987
+ conn.name = net.name;
988
+ if (net.source_positions)
989
+ conn.source_positions = net.source_positions;
990
+ if (!first && mout.devices[conn.from.id].type == "Constant") {
991
+ // replicate constants for better clarity
992
+ const dname = add_device({
993
+ type: 'Constant',
994
+ constant: mout.devices[conn.from.id].constant
995
+ });
996
+ conn.from = { id: dname, port: 'out' };
997
+ }
998
+ mout.connectors.push(conn);
999
+ first = false;
1000
+ }
1001
+ }
1002
+ return mout;
1003
+ }
1004
+ function yosys2digitaljs(obj, options = {}) {
1005
+ const portmaps = order_ports(obj);
1006
+ const out = yosys_to_digitaljs(obj, portmaps, options);
1007
+ const toporder = topsort(module_deps(obj));
1008
+ toporder.pop();
1009
+ const toplevel = toporder.pop();
1010
+ const output = Object.assign({ subcircuits: {} }, out[toplevel]);
1011
+ for (const x of toporder)
1012
+ output.subcircuits[x] = out[x];
1013
+ return output;
1014
+ }
1015
+ function io_ui(output) {
1016
+ for (const [name, dev] of Object.entries(output.devices)) {
1017
+ if (dev.type == 'Input' || dev.type == 'Output') {
1018
+ dev.label = dev.net;
1019
+ }
1020
+ // use clock for clocky named inputs
1021
+ if (dev.type == 'Input' && dev.bits == 1 && (dev.label == 'clk' || dev.label == 'clock')) {
1022
+ dev.type = 'Clock';
1023
+ dev.propagation = 100;
1024
+ }
1025
+ if (dev.type == 'Input')
1026
+ dev.type = dev.bits == 1 ? 'Button' : 'NumEntry';
1027
+ if (dev.type == 'Output') {
1028
+ if (dev.bits == 1)
1029
+ dev.type = 'Lamp';
1030
+ else if (dev.bits == 8 && (dev.label == 'display7' || dev.label.startsWith('display7_')))
1031
+ dev.type = 'Display7';
1032
+ else
1033
+ dev.type = 'NumDisplay';
1034
+ }
1035
+ }
1036
+ }