nucleation 0.10.4 → 0.10.8

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package/Design.d.ts ADDED
@@ -0,0 +1,348 @@
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+ // generated by diplomat-tool
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+ import type { NucleationError } from "./NucleationError.mjs"
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+ import type { Schematic } from "./Schematic.mjs"
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+ import type { pointer, codepoint } from "./diplomat-runtime.d.ts";
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+
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+
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+
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+ /**
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+ * A composition document: loose blocks + cell instances + bus layers
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+ * over a shared coordinate space.
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+ */
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+ export class Design {
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+ /** @internal */
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+ get ffiValue(): pointer;
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+ /** @internal */
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+ constructor();
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+
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+
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+ /**
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+ * An empty design.
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+ */
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+ static create(name: string): Design;
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+
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+ /**
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+ * A design whose loose block layer is a copy of `base` (endpoint
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+ * hardware placed with raw `set_block`).
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+ */
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+ static forSchematic(name: string, base: Schematic): Design;
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+
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+ /**
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+ * Register a library cell; its contract is resolved from the
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+ * schematic (embedded metadata first, Insign signs as fallback)
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+ * and registration fails loudly when no source defines one.
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+ * Writes resolution warnings as a JSON array of strings.
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+ */
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+ addCell(name: string, cell: Schematic): string;
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+
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+ /**
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+ * Place an instance layer referencing a library cell. `rot_y` is
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+ * in degrees, a multiple of 90.
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+ */
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+ place(name: string, cell: string, x: number, y: number, z: number, rotY: number): void;
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+
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+ /**
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+ * Declare a drivable input port: anchor = bit-0 connection cell,
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+ * step to the next bit, `width` bits of `ty` (`"uint"` or
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+ * `"bool"`). The hardware is scanned (adjacent lever per bit) and
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+ * validated loudly.
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+ */
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+ declareInput(name: string, ax: number, ay: number, az: number, sx: number, sy: number, sz: number, width: number, ty: string): void;
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+
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+ /**
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+ * Declare a readable output port (adjacent lamp per bit); same
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+ * shape as `declare_input`.
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+ */
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+ declareOutput(name: string, ax: number, ay: number, az: number, sx: number, sy: number, sz: number, width: number, ty: string): void;
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+
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+ /**
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+ * Declare AND realize a bus. `sinks_json` is a JSON array of port
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+ * names; `gates_json` an array of `{"name", "anchor": [x,y,z],
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+ * "step": [x,y,z]}` (pass `[]` for none); `style_json` an object
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+ * with optional `bus_block` / `transparent_block`. Declaration
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+ * errors are error returns; geometric unroutability is the
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+ * written STATE: `"routed"` or `"failed: reason"` — realization
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+ * is atomic, never half-routed.
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+ */
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+ routeBus(name: string, driver: string, sinksJson: string, gatesJson: string, styleJson: string): string;
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+
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+ /**
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+ * Declare AND realize a wired-OR bus: `drivers_json` is a JSON
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+ * array of port names — multiple drivers are legal ONLY through
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+ * this explicit merge (`merge="or"`). Extra drivers join the
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+ * trunk as diode-isolated dust-merge branches; the LVS intent
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+ * stays ONE net per bit. Same shapes as `route_bus` otherwise.
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+ */
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+ routeBusOr(name: string, driversJson: string, sinksJson: string, gatesJson: string, styleJson: string): string;
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+
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+ /**
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+ * Edit the loose block layer: plain `set_block` on the base
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+ * schematic (participates in occupancy and flatten).
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+ */
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+ setBlock(x: number, y: number, z: number, block: string): void;
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+
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+ /**
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+ * Drag an instance layer to a new position/rotation. The move
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+ * itself ALWAYS succeeds (the document's truth); the affected bus
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+ * set — fragments intersecting the old or new footprint +
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+ * influence halo, plus every already-failed bus — is ripped and
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+ * co-rerouted deterministically with bounded retry rounds.
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+ * Writes `{"rerouted": [...], "failed": {name: reason}}`.
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+ */
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+ moveInstance(name: string, x: number, y: number, z: number, rotY: number): string;
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+
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+ /**
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+ * Remove an instance layer. Buses that terminate on one of its
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+ * ports are DELETED (they lost an endpoint); buses that merely
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+ * crossed its space are ripped and co-rerouted. Writes
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+ * `{"removed_buses": [...], "rerouted": [...], "failed": {...}}`.
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+ */
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+ removeInstance(name: string): string;
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+
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+ /**
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+ * Re-realize a bus from its stored declaration (the counterpart to
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+ * `rip`); writes the resulting bus state.
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+ */
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+ reroute(name: string): string;
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+
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+ /**
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+ * Delete a bus outright — fragment AND declaration, freeing the
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+ * name. `rip` keeps the declaration so the bus can be rerouted.
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+ */
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+ removeBus(name: string): void;
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+
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+ /**
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+ * The flattened artifact as `.schem` bytes, base64. Unlike
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+ * `flatten()` + the schematic writer, this composites the layer
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+ * stack into ONE region first: `.schem` has no layers, and the
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+ * region merge drops named-layer cells that the loose layer's
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+ * bounding box shadows.
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+ */
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+ toSchemB64(): string;
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+
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+ /**
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+ * The flattened artifact composited into ONE region (see
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+ * `to_schem_b64`) — the shape an interchange export wants.
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+ */
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+ flattenComposite(): Schematic;
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+
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+ /**
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+ * Every routing endpoint the placed instances expose, as a JSON
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+ * array of `{name, instance, port, role, ty, width, hardware,
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+ * wires, step, routable, blocked}`. `name` is `{instance}.{port}`
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+ * — exactly what `route_bus` accepts; `role` is the CELL-facing
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+ * direction, so `"output"` drives a bus and `"input"` receives
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+ * one. A port whose bits have no dust connection cell (a lever
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+ * input, say) reports `routable: false` and why in `blocked`.
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+ */
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+ instancePorts(): string;
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+
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+ /**
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+ * Switch a port between executor hardware and a routable dust input.
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+ *
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+ * `mode` is `"bus"` or `"executor"`. Community cells name LEVERS for
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+ * their inputs and nothing in redstone drives a lever, so a port must
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+ * be in `"bus"` mode before a bus can land on it. The switch is a
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+ * reversible per-instance patch — `"executor"` restores the shipped
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+ * blocks byte-exactly.
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+ *
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+ * Returns the report as JSON: `{port, mode, note, changed:[{at,from,
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+ * to}], removed_buses, moves, patch}` — `note` is a ready-made toast
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+ * and `changed` is in WORLD coordinates.
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+ */
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+ setPortMode(instance: string, port: string, mode: string): string;
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+
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+ /**
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+ * Every port whose mode has been switched, as JSON:
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+ * `[{"name":"u0.bin","mode":"bus","patch":{..}}]`. Ports absent from
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+ * the array are in `"executor"` mode.
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+ */
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+ portModes(): string;
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+
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+ /**
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+ * Describe (without applying) what switching a port to `"bus"` mode
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+ * would do: `{"wires","hardware","step","removed","added","pivoted",
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+ * "note"}`. Errors when the port cannot be promoted, with the reason.
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+ */
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+ planPortPromotion(instance: string, port: string): string;
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+
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+ /**
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+ * Resolve one routing endpoint name — a declared design port or an
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+ * instance port `{instance}.{port}` — to the geometry a bus would
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+ * use: `{"name","anchor","step","width","direction","connectable"}`.
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+ * `direction` is DESIGN-facing (`"input"` drives buses).
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+ */
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+ resolvePort(name: string): string;
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+
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+ /**
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+ * Add a gate to an existing bus (splitting the segment it lands
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+ * in) and re-realize it. Writes the resulting bus state.
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+ */
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+ addGate(bus: string, gate: string, x: number, y: number, z: number, sx: number, sy: number, sz: number): string;
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+
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+ /**
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+ * Drag a gate: the anchor moves unconditionally, then EXACTLY the
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+ * two adjacent segments are ripped and rerouted atomically. An
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+ * unroutable move leaves the bus `failed: reason` — visible,
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+ * never half-routed. Writes `{"state": "...",
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+ * "rerouted_segments": n, "changed": [layer, ...]}`, where `changed`
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+ * is the COMPLETE redraw set (see `changed_layers_since`).
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+ */
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+ moveGate(bus: string, gate: string, x: number, y: number, z: number): string;
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+
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+ /**
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+ * Remove a gate by index and re-realize the bus, so the two spans it
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+ * separated MERGE and route as one — removing a checkpoint relaxes a
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+ * constraint, so the result is shorter and straighter, not the two old
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+ * legs stitched together. Writes the same JSON as `move_gate`:
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+ * `{"state", "rerouted_segments", "changed"}`.
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+ */
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+ removeGate(bus: string, index: number): string;
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+
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+ /**
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+ * Undo a design port declaration. Removing an ENDPOINT changes the
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+ * netlist, so every bus that named it is deleted — pass `force=false`
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+ * first to be refused with the list and confirm. An instance port is
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+ * derived from its cell's contract; use `set_port_mode` there.
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+ *
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+ * Writes `{"removed_buses":[...],"rerouted":[...],"failed":{...},
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+ * "changed":[...]}`.
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+ */
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+ removePort(name: string, force: boolean): string;
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+
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+ /**
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+ * Declare and route a bus with an explicit WIDTH-ADAPTATION policy, so
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+ * a narrower word can drive a wider port.
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+ *
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+ * `align`: 0 = lsb (bit 0 to bit 0, magnitude preserved), 1 = msb (top
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+ * bit to top bit — a shift up by the width difference), 2 = use
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+ * `shift` verbatim (positive moves toward the MSB). `truncate` permits
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+ * DROPPING source bits that fall outside the destination; without it a
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+ * lossy connection is refused, because losing a word's high bits is not
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+ * the router's call. Destination bits nothing drives read 0 with no
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+ * hardware at all.
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+ *
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+ * Writes the resulting bus state; `bus_width_map` reports the mapping.
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+ */
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+ routeBusAdapted(name: string, driver: string, sinksCsv: string, gatesJson: string, styleJson: string, align: number, shift: number, truncate: boolean): string;
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+
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+ /**
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+ * The resolved bit mapping of a width-adapted bus (`null` when the
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+ * widths matched): `{"map":{...,"pairs":[[dbit,sbit],..]},"note":".."}`.
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+ */
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+ busWidthMap(name: string): string;
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+
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+ /**
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+ * The current bus-layer GEOMETRY REVISION. Read it before a mutating
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+ * call, pass it to `changed_layers_since` after, and redraw exactly
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+ * the layers named.
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+ */
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+ layerRevision(): bigint;
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+
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+ /**
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+ * The COMPLETE set of bus layers whose geometry was rewritten since
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+ * `rev`, as a JSON array of names.
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+ *
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+ * This is the contract a viewer must trust: it is stamped at every
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+ * write to a layer's fragment, so it also names layers changed
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+ * INDIRECTLY — a crossing stamps a through-bus station into a bus
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+ * that was never ripped and appears in no other report. It also names
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+ * DELETED layers (a name here that `bus_state` no longer knows means
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+ * drop the mesh). `route_bus`, which returns only a state, is covered
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+ * by this too: bracket it with `layer_revision`.
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+ */
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+ changedLayersSince(rev: bigint): string;
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+
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+ /**
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+ * Attach a net-class discipline to a bus (JSON `NetClassRule`:
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+ * optional `max_len_rt` delay budget, `y_band` layer band, …);
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+ * `check()` enforces it.
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+ */
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+ setBusRule(bus: string, ruleJson: string): void;
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+
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+ /**
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+ * Per-bus skew from the routed fragment: writes
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+ * `{"per_bit_rt": [...], "skew_rt": n, "max_rt": n}`.
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+ */
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+ busSkew(name: string): string;
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+
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+ /**
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+ * The lifecycle state of a bus: `"intended"`, `"routed"` or
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+ * `"failed: reason"`.
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+ */
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+ busState(name: string): string;
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+
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+ /**
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+ * ONE bus layer's cells as `[[x,y,z,"block"],..]`.
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+ *
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+ * The live-re-route fast path: `flatten()` rebuilds every layer in the
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+ * document to answer "what changed about this one bus". An unrouted bus
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+ * yields `[]`.
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+ */
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+ busBlocksJson(name: string): string;
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+
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+ /**
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+ * ONE instance's placed cells as `[[x,y,z,"block"],..]`, transform
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+ * applied. Same fast path as `bus_blocks_json`.
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+ */
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+ instanceBlocksJson(name: string): string;
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+
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+ /**
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+ * Rip a bus: clear its fragment, back to `intended`.
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+ */
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+ rip(name: string): void;
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+
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+ /**
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+ * Collapse the layer stack into ONE self-describing schematic:
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+ * named regions per layer (`inst:x`, `bus:y`) and the merged
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+ * contract embedded in the metadata — itself placeable as a cell.
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+ */
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+ flatten(): Schematic;
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+
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+ /**
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+ * DRC + LVS over the flattened artifact. Writes `{"clean",
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+ * "drc": [...], "lvs": {...}, "buses": {...}}`.
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+ */
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+ check(): string;
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+
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+ /**
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+ * Settle the flattened artifact in the vanilla-accurate tick
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+ * engine and return it with every settled state written back and
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+ * `InitialState::Baked` stamped into the embedded contract (needs
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+ * the `mc-tick` feature, else errors).
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+ */
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+ bake(budget: number): Schematic;
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+
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+ /**
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+ * Serialize the FULL design document to `.nucm` project-tier
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+ * bytes (magic `NUCM`): cells deduped by content hash, instance
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+ * transforms, ports with scanned hardware, every bus layer with
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+ * its fragment, runs and `intended`/`routed`/`failed: reason`
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+ * state, and the loose base layer. Base64 across the bridge.
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+ */
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+ toNucmB64(): string;
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+
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+ /**
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+ * Reopen a `.nucm` design document from raw bytes. The reloaded
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+ * design is the same model mid-edit: rerouting works.
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+ */
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+ static fromNucm(data: Array<number>): Design;
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+
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+ /**
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+ * Export the design as a LAYERED `.litematic` (interchange tier):
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+ * one named region per layer (`inst:{name}`, `bus:{name}`, loose
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+ * base) plus the design manifest as a root-level
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+ * `NucleationDesign` tag. Opens in Litematica as a plain
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+ * multi-region litematic; reimports as a design whose cell
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+ * references have degraded to embedded copies. Base64 across the
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+ * bridge.
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+ */
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+ toLitematicB64(): string;
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+
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+ /**
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+ * Import a layered `.litematic` (with a `NucleationDesign`
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+ * manifest) from raw bytes; a plain litematic errors loudly —
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+ * open those with `Schematic.from_litematic`.
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+ */
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+ static fromLitematic(data: Array<number>): Design;
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+ }