@zigc/lib 0.17.0-dev.340 → 0.17.0-dev.387

package/std/debug/cpu_context.zig

@@ -5,6 +5,7 @@ pub const Native = if (@hasDecl(root, "debug") and @hasDecl(root.debug, "CpuCont
     root.debug.CpuContext
 else switch (native_arch) {
     .aarch64, .aarch64_be => Aarch64,
+    .alpha => Alpha,
     .arc, .arceb => Arc,
     .arm, .armeb, .thumb, .thumbeb => Arm,
     .csky => Csky,
@@ -13,6 +14,7 @@ else switch (native_arch) {
     .lanai => Lanai,
     .loongarch32, .loongarch64 => LoongArch,
     .m68k => M68k,
+    .m88k => M88k,
     .mips, .mipsel, .mips64, .mips64el => Mips,
     .or1k => Or1k,
     .powerpc, .powerpcle, .powerpc64, .powerpc64le => Powerpc,
@@ -61,6 +63,13 @@ pub fn fromPosixSignalContext(ctx_ptr: ?*const anyopaque) ?Native {
             },
             .pc = @truncate(uc.mcontext.pc),
         };
+    } else if (native_arch == .m88k and native_os == .openbsd) {
+        // OpenBSD makes no effort to clear the V and E bits of the SXIP register when presenting it
+        // to user space, so we need to do that here.
+        return .{
+            .r = uc.mcontext.r,
+            .xip = uc.mcontext.xip & ~@as(u32, 0b11),
+        };
     } else if (native_arch.isMIPS32() and native_os == .linux) {
         // The O32 kABI uses 64-bit fields for some reason.
         return .{
@@ -103,6 +112,10 @@ pub fn fromPosixSignalContext(ctx_ptr: ?*const anyopaque) ?Native {
             .sp = uc.mcontext.sp,
             .pc = uc.mcontext.pc,
         },
+        .alpha => .{
+            .r = uc.mcontext.r,
+            .pc = uc.mcontext.pc,
+        },
         .csky => .{
             .r = uc.mcontext.r0_13 ++
                 [_]u32{ uc.mcontext.r14, uc.mcontext.r15 } ++
@@ -293,6 +306,75 @@ const Aarch64 = extern struct {
     }
 };
 
+const Alpha = extern struct {
+    /// The numbered general-purpose registers R0 - R31.
+    r: [32]u64,
+    pc: u64,
+
+    pub inline fn current() Alpha {
+        var ctx: Alpha = undefined;
+        asm volatile (
+            \\ stq $0 , 0x000($0)
+            \\ stq $1 , 0x008($0)
+            \\ stq $2 , 0x010($0)
+            \\ stq $3 , 0x018($0)
+            \\ stq $4 , 0x020($0)
+            \\ stq $5 , 0x028($0)
+            \\ stq $6 , 0x030($0)
+            \\ stq $7 , 0x038($0)
+            \\ stq $8 , 0x040($0)
+            \\ stq $9 , 0x048($0)
+            \\ stq $10, 0x050($0)
+            \\ stq $11, 0x058($0)
+            \\ stq $12, 0x060($0)
+            \\ stq $13, 0x068($0)
+            \\ stq $14, 0x070($0)
+            \\ stq $15, 0x078($0)
+            \\ stq $16, 0x080($0)
+            \\ stq $17, 0x088($0)
+            \\ stq $18, 0x090($0)
+            \\ stq $19, 0x098($0)
+            \\ stq $20, 0x0a0($0)
+            \\ stq $21, 0x0a8($0)
+            \\ stq $22, 0x0b0($0)
+            \\ stq $23, 0x0b8($0)
+            \\ stq $24, 0x0c0($0)
+            \\ stq $25, 0x0c8($0)
+            \\ stq $26, 0x0d0($0)
+            \\ stq $27, 0x0d8($0)
+            \\ stq $28, 0x0e0($0)
+            \\ stq $29, 0x0e8($0)
+            \\ stq $30, 0x0f0($0)
+            \\
+            \\ br $1, 1f
+            \\1:
+            \\ stq $1, 0x100($0)
+            :
+            : [ctx] "{r0}" (&ctx),
+            : .{ .r1 = true, .memory = true });
+        return ctx;
+    }
+
+    pub fn getFp(ctx: *const Alpha) u64 {
+        return ctx.r[15];
+    }
+    pub fn getPc(ctx: *const Alpha) u64 {
+        return ctx.pc;
+    }
+
+    pub fn dwarfRegisterBytes(ctx: *Aarch64, register_num: u16) DwarfRegisterError![]u8 {
+        switch (register_num) {
+            0...31 => return @ptrCast(&ctx.r[register_num]),
+            64 => return @ptrCast(&ctx.pc),
+
+            32...63 => return error.UnsupportedRegister, // f0 - f31
+            66 => return error.UnsupportedRegister, // uniq
+
+            else => return error.InvalidRegister,
+        }
+    }
+};
+
 /// This is an `extern struct` so that inline assembly in `current` can use field offsets.
 const Arc = extern struct {
     /// The numbered general-purpose registers r0 - r31.
@@ -820,6 +902,75 @@ const M68k = extern struct {
     }
 };
 
+/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
+const M88k = extern struct {
+    /// The numbered general-purpose registers r0 - r31.
+    r: [32]u32,
+    xip: u32,
+
+    pub inline fn current() M88k {
+        var ctx: M88k = undefined;
+        asm volatile (
+            \\ st %%r0, %%r2, 0
+            \\ st %%r1, %%r2, 4
+            \\ st %%r2, %%r2, 8
+            \\ st %%r3, %%r2, 12
+            \\ st %%r4, %%r2, 16
+            \\ st %%r5, %%r2, 20
+            \\ st %%r6, %%r2, 24
+            \\ st %%r7, %%r2, 28
+            \\ st %%r8, %%r2, 32
+            \\ st %%r9, %%r2, 36
+            \\ st %%r10, %%r2, 40
+            \\ st %%r11, %%r2, 44
+            \\ st %%r12, %%r2, 48
+            \\ st %%r13, %%r2, 52
+            \\ st %%r14, %%r2, 56
+            \\ st %%r15, %%r2, 60
+            \\ st %%r16, %%r2, 64
+            \\ st %%r17, %%r2, 68
+            \\ st %%r18, %%r2, 72
+            \\ st %%r19, %%r2, 76
+            \\ st %%r20, %%r2, 80
+            \\ st %%r21, %%r2, 84
+            \\ st %%r22, %%r2, 88
+            \\ st %%r23, %%r2, 92
+            \\ st %%r24, %%r2, 96
+            \\ st %%r25, %%r2, 100
+            \\ st %%r26, %%r2, 104
+            \\ st %%r27, %%r2, 108
+            \\ st %%r28, %%r2, 112
+            \\ st %%r29, %%r2, 116
+            \\ st %%r30, %%r2, 120
+            \\ st %%r31, %%r2, 124
+            \\ bsr.n 1f
+            \\1:
+            \\ st %%r1, %%r2, 128
+            :
+            : [ctx] "{r2}" (&ctx),
+            : .{ .r1 = true, .memory = true });
+        return ctx;
+    }
+
+    pub fn getFp(ctx: *const M88k) u32 {
+        return ctx.r[30];
+    }
+    pub fn getPc(ctx: *const M88k) u32 {
+        return ctx.xip;
+    }
+
+    pub fn dwarfRegisterBytes(ctx: *M88k, register_num: u16) DwarfRegisterError![]u8 {
+        switch (register_num) {
+            0...31 => return @ptrCast(&ctx.r[register_num]),
+            64 => return @ptrCast(&ctx.xip),
+
+            32...63 => return error.UnsupportedRegister, // x0 - x31
+
+            else => return error.InvalidRegister,
+        }
+    }
+};
+
 /// This is an `extern struct` so that inline assembly in `current` can use field offsets.
 const Mips = extern struct {
     /// The numbered general-purpose registers r0 - r31. r0 must be zero.
@@ -2256,9 +2407,11 @@ const signal_ucontext_t = switch (native_os) {
         .alpha => extern struct {
             _cookie: i64,
             _mask: i64,
-            pc: u64,
-            _ps: i64,
-            r: [32]u64,
+            mcontext: extern struct {
+                pc: u64,
+                _ps: i64,
+                r: [32]u64,
+            },
         },
         // https://github.com/openbsd/src/blob/42468faed8369d07ae49ae02dd71ec34f59b66cd/sys/arch/arm/include/signal.h
         .arm => extern struct {
@@ -2287,6 +2440,18 @@ const signal_ucontext_t = switch (native_os) {
             r23_29: [7]u32,
             r31: u32,
         },
+        // https://github.com/openbsd/src/blob/42468faed8369d07ae49ae02dd71ec34f59b66cd/sys/arch/m88k/include/signal.h
+        .m88k => extern struct {
+            _cookie: i32,
+            _mask: i32,
+            mcontext: extern struct {
+                r: [32]u32,
+                _epsr: u32,
+                _fpsr: u32,
+                _fpcr: u32,
+                xip: u32,
+            },
+        },
         // https://github.com/openbsd/src/blob/42468faed8369d07ae49ae02dd71ec34f59b66cd/sys/arch/mips64/include/signal.h
         .mips64, .mips64el => extern struct {
             _cookie: i64,

package/std/debug.zig

@@ -495,7 +495,7 @@ pub fn defaultPanic(msg: []const u8, first_trace_addr: ?usize) noreturn {
     if (use_trap_panic) @trap();
 
     switch (builtin.os.tag) {
-        .freestanding, .other, .@"3ds", .vita => {
+        .freestanding, .other, .@"3ds", .psp, .vita => {
             @trap();
         },
         .uefi => {

package/std/heap.zig

@@ -608,6 +608,7 @@ const page_size_min_default: ?usize = switch (builtin.os.tag) {
         .hppa => 4 << 10,
         .x86, .x86_64 => 4 << 10,
         .thumb, .thumbeb, .arm, .armeb, .aarch64, .aarch64_be => 4 << 10,
+        .m88k => 4 << 10,
         .mips64, .mips64el => 4 << 10,
         .powerpc, .powerpc64, .powerpc64le, .powerpcle => 4 << 10,
         .riscv64 => 4 << 10,
@@ -771,6 +772,7 @@ const page_size_max_default: ?usize = switch (builtin.os.tag) {
         .hppa => 4 << 10,
         .x86, .x86_64 => 4 << 10,
         .thumb, .thumbeb, .arm, .armeb, .aarch64, .aarch64_be => 4 << 10,
+        .m88k => 4 << 10,
         .mips64, .mips64el => 16 << 10,
         .powerpc, .powerpc64, .powerpc64le, .powerpcle => 4 << 10,
         .riscv64 => 4 << 10,

package/std/lang/assembly.zig

@@ -1553,6 +1553,77 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {
         r14: bool = false,
         r15: bool = false,
     },
+    .m88k => packed struct {
+        /// Whether the inline assembly code may perform stores to memory
+        /// addresses other than those derived from input pointer provenance.
+        memory: bool = false,
+
+        r0: bool = false,
+        r1: bool = false,
+        r2: bool = false,
+        r3: bool = false,
+        r4: bool = false,
+        r5: bool = false,
+        r6: bool = false,
+        r7: bool = false,
+        r8: bool = false,
+        r9: bool = false,
+        r10: bool = false,
+        r11: bool = false,
+        r12: bool = false,
+        r13: bool = false,
+        r14: bool = false,
+        r15: bool = false,
+        r16: bool = false,
+        r17: bool = false,
+        r18: bool = false,
+        r19: bool = false,
+        r20: bool = false,
+        r21: bool = false,
+        r22: bool = false,
+        r23: bool = false,
+        r24: bool = false,
+        r25: bool = false,
+        r26: bool = false,
+        r27: bool = false,
+        r28: bool = false,
+        r29: bool = false,
+        r30: bool = false,
+        r31: bool = false,
+
+        x0: bool = false,
+        x1: bool = false,
+        x2: bool = false,
+        x3: bool = false,
+        x4: bool = false,
+        x5: bool = false,
+        x6: bool = false,
+        x7: bool = false,
+        x8: bool = false,
+        x9: bool = false,
+        x10: bool = false,
+        x11: bool = false,
+        x12: bool = false,
+        x13: bool = false,
+        x14: bool = false,
+        x15: bool = false,
+        x16: bool = false,
+        x17: bool = false,
+        x18: bool = false,
+        x19: bool = false,
+        x20: bool = false,
+        x21: bool = false,
+        x22: bool = false,
+        x23: bool = false,
+        x24: bool = false,
+        x25: bool = false,
+        x26: bool = false,
+        x27: bool = false,
+        x28: bool = false,
+        x29: bool = false,
+        x30: bool = false,
+        x31: bool = false,
+    },
     .m68k => packed struct {
         /// Whether the inline assembly code may perform stores to memory
         /// addresses other than those derived from input pointer provenance.

package/std/lang.zig

@@ -292,6 +292,8 @@ pub const CallingConvention = union(enum(u8)) {
     m68k_rtd: CommonOptions,
     m68k_interrupt: CommonOptions,
 
+    m88k_sysv: CommonOptions,
+
     /// The standard `microblaze`/`microblazeel` calling convention.
     microblaze_std: CommonOptions,
     microblaze_interrupt: MicroblazeInterruptOptions,

package/std/os/linux/alpha.zig

@@ -0,0 +1,358 @@
+const builtin = @import("builtin");
+const std = @import("../../std.zig");
+const SYS = std.os.linux.SYS;
+
+pub fn syscall0(number: SYS) u64 {
+    return asm volatile (
+        \\ callsys
+        \\ beq $19, 1f
+        \\ negq $0, $0
+        \\1:
+        : [ret] "={$0}" (-> u64),
+        : [number] "{$0}" (number),
+        : .{
+          .r1 = true,
+          .r2 = true,
+          .r3 = true,
+          .r4 = true,
+          .r5 = true,
+          .r6 = true,
+          .r7 = true,
+          .r8 = true,
+          .r22 = true,
+          .r23 = true,
+          .r24 = true,
+          .r25 = true,
+          .r27 = true,
+          .r28 = true,
+          .memory = true,
+          .r16 = true,
+          .r17 = true,
+          .r18 = true,
+          .r20 = true,
+          .r21 = true,
+        });
+}
+
+pub fn syscall1(number: SYS, arg1: u64) u64 {
+    // These registers are both inputs and clobbers.
+    var r16_out: u64 = undefined;
+    return asm volatile (
+        \\ callsys
+        \\ beq $19, 1f
+        \\ negq $0, $0
+        \\1:
+        : [ret] "={$0}" (-> u64),
+          [r16_out] "={$16}" (r16_out),
+        : [number] "{$0}" (number),
+          [arg1] "{$16}" (arg1),
+        : .{
+          .r1 = true,
+          .r2 = true,
+          .r3 = true,
+          .r4 = true,
+          .r5 = true,
+          .r6 = true,
+          .r7 = true,
+          .r8 = true,
+          .r22 = true,
+          .r23 = true,
+          .r24 = true,
+          .r25 = true,
+          .r27 = true,
+          .r28 = true,
+          .memory = true,
+          .r17 = true,
+          .r18 = true,
+          .r20 = true,
+          .r21 = true,
+        });
+}
+
+pub fn syscall2(number: SYS, arg1: u64, arg2: u64) u64 {
+    // These registers are both inputs and clobbers.
+    var r16_out: u64 = undefined;
+    var r17_out: u64 = undefined;
+    return asm volatile (
+        \\ callsys
+        \\ beq $19, 1f
+        \\ negq $0, $0
+        \\1:
+        : [ret] "={$0}" (-> u64),
+          [r16_out] "={$16}" (r16_out),
+          [r17_out] "={$17}" (r17_out),
+        : [number] "{$0}" (number),
+          [arg1] "{$16}" (arg1),
+          [arg2] "{$17}" (arg2),
+        : .{
+          .r1 = true,
+          .r2 = true,
+          .r3 = true,
+          .r4 = true,
+          .r5 = true,
+          .r6 = true,
+          .r7 = true,
+          .r8 = true,
+          .r22 = true,
+          .r23 = true,
+          .r24 = true,
+          .r25 = true,
+          .r27 = true,
+          .r28 = true,
+          .memory = true,
+          .r18 = true,
+          .r20 = true,
+          .r21 = true,
+        });
+}
+
+pub fn syscall3(number: SYS, arg1: u64, arg2: u64, arg3: u64) u64 {
+    // These registers are both inputs and clobbers.
+    var r16_out: u64 = undefined;
+    var r17_out: u64 = undefined;
+    var r18_out: u64 = undefined;
+    return asm volatile (
+        \\ callsys
+        \\ beq $19, 1f
+        \\ negq $0, $0
+        \\1:
+        : [ret] "={$0}" (-> u64),
+          [r16_out] "={$16}" (r16_out),
+          [r17_out] "={$17}" (r17_out),
+          [r18_out] "={$18}" (r18_out),
+        : [number] "{$0}" (number),
+          [arg1] "{$16}" (arg1),
+          [arg2] "{$17}" (arg2),
+          [arg3] "{$18}" (arg3),
+        : .{
+          .r1 = true,
+          .r2 = true,
+          .r3 = true,
+          .r4 = true,
+          .r5 = true,
+          .r6 = true,
+          .r7 = true,
+          .r8 = true,
+          .r22 = true,
+          .r23 = true,
+          .r24 = true,
+          .r25 = true,
+          .r27 = true,
+          .r28 = true,
+          .memory = true,
+          .r20 = true,
+          .r21 = true,
+        });
+}
+
+pub fn syscall4(number: SYS, arg1: u64, arg2: u64, arg3: u64, arg4: u64) u64 {
+    // These registers are both inputs and clobbers.
+    var r16_out: u64 = undefined;
+    var r17_out: u64 = undefined;
+    var r18_out: u64 = undefined;
+    var r19_out: u64 = undefined;
+    return asm volatile (
+        \\ callsys
+        \\ beq $19, 1f
+        \\ negq $0, $0
+        \\1:
+        : [ret] "={$0}" (-> u64),
+          [r16_out] "={$16}" (r16_out),
+          [r17_out] "={$17}" (r17_out),
+          [r18_out] "={$18}" (r18_out),
+          [r19_out] "={$19}" (r19_out),
+        : [number] "{$0}" (number),
+          [arg1] "{$16}" (arg1),
+          [arg2] "{$17}" (arg2),
+          [arg3] "{$18}" (arg3),
+          [arg4] "{$19}" (arg4),
+        : .{
+          .r1 = true,
+          .r2 = true,
+          .r3 = true,
+          .r4 = true,
+          .r5 = true,
+          .r6 = true,
+          .r7 = true,
+          .r8 = true,
+          .r22 = true,
+          .r23 = true,
+          .r24 = true,
+          .r25 = true,
+          .r27 = true,
+          .r28 = true,
+          .memory = true,
+          .r20 = true,
+          .r21 = true,
+        });
+}
+
+pub fn syscall5(number: SYS, arg1: u64, arg2: u64, arg3: u64, arg4: u64, arg5: u64) u64 {
+    // These registers are both inputs and clobbers.
+    var r16_out: u64 = undefined;
+    var r17_out: u64 = undefined;
+    var r18_out: u64 = undefined;
+    var r19_out: u64 = undefined;
+    var r20_out: u64 = undefined;
+    return asm volatile (
+        \\ callsys
+        \\ beq $19, 1f
+        \\ negq $0, $0
+        \\1:
+        : [ret] "={$0}" (-> u64),
+          [r16_out] "={$16}" (r16_out),
+          [r17_out] "={$17}" (r17_out),
+          [r18_out] "={$18}" (r18_out),
+          [r19_out] "={$19}" (r19_out),
+          [r20_out] "={$20}" (r20_out),
+        : [number] "{$0}" (number),
+          [arg1] "{$16}" (arg1),
+          [arg2] "{$17}" (arg2),
+          [arg3] "{$18}" (arg3),
+          [arg4] "{$19}" (arg4),
+          [arg5] "{$20}" (arg5),
+        : .{
+          .r1 = true,
+          .r2 = true,
+          .r3 = true,
+          .r4 = true,
+          .r5 = true,
+          .r6 = true,
+          .r7 = true,
+          .r8 = true,
+          .r22 = true,
+          .r23 = true,
+          .r24 = true,
+          .r25 = true,
+          .r27 = true,
+          .r28 = true,
+          .memory = true,
+          .r21 = true,
+        });
+}
+
+pub fn syscall6(
+    number: SYS,
+    arg1: u64,
+    arg2: u64,
+    arg3: u64,
+    arg4: u64,
+    arg5: u64,
+    arg6: u64,
+) u64 {
+    // These registers are both inputs and clobbers.
+    var r16_out: u64 = undefined;
+    var r17_out: u64 = undefined;
+    var r18_out: u64 = undefined;
+    var r19_out: u64 = undefined;
+    var r20_out: u64 = undefined;
+    var r21_out: u64 = undefined;
+    return asm volatile (
+        \\ callsys
+        \\ beq $19, 1f
+        \\ negq $0, $0
+        \\1:
+        : [ret] "={$0}" (-> u64),
+          [r16_out] "={$16}" (r16_out),
+          [r17_out] "={$17}" (r17_out),
+          [r18_out] "={$18}" (r18_out),
+          [r19_out] "={$19}" (r19_out),
+          [r20_out] "={$20}" (r20_out),
+          [r21_out] "={$21}" (r21_out),
+        : [number] "{$0}" (number),
+          [arg1] "{$16}" (arg1),
+          [arg2] "{$17}" (arg2),
+          [arg3] "{$18}" (arg3),
+          [arg4] "{$19}" (arg4),
+          [arg5] "{$20}" (arg5),
+          [arg6] "{$21}" (arg6),
+        : .{
+          .r1 = true,
+          .r2 = true,
+          .r3 = true,
+          .r4 = true,
+          .r5 = true,
+          .r6 = true,
+          .r7 = true,
+          .r8 = true,
+          .r22 = true,
+          .r23 = true,
+          .r24 = true,
+          .r25 = true,
+          .r27 = true,
+          .r28 = true,
+          .memory = true,
+        });
+}
+
+pub fn clone() callconv(.naked) u64 {
+    // __clone(func, stack, flags, arg, ptid, tls, ctid)
+    //         a0,   a1,    a2,    a3,  a4,   a5,  +0
+    //
+    // syscall(SYS_clone, flags, stack, ptid, ctid, tls)
+    //         v0         a0,    a1,    a2,   a3,   a4
+    asm volatile (
+    // a0 = $16, a1 = $17, a2 = $18, a3 = $19,
+    // a4 = $20, a5 = $21, sp = $30, v0 = $0
+        \\ # Save function pointer and argument pointer on new thread stack
+        \\ ldi $1, -8
+        \\ and $17, $17, $1
+        \\ lda $17, -16($17)
+        \\ stq $16, 0($17)
+        \\ stq $19, 8($17)
+        \\
+        \\ # Shuffle (fn,sp,fl,arg,ptid,tls,ctid) to (fl,sp,ptid,ctid,tls)
+        \\ mov $18, $16
+        \\ mov $20, $18
+        \\ ldq $19, 0($30)
+        \\ mov $21, $20
+        \\
+        \\ # Actual syscall
+        \\ ldi $0, 312 # SYS_clone
+        \\ callsys
+        \\ beq $19, 1f
+        \\ negq $0, $0
+        \\ ret
+        \\1:
+        \\ beq $0, 2f
+        \\ ret
+        \\2:
+    );
+    if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
+    // ra = $26
+        \\ .cfi_undefined $26
+    );
+    asm volatile (
+    // v0 = $0, t9 = $23, a0 = $16, ra = $26, sp = $30, fp = $15
+        \\ mov 0, $15
+        \\
+        \\ ldq $23, 0($30)
+        \\ ldq $16, 8($30)
+        \\ lda $30, 16($30)
+        \\ jsr $26, ($23)
+        \\
+        \\ mov $0, $16
+        \\ ldi $0, 1 # SYS_EXIT
+        \\ callsys
+    );
+}
+
+pub fn restore() noreturn {
+    asm volatile (
+    // v0 = $0, a0 = $16, sp = $30
+        \\ mov $30, $16
+        \\ ldi $0, 103 # SIGRETURN
+        \\ callsys
+    );
+}
+
+pub fn restore_rt() noreturn {
+    asm volatile (
+    // v0 = $0, a0 = $16, sp = $30
+        \\ mov $30, $16
+        \\ ldi $0, 351 # RT_SIGRETURN
+        \\ callsys
+    );
+}
+
+pub const VDSO = void;