@zigc/lib 0.17.0-dev.340 → 0.17.0-dev.387

package/std/Target/riscv.zig

@@ -3370,6 +3370,103 @@ pub const cpu = struct {
             .zvl1024b,
         }),
     };
+    pub const spacemit_a100: CpuModel = .{
+        .name = "spacemit_a100",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .a,
+            .b,
+            .c,
+            .dlen_factor_2,
+            .i,
+            .m,
+            .optimized_nf2_segment_load_store,
+            .optimized_nf3_segment_load_store,
+            .optimized_nf4_segment_load_store,
+            .smepmp,
+            .smnpm,
+            .smstateen,
+            .ssccptr,
+            .sscofpmf,
+            .sscounterenw,
+            .ssnpm,
+            .sspm,
+            .sstc,
+            .sstvala,
+            .sstvecd,
+            .ssu64xl,
+            .supm,
+            .svade,
+            .svbare,
+            .svinval,
+            .svnapot,
+            .svpbmt,
+            .unaligned_scalar_mem,
+            .v,
+            .vxrm_pipeline_flush,
+            .za64rs,
+            .zawrs,
+            .zbc,
+            .zbkc,
+            .zcb,
+            .zcmop,
+            .zfa,
+            .zfh,
+            .zic64b,
+            .zicbom,
+            .zicbop,
+            .zicboz,
+            .ziccamoa,
+            .ziccif,
+            .zicclsm,
+            .ziccrse,
+            .zicntr,
+            .zicond,
+            .zifencei,
+            .zihintntl,
+            .zihintpause,
+            .zihpm,
+            .zimop,
+            .zkt,
+            .zvbb,
+            .zvfbfwma,
+            .zvfh,
+            .zvkng,
+            .zvknha,
+            .zvksc,
+            .zvksg,
+            .zvl1024b,
+        }),
+    };
+    pub const spacemit_x100: CpuModel = .{
+        .name = "spacemit_x100",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .dlen_factor_2,
+            .optimized_nf2_segment_load_store,
+            .optimized_nf3_segment_load_store,
+            .optimized_nf4_segment_load_store,
+            .rva23s64,
+            .smepmp,
+            .smnpm,
+            .smstateen,
+            .sspm,
+            .unaligned_scalar_mem,
+            .vxrm_pipeline_flush,
+            .xsmtvdot,
+            .zbc,
+            .zbkc,
+            .zfh,
+            .zvfbfwma,
+            .zvfh,
+            .zvkng,
+            .zvknha,
+            .zvksc,
+            .zvksg,
+            .zvl256b,
+        }),
+    };
     pub const spacemit_x60: CpuModel = .{
         .name = "spacemit_x60",
         .llvm_name = "spacemit-x60",

package/std/Target.zig

@@ -250,10 +250,12 @@ pub const Os = struct {
         win11_ga = 0x0A00000F, //aka win11_22h2
         win11_ge = 0x0A000010, //aka win11_23h2
         win11_dt = 0x0A000011, //aka win11_24h2
+        win11_br = 0x0A000012, //aka win11_25h2
+        win11_kr = 0x0A000013, //aka win11_26h1
         _,
 
         /// Latest Windows version that the Zig Standard Library is aware of
-        pub const latest = WindowsVersion.win11_dt;
+        pub const latest = WindowsVersion.win11_kr;
 
         /// Compared against build numbers reported by the runtime to distinguish win10 versions,
         /// where 0x0A000000 + index corresponds to the WindowsVersion u32 value.
@@ -276,6 +278,8 @@ pub const Os = struct {
             22621, //win11_ga aka win11_22h2
             22631, //win11_ge aka win11_23h2
             26100, //win11_dt aka win11_24h2
+            26200, //win11_br aka win11_25h2
+            28000, //win11_kr aka win11_26h1
         };
 
         /// Returns whether the first version `ver` is newer (greater) than or equal to the second version `ver`.
@@ -407,20 +411,20 @@ pub const Os = struct {
 
                 .contiki => .{
                     .semver = .{
-                        .min = .{ .major = 4, .minor = 0, .patch = 0 },
+                        .min = .{ .major = 5, .minor = 0, .patch = 0 },
                         .max = .{ .major = 5, .minor = 1, .patch = 0 },
                     },
                 },
                 .fuchsia => .{
                     .semver = .{
-                        .min = .{ .major = 1, .minor = 0, .patch = 0 },
-                        .max = .{ .major = 28, .minor = 0, .patch = 0 },
+                        .min = .{ .major = 27, .minor = 0, .patch = 0 },
+                        .max = .{ .major = 30, .minor = 0, .patch = 0 },
                     },
                 },
                 .hermit => .{
                     .semver = .{
-                        .min = .{ .major = 0, .minor = 5, .patch = 0 },
-                        .max = .{ .major = 0, .minor = 11, .patch = 0 },
+                        .min = .{ .major = 0, .minor = 8, .patch = 0 },
+                        .max = .{ .major = 0, .minor = 13, .patch = 2 },
                     },
                 },
 
@@ -430,7 +434,7 @@ pub const Os = struct {
                             .min = .{ .major = 0, .minor = 9, .patch = 0 },
                             .max = .{ .major = 0, .minor = 9, .patch = 0 },
                         },
-                        .glibc = .{ .major = 2, .minor = 28, .patch = 0 },
+                        .glibc = .{ .major = 2, .minor = 31, .patch = 0 },
                     },
                 },
                 .linux => .{
@@ -449,7 +453,7 @@ pub const Os = struct {
 
                                 break :blk default_min;
                             },
-                            .max = .{ .major = 6, .minor = 19, .patch = 0 },
+                            .max = .{ .major = 7, .minor = 0, .patch = 9 },
                         },
                         .glibc = blk: {
                             // For 32-bit targets that traditionally used 32-bit time, we require
@@ -490,14 +494,14 @@ pub const Os = struct {
                 },
                 .rtems => .{
                     .semver = .{
-                        .min = .{ .major = 5, .minor = 1, .patch = 0 },
-                        .max = .{ .major = 6, .minor = 1, .patch = 0 },
+                        .min = .{ .major = 5, .minor = 3, .patch = 0 },
+                        .max = .{ .major = 6, .minor = 2, .patch = 0 },
                     },
                 },
 
                 .dragonfly => .{
                     .semver = .{
-                        .min = .{ .major = 6, .minor = 0, .patch = 0 },
+                        .min = .{ .major = 6, .minor = 4, .patch = 0 },
                         .max = .{ .major = 6, .minor = 4, .patch = 2 },
                     },
                 },
@@ -516,7 +520,7 @@ pub const Os = struct {
 
                             break :blk default_min;
                         },
-                        .max = .{ .major = 15, .minor = 0, .patch = 0 },
+                        .max = .{ .major = 15, .minor = 1, .patch = 0 },
                     },
                 },
                 .netbsd => .{
@@ -559,37 +563,37 @@ pub const Os = struct {
                 .driverkit => .{
                     .semver = .{
                         .min = .{ .major = 20, .minor = 0, .patch = 0 },
-                        .max = .{ .major = 25, .minor = 0, .patch = 0 },
+                        .max = .{ .major = 25, .minor = 5, .patch = 0 },
                     },
                 },
                 .macos => .{
                     .semver = .{
-                        .min = .{ .major = 13, .minor = 0, .patch = 0 },
-                        .max = .{ .major = 15, .minor = 6, .patch = 0 },
+                        .min = .{ .major = 14, .minor = 0, .patch = 0 },
+                        .max = .{ .major = 26, .minor = 5, .patch = 0 },
                     },
                 },
                 .ios, .maccatalyst => .{
                     .semver = .{
                         .min = .{ .major = 15, .minor = 0, .patch = 0 },
-                        .max = .{ .major = 18, .minor = 6, .patch = 0 },
+                        .max = .{ .major = 26, .minor = 5, .patch = 0 },
                     },
                 },
                 .tvos => .{
                     .semver = .{
-                        .min = .{ .major = 15, .minor = 0, .patch = 0 },
-                        .max = .{ .major = 18, .minor = 5, .patch = 0 },
+                        .min = .{ .major = 26, .minor = 0, .patch = 0 },
+                        .max = .{ .major = 26, .minor = 5, .patch = 0 },
                     },
                 },
                 .visionos => .{
                     .semver = .{
-                        .min = .{ .major = 1, .minor = 0, .patch = 0 },
-                        .max = .{ .major = 2, .minor = 5, .patch = 0 },
+                        .min = .{ .major = 26, .minor = 0, .patch = 0 },
+                        .max = .{ .major = 26, .minor = 5, .patch = 0 },
                     },
                 },
                 .watchos => .{
                     .semver = .{
-                        .min = .{ .major = 8, .minor = 0, .patch = 0 },
-                        .max = .{ .major = 11, .minor = 6, .patch = 0 },
+                        .min = .{ .major = 11, .minor = 0, .patch = 0 },
+                        .max = .{ .major = 26, .minor = 5, .patch = 0 },
                     },
                 },
 
@@ -644,8 +648,8 @@ pub const Os = struct {
 
                 .amdhsa => .{
                     .semver = .{
-                        .min = .{ .major = 5, .minor = 0, .patch = 0 },
-                        .max = .{ .major = 7, .minor = 1, .patch = 0 },
+                        .min = .{ .major = 6, .minor = 1, .patch = 0 },
+                        .max = .{ .major = 7, .minor = 2, .patch = 3 },
                     },
                 },
                 .amdpal => .{
@@ -656,8 +660,8 @@ pub const Os = struct {
                 },
                 .cuda => .{
                     .semver = .{
-                        .min = .{ .major = 11, .minor = 0, .patch = 1 },
-                        .max = .{ .major = 13, .minor = 0, .patch = 2 },
+                        .min = .{ .major = 12, .minor = 5, .patch = 0 },
+                        .max = .{ .major = 13, .minor = 2, .patch = 0 },
                     },
                 },
                 .nvcl,
@@ -683,7 +687,7 @@ pub const Os = struct {
                 .vulkan => .{
                     .semver = .{
                         .min = .{ .major = 1, .minor = 2, .patch = 0 },
-                        .max = .{ .major = 1, .minor = 4, .patch = 331 },
+                        .max = .{ .major = 1, .minor = 4, .patch = 352 },
                     },
                 },
             };
@@ -751,6 +755,7 @@ pub const kvx = @import("Target/kvx.zig");
 pub const lanai = @import("Target/lanai.zig");
 pub const loongarch = @import("Target/loongarch.zig");
 pub const m68k = @import("Target/m68k.zig");
+pub const m88k = @import("Target/generic.zig");
 pub const microblaze = @import("Target/generic.zig");
 pub const mips = @import("Target/mips.zig");
 pub const msp430 = @import("Target/msp430.zig");
@@ -798,6 +803,7 @@ pub const Abi = enum {
     simulator,
     ohos,
     ohoseabi,
+    call0,
 
     // LLVM tags deliberately omitted:
     // - amplification
@@ -1091,6 +1097,7 @@ pub fn toElfMachine(target: *const Target) std.elf.EM {
         .kvx => .KVX,
         .lanai => .LANAI,
         .loongarch32, .loongarch64 => .LOONGARCH,
+        .m88k => .@"88K",
         .m68k => .@"68K",
         .microblaze, .microblazeel => .MICROBLAZE,
         .mips, .mips64, .mipsel, .mips64el => .MIPS,
@@ -1154,6 +1161,7 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE {
         .kalimba,
         .kvx,
         .lanai,
+        .m88k,
         .m68k,
         .microblaze,
         .microblazeel,
@@ -1364,6 +1372,7 @@ pub const Cpu = struct {
         loongarch32,
         loongarch64,
         m68k,
+        m88k,
         microblaze,
         microblazeel,
         mips,
@@ -1439,6 +1448,7 @@ pub const Cpu = struct {
             lanai,
             loongarch,
             m68k,
+            m88k,
             microblaze,
             mips,
             msp430,
@@ -1477,6 +1487,7 @@ pub const Cpu = struct {
                 .lanai => .lanai,
                 .loongarch32, .loongarch64 => .loongarch,
                 .m68k => .m68k,
+                .m88k => .m88k,
                 .microblaze, .microblazeel => .microblaze,
                 .mips, .mipsel, .mips64, .mips64el => .mips,
                 .msp430 => .msp430,
@@ -1710,6 +1721,7 @@ pub const Cpu = struct {
                 .hppa64,
                 .lanai,
                 .m68k,
+                .m88k,
                 .microblaze,
                 .mips,
                 .mips64,
@@ -1922,6 +1934,9 @@ pub const Cpu = struct {
                 .m68k_interrupt,
                 => &.{.m68k},
 
+                .m88k_sysv,
+                => &.{.m88k},
+
                 .microblaze_std,
                 .microblaze_interrupt,
                 => &.{ .microblaze, .microblazeel },
@@ -2046,6 +2061,7 @@ pub const Cpu = struct {
                 },
                 .armeb, .thumbeb => &arm.cpu.baseline,
                 .aarch64 => switch (os.tag) {
+                    .haiku => &aarch64.cpu.cortex_a55,
                     .driverkit, .maccatalyst, .macos => &aarch64.cpu.apple_m1,
                     .ios, .tvos => &aarch64.cpu.apple_a7,
                     .visionos => &aarch64.cpu.apple_m2,
@@ -2061,21 +2077,36 @@ pub const Cpu = struct {
                 .lanai => &lanai.cpu.v11, // clang does not have a generic lanai model.
                 .loongarch32 => &loongarch.cpu.la32v1_0,
                 .loongarch64 => &loongarch.cpu.la64v1_0,
-                .m68k => &m68k.cpu.M68000,
+                .m68k => &m68k.cpu.M68030,
                 .mips => &mips.cpu.mips32r2,
                 .mipsel => switch (os.tag) {
                     .psp => &mips.cpu.allegrex,
                     else => &mips.cpu.mips32r2,
                 },
-                .mips64, .mips64el => &mips.cpu.mips64r2,
+                .mips64 => switch (os.tag) {
+                    .openbsd => &mips.cpu.octeon,
+                    else => &mips.cpu.mips64r2,
+                },
+                .mips64el => &mips.cpu.mips64r2,
                 .msp430 => &msp430.cpu.msp430,
                 .nvptx, .nvptx64 => &nvptx.cpu.sm_52,
+                .powerpc => switch (os.tag) {
+                    .openbsd => &powerpc.cpu.@"750",
+                    else => generic(arch),
+                },
+                .powerpc64 => switch (os.tag) {
+                    .openbsd => &powerpc.cpu.pwr9,
+                    else => generic(arch),
+                },
                 .powerpc64le => &powerpc.cpu.ppc64le,
                 .riscv32, .riscv32be => &riscv.cpu.baseline_rv32,
                 .riscv64, .riscv64be => &riscv.cpu.baseline_rv64,
-                // gcc/clang do not have a generic s390x model.
-                .s390x => &s390x.cpu.arch8,
-                .sparc => &sparc.cpu.v9, // glibc does not work with 'plain' v8.
+                .s390x => &s390x.cpu.arch11,
+                .sparc => switch (os.tag) {
+                    .linux => &sparc.cpu.v9, // glibc does not work with 'plain' v8.
+                    else => generic(arch),
+                },
+                .sparc64 => &sparc.cpu.ultrasparc,
                 .x86 => &x86.cpu.pentium4,
                 .x86_64 => switch (os.tag) {
                     .driverkit, .maccatalyst => &x86.cpu.nehalem,
@@ -2085,6 +2116,7 @@ pub const Cpu = struct {
                     else => generic(arch),
                 },
                 .xcore => &xcore.cpu.xs1b_generic,
+                .xtensa => &xtensa.cpu.esp32,
                 .wasm32, .wasm64 => &wasm.cpu.lime1,
 
                 else => generic(arch),
@@ -2537,6 +2569,7 @@ pub const DynamicLinker = struct {
                     .m68k,
                     .microblaze,
                     .microblazeel,
+                    .or1k,
                     .powerpc64,
                     .powerpc64le,
                     .s390x,
@@ -2614,8 +2647,6 @@ pub const DynamicLinker = struct {
 
                     .arm,
                     .armeb,
-                    .thumb,
-                    .thumbeb,
                     => initFmt("/lib/ld-linux{s}.so.3", .{switch (abi) {
                         .gnueabi => "",
                         .gnueabihf => "-armhf",
@@ -2624,6 +2655,7 @@ pub const DynamicLinker = struct {
 
                     .aarch64,
                     .aarch64_be,
+                    .or1k,
                     => |arch| if (abi == .gnu) initFmt("/lib/ld-linux-{s}.so.1", .{@tagName(arch)}) else none,
 
                     // TODO: `-be` architecture support.
@@ -2786,6 +2818,7 @@ pub const DynamicLinker = struct {
                 .arm,
                 .aarch64,
                 .hppa,
+                .m88k,
                 .mips64,
                 .mips64el,
                 .powerpc,
@@ -2893,6 +2926,7 @@ pub fn ptrBitWidth_arch_abi(cpu_arch: Cpu.Arch, abi: Abi) u16 {
         .lanai,
         .loongarch32,
         .m68k,
+        .m88k,
         .microblaze,
         .microblazeel,
         .mips,
@@ -3478,6 +3512,7 @@ pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 {
             .hppa,
             .lanai,
             .m68k,
+            .m88k,
             .mips,
             .mipsel,
             .nvptx,
@@ -3587,6 +3622,7 @@ pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 {
             .hppa,
             .lanai,
             .m68k,
+            .m88k,
             .mips,
             .mipsel,
             .nvptx,
@@ -3658,6 +3694,7 @@ pub fn cMaxIntAlignment(target: *const Target) u16 {
         .lanai,
         .loongarch32,
         .m68k,
+        .m88k,
         .mips,
         .mipsel,
         .powerpc,
@@ -3706,7 +3743,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
         .x86_64 => switch (target.os.tag) {
             .windows, .uefi => .{ .x86_64_win = .{} },
             else => switch (target.abi) {
-                .gnuabin32, .muslabin32 => .{ .x86_64_x32 = .{} },
+                .gnux32, .muslx32 => .{ .x86_64_x32 = .{} },
                 else => .{ .x86_64_sysv = .{} },
             },
         },
@@ -3735,7 +3772,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
         .riscv32, .riscv32be => .{ .riscv32_ilp32 = .{} },
         .sparc64 => .{ .sparc64_sysv = .{} },
         .sparc => .{ .sparc_sysv = .{} },
-        .powerpc64 => if (target.abi.isGnu())
+        .powerpc64 => if (target.os.tag == .ps3 or target.abi.isGnu())
             .{ .powerpc64_elf = .{} }
         else
             .{ .powerpc64_elf_v2 = .{} },
@@ -3757,10 +3794,8 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
         .lanai => .{ .lanai_sysv = .{} },
         .loongarch64 => .{ .loongarch64_lp64 = .{} },
         .loongarch32 => .{ .loongarch32_ilp32 = .{} },
-        .m68k => if (target.abi.isGnu() or target.abi.isMusl())
-            .{ .m68k_gnu = .{} }
-        else
-            .{ .m68k_sysv = .{} },
+        .m68k => .{ .m68k_gnu = .{} },
+        .m88k => .{ .m88k_sysv = .{} },
         .microblaze, .microblazeel => .{ .microblaze_std = .{} },
         .msp430 => .{ .msp430_eabi = .{} },
         .or1k => .{ .or1k_sysv = .{} },

package/std/Thread.zig

@@ -1217,8 +1217,8 @@ const LinuxThreadImpl = struct {
                     \\ ldi $16, 0
                     \\ callsys
                     :
-                    : [ptr] "{r16}" (@intFromPtr(self.mapped.ptr)),
-                      [len] "{r17}" (self.mapped.len),
+                    : [ptr] "{$16}" (@intFromPtr(self.mapped.ptr)),
+                      [len] "{$17}" (self.mapped.len),
                 ),
                 .hexagon => asm volatile (
                     \\  r6 = #215 // SYS_munmap

package/std/array_list.zig

@@ -1152,14 +1152,14 @@ pub fn Aligned(comptime T: type, comptime alignment: ?mem.Alignment) type {
 
         /// Shrinks capacity to match length.
         /// May invalidate element pointers.
-        /// If succeds it is safe to call toOwnedSliceAssert().
+        /// If succeds it is safe to call `toOwnedSliceAssert`.
         pub fn shrinkToLen(self: *Self, gpa: Allocator) Allocator.Error!void {
             try self.shrinkAndFreePrecise(gpa, self.items.len);
         }
 
         /// Shrinks or expands capacity to match length + 1.
         /// May invalidate element pointers.
-        /// If succeds it is safe to call toOwnedSliceSentinelAssert().
+        /// If succeds it is safe to call `toOwnedSliceSentinelAssert`.
         pub fn shrinkToLenSentinel(self: *Self, gpa: Allocator) Allocator.Error!void {
             std.debug.assert(self.items.len <= self.capacity);
             const required_len = self.items.len + 1;

package/std/atomic.zig

@@ -442,10 +442,12 @@ pub fn cacheLineForCpu(cpu: std.Target.Cpu) u16 {
         // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/sparc/include/asm/cache.h#L14
         // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/microblaze/include/asm/cache.h#L15
         // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/sh/include/cpu-sh4/cpu/cache.h#L10
+        // - https://github.com/openbsd/src/blob/1957873d2063db11dab780eca75b5e629d1e838d/sys/arch/m88k/m88k/atomic.S#L22
         .arm,
         .armeb,
         .thumb,
         .thumbeb,
+        .m88k,
         .microblaze,
         .microblazeel,
         .mips,

package/std/debug/Dwarf.zig

@@ -1436,6 +1436,7 @@ pub fn compactUnwindToDwarfRegNumber(unwind_reg_number: u3) !u16 {
 pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
     return switch (arch) {
         .aarch64, .aarch64_be => 32,
+        .alpha => 64,
         .arc, .arceb => 160,
         .arm, .armeb, .thumb, .thumbeb => 15,
         .csky => 64,
@@ -1444,6 +1445,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
         .lanai => 2,
         .loongarch32, .loongarch64 => 64,
         .m68k => 26,
+        .m88k => 64,
         .mips, .mipsel, .mips64, .mips64el => 66,
         .or1k => 35,
         .powerpc, .powerpcle, .powerpc64, .powerpc64le => 67,
@@ -1460,6 +1462,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
 pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {
     return switch (arch) {
         .aarch64, .aarch64_be => 29,
+        .alpha => 15,
         .arc, .arceb => 27,
         .arm, .armeb, .thumb, .thumbeb => 11,
         .csky => 14,
@@ -1468,6 +1471,7 @@ pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {
         .lanai => 5,
         .loongarch32, .loongarch64 => 22,
         .m68k => 14,
+        .m88k => 30,
         .mips, .mipsel, .mips64, .mips64el => 30,
         .or1k => 2,
         .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1,
@@ -1484,6 +1488,7 @@ pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {
 pub fn spRegNum(arch: std.Target.Cpu.Arch) u16 {
     return switch (arch) {
         .aarch64, .aarch64_be => 31,
+        .alpha => 30,
         .arc, .arceb => 28,
         .arm, .armeb, .thumb, .thumbeb => 13,
         .csky => 14,
@@ -1492,6 +1497,7 @@ pub fn spRegNum(arch: std.Target.Cpu.Arch) u16 {
         .lanai => 4,
         .loongarch32, .loongarch64 => 3,
         .m68k => 15,
+        .m88k => 31,
         .mips, .mipsel, .mips64, .mips64el => 29,
         .or1k => 1,
         .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1,

package/std/debug/SelfInfo/Elf.zig

@@ -161,6 +161,7 @@ pub const can_unwind: bool = s: {
         // Not supported yet: arm
         .openbsd => &.{
             .aarch64,
+            .m88k,
             .mips64,
             .mips64el,
             .riscv64,